xref: /openbmc/linux/sound/soc/intel/skylake/skl.c (revision 5d0e4d78)
1 /*
2  *  skl.c - Implementation of ASoC Intel SKL HD Audio driver
3  *
4  *  Copyright (C) 2014-2015 Intel Corp
5  *  Author: Jeeja KP <jeeja.kp@intel.com>
6  *
7  *  Derived mostly from Intel HDA driver with following copyrights:
8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9  *                     PeiSen Hou <pshou@realtek.com.tw>
10  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11  *
12  *  This program is free software; you can redistribute it and/or modify
13  *  it under the terms of the GNU General Public License as published by
14  *  the Free Software Foundation; version 2 of the License.
15  *
16  *  This program is distributed in the hope that it will be useful, but
17  *  WITHOUT ANY WARRANTY; without even the implied warranty of
18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *  General Public License for more details.
20  *
21  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22  */
23 
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <linux/delay.h>
30 #include <sound/pcm.h>
31 #include "../common/sst-acpi.h"
32 #include <sound/hda_register.h>
33 #include <sound/hdaudio.h>
34 #include <sound/hda_i915.h>
35 #include "skl.h"
36 #include "skl-sst-dsp.h"
37 #include "skl-sst-ipc.h"
38 
39 static struct skl_machine_pdata skl_dmic_data;
40 
41 /*
42  * initialize the PCI registers
43  */
44 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
45 			    unsigned char mask, unsigned char val)
46 {
47 	unsigned char data;
48 
49 	pci_read_config_byte(pci, reg, &data);
50 	data &= ~mask;
51 	data |= (val & mask);
52 	pci_write_config_byte(pci, reg, data);
53 }
54 
55 static void skl_init_pci(struct skl *skl)
56 {
57 	struct hdac_ext_bus *ebus = &skl->ebus;
58 
59 	/*
60 	 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
61 	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
62 	 * Ensuring these bits are 0 clears playback static on some HD Audio
63 	 * codecs.
64 	 * The PCI register TCSEL is defined in the Intel manuals.
65 	 */
66 	dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
67 	skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
68 }
69 
70 static void update_pci_dword(struct pci_dev *pci,
71 			unsigned int reg, u32 mask, u32 val)
72 {
73 	u32 data = 0;
74 
75 	pci_read_config_dword(pci, reg, &data);
76 	data &= ~mask;
77 	data |= (val & mask);
78 	pci_write_config_dword(pci, reg, data);
79 }
80 
81 /*
82  * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
83  *
84  * @dev: device pointer
85  * @enable: enable/disable flag
86  */
87 static void skl_enable_miscbdcge(struct device *dev, bool enable)
88 {
89 	struct pci_dev *pci = to_pci_dev(dev);
90 	u32 val;
91 
92 	val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
93 
94 	update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
95 }
96 
97 /*
98  * While performing reset, controller may not come back properly causing
99  * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
100  * (init chip) and then again set CGCTL.MISCBDCGE to 1
101  */
102 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
103 {
104 	int ret;
105 
106 	skl_enable_miscbdcge(bus->dev, false);
107 	ret = snd_hdac_bus_init_chip(bus, full_reset);
108 	skl_enable_miscbdcge(bus->dev, true);
109 
110 	return ret;
111 }
112 
113 void skl_update_d0i3c(struct device *dev, bool enable)
114 {
115 	struct pci_dev *pci = to_pci_dev(dev);
116 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
117 	struct hdac_bus *bus = ebus_to_hbus(ebus);
118 	u8 reg;
119 	int timeout = 50;
120 
121 	reg = snd_hdac_chip_readb(bus, VS_D0I3C);
122 	/* Do not write to D0I3C until command in progress bit is cleared */
123 	while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
124 		udelay(10);
125 		reg = snd_hdac_chip_readb(bus, VS_D0I3C);
126 	}
127 
128 	/* Highly unlikely. But if it happens, flag error explicitly */
129 	if (!timeout) {
130 		dev_err(bus->dev, "Before D0I3C update: D0I3C CIP timeout\n");
131 		return;
132 	}
133 
134 	if (enable)
135 		reg = reg | AZX_REG_VS_D0I3C_I3;
136 	else
137 		reg = reg & (~AZX_REG_VS_D0I3C_I3);
138 
139 	snd_hdac_chip_writeb(bus, VS_D0I3C, reg);
140 
141 	timeout = 50;
142 	/* Wait for cmd in progress to be cleared before exiting the function */
143 	reg = snd_hdac_chip_readb(bus, VS_D0I3C);
144 	while ((reg & AZX_REG_VS_D0I3C_CIP) && --timeout) {
145 		udelay(10);
146 		reg = snd_hdac_chip_readb(bus, VS_D0I3C);
147 	}
148 
149 	/* Highly unlikely. But if it happens, flag error explicitly */
150 	if (!timeout) {
151 		dev_err(bus->dev, "After D0I3C update: D0I3C CIP timeout\n");
152 		return;
153 	}
154 
155 	dev_dbg(bus->dev, "D0I3C register = 0x%x\n",
156 			snd_hdac_chip_readb(bus, VS_D0I3C));
157 }
158 
159 /* called from IRQ */
160 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
161 {
162 	snd_pcm_period_elapsed(hstr->substream);
163 }
164 
165 static irqreturn_t skl_interrupt(int irq, void *dev_id)
166 {
167 	struct hdac_ext_bus *ebus = dev_id;
168 	struct hdac_bus *bus = ebus_to_hbus(ebus);
169 	u32 status;
170 
171 	if (!pm_runtime_active(bus->dev))
172 		return IRQ_NONE;
173 
174 	spin_lock(&bus->reg_lock);
175 
176 	status = snd_hdac_chip_readl(bus, INTSTS);
177 	if (status == 0 || status == 0xffffffff) {
178 		spin_unlock(&bus->reg_lock);
179 		return IRQ_NONE;
180 	}
181 
182 	/* clear rirb int */
183 	status = snd_hdac_chip_readb(bus, RIRBSTS);
184 	if (status & RIRB_INT_MASK) {
185 		if (status & RIRB_INT_RESPONSE)
186 			snd_hdac_bus_update_rirb(bus);
187 		snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
188 	}
189 
190 	spin_unlock(&bus->reg_lock);
191 
192 	return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
193 }
194 
195 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
196 {
197 	struct hdac_ext_bus *ebus = dev_id;
198 	struct hdac_bus *bus = ebus_to_hbus(ebus);
199 	u32 status;
200 
201 	status = snd_hdac_chip_readl(bus, INTSTS);
202 
203 	snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
204 
205 	return IRQ_HANDLED;
206 }
207 
208 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
209 {
210 	struct skl *skl = ebus_to_skl(ebus);
211 	struct hdac_bus *bus = ebus_to_hbus(ebus);
212 	int ret;
213 
214 	ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
215 			skl_threaded_handler,
216 			IRQF_SHARED,
217 			KBUILD_MODNAME, ebus);
218 	if (ret) {
219 		dev_err(bus->dev,
220 			"unable to grab IRQ %d, disabling device\n",
221 			skl->pci->irq);
222 		return ret;
223 	}
224 
225 	bus->irq = skl->pci->irq;
226 	pci_intx(skl->pci, 1);
227 
228 	return 0;
229 }
230 
231 static int skl_suspend_late(struct device *dev)
232 {
233 	struct pci_dev *pci = to_pci_dev(dev);
234 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
235 	struct skl *skl = ebus_to_skl(ebus);
236 
237 	return skl_suspend_late_dsp(skl);
238 }
239 
240 #ifdef CONFIG_PM
241 static int _skl_suspend(struct hdac_ext_bus *ebus)
242 {
243 	struct skl *skl = ebus_to_skl(ebus);
244 	struct hdac_bus *bus = ebus_to_hbus(ebus);
245 	struct pci_dev *pci = to_pci_dev(bus->dev);
246 	int ret;
247 
248 	snd_hdac_ext_bus_link_power_down_all(ebus);
249 
250 	ret = skl_suspend_dsp(skl);
251 	if (ret < 0)
252 		return ret;
253 
254 	snd_hdac_bus_stop_chip(bus);
255 	update_pci_dword(pci, AZX_PCIREG_PGCTL,
256 		AZX_PGCTL_LSRMD_MASK, AZX_PGCTL_LSRMD_MASK);
257 	skl_enable_miscbdcge(bus->dev, false);
258 	snd_hdac_bus_enter_link_reset(bus);
259 	skl_enable_miscbdcge(bus->dev, true);
260 	skl_cleanup_resources(skl);
261 
262 	return 0;
263 }
264 
265 static int _skl_resume(struct hdac_ext_bus *ebus)
266 {
267 	struct skl *skl = ebus_to_skl(ebus);
268 	struct hdac_bus *bus = ebus_to_hbus(ebus);
269 
270 	skl_init_pci(skl);
271 	skl_init_chip(bus, true);
272 
273 	return skl_resume_dsp(skl);
274 }
275 #endif
276 
277 #ifdef CONFIG_PM_SLEEP
278 /*
279  * power management
280  */
281 static int skl_suspend(struct device *dev)
282 {
283 	struct pci_dev *pci = to_pci_dev(dev);
284 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
285 	struct skl *skl  = ebus_to_skl(ebus);
286 	struct hdac_bus *bus = ebus_to_hbus(ebus);
287 	int ret = 0;
288 
289 	/*
290 	 * Do not suspend if streams which are marked ignore suspend are
291 	 * running, we need to save the state for these and continue
292 	 */
293 	if (skl->supend_active) {
294 		/* turn off the links and stop the CORB/RIRB DMA if it is On */
295 		snd_hdac_ext_bus_link_power_down_all(ebus);
296 
297 		if (ebus->cmd_dma_state)
298 			snd_hdac_bus_stop_cmd_io(&ebus->bus);
299 
300 		enable_irq_wake(bus->irq);
301 		pci_save_state(pci);
302 	} else {
303 		ret = _skl_suspend(ebus);
304 		if (ret < 0)
305 			return ret;
306 		skl->skl_sst->fw_loaded = false;
307 	}
308 
309 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
310 		ret = snd_hdac_display_power(bus, false);
311 		if (ret < 0)
312 			dev_err(bus->dev,
313 				"Cannot turn OFF display power on i915\n");
314 	}
315 
316 	return ret;
317 }
318 
319 static int skl_resume(struct device *dev)
320 {
321 	struct pci_dev *pci = to_pci_dev(dev);
322 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
323 	struct skl *skl  = ebus_to_skl(ebus);
324 	struct hdac_bus *bus = ebus_to_hbus(ebus);
325 	struct hdac_ext_link *hlink = NULL;
326 	int ret;
327 
328 	/* Turned OFF in HDMI codec driver after codec reconfiguration */
329 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
330 		ret = snd_hdac_display_power(bus, true);
331 		if (ret < 0) {
332 			dev_err(bus->dev,
333 				"Cannot turn on display power on i915\n");
334 			return ret;
335 		}
336 	}
337 
338 	/*
339 	 * resume only when we are not in suspend active, otherwise need to
340 	 * restore the device
341 	 */
342 	if (skl->supend_active) {
343 		pci_restore_state(pci);
344 		snd_hdac_ext_bus_link_power_up_all(ebus);
345 		disable_irq_wake(bus->irq);
346 		/*
347 		 * turn On the links which are On before active suspend
348 		 * and start the CORB/RIRB DMA if On before
349 		 * active suspend.
350 		 */
351 		list_for_each_entry(hlink, &ebus->hlink_list, list) {
352 			if (hlink->ref_count)
353 				snd_hdac_ext_bus_link_power_up(hlink);
354 		}
355 
356 		if (ebus->cmd_dma_state)
357 			snd_hdac_bus_init_cmd_io(&ebus->bus);
358 	} else {
359 		ret = _skl_resume(ebus);
360 
361 		/* turn off the links which are off before suspend */
362 		list_for_each_entry(hlink, &ebus->hlink_list, list) {
363 			if (!hlink->ref_count)
364 				snd_hdac_ext_bus_link_power_down(hlink);
365 		}
366 
367 		if (!ebus->cmd_dma_state)
368 			snd_hdac_bus_stop_cmd_io(&ebus->bus);
369 	}
370 
371 	return ret;
372 }
373 #endif /* CONFIG_PM_SLEEP */
374 
375 #ifdef CONFIG_PM
376 static int skl_runtime_suspend(struct device *dev)
377 {
378 	struct pci_dev *pci = to_pci_dev(dev);
379 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
380 	struct hdac_bus *bus = ebus_to_hbus(ebus);
381 
382 	dev_dbg(bus->dev, "in %s\n", __func__);
383 
384 	return _skl_suspend(ebus);
385 }
386 
387 static int skl_runtime_resume(struct device *dev)
388 {
389 	struct pci_dev *pci = to_pci_dev(dev);
390 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
391 	struct hdac_bus *bus = ebus_to_hbus(ebus);
392 
393 	dev_dbg(bus->dev, "in %s\n", __func__);
394 
395 	return _skl_resume(ebus);
396 }
397 #endif /* CONFIG_PM */
398 
399 static const struct dev_pm_ops skl_pm = {
400 	SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
401 	SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
402 	.suspend_late = skl_suspend_late,
403 };
404 
405 /*
406  * destructor
407  */
408 static int skl_free(struct hdac_ext_bus *ebus)
409 {
410 	struct skl *skl  = ebus_to_skl(ebus);
411 	struct hdac_bus *bus = ebus_to_hbus(ebus);
412 
413 	skl->init_done = 0; /* to be sure */
414 
415 	snd_hdac_ext_stop_streams(ebus);
416 
417 	if (bus->irq >= 0)
418 		free_irq(bus->irq, (void *)bus);
419 	snd_hdac_bus_free_stream_pages(bus);
420 	snd_hdac_stream_free_all(ebus);
421 	snd_hdac_link_free_all(ebus);
422 
423 	if (bus->remap_addr)
424 		iounmap(bus->remap_addr);
425 
426 	pci_release_regions(skl->pci);
427 	pci_disable_device(skl->pci);
428 
429 	snd_hdac_ext_bus_exit(ebus);
430 
431 	cancel_work_sync(&skl->probe_work);
432 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
433 		snd_hdac_i915_exit(&ebus->bus);
434 
435 	return 0;
436 }
437 
438 static int skl_machine_device_register(struct skl *skl, void *driver_data)
439 {
440 	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
441 	struct platform_device *pdev;
442 	struct sst_acpi_mach *mach = driver_data;
443 	int ret;
444 
445 	mach = sst_acpi_find_machine(mach);
446 	if (mach == NULL) {
447 		dev_err(bus->dev, "No matching machine driver found\n");
448 		return -ENODEV;
449 	}
450 	skl->fw_name = mach->fw_filename;
451 
452 	pdev = platform_device_alloc(mach->drv_name, -1);
453 	if (pdev == NULL) {
454 		dev_err(bus->dev, "platform device alloc failed\n");
455 		return -EIO;
456 	}
457 
458 	ret = platform_device_add(pdev);
459 	if (ret) {
460 		dev_err(bus->dev, "failed to add machine device\n");
461 		platform_device_put(pdev);
462 		return -EIO;
463 	}
464 
465 	if (mach->pdata)
466 		dev_set_drvdata(&pdev->dev, mach->pdata);
467 
468 	skl->i2s_dev = pdev;
469 
470 	return 0;
471 }
472 
473 static void skl_machine_device_unregister(struct skl *skl)
474 {
475 	if (skl->i2s_dev)
476 		platform_device_unregister(skl->i2s_dev);
477 }
478 
479 static int skl_dmic_device_register(struct skl *skl)
480 {
481 	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
482 	struct platform_device *pdev;
483 	int ret;
484 
485 	/* SKL has one dmic port, so allocate dmic device for this */
486 	pdev = platform_device_alloc("dmic-codec", -1);
487 	if (!pdev) {
488 		dev_err(bus->dev, "failed to allocate dmic device\n");
489 		return -ENOMEM;
490 	}
491 
492 	ret = platform_device_add(pdev);
493 	if (ret) {
494 		dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
495 		platform_device_put(pdev);
496 		return ret;
497 	}
498 	skl->dmic_dev = pdev;
499 
500 	return 0;
501 }
502 
503 static void skl_dmic_device_unregister(struct skl *skl)
504 {
505 	if (skl->dmic_dev)
506 		platform_device_unregister(skl->dmic_dev);
507 }
508 
509 /*
510  * Probe the given codec address
511  */
512 static int probe_codec(struct hdac_ext_bus *ebus, int addr)
513 {
514 	struct hdac_bus *bus = ebus_to_hbus(ebus);
515 	unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
516 		(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
517 	unsigned int res = -1;
518 
519 	mutex_lock(&bus->cmd_mutex);
520 	snd_hdac_bus_send_cmd(bus, cmd);
521 	snd_hdac_bus_get_response(bus, addr, &res);
522 	mutex_unlock(&bus->cmd_mutex);
523 	if (res == -1)
524 		return -EIO;
525 	dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
526 
527 	return snd_hdac_ext_bus_device_init(ebus, addr);
528 }
529 
530 /* Codec initialization */
531 static int skl_codec_create(struct hdac_ext_bus *ebus)
532 {
533 	struct hdac_bus *bus = ebus_to_hbus(ebus);
534 	int c, max_slots;
535 
536 	max_slots = HDA_MAX_CODECS;
537 
538 	/* First try to probe all given codec slots */
539 	for (c = 0; c < max_slots; c++) {
540 		if ((bus->codec_mask & (1 << c))) {
541 			if (probe_codec(ebus, c) < 0) {
542 				/*
543 				 * Some BIOSen give you wrong codec addresses
544 				 * that don't exist
545 				 */
546 				dev_warn(bus->dev,
547 					 "Codec #%d probe error; disabling it...\n", c);
548 				bus->codec_mask &= ~(1 << c);
549 				/*
550 				 * More badly, accessing to a non-existing
551 				 * codec often screws up the controller bus,
552 				 * and disturbs the further communications.
553 				 * Thus if an error occurs during probing,
554 				 * better to reset the controller bus to get
555 				 * back to the sanity state.
556 				 */
557 				snd_hdac_bus_stop_chip(bus);
558 				skl_init_chip(bus, true);
559 			}
560 		}
561 	}
562 
563 	return 0;
564 }
565 
566 static const struct hdac_bus_ops bus_core_ops = {
567 	.command = snd_hdac_bus_send_cmd,
568 	.get_response = snd_hdac_bus_get_response,
569 };
570 
571 static int skl_i915_init(struct hdac_bus *bus)
572 {
573 	int err;
574 
575 	/*
576 	 * The HDMI codec is in GPU so we need to ensure that it is powered
577 	 * up and ready for probe
578 	 */
579 	err = snd_hdac_i915_init(bus);
580 	if (err < 0)
581 		return err;
582 
583 	err = snd_hdac_display_power(bus, true);
584 	if (err < 0)
585 		dev_err(bus->dev, "Cannot turn on display power on i915\n");
586 
587 	return err;
588 }
589 
590 static void skl_probe_work(struct work_struct *work)
591 {
592 	struct skl *skl = container_of(work, struct skl, probe_work);
593 	struct hdac_ext_bus *ebus = &skl->ebus;
594 	struct hdac_bus *bus = ebus_to_hbus(ebus);
595 	struct hdac_ext_link *hlink = NULL;
596 	int err;
597 
598 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
599 		err = skl_i915_init(bus);
600 		if (err < 0)
601 			return;
602 	}
603 
604 	err = skl_init_chip(bus, true);
605 	if (err < 0) {
606 		dev_err(bus->dev, "Init chip failed with err: %d\n", err);
607 		goto out_err;
608 	}
609 
610 	/* codec detection */
611 	if (!bus->codec_mask)
612 		dev_info(bus->dev, "no hda codecs found!\n");
613 
614 	/* create codec instances */
615 	err = skl_codec_create(ebus);
616 	if (err < 0)
617 		goto out_err;
618 
619 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
620 		err = snd_hdac_display_power(bus, false);
621 		if (err < 0) {
622 			dev_err(bus->dev, "Cannot turn off display power on i915\n");
623 			return;
624 		}
625 	}
626 
627 	/* register platform dai and controls */
628 	err = skl_platform_register(bus->dev);
629 	if (err < 0)
630 		return;
631 	/*
632 	 * we are done probing so decrement link counts
633 	 */
634 	list_for_each_entry(hlink, &ebus->hlink_list, list)
635 		snd_hdac_ext_bus_link_put(ebus, hlink);
636 
637 	/* configure PM */
638 	pm_runtime_put_noidle(bus->dev);
639 	pm_runtime_allow(bus->dev);
640 	skl->init_done = 1;
641 
642 	return;
643 
644 out_err:
645 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
646 		err = snd_hdac_display_power(bus, false);
647 }
648 
649 /*
650  * constructor
651  */
652 static int skl_create(struct pci_dev *pci,
653 		      const struct hdac_io_ops *io_ops,
654 		      struct skl **rskl)
655 {
656 	struct skl *skl;
657 	struct hdac_ext_bus *ebus;
658 
659 	int err;
660 
661 	*rskl = NULL;
662 
663 	err = pci_enable_device(pci);
664 	if (err < 0)
665 		return err;
666 
667 	skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
668 	if (!skl) {
669 		pci_disable_device(pci);
670 		return -ENOMEM;
671 	}
672 	ebus = &skl->ebus;
673 	snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
674 	ebus->bus.use_posbuf = 1;
675 	skl->pci = pci;
676 	INIT_WORK(&skl->probe_work, skl_probe_work);
677 
678 	ebus->bus.bdl_pos_adj = 0;
679 
680 	*rskl = skl;
681 
682 	return 0;
683 }
684 
685 static int skl_first_init(struct hdac_ext_bus *ebus)
686 {
687 	struct skl *skl = ebus_to_skl(ebus);
688 	struct hdac_bus *bus = ebus_to_hbus(ebus);
689 	struct pci_dev *pci = skl->pci;
690 	int err;
691 	unsigned short gcap;
692 	int cp_streams, pb_streams, start_idx;
693 
694 	err = pci_request_regions(pci, "Skylake HD audio");
695 	if (err < 0)
696 		return err;
697 
698 	bus->addr = pci_resource_start(pci, 0);
699 	bus->remap_addr = pci_ioremap_bar(pci, 0);
700 	if (bus->remap_addr == NULL) {
701 		dev_err(bus->dev, "ioremap error\n");
702 		return -ENXIO;
703 	}
704 
705 	snd_hdac_bus_parse_capabilities(bus);
706 
707 	if (skl_acquire_irq(ebus, 0) < 0)
708 		return -EBUSY;
709 
710 	pci_set_master(pci);
711 	synchronize_irq(bus->irq);
712 
713 	gcap = snd_hdac_chip_readw(bus, GCAP);
714 	dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
715 
716 	/* allow 64bit DMA address if supported by H/W */
717 	if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
718 		dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
719 	} else {
720 		dma_set_mask(bus->dev, DMA_BIT_MASK(32));
721 		dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
722 	}
723 
724 	/* read number of streams from GCAP register */
725 	cp_streams = (gcap >> 8) & 0x0f;
726 	pb_streams = (gcap >> 12) & 0x0f;
727 
728 	if (!pb_streams && !cp_streams)
729 		return -EIO;
730 
731 	ebus->num_streams = cp_streams + pb_streams;
732 
733 	/* initialize streams */
734 	snd_hdac_ext_stream_init_all
735 		(ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
736 	start_idx = cp_streams;
737 	snd_hdac_ext_stream_init_all
738 		(ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
739 
740 	err = snd_hdac_bus_alloc_stream_pages(bus);
741 	if (err < 0)
742 		return err;
743 
744 	/* initialize chip */
745 	skl_init_pci(skl);
746 
747 	return skl_init_chip(bus, true);
748 }
749 
750 static int skl_probe(struct pci_dev *pci,
751 		     const struct pci_device_id *pci_id)
752 {
753 	struct skl *skl;
754 	struct hdac_ext_bus *ebus = NULL;
755 	struct hdac_bus *bus = NULL;
756 	int err;
757 
758 	/* we use ext core ops, so provide NULL for ops here */
759 	err = skl_create(pci, NULL, &skl);
760 	if (err < 0)
761 		return err;
762 
763 	ebus = &skl->ebus;
764 	bus = ebus_to_hbus(ebus);
765 
766 	err = skl_first_init(ebus);
767 	if (err < 0)
768 		goto out_free;
769 
770 	skl->pci_id = pci->device;
771 
772 	device_disable_async_suspend(bus->dev);
773 
774 	skl->nhlt = skl_nhlt_init(bus->dev);
775 
776 	if (skl->nhlt == NULL) {
777 		err = -ENODEV;
778 		goto out_free;
779 	}
780 
781 	err = skl_nhlt_create_sysfs(skl);
782 	if (err < 0)
783 		goto out_nhlt_free;
784 
785 	skl_nhlt_update_topology_bin(skl);
786 
787 	pci_set_drvdata(skl->pci, ebus);
788 
789 	skl_dmic_data.dmic_num = skl_get_dmic_geo(skl);
790 
791 	/* check if dsp is there */
792 	if (bus->ppcap) {
793 		err = skl_machine_device_register(skl,
794 				  (void *)pci_id->driver_data);
795 		if (err < 0)
796 			goto out_nhlt_free;
797 
798 		err = skl_init_dsp(skl);
799 		if (err < 0) {
800 			dev_dbg(bus->dev, "error failed to register dsp\n");
801 			goto out_mach_free;
802 		}
803 		skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
804 
805 	}
806 	if (bus->mlcap)
807 		snd_hdac_ext_bus_get_ml_capabilities(ebus);
808 
809 	snd_hdac_bus_stop_chip(bus);
810 
811 	/* create device for soc dmic */
812 	err = skl_dmic_device_register(skl);
813 	if (err < 0)
814 		goto out_dsp_free;
815 
816 	schedule_work(&skl->probe_work);
817 
818 	return 0;
819 
820 out_dsp_free:
821 	skl_free_dsp(skl);
822 out_mach_free:
823 	skl_machine_device_unregister(skl);
824 out_nhlt_free:
825 	skl_nhlt_free(skl->nhlt);
826 out_free:
827 	skl_free(ebus);
828 
829 	return err;
830 }
831 
832 static void skl_shutdown(struct pci_dev *pci)
833 {
834 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
835 	struct hdac_bus *bus = ebus_to_hbus(ebus);
836 	struct hdac_stream *s;
837 	struct hdac_ext_stream *stream;
838 	struct skl *skl;
839 
840 	if (ebus == NULL)
841 		return;
842 
843 	skl = ebus_to_skl(ebus);
844 
845 	if (!skl->init_done)
846 		return;
847 
848 	snd_hdac_ext_stop_streams(ebus);
849 	list_for_each_entry(s, &bus->stream_list, list) {
850 		stream = stream_to_hdac_ext_stream(s);
851 		snd_hdac_ext_stream_decouple(ebus, stream, false);
852 	}
853 
854 	snd_hdac_bus_stop_chip(bus);
855 }
856 
857 static void skl_remove(struct pci_dev *pci)
858 {
859 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
860 	struct skl *skl = ebus_to_skl(ebus);
861 
862 	release_firmware(skl->tplg);
863 
864 	pm_runtime_get_noresume(&pci->dev);
865 
866 	/* codec removal, invoke bus_device_remove */
867 	snd_hdac_ext_bus_device_remove(ebus);
868 
869 	skl->debugfs = NULL;
870 	skl_platform_unregister(&pci->dev);
871 	skl_free_dsp(skl);
872 	skl_machine_device_unregister(skl);
873 	skl_dmic_device_unregister(skl);
874 	skl_nhlt_remove_sysfs(skl);
875 	skl_nhlt_free(skl->nhlt);
876 	skl_free(ebus);
877 	dev_set_drvdata(&pci->dev, NULL);
878 }
879 
880 static struct sst_codecs skl_codecs = {
881 	.num_codecs = 1,
882 	.codecs = {"NAU88L25"}
883 };
884 
885 static struct sst_codecs kbl_codecs = {
886 	.num_codecs = 1,
887 	.codecs = {"NAU88L25"}
888 };
889 
890 static struct sst_codecs bxt_codecs = {
891 	.num_codecs = 1,
892 	.codecs = {"MX98357A"}
893 };
894 
895 static struct sst_codecs kbl_poppy_codecs = {
896 	.num_codecs = 1,
897 	.codecs = {"10EC5663"}
898 };
899 
900 static struct sst_codecs kbl_5663_5514_codecs = {
901 	.num_codecs = 2,
902 	.codecs = {"10EC5663", "10EC5514"}
903 };
904 
905 
906 static struct sst_acpi_mach sst_skl_devdata[] = {
907 	{
908 		.id = "INT343A",
909 		.drv_name = "skl_alc286s_i2s",
910 		.fw_filename = "intel/dsp_fw_release.bin",
911 	},
912 	{
913 		.id = "INT343B",
914 		.drv_name = "skl_n88l25_s4567",
915 		.fw_filename = "intel/dsp_fw_release.bin",
916 		.machine_quirk = sst_acpi_codec_list,
917 		.quirk_data = &skl_codecs,
918 		.pdata = &skl_dmic_data
919 	},
920 	{
921 		.id = "MX98357A",
922 		.drv_name = "skl_n88l25_m98357a",
923 		.fw_filename = "intel/dsp_fw_release.bin",
924 		.machine_quirk = sst_acpi_codec_list,
925 		.quirk_data = &skl_codecs,
926 		.pdata = &skl_dmic_data
927 	},
928 	{}
929 };
930 
931 static struct sst_acpi_mach sst_bxtp_devdata[] = {
932 	{
933 		.id = "INT343A",
934 		.drv_name = "bxt_alc298s_i2s",
935 		.fw_filename = "intel/dsp_fw_bxtn.bin",
936 	},
937 	{
938 		.id = "DLGS7219",
939 		.drv_name = "bxt_da7219_max98357a_i2s",
940 		.fw_filename = "intel/dsp_fw_bxtn.bin",
941 		.machine_quirk = sst_acpi_codec_list,
942 		.quirk_data = &bxt_codecs,
943 	},
944 };
945 
946 static struct sst_acpi_mach sst_kbl_devdata[] = {
947 	{
948 		.id = "INT343A",
949 		.drv_name = "kbl_alc286s_i2s",
950 		.fw_filename = "intel/dsp_fw_kbl.bin",
951 	},
952 	{
953 		.id = "INT343B",
954 		.drv_name = "kbl_n88l25_s4567",
955 		.fw_filename = "intel/dsp_fw_kbl.bin",
956 		.machine_quirk = sst_acpi_codec_list,
957 		.quirk_data = &kbl_codecs,
958 		.pdata = &skl_dmic_data
959 	},
960 	{
961 		.id = "MX98357A",
962 		.drv_name = "kbl_n88l25_m98357a",
963 		.fw_filename = "intel/dsp_fw_kbl.bin",
964 		.machine_quirk = sst_acpi_codec_list,
965 		.quirk_data = &kbl_codecs,
966 		.pdata = &skl_dmic_data
967 	},
968 	{
969 		.id = "MX98927",
970 		.drv_name = "kbl_r5514_5663_max",
971 		.fw_filename = "intel/dsp_fw_kbl.bin",
972 		.machine_quirk = sst_acpi_codec_list,
973 		.quirk_data = &kbl_5663_5514_codecs,
974 		.pdata = &skl_dmic_data
975 	},
976 	{
977 		.id = "MX98927",
978 		.drv_name = "kbl_rt5663_m98927",
979 		.fw_filename = "intel/dsp_fw_kbl.bin",
980 		.machine_quirk = sst_acpi_codec_list,
981 		.quirk_data = &kbl_poppy_codecs,
982 		.pdata = &skl_dmic_data
983 	},
984 
985 	{}
986 };
987 
988 static struct sst_acpi_mach sst_glk_devdata[] = {
989 	{
990 		.id = "INT343A",
991 		.drv_name = "glk_alc298s_i2s",
992 		.fw_filename = "intel/dsp_fw_glk.bin",
993 	},
994 };
995 
996 /* PCI IDs */
997 static const struct pci_device_id skl_ids[] = {
998 	/* Sunrise Point-LP */
999 	{ PCI_DEVICE(0x8086, 0x9d70),
1000 		.driver_data = (unsigned long)&sst_skl_devdata},
1001 	/* BXT-P */
1002 	{ PCI_DEVICE(0x8086, 0x5a98),
1003 		.driver_data = (unsigned long)&sst_bxtp_devdata},
1004 	/* KBL */
1005 	{ PCI_DEVICE(0x8086, 0x9D71),
1006 		.driver_data = (unsigned long)&sst_kbl_devdata},
1007 	/* GLK */
1008 	{ PCI_DEVICE(0x8086, 0x3198),
1009 		.driver_data = (unsigned long)&sst_glk_devdata},
1010 	{ 0, }
1011 };
1012 MODULE_DEVICE_TABLE(pci, skl_ids);
1013 
1014 /* pci_driver definition */
1015 static struct pci_driver skl_driver = {
1016 	.name = KBUILD_MODNAME,
1017 	.id_table = skl_ids,
1018 	.probe = skl_probe,
1019 	.remove = skl_remove,
1020 	.shutdown = skl_shutdown,
1021 	.driver = {
1022 		.pm = &skl_pm,
1023 	},
1024 };
1025 module_pci_driver(skl_driver);
1026 
1027 MODULE_LICENSE("GPL v2");
1028 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");
1029