1 /* 2 * skl.c - Implementation of ASoC Intel SKL HD Audio driver 3 * 4 * Copyright (C) 2014-2015 Intel Corp 5 * Author: Jeeja KP <jeeja.kp@intel.com> 6 * 7 * Derived mostly from Intel HDA driver with following copyrights: 8 * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de> 9 * PeiSen Hou <pshou@realtek.com.tw> 10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; version 2 of the License. 15 * 16 * This program is distributed in the hope that it will be useful, but 17 * WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 19 * General Public License for more details. 20 * 21 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 22 */ 23 24 #include <linux/module.h> 25 #include <linux/pci.h> 26 #include <linux/pm_runtime.h> 27 #include <linux/platform_device.h> 28 #include <linux/firmware.h> 29 #include <sound/pcm.h> 30 #include "../common/sst-acpi.h" 31 #include <sound/hda_register.h> 32 #include <sound/hdaudio.h> 33 #include <sound/hda_i915.h> 34 #include "skl.h" 35 #include "skl-sst-dsp.h" 36 #include "skl-sst-ipc.h" 37 38 /* 39 * initialize the PCI registers 40 */ 41 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg, 42 unsigned char mask, unsigned char val) 43 { 44 unsigned char data; 45 46 pci_read_config_byte(pci, reg, &data); 47 data &= ~mask; 48 data |= (val & mask); 49 pci_write_config_byte(pci, reg, data); 50 } 51 52 static void skl_init_pci(struct skl *skl) 53 { 54 struct hdac_ext_bus *ebus = &skl->ebus; 55 56 /* 57 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44) 58 * TCSEL == Traffic Class Select Register, which sets PCI express QOS 59 * Ensuring these bits are 0 clears playback static on some HD Audio 60 * codecs. 61 * The PCI register TCSEL is defined in the Intel manuals. 62 */ 63 dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n"); 64 skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0); 65 } 66 67 static void update_pci_dword(struct pci_dev *pci, 68 unsigned int reg, u32 mask, u32 val) 69 { 70 u32 data = 0; 71 72 pci_read_config_dword(pci, reg, &data); 73 data &= ~mask; 74 data |= (val & mask); 75 pci_write_config_dword(pci, reg, data); 76 } 77 78 /* 79 * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits 80 * 81 * @dev: device pointer 82 * @enable: enable/disable flag 83 */ 84 static void skl_enable_miscbdcge(struct device *dev, bool enable) 85 { 86 struct pci_dev *pci = to_pci_dev(dev); 87 u32 val; 88 89 val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0; 90 91 update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val); 92 } 93 94 /* 95 * While performing reset, controller may not come back properly causing 96 * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset 97 * (init chip) and then again set CGCTL.MISCBDCGE to 1 98 */ 99 static int skl_init_chip(struct hdac_bus *bus, bool full_reset) 100 { 101 int ret; 102 103 skl_enable_miscbdcge(bus->dev, false); 104 ret = snd_hdac_bus_init_chip(bus, full_reset); 105 skl_enable_miscbdcge(bus->dev, true); 106 107 return ret; 108 } 109 110 /* called from IRQ */ 111 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr) 112 { 113 snd_pcm_period_elapsed(hstr->substream); 114 } 115 116 static irqreturn_t skl_interrupt(int irq, void *dev_id) 117 { 118 struct hdac_ext_bus *ebus = dev_id; 119 struct hdac_bus *bus = ebus_to_hbus(ebus); 120 u32 status; 121 122 if (!pm_runtime_active(bus->dev)) 123 return IRQ_NONE; 124 125 spin_lock(&bus->reg_lock); 126 127 status = snd_hdac_chip_readl(bus, INTSTS); 128 if (status == 0 || status == 0xffffffff) { 129 spin_unlock(&bus->reg_lock); 130 return IRQ_NONE; 131 } 132 133 /* clear rirb int */ 134 status = snd_hdac_chip_readb(bus, RIRBSTS); 135 if (status & RIRB_INT_MASK) { 136 if (status & RIRB_INT_RESPONSE) 137 snd_hdac_bus_update_rirb(bus); 138 snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK); 139 } 140 141 spin_unlock(&bus->reg_lock); 142 143 return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED; 144 } 145 146 static irqreturn_t skl_threaded_handler(int irq, void *dev_id) 147 { 148 struct hdac_ext_bus *ebus = dev_id; 149 struct hdac_bus *bus = ebus_to_hbus(ebus); 150 u32 status; 151 152 status = snd_hdac_chip_readl(bus, INTSTS); 153 154 snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update); 155 156 return IRQ_HANDLED; 157 } 158 159 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect) 160 { 161 struct skl *skl = ebus_to_skl(ebus); 162 struct hdac_bus *bus = ebus_to_hbus(ebus); 163 int ret; 164 165 ret = request_threaded_irq(skl->pci->irq, skl_interrupt, 166 skl_threaded_handler, 167 IRQF_SHARED, 168 KBUILD_MODNAME, ebus); 169 if (ret) { 170 dev_err(bus->dev, 171 "unable to grab IRQ %d, disabling device\n", 172 skl->pci->irq); 173 return ret; 174 } 175 176 bus->irq = skl->pci->irq; 177 pci_intx(skl->pci, 1); 178 179 return 0; 180 } 181 182 #ifdef CONFIG_PM 183 static int _skl_suspend(struct hdac_ext_bus *ebus) 184 { 185 struct skl *skl = ebus_to_skl(ebus); 186 struct hdac_bus *bus = ebus_to_hbus(ebus); 187 int ret; 188 189 snd_hdac_ext_bus_link_power_down_all(ebus); 190 191 ret = skl_suspend_dsp(skl); 192 if (ret < 0) 193 return ret; 194 195 snd_hdac_bus_stop_chip(bus); 196 skl_enable_miscbdcge(bus->dev, false); 197 snd_hdac_bus_enter_link_reset(bus); 198 skl_enable_miscbdcge(bus->dev, true); 199 200 return 0; 201 } 202 203 static int _skl_resume(struct hdac_ext_bus *ebus) 204 { 205 struct skl *skl = ebus_to_skl(ebus); 206 struct hdac_bus *bus = ebus_to_hbus(ebus); 207 208 skl_init_pci(skl); 209 skl_init_chip(bus, true); 210 211 return skl_resume_dsp(skl); 212 } 213 #endif 214 215 #ifdef CONFIG_PM_SLEEP 216 /* 217 * power management 218 */ 219 static int skl_suspend(struct device *dev) 220 { 221 struct pci_dev *pci = to_pci_dev(dev); 222 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 223 struct skl *skl = ebus_to_skl(ebus); 224 struct hdac_bus *bus = ebus_to_hbus(ebus); 225 int ret = 0; 226 227 /* 228 * Do not suspend if streams which are marked ignore suspend are 229 * running, we need to save the state for these and continue 230 */ 231 if (skl->supend_active) { 232 snd_hdac_ext_bus_link_power_down_all(ebus); 233 enable_irq_wake(bus->irq); 234 pci_save_state(pci); 235 pci_disable_device(pci); 236 } else { 237 ret = _skl_suspend(ebus); 238 if (ret < 0) 239 return ret; 240 } 241 242 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { 243 ret = snd_hdac_display_power(bus, false); 244 if (ret < 0) 245 dev_err(bus->dev, 246 "Cannot turn OFF display power on i915\n"); 247 } 248 249 return ret; 250 } 251 252 static int skl_resume(struct device *dev) 253 { 254 struct pci_dev *pci = to_pci_dev(dev); 255 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 256 struct skl *skl = ebus_to_skl(ebus); 257 struct hdac_bus *bus = ebus_to_hbus(ebus); 258 int ret; 259 260 /* Turned OFF in HDMI codec driver after codec reconfiguration */ 261 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { 262 ret = snd_hdac_display_power(bus, true); 263 if (ret < 0) { 264 dev_err(bus->dev, 265 "Cannot turn on display power on i915\n"); 266 return ret; 267 } 268 } 269 270 /* 271 * resume only when we are not in suspend active, otherwise need to 272 * restore the device 273 */ 274 if (skl->supend_active) { 275 pci_restore_state(pci); 276 ret = pci_enable_device(pci); 277 snd_hdac_ext_bus_link_power_up_all(ebus); 278 disable_irq_wake(bus->irq); 279 } else { 280 ret = _skl_resume(ebus); 281 } 282 283 return ret; 284 } 285 #endif /* CONFIG_PM_SLEEP */ 286 287 #ifdef CONFIG_PM 288 static int skl_runtime_suspend(struct device *dev) 289 { 290 struct pci_dev *pci = to_pci_dev(dev); 291 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 292 struct hdac_bus *bus = ebus_to_hbus(ebus); 293 294 dev_dbg(bus->dev, "in %s\n", __func__); 295 296 return _skl_suspend(ebus); 297 } 298 299 static int skl_runtime_resume(struct device *dev) 300 { 301 struct pci_dev *pci = to_pci_dev(dev); 302 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 303 struct hdac_bus *bus = ebus_to_hbus(ebus); 304 305 dev_dbg(bus->dev, "in %s\n", __func__); 306 307 return _skl_resume(ebus); 308 } 309 #endif /* CONFIG_PM */ 310 311 static const struct dev_pm_ops skl_pm = { 312 SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume) 313 SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL) 314 }; 315 316 /* 317 * destructor 318 */ 319 static int skl_free(struct hdac_ext_bus *ebus) 320 { 321 struct skl *skl = ebus_to_skl(ebus); 322 struct hdac_bus *bus = ebus_to_hbus(ebus); 323 324 skl->init_failed = 1; /* to be sure */ 325 326 snd_hdac_ext_stop_streams(ebus); 327 328 if (bus->irq >= 0) 329 free_irq(bus->irq, (void *)bus); 330 snd_hdac_bus_free_stream_pages(bus); 331 snd_hdac_stream_free_all(ebus); 332 snd_hdac_link_free_all(ebus); 333 334 if (bus->remap_addr) 335 iounmap(bus->remap_addr); 336 337 pci_release_regions(skl->pci); 338 pci_disable_device(skl->pci); 339 340 snd_hdac_ext_bus_exit(ebus); 341 342 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) 343 snd_hdac_i915_exit(&ebus->bus); 344 return 0; 345 } 346 347 static int skl_machine_device_register(struct skl *skl, void *driver_data) 348 { 349 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus); 350 struct platform_device *pdev; 351 struct sst_acpi_mach *mach = driver_data; 352 int ret; 353 354 mach = sst_acpi_find_machine(mach); 355 if (mach == NULL) { 356 dev_err(bus->dev, "No matching machine driver found\n"); 357 return -ENODEV; 358 } 359 skl->fw_name = mach->fw_filename; 360 361 pdev = platform_device_alloc(mach->drv_name, -1); 362 if (pdev == NULL) { 363 dev_err(bus->dev, "platform device alloc failed\n"); 364 return -EIO; 365 } 366 367 ret = platform_device_add(pdev); 368 if (ret) { 369 dev_err(bus->dev, "failed to add machine device\n"); 370 platform_device_put(pdev); 371 return -EIO; 372 } 373 skl->i2s_dev = pdev; 374 375 return 0; 376 } 377 378 static void skl_machine_device_unregister(struct skl *skl) 379 { 380 if (skl->i2s_dev) 381 platform_device_unregister(skl->i2s_dev); 382 } 383 384 static int skl_dmic_device_register(struct skl *skl) 385 { 386 struct hdac_bus *bus = ebus_to_hbus(&skl->ebus); 387 struct platform_device *pdev; 388 int ret; 389 390 /* SKL has one dmic port, so allocate dmic device for this */ 391 pdev = platform_device_alloc("dmic-codec", -1); 392 if (!pdev) { 393 dev_err(bus->dev, "failed to allocate dmic device\n"); 394 return -ENOMEM; 395 } 396 397 ret = platform_device_add(pdev); 398 if (ret) { 399 dev_err(bus->dev, "failed to add dmic device: %d\n", ret); 400 platform_device_put(pdev); 401 return ret; 402 } 403 skl->dmic_dev = pdev; 404 405 return 0; 406 } 407 408 static void skl_dmic_device_unregister(struct skl *skl) 409 { 410 if (skl->dmic_dev) 411 platform_device_unregister(skl->dmic_dev); 412 } 413 414 /* 415 * Probe the given codec address 416 */ 417 static int probe_codec(struct hdac_ext_bus *ebus, int addr) 418 { 419 struct hdac_bus *bus = ebus_to_hbus(ebus); 420 unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) | 421 (AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID; 422 unsigned int res; 423 424 mutex_lock(&bus->cmd_mutex); 425 snd_hdac_bus_send_cmd(bus, cmd); 426 snd_hdac_bus_get_response(bus, addr, &res); 427 mutex_unlock(&bus->cmd_mutex); 428 if (res == -1) 429 return -EIO; 430 dev_dbg(bus->dev, "codec #%d probed OK\n", addr); 431 432 return snd_hdac_ext_bus_device_init(ebus, addr); 433 } 434 435 /* Codec initialization */ 436 static int skl_codec_create(struct hdac_ext_bus *ebus) 437 { 438 struct hdac_bus *bus = ebus_to_hbus(ebus); 439 int c, max_slots; 440 441 max_slots = HDA_MAX_CODECS; 442 443 /* First try to probe all given codec slots */ 444 for (c = 0; c < max_slots; c++) { 445 if ((bus->codec_mask & (1 << c))) { 446 if (probe_codec(ebus, c) < 0) { 447 /* 448 * Some BIOSen give you wrong codec addresses 449 * that don't exist 450 */ 451 dev_warn(bus->dev, 452 "Codec #%d probe error; disabling it...\n", c); 453 bus->codec_mask &= ~(1 << c); 454 /* 455 * More badly, accessing to a non-existing 456 * codec often screws up the controller bus, 457 * and disturbs the further communications. 458 * Thus if an error occurs during probing, 459 * better to reset the controller bus to get 460 * back to the sanity state. 461 */ 462 snd_hdac_bus_stop_chip(bus); 463 skl_init_chip(bus, true); 464 } 465 } 466 } 467 468 return 0; 469 } 470 471 static const struct hdac_bus_ops bus_core_ops = { 472 .command = snd_hdac_bus_send_cmd, 473 .get_response = snd_hdac_bus_get_response, 474 }; 475 476 /* 477 * constructor 478 */ 479 static int skl_create(struct pci_dev *pci, 480 const struct hdac_io_ops *io_ops, 481 struct skl **rskl) 482 { 483 struct skl *skl; 484 struct hdac_ext_bus *ebus; 485 486 int err; 487 488 *rskl = NULL; 489 490 err = pci_enable_device(pci); 491 if (err < 0) 492 return err; 493 494 skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL); 495 if (!skl) { 496 pci_disable_device(pci); 497 return -ENOMEM; 498 } 499 ebus = &skl->ebus; 500 snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops); 501 ebus->bus.use_posbuf = 1; 502 skl->pci = pci; 503 504 ebus->bus.bdl_pos_adj = 0; 505 506 *rskl = skl; 507 508 return 0; 509 } 510 511 static int skl_i915_init(struct hdac_bus *bus) 512 { 513 int err; 514 515 /* 516 * The HDMI codec is in GPU so we need to ensure that it is powered 517 * up and ready for probe 518 */ 519 err = snd_hdac_i915_init(bus); 520 if (err < 0) 521 return err; 522 523 err = snd_hdac_display_power(bus, true); 524 if (err < 0) { 525 dev_err(bus->dev, "Cannot turn on display power on i915\n"); 526 return err; 527 } 528 529 return err; 530 } 531 532 static int skl_first_init(struct hdac_ext_bus *ebus) 533 { 534 struct skl *skl = ebus_to_skl(ebus); 535 struct hdac_bus *bus = ebus_to_hbus(ebus); 536 struct pci_dev *pci = skl->pci; 537 int err; 538 unsigned short gcap; 539 int cp_streams, pb_streams, start_idx; 540 541 err = pci_request_regions(pci, "Skylake HD audio"); 542 if (err < 0) 543 return err; 544 545 bus->addr = pci_resource_start(pci, 0); 546 bus->remap_addr = pci_ioremap_bar(pci, 0); 547 if (bus->remap_addr == NULL) { 548 dev_err(bus->dev, "ioremap error\n"); 549 return -ENXIO; 550 } 551 552 snd_hdac_ext_bus_parse_capabilities(ebus); 553 554 if (skl_acquire_irq(ebus, 0) < 0) 555 return -EBUSY; 556 557 pci_set_master(pci); 558 synchronize_irq(bus->irq); 559 560 gcap = snd_hdac_chip_readw(bus, GCAP); 561 dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap); 562 563 /* allow 64bit DMA address if supported by H/W */ 564 if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) { 565 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64)); 566 } else { 567 dma_set_mask(bus->dev, DMA_BIT_MASK(32)); 568 dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32)); 569 } 570 571 /* read number of streams from GCAP register */ 572 cp_streams = (gcap >> 8) & 0x0f; 573 pb_streams = (gcap >> 12) & 0x0f; 574 575 if (!pb_streams && !cp_streams) 576 return -EIO; 577 578 ebus->num_streams = cp_streams + pb_streams; 579 580 /* initialize streams */ 581 snd_hdac_ext_stream_init_all 582 (ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE); 583 start_idx = cp_streams; 584 snd_hdac_ext_stream_init_all 585 (ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK); 586 587 err = snd_hdac_bus_alloc_stream_pages(bus); 588 if (err < 0) 589 return err; 590 591 /* initialize chip */ 592 skl_init_pci(skl); 593 594 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { 595 err = skl_i915_init(bus); 596 if (err < 0) 597 return err; 598 } 599 600 skl_init_chip(bus, true); 601 602 /* codec detection */ 603 if (!bus->codec_mask) { 604 dev_info(bus->dev, "no hda codecs found!\n"); 605 } 606 607 return 0; 608 } 609 610 static int skl_probe(struct pci_dev *pci, 611 const struct pci_device_id *pci_id) 612 { 613 struct skl *skl; 614 struct hdac_ext_bus *ebus = NULL; 615 struct hdac_bus *bus = NULL; 616 int err; 617 618 /* we use ext core ops, so provide NULL for ops here */ 619 err = skl_create(pci, NULL, &skl); 620 if (err < 0) 621 return err; 622 623 ebus = &skl->ebus; 624 bus = ebus_to_hbus(ebus); 625 626 err = skl_first_init(ebus); 627 if (err < 0) 628 goto out_free; 629 630 skl->pci_id = pci->device; 631 632 skl->nhlt = skl_nhlt_init(bus->dev); 633 634 if (skl->nhlt == NULL) 635 goto out_free; 636 637 skl_nhlt_update_topology_bin(skl); 638 639 pci_set_drvdata(skl->pci, ebus); 640 641 /* check if dsp is there */ 642 if (ebus->ppcap) { 643 err = skl_machine_device_register(skl, 644 (void *)pci_id->driver_data); 645 if (err < 0) 646 goto out_free; 647 648 err = skl_init_dsp(skl); 649 if (err < 0) { 650 dev_dbg(bus->dev, "error failed to register dsp\n"); 651 goto out_mach_free; 652 } 653 skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge; 654 655 } 656 if (ebus->mlcap) 657 snd_hdac_ext_bus_get_ml_capabilities(ebus); 658 659 /* create device for soc dmic */ 660 err = skl_dmic_device_register(skl); 661 if (err < 0) 662 goto out_dsp_free; 663 664 /* register platform dai and controls */ 665 err = skl_platform_register(bus->dev); 666 if (err < 0) 667 goto out_dmic_free; 668 669 /* create codec instances */ 670 err = skl_codec_create(ebus); 671 if (err < 0) 672 goto out_unregister; 673 674 if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) { 675 err = snd_hdac_display_power(bus, false); 676 if (err < 0) { 677 dev_err(bus->dev, "Cannot turn off display power on i915\n"); 678 return err; 679 } 680 } 681 682 /*configure PM */ 683 pm_runtime_put_noidle(bus->dev); 684 pm_runtime_allow(bus->dev); 685 686 return 0; 687 688 out_unregister: 689 skl_platform_unregister(bus->dev); 690 out_dmic_free: 691 skl_dmic_device_unregister(skl); 692 out_dsp_free: 693 skl_free_dsp(skl); 694 out_mach_free: 695 skl_machine_device_unregister(skl); 696 out_free: 697 skl->init_failed = 1; 698 skl_free(ebus); 699 700 return err; 701 } 702 703 static void skl_shutdown(struct pci_dev *pci) 704 { 705 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 706 struct hdac_bus *bus = ebus_to_hbus(ebus); 707 struct hdac_stream *s; 708 struct hdac_ext_stream *stream; 709 struct skl *skl; 710 711 if (ebus == NULL) 712 return; 713 714 skl = ebus_to_skl(ebus); 715 716 if (skl->init_failed) 717 return; 718 719 snd_hdac_ext_stop_streams(ebus); 720 list_for_each_entry(s, &bus->stream_list, list) { 721 stream = stream_to_hdac_ext_stream(s); 722 snd_hdac_ext_stream_decouple(ebus, stream, false); 723 } 724 725 snd_hdac_bus_stop_chip(bus); 726 } 727 728 static void skl_remove(struct pci_dev *pci) 729 { 730 struct hdac_ext_bus *ebus = pci_get_drvdata(pci); 731 struct skl *skl = ebus_to_skl(ebus); 732 733 if (skl->tplg) 734 release_firmware(skl->tplg); 735 736 if (pci_dev_run_wake(pci)) 737 pm_runtime_get_noresume(&pci->dev); 738 739 /* codec removal, invoke bus_device_remove */ 740 snd_hdac_ext_bus_device_remove(ebus); 741 742 skl_platform_unregister(&pci->dev); 743 skl_free_dsp(skl); 744 skl_machine_device_unregister(skl); 745 skl_dmic_device_unregister(skl); 746 skl_free(ebus); 747 dev_set_drvdata(&pci->dev, NULL); 748 } 749 750 static struct sst_acpi_mach sst_skl_devdata[] = { 751 { "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL }, 752 { "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin", 753 NULL, NULL, NULL }, 754 { "MX98357A", "skl_nau88l25_max98357a_i2s", "intel/dsp_fw_release.bin", 755 NULL, NULL, NULL }, 756 {} 757 }; 758 759 static struct sst_acpi_mach sst_bxtp_devdata[] = { 760 { "INT343A", "bxt_alc298s_i2s", "intel/dsp_fw_bxtn.bin", NULL, NULL, NULL }, 761 }; 762 763 /* PCI IDs */ 764 static const struct pci_device_id skl_ids[] = { 765 /* Sunrise Point-LP */ 766 { PCI_DEVICE(0x8086, 0x9d70), 767 .driver_data = (unsigned long)&sst_skl_devdata}, 768 /* BXT-P */ 769 { PCI_DEVICE(0x8086, 0x5a98), 770 .driver_data = (unsigned long)&sst_bxtp_devdata}, 771 { 0, } 772 }; 773 MODULE_DEVICE_TABLE(pci, skl_ids); 774 775 /* pci_driver definition */ 776 static struct pci_driver skl_driver = { 777 .name = KBUILD_MODNAME, 778 .id_table = skl_ids, 779 .probe = skl_probe, 780 .remove = skl_remove, 781 .shutdown = skl_shutdown, 782 .driver = { 783 .pm = &skl_pm, 784 }, 785 }; 786 module_pci_driver(skl_driver); 787 788 MODULE_LICENSE("GPL v2"); 789 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver"); 790