xref: /openbmc/linux/sound/soc/intel/skylake/skl.c (revision 23c2b932)
1 /*
2  *  skl.c - Implementation of ASoC Intel SKL HD Audio driver
3  *
4  *  Copyright (C) 2014-2015 Intel Corp
5  *  Author: Jeeja KP <jeeja.kp@intel.com>
6  *
7  *  Derived mostly from Intel HDA driver with following copyrights:
8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
9  *                     PeiSen Hou <pshou@realtek.com.tw>
10  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11  *
12  *  This program is free software; you can redistribute it and/or modify
13  *  it under the terms of the GNU General Public License as published by
14  *  the Free Software Foundation; version 2 of the License.
15  *
16  *  This program is distributed in the hope that it will be useful, but
17  *  WITHOUT ANY WARRANTY; without even the implied warranty of
18  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  *  General Public License for more details.
20  *
21  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
22  */
23 
24 #include <linux/module.h>
25 #include <linux/pci.h>
26 #include <linux/pm_runtime.h>
27 #include <linux/platform_device.h>
28 #include <linux/firmware.h>
29 #include <sound/pcm.h>
30 #include "../common/sst-acpi.h"
31 #include <sound/hda_register.h>
32 #include <sound/hdaudio.h>
33 #include <sound/hda_i915.h>
34 #include "skl.h"
35 #include "skl-sst-dsp.h"
36 #include "skl-sst-ipc.h"
37 
38 /*
39  * initialize the PCI registers
40  */
41 static void skl_update_pci_byte(struct pci_dev *pci, unsigned int reg,
42 			    unsigned char mask, unsigned char val)
43 {
44 	unsigned char data;
45 
46 	pci_read_config_byte(pci, reg, &data);
47 	data &= ~mask;
48 	data |= (val & mask);
49 	pci_write_config_byte(pci, reg, data);
50 }
51 
52 static void skl_init_pci(struct skl *skl)
53 {
54 	struct hdac_ext_bus *ebus = &skl->ebus;
55 
56 	/*
57 	 * Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
58 	 * TCSEL == Traffic Class Select Register, which sets PCI express QOS
59 	 * Ensuring these bits are 0 clears playback static on some HD Audio
60 	 * codecs.
61 	 * The PCI register TCSEL is defined in the Intel manuals.
62 	 */
63 	dev_dbg(ebus_to_hbus(ebus)->dev, "Clearing TCSEL\n");
64 	skl_update_pci_byte(skl->pci, AZX_PCIREG_TCSEL, 0x07, 0);
65 }
66 
67 static void update_pci_dword(struct pci_dev *pci,
68 			unsigned int reg, u32 mask, u32 val)
69 {
70 	u32 data = 0;
71 
72 	pci_read_config_dword(pci, reg, &data);
73 	data &= ~mask;
74 	data |= (val & mask);
75 	pci_write_config_dword(pci, reg, data);
76 }
77 
78 /*
79  * skl_enable_miscbdcge - enable/dsiable CGCTL.MISCBDCGE bits
80  *
81  * @dev: device pointer
82  * @enable: enable/disable flag
83  */
84 static void skl_enable_miscbdcge(struct device *dev, bool enable)
85 {
86 	struct pci_dev *pci = to_pci_dev(dev);
87 	u32 val;
88 
89 	val = enable ? AZX_CGCTL_MISCBDCGE_MASK : 0;
90 
91 	update_pci_dword(pci, AZX_PCIREG_CGCTL, AZX_CGCTL_MISCBDCGE_MASK, val);
92 }
93 
94 /*
95  * While performing reset, controller may not come back properly causing
96  * issues, so recommendation is to set CGCTL.MISCBDCGE to 0 then do reset
97  * (init chip) and then again set CGCTL.MISCBDCGE to 1
98  */
99 static int skl_init_chip(struct hdac_bus *bus, bool full_reset)
100 {
101 	int ret;
102 
103 	skl_enable_miscbdcge(bus->dev, false);
104 	ret = snd_hdac_bus_init_chip(bus, full_reset);
105 	skl_enable_miscbdcge(bus->dev, true);
106 
107 	return ret;
108 }
109 
110 /* called from IRQ */
111 static void skl_stream_update(struct hdac_bus *bus, struct hdac_stream *hstr)
112 {
113 	snd_pcm_period_elapsed(hstr->substream);
114 }
115 
116 static irqreturn_t skl_interrupt(int irq, void *dev_id)
117 {
118 	struct hdac_ext_bus *ebus = dev_id;
119 	struct hdac_bus *bus = ebus_to_hbus(ebus);
120 	u32 status;
121 
122 	if (!pm_runtime_active(bus->dev))
123 		return IRQ_NONE;
124 
125 	spin_lock(&bus->reg_lock);
126 
127 	status = snd_hdac_chip_readl(bus, INTSTS);
128 	if (status == 0 || status == 0xffffffff) {
129 		spin_unlock(&bus->reg_lock);
130 		return IRQ_NONE;
131 	}
132 
133 	/* clear rirb int */
134 	status = snd_hdac_chip_readb(bus, RIRBSTS);
135 	if (status & RIRB_INT_MASK) {
136 		if (status & RIRB_INT_RESPONSE)
137 			snd_hdac_bus_update_rirb(bus);
138 		snd_hdac_chip_writeb(bus, RIRBSTS, RIRB_INT_MASK);
139 	}
140 
141 	spin_unlock(&bus->reg_lock);
142 
143 	return snd_hdac_chip_readl(bus, INTSTS) ? IRQ_WAKE_THREAD : IRQ_HANDLED;
144 }
145 
146 static irqreturn_t skl_threaded_handler(int irq, void *dev_id)
147 {
148 	struct hdac_ext_bus *ebus = dev_id;
149 	struct hdac_bus *bus = ebus_to_hbus(ebus);
150 	u32 status;
151 
152 	status = snd_hdac_chip_readl(bus, INTSTS);
153 
154 	snd_hdac_bus_handle_stream_irq(bus, status, skl_stream_update);
155 
156 	return IRQ_HANDLED;
157 }
158 
159 static int skl_acquire_irq(struct hdac_ext_bus *ebus, int do_disconnect)
160 {
161 	struct skl *skl = ebus_to_skl(ebus);
162 	struct hdac_bus *bus = ebus_to_hbus(ebus);
163 	int ret;
164 
165 	ret = request_threaded_irq(skl->pci->irq, skl_interrupt,
166 			skl_threaded_handler,
167 			IRQF_SHARED,
168 			KBUILD_MODNAME, ebus);
169 	if (ret) {
170 		dev_err(bus->dev,
171 			"unable to grab IRQ %d, disabling device\n",
172 			skl->pci->irq);
173 		return ret;
174 	}
175 
176 	bus->irq = skl->pci->irq;
177 	pci_intx(skl->pci, 1);
178 
179 	return 0;
180 }
181 
182 #ifdef CONFIG_PM
183 static int _skl_suspend(struct hdac_ext_bus *ebus)
184 {
185 	struct skl *skl = ebus_to_skl(ebus);
186 	struct hdac_bus *bus = ebus_to_hbus(ebus);
187 	int ret;
188 
189 	snd_hdac_ext_bus_link_power_down_all(ebus);
190 
191 	ret = skl_suspend_dsp(skl);
192 	if (ret < 0)
193 		return ret;
194 
195 	snd_hdac_bus_stop_chip(bus);
196 	skl_enable_miscbdcge(bus->dev, false);
197 	snd_hdac_bus_enter_link_reset(bus);
198 	skl_enable_miscbdcge(bus->dev, true);
199 
200 	return 0;
201 }
202 
203 static int _skl_resume(struct hdac_ext_bus *ebus)
204 {
205 	struct skl *skl = ebus_to_skl(ebus);
206 	struct hdac_bus *bus = ebus_to_hbus(ebus);
207 
208 	skl_init_pci(skl);
209 	skl_init_chip(bus, true);
210 
211 	return skl_resume_dsp(skl);
212 }
213 #endif
214 
215 #ifdef CONFIG_PM_SLEEP
216 /*
217  * power management
218  */
219 static int skl_suspend(struct device *dev)
220 {
221 	struct pci_dev *pci = to_pci_dev(dev);
222 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
223 	struct skl *skl  = ebus_to_skl(ebus);
224 	struct hdac_bus *bus = ebus_to_hbus(ebus);
225 	int ret = 0;
226 
227 	/*
228 	 * Do not suspend if streams which are marked ignore suspend are
229 	 * running, we need to save the state for these and continue
230 	 */
231 	if (skl->supend_active) {
232 		/* turn off the links and stop the CORB/RIRB DMA if it is On */
233 		snd_hdac_ext_bus_link_power_down_all(ebus);
234 
235 		if (ebus->cmd_dma_state)
236 			snd_hdac_bus_stop_cmd_io(&ebus->bus);
237 
238 		enable_irq_wake(bus->irq);
239 		pci_save_state(pci);
240 		pci_disable_device(pci);
241 	} else {
242 		ret = _skl_suspend(ebus);
243 		if (ret < 0)
244 			return ret;
245 	}
246 
247 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
248 		ret = snd_hdac_display_power(bus, false);
249 		if (ret < 0)
250 			dev_err(bus->dev,
251 				"Cannot turn OFF display power on i915\n");
252 	}
253 
254 	return ret;
255 }
256 
257 static int skl_resume(struct device *dev)
258 {
259 	struct pci_dev *pci = to_pci_dev(dev);
260 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
261 	struct skl *skl  = ebus_to_skl(ebus);
262 	struct hdac_bus *bus = ebus_to_hbus(ebus);
263 	struct hdac_ext_link *hlink = NULL;
264 	int ret;
265 
266 	/* Turned OFF in HDMI codec driver after codec reconfiguration */
267 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
268 		ret = snd_hdac_display_power(bus, true);
269 		if (ret < 0) {
270 			dev_err(bus->dev,
271 				"Cannot turn on display power on i915\n");
272 			return ret;
273 		}
274 	}
275 
276 	/*
277 	 * resume only when we are not in suspend active, otherwise need to
278 	 * restore the device
279 	 */
280 	if (skl->supend_active) {
281 		pci_restore_state(pci);
282 		ret = pci_enable_device(pci);
283 		snd_hdac_ext_bus_link_power_up_all(ebus);
284 		disable_irq_wake(bus->irq);
285 		/*
286 		 * turn On the links which are On before active suspend
287 		 * and start the CORB/RIRB DMA if On before
288 		 * active suspend.
289 		 */
290 		list_for_each_entry(hlink, &ebus->hlink_list, list) {
291 			if (hlink->ref_count)
292 				snd_hdac_ext_bus_link_power_up(hlink);
293 		}
294 
295 		if (ebus->cmd_dma_state)
296 			snd_hdac_bus_init_cmd_io(&ebus->bus);
297 	} else {
298 		ret = _skl_resume(ebus);
299 
300 		/* turn off the links which are off before suspend */
301 		list_for_each_entry(hlink, &ebus->hlink_list, list) {
302 			if (!hlink->ref_count)
303 				snd_hdac_ext_bus_link_power_down(hlink);
304 		}
305 
306 		if (!ebus->cmd_dma_state)
307 			snd_hdac_bus_stop_cmd_io(&ebus->bus);
308 	}
309 
310 	return ret;
311 }
312 #endif /* CONFIG_PM_SLEEP */
313 
314 #ifdef CONFIG_PM
315 static int skl_runtime_suspend(struct device *dev)
316 {
317 	struct pci_dev *pci = to_pci_dev(dev);
318 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
319 	struct hdac_bus *bus = ebus_to_hbus(ebus);
320 
321 	dev_dbg(bus->dev, "in %s\n", __func__);
322 
323 	return _skl_suspend(ebus);
324 }
325 
326 static int skl_runtime_resume(struct device *dev)
327 {
328 	struct pci_dev *pci = to_pci_dev(dev);
329 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
330 	struct hdac_bus *bus = ebus_to_hbus(ebus);
331 
332 	dev_dbg(bus->dev, "in %s\n", __func__);
333 
334 	return _skl_resume(ebus);
335 }
336 #endif /* CONFIG_PM */
337 
338 static const struct dev_pm_ops skl_pm = {
339 	SET_SYSTEM_SLEEP_PM_OPS(skl_suspend, skl_resume)
340 	SET_RUNTIME_PM_OPS(skl_runtime_suspend, skl_runtime_resume, NULL)
341 };
342 
343 /*
344  * destructor
345  */
346 static int skl_free(struct hdac_ext_bus *ebus)
347 {
348 	struct skl *skl  = ebus_to_skl(ebus);
349 	struct hdac_bus *bus = ebus_to_hbus(ebus);
350 
351 	skl->init_failed = 1; /* to be sure */
352 
353 	snd_hdac_ext_stop_streams(ebus);
354 
355 	if (bus->irq >= 0)
356 		free_irq(bus->irq, (void *)bus);
357 	snd_hdac_bus_free_stream_pages(bus);
358 	snd_hdac_stream_free_all(ebus);
359 	snd_hdac_link_free_all(ebus);
360 
361 	if (bus->remap_addr)
362 		iounmap(bus->remap_addr);
363 
364 	pci_release_regions(skl->pci);
365 	pci_disable_device(skl->pci);
366 
367 	snd_hdac_ext_bus_exit(ebus);
368 
369 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI))
370 		snd_hdac_i915_exit(&ebus->bus);
371 	return 0;
372 }
373 
374 static int skl_machine_device_register(struct skl *skl, void *driver_data)
375 {
376 	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
377 	struct platform_device *pdev;
378 	struct sst_acpi_mach *mach = driver_data;
379 	int ret;
380 
381 	mach = sst_acpi_find_machine(mach);
382 	if (mach == NULL) {
383 		dev_err(bus->dev, "No matching machine driver found\n");
384 		return -ENODEV;
385 	}
386 	skl->fw_name = mach->fw_filename;
387 
388 	pdev = platform_device_alloc(mach->drv_name, -1);
389 	if (pdev == NULL) {
390 		dev_err(bus->dev, "platform device alloc failed\n");
391 		return -EIO;
392 	}
393 
394 	ret = platform_device_add(pdev);
395 	if (ret) {
396 		dev_err(bus->dev, "failed to add machine device\n");
397 		platform_device_put(pdev);
398 		return -EIO;
399 	}
400 	skl->i2s_dev = pdev;
401 
402 	return 0;
403 }
404 
405 static void skl_machine_device_unregister(struct skl *skl)
406 {
407 	if (skl->i2s_dev)
408 		platform_device_unregister(skl->i2s_dev);
409 }
410 
411 static int skl_dmic_device_register(struct skl *skl)
412 {
413 	struct hdac_bus *bus = ebus_to_hbus(&skl->ebus);
414 	struct platform_device *pdev;
415 	int ret;
416 
417 	/* SKL has one dmic port, so allocate dmic device for this */
418 	pdev = platform_device_alloc("dmic-codec", -1);
419 	if (!pdev) {
420 		dev_err(bus->dev, "failed to allocate dmic device\n");
421 		return -ENOMEM;
422 	}
423 
424 	ret = platform_device_add(pdev);
425 	if (ret) {
426 		dev_err(bus->dev, "failed to add dmic device: %d\n", ret);
427 		platform_device_put(pdev);
428 		return ret;
429 	}
430 	skl->dmic_dev = pdev;
431 
432 	return 0;
433 }
434 
435 static void skl_dmic_device_unregister(struct skl *skl)
436 {
437 	if (skl->dmic_dev)
438 		platform_device_unregister(skl->dmic_dev);
439 }
440 
441 /*
442  * Probe the given codec address
443  */
444 static int probe_codec(struct hdac_ext_bus *ebus, int addr)
445 {
446 	struct hdac_bus *bus = ebus_to_hbus(ebus);
447 	unsigned int cmd = (addr << 28) | (AC_NODE_ROOT << 20) |
448 		(AC_VERB_PARAMETERS << 8) | AC_PAR_VENDOR_ID;
449 	unsigned int res;
450 
451 	mutex_lock(&bus->cmd_mutex);
452 	snd_hdac_bus_send_cmd(bus, cmd);
453 	snd_hdac_bus_get_response(bus, addr, &res);
454 	mutex_unlock(&bus->cmd_mutex);
455 	if (res == -1)
456 		return -EIO;
457 	dev_dbg(bus->dev, "codec #%d probed OK\n", addr);
458 
459 	return snd_hdac_ext_bus_device_init(ebus, addr);
460 }
461 
462 /* Codec initialization */
463 static int skl_codec_create(struct hdac_ext_bus *ebus)
464 {
465 	struct hdac_bus *bus = ebus_to_hbus(ebus);
466 	int c, max_slots;
467 
468 	max_slots = HDA_MAX_CODECS;
469 
470 	/* First try to probe all given codec slots */
471 	for (c = 0; c < max_slots; c++) {
472 		if ((bus->codec_mask & (1 << c))) {
473 			if (probe_codec(ebus, c) < 0) {
474 				/*
475 				 * Some BIOSen give you wrong codec addresses
476 				 * that don't exist
477 				 */
478 				dev_warn(bus->dev,
479 					 "Codec #%d probe error; disabling it...\n", c);
480 				bus->codec_mask &= ~(1 << c);
481 				/*
482 				 * More badly, accessing to a non-existing
483 				 * codec often screws up the controller bus,
484 				 * and disturbs the further communications.
485 				 * Thus if an error occurs during probing,
486 				 * better to reset the controller bus to get
487 				 * back to the sanity state.
488 				 */
489 				snd_hdac_bus_stop_chip(bus);
490 				skl_init_chip(bus, true);
491 			}
492 		}
493 	}
494 
495 	return 0;
496 }
497 
498 static const struct hdac_bus_ops bus_core_ops = {
499 	.command = snd_hdac_bus_send_cmd,
500 	.get_response = snd_hdac_bus_get_response,
501 };
502 
503 /*
504  * constructor
505  */
506 static int skl_create(struct pci_dev *pci,
507 		      const struct hdac_io_ops *io_ops,
508 		      struct skl **rskl)
509 {
510 	struct skl *skl;
511 	struct hdac_ext_bus *ebus;
512 
513 	int err;
514 
515 	*rskl = NULL;
516 
517 	err = pci_enable_device(pci);
518 	if (err < 0)
519 		return err;
520 
521 	skl = devm_kzalloc(&pci->dev, sizeof(*skl), GFP_KERNEL);
522 	if (!skl) {
523 		pci_disable_device(pci);
524 		return -ENOMEM;
525 	}
526 	ebus = &skl->ebus;
527 	snd_hdac_ext_bus_init(ebus, &pci->dev, &bus_core_ops, io_ops);
528 	ebus->bus.use_posbuf = 1;
529 	skl->pci = pci;
530 
531 	ebus->bus.bdl_pos_adj = 0;
532 
533 	*rskl = skl;
534 
535 	return 0;
536 }
537 
538 static int skl_i915_init(struct hdac_bus *bus)
539 {
540 	int err;
541 
542 	/*
543 	 * The HDMI codec is in GPU so we need to ensure that it is powered
544 	 * up and ready for probe
545 	 */
546 	err = snd_hdac_i915_init(bus);
547 	if (err < 0)
548 		return err;
549 
550 	err = snd_hdac_display_power(bus, true);
551 	if (err < 0) {
552 		dev_err(bus->dev, "Cannot turn on display power on i915\n");
553 		return err;
554 	}
555 
556 	return err;
557 }
558 
559 static int skl_first_init(struct hdac_ext_bus *ebus)
560 {
561 	struct skl *skl = ebus_to_skl(ebus);
562 	struct hdac_bus *bus = ebus_to_hbus(ebus);
563 	struct pci_dev *pci = skl->pci;
564 	int err;
565 	unsigned short gcap;
566 	int cp_streams, pb_streams, start_idx;
567 
568 	err = pci_request_regions(pci, "Skylake HD audio");
569 	if (err < 0)
570 		return err;
571 
572 	bus->addr = pci_resource_start(pci, 0);
573 	bus->remap_addr = pci_ioremap_bar(pci, 0);
574 	if (bus->remap_addr == NULL) {
575 		dev_err(bus->dev, "ioremap error\n");
576 		return -ENXIO;
577 	}
578 
579 	snd_hdac_ext_bus_parse_capabilities(ebus);
580 
581 	if (skl_acquire_irq(ebus, 0) < 0)
582 		return -EBUSY;
583 
584 	pci_set_master(pci);
585 	synchronize_irq(bus->irq);
586 
587 	gcap = snd_hdac_chip_readw(bus, GCAP);
588 	dev_dbg(bus->dev, "chipset global capabilities = 0x%x\n", gcap);
589 
590 	/* allow 64bit DMA address if supported by H/W */
591 	if (!dma_set_mask(bus->dev, DMA_BIT_MASK(64))) {
592 		dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(64));
593 	} else {
594 		dma_set_mask(bus->dev, DMA_BIT_MASK(32));
595 		dma_set_coherent_mask(bus->dev, DMA_BIT_MASK(32));
596 	}
597 
598 	/* read number of streams from GCAP register */
599 	cp_streams = (gcap >> 8) & 0x0f;
600 	pb_streams = (gcap >> 12) & 0x0f;
601 
602 	if (!pb_streams && !cp_streams)
603 		return -EIO;
604 
605 	ebus->num_streams = cp_streams + pb_streams;
606 
607 	/* initialize streams */
608 	snd_hdac_ext_stream_init_all
609 		(ebus, 0, cp_streams, SNDRV_PCM_STREAM_CAPTURE);
610 	start_idx = cp_streams;
611 	snd_hdac_ext_stream_init_all
612 		(ebus, start_idx, pb_streams, SNDRV_PCM_STREAM_PLAYBACK);
613 
614 	err = snd_hdac_bus_alloc_stream_pages(bus);
615 	if (err < 0)
616 		return err;
617 
618 	/* initialize chip */
619 	skl_init_pci(skl);
620 
621 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
622 		err = skl_i915_init(bus);
623 		if (err < 0)
624 			return err;
625 	}
626 
627 	skl_init_chip(bus, true);
628 
629 	/* codec detection */
630 	if (!bus->codec_mask) {
631 		dev_info(bus->dev, "no hda codecs found!\n");
632 	}
633 
634 	return 0;
635 }
636 
637 static int skl_probe(struct pci_dev *pci,
638 		     const struct pci_device_id *pci_id)
639 {
640 	struct skl *skl;
641 	struct hdac_ext_bus *ebus = NULL;
642 	struct hdac_bus *bus = NULL;
643 	struct hdac_ext_link *hlink = NULL;
644 	int err;
645 
646 	/* we use ext core ops, so provide NULL for ops here */
647 	err = skl_create(pci, NULL, &skl);
648 	if (err < 0)
649 		return err;
650 
651 	ebus = &skl->ebus;
652 	bus = ebus_to_hbus(ebus);
653 
654 	err = skl_first_init(ebus);
655 	if (err < 0)
656 		goto out_free;
657 
658 	skl->pci_id = pci->device;
659 
660 	skl->nhlt = skl_nhlt_init(bus->dev);
661 
662 	if (skl->nhlt == NULL)
663 		goto out_free;
664 
665 	skl_nhlt_update_topology_bin(skl);
666 
667 	pci_set_drvdata(skl->pci, ebus);
668 
669 	/* check if dsp is there */
670 	if (ebus->ppcap) {
671 		err = skl_machine_device_register(skl,
672 				  (void *)pci_id->driver_data);
673 		if (err < 0)
674 			goto out_nhlt_free;
675 
676 		err = skl_init_dsp(skl);
677 		if (err < 0) {
678 			dev_dbg(bus->dev, "error failed to register dsp\n");
679 			goto out_mach_free;
680 		}
681 		skl->skl_sst->enable_miscbdcge = skl_enable_miscbdcge;
682 
683 	}
684 	if (ebus->mlcap)
685 		snd_hdac_ext_bus_get_ml_capabilities(ebus);
686 
687 	/* create device for soc dmic */
688 	err = skl_dmic_device_register(skl);
689 	if (err < 0)
690 		goto out_dsp_free;
691 
692 	/* register platform dai and controls */
693 	err = skl_platform_register(bus->dev);
694 	if (err < 0)
695 		goto out_dmic_free;
696 
697 	/* create codec instances */
698 	err = skl_codec_create(ebus);
699 	if (err < 0)
700 		goto out_unregister;
701 
702 	if (IS_ENABLED(CONFIG_SND_SOC_HDAC_HDMI)) {
703 		err = snd_hdac_display_power(bus, false);
704 		if (err < 0) {
705 			dev_err(bus->dev, "Cannot turn off display power on i915\n");
706 			return err;
707 		}
708 	}
709 
710 	/*
711 	 * we are done probling so decrement link counts
712 	 */
713 	list_for_each_entry(hlink, &ebus->hlink_list, list)
714 		snd_hdac_ext_bus_link_put(ebus, hlink);
715 
716 	/*configure PM */
717 	pm_runtime_put_noidle(bus->dev);
718 	pm_runtime_allow(bus->dev);
719 
720 	return 0;
721 
722 out_unregister:
723 	skl_platform_unregister(bus->dev);
724 out_dmic_free:
725 	skl_dmic_device_unregister(skl);
726 out_dsp_free:
727 	skl_free_dsp(skl);
728 out_mach_free:
729 	skl_machine_device_unregister(skl);
730 out_nhlt_free:
731 	skl_nhlt_free(skl->nhlt);
732 out_free:
733 	skl->init_failed = 1;
734 	skl_free(ebus);
735 
736 	return err;
737 }
738 
739 static void skl_shutdown(struct pci_dev *pci)
740 {
741 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
742 	struct hdac_bus *bus = ebus_to_hbus(ebus);
743 	struct hdac_stream *s;
744 	struct hdac_ext_stream *stream;
745 	struct skl *skl;
746 
747 	if (ebus == NULL)
748 		return;
749 
750 	skl = ebus_to_skl(ebus);
751 
752 	if (skl->init_failed)
753 		return;
754 
755 	snd_hdac_ext_stop_streams(ebus);
756 	list_for_each_entry(s, &bus->stream_list, list) {
757 		stream = stream_to_hdac_ext_stream(s);
758 		snd_hdac_ext_stream_decouple(ebus, stream, false);
759 	}
760 
761 	snd_hdac_bus_stop_chip(bus);
762 }
763 
764 static void skl_remove(struct pci_dev *pci)
765 {
766 	struct hdac_ext_bus *ebus = pci_get_drvdata(pci);
767 	struct skl *skl = ebus_to_skl(ebus);
768 
769 	if (skl->tplg)
770 		release_firmware(skl->tplg);
771 
772 	if (pci_dev_run_wake(pci))
773 		pm_runtime_get_noresume(&pci->dev);
774 
775 	/* codec removal, invoke bus_device_remove */
776 	snd_hdac_ext_bus_device_remove(ebus);
777 
778 	skl_platform_unregister(&pci->dev);
779 	skl_free_dsp(skl);
780 	skl_machine_device_unregister(skl);
781 	skl_dmic_device_unregister(skl);
782 	skl_nhlt_free(skl->nhlt);
783 	skl_free(ebus);
784 	dev_set_drvdata(&pci->dev, NULL);
785 }
786 
787 static struct sst_acpi_mach sst_skl_devdata[] = {
788 	{ "INT343A", "skl_alc286s_i2s", "intel/dsp_fw_release.bin", NULL, NULL, NULL },
789 	{ "INT343B", "skl_nau88l25_ssm4567_i2s", "intel/dsp_fw_release.bin",
790 				NULL, NULL, NULL },
791 	{ "MX98357A", "skl_nau88l25_max98357a_i2s", "intel/dsp_fw_release.bin",
792 				NULL, NULL, NULL },
793 	{}
794 };
795 
796 static struct sst_acpi_mach sst_bxtp_devdata[] = {
797 	{ "INT343A", "bxt_alc298s_i2s", "intel/dsp_fw_bxtn.bin", NULL, NULL, NULL },
798 };
799 
800 /* PCI IDs */
801 static const struct pci_device_id skl_ids[] = {
802 	/* Sunrise Point-LP */
803 	{ PCI_DEVICE(0x8086, 0x9d70),
804 		.driver_data = (unsigned long)&sst_skl_devdata},
805 	/* BXT-P */
806 	{ PCI_DEVICE(0x8086, 0x5a98),
807 		.driver_data = (unsigned long)&sst_bxtp_devdata},
808 	{ 0, }
809 };
810 MODULE_DEVICE_TABLE(pci, skl_ids);
811 
812 /* pci_driver definition */
813 static struct pci_driver skl_driver = {
814 	.name = KBUILD_MODNAME,
815 	.id_table = skl_ids,
816 	.probe = skl_probe,
817 	.remove = skl_remove,
818 	.shutdown = skl_shutdown,
819 	.driver = {
820 		.pm = &skl_pm,
821 	},
822 };
823 module_pci_driver(skl_driver);
824 
825 MODULE_LICENSE("GPL v2");
826 MODULE_DESCRIPTION("Intel Skylake ASoC HDA driver");
827