1 /* 2 * skl-topology.c - Implements Platform component ALSA controls/widget 3 * handlers. 4 * 5 * Copyright (C) 2014-2015 Intel Corp 6 * Author: Jeeja KP <jeeja.kp@intel.com> 7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 */ 18 19 #include <linux/slab.h> 20 #include <linux/types.h> 21 #include <linux/firmware.h> 22 #include <sound/soc.h> 23 #include <sound/soc-topology.h> 24 #include "skl-sst-dsp.h" 25 #include "skl-sst-ipc.h" 26 #include "skl-topology.h" 27 #include "skl.h" 28 #include "skl-tplg-interface.h" 29 #include "../common/sst-dsp.h" 30 #include "../common/sst-dsp-priv.h" 31 32 #define SKL_CH_FIXUP_MASK (1 << 0) 33 #define SKL_RATE_FIXUP_MASK (1 << 1) 34 #define SKL_FMT_FIXUP_MASK (1 << 2) 35 36 /* 37 * SKL DSP driver modelling uses only few DAPM widgets so for rest we will 38 * ignore. This helpers checks if the SKL driver handles this widget type 39 */ 40 static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w) 41 { 42 switch (w->id) { 43 case snd_soc_dapm_dai_link: 44 case snd_soc_dapm_dai_in: 45 case snd_soc_dapm_aif_in: 46 case snd_soc_dapm_aif_out: 47 case snd_soc_dapm_dai_out: 48 case snd_soc_dapm_switch: 49 return false; 50 default: 51 return true; 52 } 53 } 54 55 /* 56 * Each pipelines needs memory to be allocated. Check if we have free memory 57 * from available pool. 58 */ 59 static bool skl_is_pipe_mem_avail(struct skl *skl, 60 struct skl_module_cfg *mconfig) 61 { 62 struct skl_sst *ctx = skl->skl_sst; 63 64 if (skl->resource.mem + mconfig->pipe->memory_pages > 65 skl->resource.max_mem) { 66 dev_err(ctx->dev, 67 "%s: module_id %d instance %d\n", __func__, 68 mconfig->id.module_id, 69 mconfig->id.instance_id); 70 dev_err(ctx->dev, 71 "exceeds ppl memory available %d mem %d\n", 72 skl->resource.max_mem, skl->resource.mem); 73 return false; 74 } else { 75 return true; 76 } 77 } 78 79 /* 80 * Add the mem to the mem pool. This is freed when pipe is deleted. 81 * Note: DSP does actual memory management we only keep track for complete 82 * pool 83 */ 84 static void skl_tplg_alloc_pipe_mem(struct skl *skl, 85 struct skl_module_cfg *mconfig) 86 { 87 skl->resource.mem += mconfig->pipe->memory_pages; 88 } 89 90 /* 91 * Pipeline needs needs DSP CPU resources for computation, this is 92 * quantified in MCPS (Million Clocks Per Second) required for module/pipe 93 * 94 * Each pipelines needs mcps to be allocated. Check if we have mcps for this 95 * pipe. 96 */ 97 98 static bool skl_is_pipe_mcps_avail(struct skl *skl, 99 struct skl_module_cfg *mconfig) 100 { 101 struct skl_sst *ctx = skl->skl_sst; 102 103 if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) { 104 dev_err(ctx->dev, 105 "%s: module_id %d instance %d\n", __func__, 106 mconfig->id.module_id, mconfig->id.instance_id); 107 dev_err(ctx->dev, 108 "exceeds ppl mcps available %d > mem %d\n", 109 skl->resource.max_mcps, skl->resource.mcps); 110 return false; 111 } else { 112 return true; 113 } 114 } 115 116 static void skl_tplg_alloc_pipe_mcps(struct skl *skl, 117 struct skl_module_cfg *mconfig) 118 { 119 skl->resource.mcps += mconfig->mcps; 120 } 121 122 /* 123 * Free the mcps when tearing down 124 */ 125 static void 126 skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig) 127 { 128 skl->resource.mcps -= mconfig->mcps; 129 } 130 131 /* 132 * Free the memory when tearing down 133 */ 134 static void 135 skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig) 136 { 137 skl->resource.mem -= mconfig->pipe->memory_pages; 138 } 139 140 141 static void skl_dump_mconfig(struct skl_sst *ctx, 142 struct skl_module_cfg *mcfg) 143 { 144 dev_dbg(ctx->dev, "Dumping config\n"); 145 dev_dbg(ctx->dev, "Input Format:\n"); 146 dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels); 147 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq); 148 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg); 149 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth); 150 dev_dbg(ctx->dev, "Output Format:\n"); 151 dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels); 152 dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq); 153 dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth); 154 dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg); 155 } 156 157 static void skl_tplg_update_chmap(struct skl_module_fmt *fmt, int chs) 158 { 159 int slot_map = 0xFFFFFFFF; 160 int start_slot = 0; 161 int i; 162 163 for (i = 0; i < chs; i++) { 164 /* 165 * For 2 channels with starting slot as 0, slot map will 166 * look like 0xFFFFFF10. 167 */ 168 slot_map &= (~(0xF << (4 * i)) | (start_slot << (4 * i))); 169 start_slot++; 170 } 171 fmt->ch_map = slot_map; 172 } 173 174 static void skl_tplg_update_params(struct skl_module_fmt *fmt, 175 struct skl_pipe_params *params, int fixup) 176 { 177 if (fixup & SKL_RATE_FIXUP_MASK) 178 fmt->s_freq = params->s_freq; 179 if (fixup & SKL_CH_FIXUP_MASK) { 180 fmt->channels = params->ch; 181 skl_tplg_update_chmap(fmt, fmt->channels); 182 } 183 if (fixup & SKL_FMT_FIXUP_MASK) { 184 fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt); 185 186 /* 187 * 16 bit is 16 bit container whereas 24 bit is in 32 bit 188 * container so update bit depth accordingly 189 */ 190 switch (fmt->valid_bit_depth) { 191 case SKL_DEPTH_16BIT: 192 fmt->bit_depth = fmt->valid_bit_depth; 193 break; 194 195 default: 196 fmt->bit_depth = SKL_DEPTH_32BIT; 197 break; 198 } 199 } 200 201 } 202 203 /* 204 * A pipeline may have modules which impact the pcm parameters, like SRC, 205 * channel converter, format converter. 206 * We need to calculate the output params by applying the 'fixup' 207 * Topology will tell driver which type of fixup is to be applied by 208 * supplying the fixup mask, so based on that we calculate the output 209 * 210 * Now In FE the pcm hw_params is source/target format. Same is applicable 211 * for BE with its hw_params invoked. 212 * here based on FE, BE pipeline and direction we calculate the input and 213 * outfix and then apply that for a module 214 */ 215 static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg, 216 struct skl_pipe_params *params, bool is_fe) 217 { 218 int in_fixup, out_fixup; 219 struct skl_module_fmt *in_fmt, *out_fmt; 220 221 /* Fixups will be applied to pin 0 only */ 222 in_fmt = &m_cfg->in_fmt[0]; 223 out_fmt = &m_cfg->out_fmt[0]; 224 225 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { 226 if (is_fe) { 227 in_fixup = m_cfg->params_fixup; 228 out_fixup = (~m_cfg->converter) & 229 m_cfg->params_fixup; 230 } else { 231 out_fixup = m_cfg->params_fixup; 232 in_fixup = (~m_cfg->converter) & 233 m_cfg->params_fixup; 234 } 235 } else { 236 if (is_fe) { 237 out_fixup = m_cfg->params_fixup; 238 in_fixup = (~m_cfg->converter) & 239 m_cfg->params_fixup; 240 } else { 241 in_fixup = m_cfg->params_fixup; 242 out_fixup = (~m_cfg->converter) & 243 m_cfg->params_fixup; 244 } 245 } 246 247 skl_tplg_update_params(in_fmt, params, in_fixup); 248 skl_tplg_update_params(out_fmt, params, out_fixup); 249 } 250 251 /* 252 * A module needs input and output buffers, which are dependent upon pcm 253 * params, so once we have calculate params, we need buffer calculation as 254 * well. 255 */ 256 static void skl_tplg_update_buffer_size(struct skl_sst *ctx, 257 struct skl_module_cfg *mcfg) 258 { 259 int multiplier = 1; 260 struct skl_module_fmt *in_fmt, *out_fmt; 261 int in_rate, out_rate; 262 263 264 /* Since fixups is applied to pin 0 only, ibs, obs needs 265 * change for pin 0 only 266 */ 267 in_fmt = &mcfg->in_fmt[0]; 268 out_fmt = &mcfg->out_fmt[0]; 269 270 if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT) 271 multiplier = 5; 272 273 if (in_fmt->s_freq % 1000) 274 in_rate = (in_fmt->s_freq / 1000) + 1; 275 else 276 in_rate = (in_fmt->s_freq / 1000); 277 278 mcfg->ibs = in_rate * (mcfg->in_fmt->channels) * 279 (mcfg->in_fmt->bit_depth >> 3) * 280 multiplier; 281 282 if (mcfg->out_fmt->s_freq % 1000) 283 out_rate = (mcfg->out_fmt->s_freq / 1000) + 1; 284 else 285 out_rate = (mcfg->out_fmt->s_freq / 1000); 286 287 mcfg->obs = out_rate * (mcfg->out_fmt->channels) * 288 (mcfg->out_fmt->bit_depth >> 3) * 289 multiplier; 290 } 291 292 static int skl_tplg_update_be_blob(struct snd_soc_dapm_widget *w, 293 struct skl_sst *ctx) 294 { 295 struct skl_module_cfg *m_cfg = w->priv; 296 int link_type, dir; 297 u32 ch, s_freq, s_fmt; 298 struct nhlt_specific_cfg *cfg; 299 struct skl *skl = get_skl_ctx(ctx->dev); 300 301 /* check if we already have blob */ 302 if (m_cfg->formats_config.caps_size > 0) 303 return 0; 304 305 dev_dbg(ctx->dev, "Applying default cfg blob\n"); 306 switch (m_cfg->dev_type) { 307 case SKL_DEVICE_DMIC: 308 link_type = NHLT_LINK_DMIC; 309 dir = SNDRV_PCM_STREAM_CAPTURE; 310 s_freq = m_cfg->in_fmt[0].s_freq; 311 s_fmt = m_cfg->in_fmt[0].bit_depth; 312 ch = m_cfg->in_fmt[0].channels; 313 break; 314 315 case SKL_DEVICE_I2S: 316 link_type = NHLT_LINK_SSP; 317 if (m_cfg->hw_conn_type == SKL_CONN_SOURCE) { 318 dir = SNDRV_PCM_STREAM_PLAYBACK; 319 s_freq = m_cfg->out_fmt[0].s_freq; 320 s_fmt = m_cfg->out_fmt[0].bit_depth; 321 ch = m_cfg->out_fmt[0].channels; 322 } else { 323 dir = SNDRV_PCM_STREAM_CAPTURE; 324 s_freq = m_cfg->in_fmt[0].s_freq; 325 s_fmt = m_cfg->in_fmt[0].bit_depth; 326 ch = m_cfg->in_fmt[0].channels; 327 } 328 break; 329 330 default: 331 return -EINVAL; 332 } 333 334 /* update the blob based on virtual bus_id and default params */ 335 cfg = skl_get_ep_blob(skl, m_cfg->vbus_id, link_type, 336 s_fmt, ch, s_freq, dir); 337 if (cfg) { 338 m_cfg->formats_config.caps_size = cfg->size; 339 m_cfg->formats_config.caps = (u32 *) &cfg->caps; 340 } else { 341 dev_err(ctx->dev, "Blob NULL for id %x type %d dirn %d\n", 342 m_cfg->vbus_id, link_type, dir); 343 dev_err(ctx->dev, "PCM: ch %d, freq %d, fmt %d\n", 344 ch, s_freq, s_fmt); 345 return -EIO; 346 } 347 348 return 0; 349 } 350 351 static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w, 352 struct skl_sst *ctx) 353 { 354 struct skl_module_cfg *m_cfg = w->priv; 355 struct skl_pipe_params *params = m_cfg->pipe->p_params; 356 int p_conn_type = m_cfg->pipe->conn_type; 357 bool is_fe; 358 359 if (!m_cfg->params_fixup) 360 return; 361 362 dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n", 363 w->name); 364 365 skl_dump_mconfig(ctx, m_cfg); 366 367 if (p_conn_type == SKL_PIPE_CONN_TYPE_FE) 368 is_fe = true; 369 else 370 is_fe = false; 371 372 skl_tplg_update_params_fixup(m_cfg, params, is_fe); 373 skl_tplg_update_buffer_size(ctx, m_cfg); 374 375 dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n", 376 w->name); 377 378 skl_dump_mconfig(ctx, m_cfg); 379 } 380 381 /* 382 * A pipe can have multiple modules, each of them will be a DAPM widget as 383 * well. While managing a pipeline we need to get the list of all the 384 * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps 385 * to get the SKL type widgets in that pipeline 386 */ 387 static int skl_tplg_alloc_pipe_widget(struct device *dev, 388 struct snd_soc_dapm_widget *w, struct skl_pipe *pipe) 389 { 390 struct skl_module_cfg *src_module = NULL; 391 struct snd_soc_dapm_path *p = NULL; 392 struct skl_pipe_module *p_module = NULL; 393 394 p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL); 395 if (!p_module) 396 return -ENOMEM; 397 398 p_module->w = w; 399 list_add_tail(&p_module->node, &pipe->w_list); 400 401 snd_soc_dapm_widget_for_each_sink_path(w, p) { 402 if ((p->sink->priv == NULL) 403 && (!is_skl_dsp_widget_type(w))) 404 continue; 405 406 if ((p->sink->priv != NULL) && p->connect 407 && is_skl_dsp_widget_type(p->sink)) { 408 409 src_module = p->sink->priv; 410 if (pipe->ppl_id == src_module->pipe->ppl_id) 411 skl_tplg_alloc_pipe_widget(dev, 412 p->sink, pipe); 413 } 414 } 415 return 0; 416 } 417 418 /* 419 * some modules can have multiple params set from user control and 420 * need to be set after module is initialized. If set_param flag is 421 * set module params will be done after module is initialised. 422 */ 423 static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w, 424 struct skl_sst *ctx) 425 { 426 int i, ret; 427 struct skl_module_cfg *mconfig = w->priv; 428 const struct snd_kcontrol_new *k; 429 struct soc_bytes_ext *sb; 430 struct skl_algo_data *bc; 431 struct skl_specific_cfg *sp_cfg; 432 433 if (mconfig->formats_config.caps_size > 0 && 434 mconfig->formats_config.set_params == SKL_PARAM_SET) { 435 sp_cfg = &mconfig->formats_config; 436 ret = skl_set_module_params(ctx, sp_cfg->caps, 437 sp_cfg->caps_size, 438 sp_cfg->param_id, mconfig); 439 if (ret < 0) 440 return ret; 441 } 442 443 for (i = 0; i < w->num_kcontrols; i++) { 444 k = &w->kcontrol_news[i]; 445 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { 446 sb = (void *) k->private_value; 447 bc = (struct skl_algo_data *)sb->dobj.private; 448 449 if (bc->set_params == SKL_PARAM_SET) { 450 ret = skl_set_module_params(ctx, 451 (u32 *)bc->params, bc->max, 452 bc->param_id, mconfig); 453 if (ret < 0) 454 return ret; 455 } 456 } 457 } 458 459 return 0; 460 } 461 462 /* 463 * some module param can set from user control and this is required as 464 * when module is initailzed. if module param is required in init it is 465 * identifed by set_param flag. if set_param flag is not set, then this 466 * parameter needs to set as part of module init. 467 */ 468 static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w) 469 { 470 const struct snd_kcontrol_new *k; 471 struct soc_bytes_ext *sb; 472 struct skl_algo_data *bc; 473 struct skl_module_cfg *mconfig = w->priv; 474 int i; 475 476 for (i = 0; i < w->num_kcontrols; i++) { 477 k = &w->kcontrol_news[i]; 478 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { 479 sb = (struct soc_bytes_ext *)k->private_value; 480 bc = (struct skl_algo_data *)sb->dobj.private; 481 482 if (bc->set_params != SKL_PARAM_INIT) 483 continue; 484 485 mconfig->formats_config.caps = (u32 *)&bc->params; 486 mconfig->formats_config.caps_size = bc->max; 487 488 break; 489 } 490 } 491 492 return 0; 493 } 494 495 /* 496 * Inside a pipe instance, we can have various modules. These modules need 497 * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by 498 * skl_init_module() routine, so invoke that for all modules in a pipeline 499 */ 500 static int 501 skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe) 502 { 503 struct skl_pipe_module *w_module; 504 struct snd_soc_dapm_widget *w; 505 struct skl_module_cfg *mconfig; 506 struct skl_sst *ctx = skl->skl_sst; 507 int ret = 0; 508 509 list_for_each_entry(w_module, &pipe->w_list, node) { 510 w = w_module->w; 511 mconfig = w->priv; 512 513 /* check resource available */ 514 if (!skl_is_pipe_mcps_avail(skl, mconfig)) 515 return -ENOMEM; 516 517 skl_tplg_alloc_pipe_mcps(skl, mconfig); 518 519 if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) { 520 ret = ctx->dsp->fw_ops.load_mod(ctx->dsp, 521 mconfig->id.module_id, mconfig->guid); 522 if (ret < 0) 523 return ret; 524 525 mconfig->m_state = SKL_MODULE_LOADED; 526 } 527 528 /* update blob if blob is null for be with default value */ 529 skl_tplg_update_be_blob(w, ctx); 530 531 /* 532 * apply fix/conversion to module params based on 533 * FE/BE params 534 */ 535 skl_tplg_update_module_params(w, ctx); 536 537 skl_tplg_set_module_init_data(w); 538 ret = skl_init_module(ctx, mconfig); 539 if (ret < 0) 540 return ret; 541 542 ret = skl_tplg_set_module_params(w, ctx); 543 if (ret < 0) 544 return ret; 545 } 546 547 return 0; 548 } 549 550 static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx, 551 struct skl_pipe *pipe) 552 { 553 struct skl_pipe_module *w_module = NULL; 554 struct skl_module_cfg *mconfig = NULL; 555 556 list_for_each_entry(w_module, &pipe->w_list, node) { 557 mconfig = w_module->w->priv; 558 559 if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod && 560 mconfig->m_state > SKL_MODULE_UNINIT) 561 return ctx->dsp->fw_ops.unload_mod(ctx->dsp, 562 mconfig->id.module_id); 563 } 564 565 /* no modules to unload in this path, so return */ 566 return 0; 567 } 568 569 /* 570 * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we 571 * need create the pipeline. So we do following: 572 * - check the resources 573 * - Create the pipeline 574 * - Initialize the modules in pipeline 575 * - finally bind all modules together 576 */ 577 static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, 578 struct skl *skl) 579 { 580 int ret; 581 struct skl_module_cfg *mconfig = w->priv; 582 struct skl_pipe_module *w_module; 583 struct skl_pipe *s_pipe = mconfig->pipe; 584 struct skl_module_cfg *src_module = NULL, *dst_module; 585 struct skl_sst *ctx = skl->skl_sst; 586 587 /* check resource available */ 588 if (!skl_is_pipe_mcps_avail(skl, mconfig)) 589 return -EBUSY; 590 591 if (!skl_is_pipe_mem_avail(skl, mconfig)) 592 return -ENOMEM; 593 594 skl_tplg_alloc_pipe_mem(skl, mconfig); 595 skl_tplg_alloc_pipe_mcps(skl, mconfig); 596 597 /* 598 * Create a list of modules for pipe. 599 * This list contains modules from source to sink 600 */ 601 ret = skl_create_pipeline(ctx, mconfig->pipe); 602 if (ret < 0) 603 return ret; 604 605 /* 606 * we create a w_list of all widgets in that pipe. This list is not 607 * freed on PMD event as widgets within a pipe are static. This 608 * saves us cycles to get widgets in pipe every time. 609 * 610 * So if we have already initialized all the widgets of a pipeline 611 * we skip, so check for list_empty and create the list if empty 612 */ 613 if (list_empty(&s_pipe->w_list)) { 614 ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe); 615 if (ret < 0) 616 return ret; 617 } 618 619 /* Init all pipe modules from source to sink */ 620 ret = skl_tplg_init_pipe_modules(skl, s_pipe); 621 if (ret < 0) 622 return ret; 623 624 /* Bind modules from source to sink */ 625 list_for_each_entry(w_module, &s_pipe->w_list, node) { 626 dst_module = w_module->w->priv; 627 628 if (src_module == NULL) { 629 src_module = dst_module; 630 continue; 631 } 632 633 ret = skl_bind_modules(ctx, src_module, dst_module); 634 if (ret < 0) 635 return ret; 636 637 src_module = dst_module; 638 } 639 640 return 0; 641 } 642 643 /* 644 * Some modules require params to be set after the module is bound to 645 * all pins connected. 646 * 647 * The module provider initializes set_param flag for such modules and we 648 * send params after binding 649 */ 650 static int skl_tplg_set_module_bind_params(struct snd_soc_dapm_widget *w, 651 struct skl_module_cfg *mcfg, struct skl_sst *ctx) 652 { 653 int i, ret; 654 struct skl_module_cfg *mconfig = w->priv; 655 const struct snd_kcontrol_new *k; 656 struct soc_bytes_ext *sb; 657 struct skl_algo_data *bc; 658 struct skl_specific_cfg *sp_cfg; 659 660 /* 661 * check all out/in pins are in bind state. 662 * if so set the module param 663 */ 664 for (i = 0; i < mcfg->max_out_queue; i++) { 665 if (mcfg->m_out_pin[i].pin_state != SKL_PIN_BIND_DONE) 666 return 0; 667 } 668 669 for (i = 0; i < mcfg->max_in_queue; i++) { 670 if (mcfg->m_in_pin[i].pin_state != SKL_PIN_BIND_DONE) 671 return 0; 672 } 673 674 if (mconfig->formats_config.caps_size > 0 && 675 mconfig->formats_config.set_params == SKL_PARAM_BIND) { 676 sp_cfg = &mconfig->formats_config; 677 ret = skl_set_module_params(ctx, sp_cfg->caps, 678 sp_cfg->caps_size, 679 sp_cfg->param_id, mconfig); 680 if (ret < 0) 681 return ret; 682 } 683 684 for (i = 0; i < w->num_kcontrols; i++) { 685 k = &w->kcontrol_news[i]; 686 if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { 687 sb = (void *) k->private_value; 688 bc = (struct skl_algo_data *)sb->dobj.private; 689 690 if (bc->set_params == SKL_PARAM_BIND) { 691 ret = skl_set_module_params(ctx, 692 (u32 *)bc->params, bc->max, 693 bc->param_id, mconfig); 694 if (ret < 0) 695 return ret; 696 } 697 } 698 } 699 700 return 0; 701 } 702 703 static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w, 704 struct skl *skl, 705 struct snd_soc_dapm_widget *src_w, 706 struct skl_module_cfg *src_mconfig) 707 { 708 struct snd_soc_dapm_path *p; 709 struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL; 710 struct skl_module_cfg *sink_mconfig; 711 struct skl_sst *ctx = skl->skl_sst; 712 int ret; 713 714 snd_soc_dapm_widget_for_each_sink_path(w, p) { 715 if (!p->connect) 716 continue; 717 718 dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name); 719 dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name); 720 721 next_sink = p->sink; 722 723 if (!is_skl_dsp_widget_type(p->sink)) 724 return skl_tplg_bind_sinks(p->sink, skl, src_w, src_mconfig); 725 726 /* 727 * here we will check widgets in sink pipelines, so that 728 * can be any widgets type and we are only interested if 729 * they are ones used for SKL so check that first 730 */ 731 if ((p->sink->priv != NULL) && 732 is_skl_dsp_widget_type(p->sink)) { 733 734 sink = p->sink; 735 sink_mconfig = sink->priv; 736 737 if (src_mconfig->m_state == SKL_MODULE_UNINIT || 738 sink_mconfig->m_state == SKL_MODULE_UNINIT) 739 continue; 740 741 /* Bind source to sink, mixin is always source */ 742 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); 743 if (ret) 744 return ret; 745 746 /* set module params after bind */ 747 skl_tplg_set_module_bind_params(src_w, src_mconfig, ctx); 748 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx); 749 750 /* Start sinks pipe first */ 751 if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) { 752 if (sink_mconfig->pipe->conn_type != 753 SKL_PIPE_CONN_TYPE_FE) 754 ret = skl_run_pipe(ctx, 755 sink_mconfig->pipe); 756 if (ret) 757 return ret; 758 } 759 } 760 } 761 762 if (!sink) 763 return skl_tplg_bind_sinks(next_sink, skl, src_w, src_mconfig); 764 765 return 0; 766 } 767 768 /* 769 * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA 770 * we need to do following: 771 * - Bind to sink pipeline 772 * Since the sink pipes can be running and we don't get mixer event on 773 * connect for already running mixer, we need to find the sink pipes 774 * here and bind to them. This way dynamic connect works. 775 * - Start sink pipeline, if not running 776 * - Then run current pipe 777 */ 778 static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w, 779 struct skl *skl) 780 { 781 struct skl_module_cfg *src_mconfig; 782 struct skl_sst *ctx = skl->skl_sst; 783 int ret = 0; 784 785 src_mconfig = w->priv; 786 787 /* 788 * find which sink it is connected to, bind with the sink, 789 * if sink is not started, start sink pipe first, then start 790 * this pipe 791 */ 792 ret = skl_tplg_bind_sinks(w, skl, w, src_mconfig); 793 if (ret) 794 return ret; 795 796 /* Start source pipe last after starting all sinks */ 797 if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) 798 return skl_run_pipe(ctx, src_mconfig->pipe); 799 800 return 0; 801 } 802 803 static struct snd_soc_dapm_widget *skl_get_src_dsp_widget( 804 struct snd_soc_dapm_widget *w, struct skl *skl) 805 { 806 struct snd_soc_dapm_path *p; 807 struct snd_soc_dapm_widget *src_w = NULL; 808 struct skl_sst *ctx = skl->skl_sst; 809 810 snd_soc_dapm_widget_for_each_source_path(w, p) { 811 src_w = p->source; 812 if (!p->connect) 813 continue; 814 815 dev_dbg(ctx->dev, "sink widget=%s\n", w->name); 816 dev_dbg(ctx->dev, "src widget=%s\n", p->source->name); 817 818 /* 819 * here we will check widgets in sink pipelines, so that can 820 * be any widgets type and we are only interested if they are 821 * ones used for SKL so check that first 822 */ 823 if ((p->source->priv != NULL) && 824 is_skl_dsp_widget_type(p->source)) { 825 return p->source; 826 } 827 } 828 829 if (src_w != NULL) 830 return skl_get_src_dsp_widget(src_w, skl); 831 832 return NULL; 833 } 834 835 /* 836 * in the Post-PMU event of mixer we need to do following: 837 * - Check if this pipe is running 838 * - if not, then 839 * - bind this pipeline to its source pipeline 840 * if source pipe is already running, this means it is a dynamic 841 * connection and we need to bind only to that pipe 842 * - start this pipeline 843 */ 844 static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w, 845 struct skl *skl) 846 { 847 int ret = 0; 848 struct snd_soc_dapm_widget *source, *sink; 849 struct skl_module_cfg *src_mconfig, *sink_mconfig; 850 struct skl_sst *ctx = skl->skl_sst; 851 int src_pipe_started = 0; 852 853 sink = w; 854 sink_mconfig = sink->priv; 855 856 /* 857 * If source pipe is already started, that means source is driving 858 * one more sink before this sink got connected, Since source is 859 * started, bind this sink to source and start this pipe. 860 */ 861 source = skl_get_src_dsp_widget(w, skl); 862 if (source != NULL) { 863 src_mconfig = source->priv; 864 sink_mconfig = sink->priv; 865 src_pipe_started = 1; 866 867 /* 868 * check pipe state, then no need to bind or start the 869 * pipe 870 */ 871 if (src_mconfig->pipe->state != SKL_PIPE_STARTED) 872 src_pipe_started = 0; 873 } 874 875 if (src_pipe_started) { 876 ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig); 877 if (ret) 878 return ret; 879 880 /* set module params after bind */ 881 skl_tplg_set_module_bind_params(source, src_mconfig, ctx); 882 skl_tplg_set_module_bind_params(sink, sink_mconfig, ctx); 883 884 if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE) 885 ret = skl_run_pipe(ctx, sink_mconfig->pipe); 886 } 887 888 return ret; 889 } 890 891 /* 892 * in the Pre-PMD event of mixer we need to do following: 893 * - Stop the pipe 894 * - find the source connections and remove that from dapm_path_list 895 * - unbind with source pipelines if still connected 896 */ 897 static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w, 898 struct skl *skl) 899 { 900 struct skl_module_cfg *src_mconfig, *sink_mconfig; 901 int ret = 0, i; 902 struct skl_sst *ctx = skl->skl_sst; 903 904 sink_mconfig = w->priv; 905 906 /* Stop the pipe */ 907 ret = skl_stop_pipe(ctx, sink_mconfig->pipe); 908 if (ret) 909 return ret; 910 911 for (i = 0; i < sink_mconfig->max_in_queue; i++) { 912 if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) { 913 src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg; 914 if (!src_mconfig) 915 continue; 916 /* 917 * If path_found == 1, that means pmd for source 918 * pipe has not occurred, source is connected to 919 * some other sink. so its responsibility of sink 920 * to unbind itself from source. 921 */ 922 ret = skl_stop_pipe(ctx, src_mconfig->pipe); 923 if (ret < 0) 924 return ret; 925 926 ret = skl_unbind_modules(ctx, 927 src_mconfig, sink_mconfig); 928 } 929 } 930 931 return ret; 932 } 933 934 /* 935 * in the Post-PMD event of mixer we need to do following: 936 * - Free the mcps used 937 * - Free the mem used 938 * - Unbind the modules within the pipeline 939 * - Delete the pipeline (modules are not required to be explicitly 940 * deleted, pipeline delete is enough here 941 */ 942 static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, 943 struct skl *skl) 944 { 945 struct skl_module_cfg *mconfig = w->priv; 946 struct skl_pipe_module *w_module; 947 struct skl_module_cfg *src_module = NULL, *dst_module; 948 struct skl_sst *ctx = skl->skl_sst; 949 struct skl_pipe *s_pipe = mconfig->pipe; 950 int ret = 0; 951 952 skl_tplg_free_pipe_mcps(skl, mconfig); 953 skl_tplg_free_pipe_mem(skl, mconfig); 954 955 list_for_each_entry(w_module, &s_pipe->w_list, node) { 956 dst_module = w_module->w->priv; 957 958 skl_tplg_free_pipe_mcps(skl, dst_module); 959 if (src_module == NULL) { 960 src_module = dst_module; 961 continue; 962 } 963 964 skl_unbind_modules(ctx, src_module, dst_module); 965 src_module = dst_module; 966 } 967 968 ret = skl_delete_pipe(ctx, mconfig->pipe); 969 970 return skl_tplg_unload_pipe_modules(ctx, s_pipe); 971 } 972 973 /* 974 * in the Post-PMD event of PGA we need to do following: 975 * - Free the mcps used 976 * - Stop the pipeline 977 * - In source pipe is connected, unbind with source pipelines 978 */ 979 static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w, 980 struct skl *skl) 981 { 982 struct skl_module_cfg *src_mconfig, *sink_mconfig; 983 int ret = 0, i; 984 struct skl_sst *ctx = skl->skl_sst; 985 986 src_mconfig = w->priv; 987 988 /* Stop the pipe since this is a mixin module */ 989 ret = skl_stop_pipe(ctx, src_mconfig->pipe); 990 if (ret) 991 return ret; 992 993 for (i = 0; i < src_mconfig->max_out_queue; i++) { 994 if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) { 995 sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg; 996 if (!sink_mconfig) 997 continue; 998 /* 999 * This is a connecter and if path is found that means 1000 * unbind between source and sink has not happened yet 1001 */ 1002 ret = skl_unbind_modules(ctx, src_mconfig, 1003 sink_mconfig); 1004 } 1005 } 1006 1007 return ret; 1008 } 1009 1010 /* 1011 * In modelling, we assume there will be ONLY one mixer in a pipeline. If 1012 * mixer is not required then it is treated as static mixer aka vmixer with 1013 * a hard path to source module 1014 * So we don't need to check if source is started or not as hard path puts 1015 * dependency on each other 1016 */ 1017 static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w, 1018 struct snd_kcontrol *k, int event) 1019 { 1020 struct snd_soc_dapm_context *dapm = w->dapm; 1021 struct skl *skl = get_skl_ctx(dapm->dev); 1022 1023 switch (event) { 1024 case SND_SOC_DAPM_PRE_PMU: 1025 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); 1026 1027 case SND_SOC_DAPM_POST_PMU: 1028 return skl_tplg_mixer_dapm_post_pmu_event(w, skl); 1029 1030 case SND_SOC_DAPM_PRE_PMD: 1031 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl); 1032 1033 case SND_SOC_DAPM_POST_PMD: 1034 return skl_tplg_mixer_dapm_post_pmd_event(w, skl); 1035 } 1036 1037 return 0; 1038 } 1039 1040 /* 1041 * In modelling, we assume there will be ONLY one mixer in a pipeline. If a 1042 * second one is required that is created as another pipe entity. 1043 * The mixer is responsible for pipe management and represent a pipeline 1044 * instance 1045 */ 1046 static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w, 1047 struct snd_kcontrol *k, int event) 1048 { 1049 struct snd_soc_dapm_context *dapm = w->dapm; 1050 struct skl *skl = get_skl_ctx(dapm->dev); 1051 1052 switch (event) { 1053 case SND_SOC_DAPM_PRE_PMU: 1054 return skl_tplg_mixer_dapm_pre_pmu_event(w, skl); 1055 1056 case SND_SOC_DAPM_POST_PMU: 1057 return skl_tplg_mixer_dapm_post_pmu_event(w, skl); 1058 1059 case SND_SOC_DAPM_PRE_PMD: 1060 return skl_tplg_mixer_dapm_pre_pmd_event(w, skl); 1061 1062 case SND_SOC_DAPM_POST_PMD: 1063 return skl_tplg_mixer_dapm_post_pmd_event(w, skl); 1064 } 1065 1066 return 0; 1067 } 1068 1069 /* 1070 * In modelling, we assumed rest of the modules in pipeline are PGA. But we 1071 * are interested in last PGA (leaf PGA) in a pipeline to disconnect with 1072 * the sink when it is running (two FE to one BE or one FE to two BE) 1073 * scenarios 1074 */ 1075 static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w, 1076 struct snd_kcontrol *k, int event) 1077 1078 { 1079 struct snd_soc_dapm_context *dapm = w->dapm; 1080 struct skl *skl = get_skl_ctx(dapm->dev); 1081 1082 switch (event) { 1083 case SND_SOC_DAPM_PRE_PMU: 1084 return skl_tplg_pga_dapm_pre_pmu_event(w, skl); 1085 1086 case SND_SOC_DAPM_POST_PMD: 1087 return skl_tplg_pga_dapm_post_pmd_event(w, skl); 1088 } 1089 1090 return 0; 1091 } 1092 1093 static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol, 1094 unsigned int __user *data, unsigned int size) 1095 { 1096 struct soc_bytes_ext *sb = 1097 (struct soc_bytes_ext *)kcontrol->private_value; 1098 struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private; 1099 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol); 1100 struct skl_module_cfg *mconfig = w->priv; 1101 struct skl *skl = get_skl_ctx(w->dapm->dev); 1102 1103 if (w->power) 1104 skl_get_module_params(skl->skl_sst, (u32 *)bc->params, 1105 bc->max, bc->param_id, mconfig); 1106 1107 /* decrement size for TLV header */ 1108 size -= 2 * sizeof(u32); 1109 1110 /* check size as we don't want to send kernel data */ 1111 if (size > bc->max) 1112 size = bc->max; 1113 1114 if (bc->params) { 1115 if (copy_to_user(data, &bc->param_id, sizeof(u32))) 1116 return -EFAULT; 1117 if (copy_to_user(data + 1, &size, sizeof(u32))) 1118 return -EFAULT; 1119 if (copy_to_user(data + 2, bc->params, size)) 1120 return -EFAULT; 1121 } 1122 1123 return 0; 1124 } 1125 1126 #define SKL_PARAM_VENDOR_ID 0xff 1127 1128 static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol, 1129 const unsigned int __user *data, unsigned int size) 1130 { 1131 struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol); 1132 struct skl_module_cfg *mconfig = w->priv; 1133 struct soc_bytes_ext *sb = 1134 (struct soc_bytes_ext *)kcontrol->private_value; 1135 struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private; 1136 struct skl *skl = get_skl_ctx(w->dapm->dev); 1137 1138 if (ac->params) { 1139 /* 1140 * if the param_is is of type Vendor, firmware expects actual 1141 * parameter id and size from the control. 1142 */ 1143 if (ac->param_id == SKL_PARAM_VENDOR_ID) { 1144 if (copy_from_user(ac->params, data, size)) 1145 return -EFAULT; 1146 } else { 1147 if (copy_from_user(ac->params, 1148 data + 2, size)) 1149 return -EFAULT; 1150 } 1151 1152 if (w->power) 1153 return skl_set_module_params(skl->skl_sst, 1154 (u32 *)ac->params, ac->max, 1155 ac->param_id, mconfig); 1156 } 1157 1158 return 0; 1159 } 1160 1161 /* 1162 * The FE params are passed by hw_params of the DAI. 1163 * On hw_params, the params are stored in Gateway module of the FE and we 1164 * need to calculate the format in DSP module configuration, that 1165 * conversion is done here 1166 */ 1167 int skl_tplg_update_pipe_params(struct device *dev, 1168 struct skl_module_cfg *mconfig, 1169 struct skl_pipe_params *params) 1170 { 1171 struct skl_pipe *pipe = mconfig->pipe; 1172 struct skl_module_fmt *format = NULL; 1173 1174 memcpy(pipe->p_params, params, sizeof(*params)); 1175 1176 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) 1177 format = &mconfig->in_fmt[0]; 1178 else 1179 format = &mconfig->out_fmt[0]; 1180 1181 /* set the hw_params */ 1182 format->s_freq = params->s_freq; 1183 format->channels = params->ch; 1184 format->valid_bit_depth = skl_get_bit_depth(params->s_fmt); 1185 1186 /* 1187 * 16 bit is 16 bit container whereas 24 bit is in 32 bit 1188 * container so update bit depth accordingly 1189 */ 1190 switch (format->valid_bit_depth) { 1191 case SKL_DEPTH_16BIT: 1192 format->bit_depth = format->valid_bit_depth; 1193 break; 1194 1195 case SKL_DEPTH_24BIT: 1196 case SKL_DEPTH_32BIT: 1197 format->bit_depth = SKL_DEPTH_32BIT; 1198 break; 1199 1200 default: 1201 dev_err(dev, "Invalid bit depth %x for pipe\n", 1202 format->valid_bit_depth); 1203 return -EINVAL; 1204 } 1205 1206 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1207 mconfig->ibs = (format->s_freq / 1000) * 1208 (format->channels) * 1209 (format->bit_depth >> 3); 1210 } else { 1211 mconfig->obs = (format->s_freq / 1000) * 1212 (format->channels) * 1213 (format->bit_depth >> 3); 1214 } 1215 1216 return 0; 1217 } 1218 1219 /* 1220 * Query the module config for the FE DAI 1221 * This is used to find the hw_params set for that DAI and apply to FE 1222 * pipeline 1223 */ 1224 struct skl_module_cfg * 1225 skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream) 1226 { 1227 struct snd_soc_dapm_widget *w; 1228 struct snd_soc_dapm_path *p = NULL; 1229 1230 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 1231 w = dai->playback_widget; 1232 snd_soc_dapm_widget_for_each_sink_path(w, p) { 1233 if (p->connect && p->sink->power && 1234 !is_skl_dsp_widget_type(p->sink)) 1235 continue; 1236 1237 if (p->sink->priv) { 1238 dev_dbg(dai->dev, "set params for %s\n", 1239 p->sink->name); 1240 return p->sink->priv; 1241 } 1242 } 1243 } else { 1244 w = dai->capture_widget; 1245 snd_soc_dapm_widget_for_each_source_path(w, p) { 1246 if (p->connect && p->source->power && 1247 !is_skl_dsp_widget_type(p->source)) 1248 continue; 1249 1250 if (p->source->priv) { 1251 dev_dbg(dai->dev, "set params for %s\n", 1252 p->source->name); 1253 return p->source->priv; 1254 } 1255 } 1256 } 1257 1258 return NULL; 1259 } 1260 1261 static struct skl_module_cfg *skl_get_mconfig_pb_cpr( 1262 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w) 1263 { 1264 struct snd_soc_dapm_path *p; 1265 struct skl_module_cfg *mconfig = NULL; 1266 1267 snd_soc_dapm_widget_for_each_source_path(w, p) { 1268 if (w->endpoints[SND_SOC_DAPM_DIR_OUT] > 0) { 1269 if (p->connect && 1270 (p->sink->id == snd_soc_dapm_aif_out) && 1271 p->source->priv) { 1272 mconfig = p->source->priv; 1273 return mconfig; 1274 } 1275 mconfig = skl_get_mconfig_pb_cpr(dai, p->source); 1276 if (mconfig) 1277 return mconfig; 1278 } 1279 } 1280 return mconfig; 1281 } 1282 1283 static struct skl_module_cfg *skl_get_mconfig_cap_cpr( 1284 struct snd_soc_dai *dai, struct snd_soc_dapm_widget *w) 1285 { 1286 struct snd_soc_dapm_path *p; 1287 struct skl_module_cfg *mconfig = NULL; 1288 1289 snd_soc_dapm_widget_for_each_sink_path(w, p) { 1290 if (w->endpoints[SND_SOC_DAPM_DIR_IN] > 0) { 1291 if (p->connect && 1292 (p->source->id == snd_soc_dapm_aif_in) && 1293 p->sink->priv) { 1294 mconfig = p->sink->priv; 1295 return mconfig; 1296 } 1297 mconfig = skl_get_mconfig_cap_cpr(dai, p->sink); 1298 if (mconfig) 1299 return mconfig; 1300 } 1301 } 1302 return mconfig; 1303 } 1304 1305 struct skl_module_cfg * 1306 skl_tplg_be_get_cpr_module(struct snd_soc_dai *dai, int stream) 1307 { 1308 struct snd_soc_dapm_widget *w; 1309 struct skl_module_cfg *mconfig; 1310 1311 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 1312 w = dai->playback_widget; 1313 mconfig = skl_get_mconfig_pb_cpr(dai, w); 1314 } else { 1315 w = dai->capture_widget; 1316 mconfig = skl_get_mconfig_cap_cpr(dai, w); 1317 } 1318 return mconfig; 1319 } 1320 1321 static u8 skl_tplg_be_link_type(int dev_type) 1322 { 1323 int ret; 1324 1325 switch (dev_type) { 1326 case SKL_DEVICE_BT: 1327 ret = NHLT_LINK_SSP; 1328 break; 1329 1330 case SKL_DEVICE_DMIC: 1331 ret = NHLT_LINK_DMIC; 1332 break; 1333 1334 case SKL_DEVICE_I2S: 1335 ret = NHLT_LINK_SSP; 1336 break; 1337 1338 case SKL_DEVICE_HDALINK: 1339 ret = NHLT_LINK_HDA; 1340 break; 1341 1342 default: 1343 ret = NHLT_LINK_INVALID; 1344 break; 1345 } 1346 1347 return ret; 1348 } 1349 1350 /* 1351 * Fill the BE gateway parameters 1352 * The BE gateway expects a blob of parameters which are kept in the ACPI 1353 * NHLT blob, so query the blob for interface type (i2s/pdm) and instance. 1354 * The port can have multiple settings so pick based on the PCM 1355 * parameters 1356 */ 1357 static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai, 1358 struct skl_module_cfg *mconfig, 1359 struct skl_pipe_params *params) 1360 { 1361 struct skl_pipe *pipe = mconfig->pipe; 1362 struct nhlt_specific_cfg *cfg; 1363 struct skl *skl = get_skl_ctx(dai->dev); 1364 int link_type = skl_tplg_be_link_type(mconfig->dev_type); 1365 1366 memcpy(pipe->p_params, params, sizeof(*params)); 1367 1368 if (link_type == NHLT_LINK_HDA) 1369 return 0; 1370 1371 /* update the blob based on virtual bus_id*/ 1372 cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type, 1373 params->s_fmt, params->ch, 1374 params->s_freq, params->stream); 1375 if (cfg) { 1376 mconfig->formats_config.caps_size = cfg->size; 1377 mconfig->formats_config.caps = (u32 *) &cfg->caps; 1378 } else { 1379 dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n", 1380 mconfig->vbus_id, link_type, 1381 params->stream); 1382 dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n", 1383 params->ch, params->s_freq, params->s_fmt); 1384 return -EINVAL; 1385 } 1386 1387 return 0; 1388 } 1389 1390 static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai, 1391 struct snd_soc_dapm_widget *w, 1392 struct skl_pipe_params *params) 1393 { 1394 struct snd_soc_dapm_path *p; 1395 int ret = -EIO; 1396 1397 snd_soc_dapm_widget_for_each_source_path(w, p) { 1398 if (p->connect && is_skl_dsp_widget_type(p->source) && 1399 p->source->priv) { 1400 1401 ret = skl_tplg_be_fill_pipe_params(dai, 1402 p->source->priv, params); 1403 if (ret < 0) 1404 return ret; 1405 } else { 1406 ret = skl_tplg_be_set_src_pipe_params(dai, 1407 p->source, params); 1408 if (ret < 0) 1409 return ret; 1410 } 1411 } 1412 1413 return ret; 1414 } 1415 1416 static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai, 1417 struct snd_soc_dapm_widget *w, struct skl_pipe_params *params) 1418 { 1419 struct snd_soc_dapm_path *p = NULL; 1420 int ret = -EIO; 1421 1422 snd_soc_dapm_widget_for_each_sink_path(w, p) { 1423 if (p->connect && is_skl_dsp_widget_type(p->sink) && 1424 p->sink->priv) { 1425 1426 ret = skl_tplg_be_fill_pipe_params(dai, 1427 p->sink->priv, params); 1428 if (ret < 0) 1429 return ret; 1430 } else { 1431 ret = skl_tplg_be_set_sink_pipe_params( 1432 dai, p->sink, params); 1433 if (ret < 0) 1434 return ret; 1435 } 1436 } 1437 1438 return ret; 1439 } 1440 1441 /* 1442 * BE hw_params can be a source parameters (capture) or sink parameters 1443 * (playback). Based on sink and source we need to either find the source 1444 * list or the sink list and set the pipeline parameters 1445 */ 1446 int skl_tplg_be_update_params(struct snd_soc_dai *dai, 1447 struct skl_pipe_params *params) 1448 { 1449 struct snd_soc_dapm_widget *w; 1450 1451 if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) { 1452 w = dai->playback_widget; 1453 1454 return skl_tplg_be_set_src_pipe_params(dai, w, params); 1455 1456 } else { 1457 w = dai->capture_widget; 1458 1459 return skl_tplg_be_set_sink_pipe_params(dai, w, params); 1460 } 1461 1462 return 0; 1463 } 1464 1465 static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = { 1466 {SKL_MIXER_EVENT, skl_tplg_mixer_event}, 1467 {SKL_VMIXER_EVENT, skl_tplg_vmixer_event}, 1468 {SKL_PGA_EVENT, skl_tplg_pga_event}, 1469 }; 1470 1471 static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = { 1472 {SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get, 1473 skl_tplg_tlv_control_set}, 1474 }; 1475 1476 /* 1477 * The topology binary passes the pin info for a module so initialize the pin 1478 * info passed into module instance 1479 */ 1480 static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin, 1481 struct skl_module_pin *m_pin, 1482 bool is_dynamic, int max_pin) 1483 { 1484 int i; 1485 1486 for (i = 0; i < max_pin; i++) { 1487 m_pin[i].id.module_id = dfw_pin[i].module_id; 1488 m_pin[i].id.instance_id = dfw_pin[i].instance_id; 1489 m_pin[i].in_use = false; 1490 m_pin[i].is_dynamic = is_dynamic; 1491 m_pin[i].pin_state = SKL_PIN_UNBIND; 1492 } 1493 } 1494 1495 /* 1496 * Add pipeline from topology binary into driver pipeline list 1497 * 1498 * If already added we return that instance 1499 * Otherwise we create a new instance and add into driver list 1500 */ 1501 static struct skl_pipe *skl_tplg_add_pipe(struct device *dev, 1502 struct skl *skl, struct skl_dfw_pipe *dfw_pipe) 1503 { 1504 struct skl_pipeline *ppl; 1505 struct skl_pipe *pipe; 1506 struct skl_pipe_params *params; 1507 1508 list_for_each_entry(ppl, &skl->ppl_list, node) { 1509 if (ppl->pipe->ppl_id == dfw_pipe->pipe_id) 1510 return ppl->pipe; 1511 } 1512 1513 ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL); 1514 if (!ppl) 1515 return NULL; 1516 1517 pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL); 1518 if (!pipe) 1519 return NULL; 1520 1521 params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL); 1522 if (!params) 1523 return NULL; 1524 1525 pipe->ppl_id = dfw_pipe->pipe_id; 1526 pipe->memory_pages = dfw_pipe->memory_pages; 1527 pipe->pipe_priority = dfw_pipe->pipe_priority; 1528 pipe->conn_type = dfw_pipe->conn_type; 1529 pipe->state = SKL_PIPE_INVALID; 1530 pipe->p_params = params; 1531 INIT_LIST_HEAD(&pipe->w_list); 1532 1533 ppl->pipe = pipe; 1534 list_add(&ppl->node, &skl->ppl_list); 1535 1536 return ppl->pipe; 1537 } 1538 1539 static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt, 1540 struct skl_dfw_module_fmt *src_fmt, 1541 int pins) 1542 { 1543 int i; 1544 1545 for (i = 0; i < pins; i++) { 1546 dst_fmt[i].channels = src_fmt[i].channels; 1547 dst_fmt[i].s_freq = src_fmt[i].freq; 1548 dst_fmt[i].bit_depth = src_fmt[i].bit_depth; 1549 dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth; 1550 dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg; 1551 dst_fmt[i].ch_map = src_fmt[i].ch_map; 1552 dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style; 1553 dst_fmt[i].sample_type = src_fmt[i].sample_type; 1554 } 1555 } 1556 1557 /* 1558 * Topology core widget load callback 1559 * 1560 * This is used to save the private data for each widget which gives 1561 * information to the driver about module and pipeline parameters which DSP 1562 * FW expects like ids, resource values, formats etc 1563 */ 1564 static int skl_tplg_widget_load(struct snd_soc_component *cmpnt, 1565 struct snd_soc_dapm_widget *w, 1566 struct snd_soc_tplg_dapm_widget *tplg_w) 1567 { 1568 int ret; 1569 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt); 1570 struct skl *skl = ebus_to_skl(ebus); 1571 struct hdac_bus *bus = ebus_to_hbus(ebus); 1572 struct skl_module_cfg *mconfig; 1573 struct skl_pipe *pipe; 1574 struct skl_dfw_module *dfw_config = 1575 (struct skl_dfw_module *)tplg_w->priv.data; 1576 1577 if (!tplg_w->priv.size) 1578 goto bind_event; 1579 1580 mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL); 1581 1582 if (!mconfig) 1583 return -ENOMEM; 1584 1585 w->priv = mconfig; 1586 memcpy(&mconfig->guid, &dfw_config->uuid, 16); 1587 1588 mconfig->id.module_id = dfw_config->module_id; 1589 mconfig->id.instance_id = dfw_config->instance_id; 1590 mconfig->mcps = dfw_config->max_mcps; 1591 mconfig->ibs = dfw_config->ibs; 1592 mconfig->obs = dfw_config->obs; 1593 mconfig->core_id = dfw_config->core_id; 1594 mconfig->max_in_queue = dfw_config->max_in_queue; 1595 mconfig->max_out_queue = dfw_config->max_out_queue; 1596 mconfig->is_loadable = dfw_config->is_loadable; 1597 skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt, 1598 MODULE_MAX_IN_PINS); 1599 skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt, 1600 MODULE_MAX_OUT_PINS); 1601 1602 mconfig->params_fixup = dfw_config->params_fixup; 1603 mconfig->converter = dfw_config->converter; 1604 mconfig->m_type = dfw_config->module_type; 1605 mconfig->vbus_id = dfw_config->vbus_id; 1606 mconfig->mem_pages = dfw_config->mem_pages; 1607 1608 pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe); 1609 if (pipe) 1610 mconfig->pipe = pipe; 1611 1612 mconfig->dev_type = dfw_config->dev_type; 1613 mconfig->hw_conn_type = dfw_config->hw_conn_type; 1614 mconfig->time_slot = dfw_config->time_slot; 1615 mconfig->formats_config.caps_size = dfw_config->caps.caps_size; 1616 1617 mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) * 1618 sizeof(*mconfig->m_in_pin), 1619 GFP_KERNEL); 1620 if (!mconfig->m_in_pin) 1621 return -ENOMEM; 1622 1623 mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) * 1624 sizeof(*mconfig->m_out_pin), 1625 GFP_KERNEL); 1626 if (!mconfig->m_out_pin) 1627 return -ENOMEM; 1628 1629 skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin, 1630 dfw_config->is_dynamic_in_pin, 1631 mconfig->max_in_queue); 1632 1633 skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin, 1634 dfw_config->is_dynamic_out_pin, 1635 mconfig->max_out_queue); 1636 1637 1638 if (mconfig->formats_config.caps_size == 0) 1639 goto bind_event; 1640 1641 mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev, 1642 mconfig->formats_config.caps_size, GFP_KERNEL); 1643 1644 if (mconfig->formats_config.caps == NULL) 1645 return -ENOMEM; 1646 1647 memcpy(mconfig->formats_config.caps, dfw_config->caps.caps, 1648 dfw_config->caps.caps_size); 1649 mconfig->formats_config.param_id = dfw_config->caps.param_id; 1650 mconfig->formats_config.set_params = dfw_config->caps.set_params; 1651 1652 bind_event: 1653 if (tplg_w->event_type == 0) { 1654 dev_dbg(bus->dev, "ASoC: No event handler required\n"); 1655 return 0; 1656 } 1657 1658 ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops, 1659 ARRAY_SIZE(skl_tplg_widget_ops), 1660 tplg_w->event_type); 1661 1662 if (ret) { 1663 dev_err(bus->dev, "%s: No matching event handlers found for %d\n", 1664 __func__, tplg_w->event_type); 1665 return -EINVAL; 1666 } 1667 1668 return 0; 1669 } 1670 1671 static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be, 1672 struct snd_soc_tplg_bytes_control *bc) 1673 { 1674 struct skl_algo_data *ac; 1675 struct skl_dfw_algo_data *dfw_ac = 1676 (struct skl_dfw_algo_data *)bc->priv.data; 1677 1678 ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL); 1679 if (!ac) 1680 return -ENOMEM; 1681 1682 /* Fill private data */ 1683 ac->max = dfw_ac->max; 1684 ac->param_id = dfw_ac->param_id; 1685 ac->set_params = dfw_ac->set_params; 1686 1687 if (ac->max) { 1688 ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL); 1689 if (!ac->params) 1690 return -ENOMEM; 1691 1692 memcpy(ac->params, dfw_ac->params, ac->max); 1693 } 1694 1695 be->dobj.private = ac; 1696 return 0; 1697 } 1698 1699 static int skl_tplg_control_load(struct snd_soc_component *cmpnt, 1700 struct snd_kcontrol_new *kctl, 1701 struct snd_soc_tplg_ctl_hdr *hdr) 1702 { 1703 struct soc_bytes_ext *sb; 1704 struct snd_soc_tplg_bytes_control *tplg_bc; 1705 struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt); 1706 struct hdac_bus *bus = ebus_to_hbus(ebus); 1707 1708 switch (hdr->ops.info) { 1709 case SND_SOC_TPLG_CTL_BYTES: 1710 tplg_bc = container_of(hdr, 1711 struct snd_soc_tplg_bytes_control, hdr); 1712 if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) { 1713 sb = (struct soc_bytes_ext *)kctl->private_value; 1714 if (tplg_bc->priv.size) 1715 return skl_init_algo_data( 1716 bus->dev, sb, tplg_bc); 1717 } 1718 break; 1719 1720 default: 1721 dev_warn(bus->dev, "Control load not supported %d:%d:%d\n", 1722 hdr->ops.get, hdr->ops.put, hdr->ops.info); 1723 break; 1724 } 1725 1726 return 0; 1727 } 1728 1729 static struct snd_soc_tplg_ops skl_tplg_ops = { 1730 .widget_load = skl_tplg_widget_load, 1731 .control_load = skl_tplg_control_load, 1732 .bytes_ext_ops = skl_tlv_ops, 1733 .bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops), 1734 }; 1735 1736 /* This will be read from topology manifest, currently defined here */ 1737 #define SKL_MAX_MCPS 30000000 1738 #define SKL_FW_MAX_MEM 1000000 1739 1740 /* 1741 * SKL topology init routine 1742 */ 1743 int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus) 1744 { 1745 int ret; 1746 const struct firmware *fw; 1747 struct hdac_bus *bus = ebus_to_hbus(ebus); 1748 struct skl *skl = ebus_to_skl(ebus); 1749 1750 ret = request_firmware(&fw, skl->tplg_name, bus->dev); 1751 if (ret < 0) { 1752 dev_err(bus->dev, "tplg fw %s load failed with %d\n", 1753 skl->tplg_name, ret); 1754 ret = request_firmware(&fw, "dfw_sst.bin", bus->dev); 1755 if (ret < 0) { 1756 dev_err(bus->dev, "Fallback tplg fw %s load failed with %d\n", 1757 "dfw_sst.bin", ret); 1758 return ret; 1759 } 1760 } 1761 1762 /* 1763 * The complete tplg for SKL is loaded as index 0, we don't use 1764 * any other index 1765 */ 1766 ret = snd_soc_tplg_component_load(&platform->component, 1767 &skl_tplg_ops, fw, 0); 1768 if (ret < 0) { 1769 dev_err(bus->dev, "tplg component load failed%d\n", ret); 1770 release_firmware(fw); 1771 return -EINVAL; 1772 } 1773 1774 skl->resource.max_mcps = SKL_MAX_MCPS; 1775 skl->resource.max_mem = SKL_FW_MAX_MEM; 1776 1777 skl->tplg = fw; 1778 1779 return 0; 1780 } 1781