1e4e2d2f4SJeeja KP /*
2e4e2d2f4SJeeja KP  *  skl-topology.c - Implements Platform component ALSA controls/widget
3e4e2d2f4SJeeja KP  *  handlers.
4e4e2d2f4SJeeja KP  *
5e4e2d2f4SJeeja KP  *  Copyright (C) 2014-2015 Intel Corp
6e4e2d2f4SJeeja KP  *  Author: Jeeja KP <jeeja.kp@intel.com>
7e4e2d2f4SJeeja KP  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8e4e2d2f4SJeeja KP  *
9e4e2d2f4SJeeja KP  * This program is free software; you can redistribute it and/or modify
10e4e2d2f4SJeeja KP  * it under the terms of the GNU General Public License as version 2, as
11e4e2d2f4SJeeja KP  * published by the Free Software Foundation.
12e4e2d2f4SJeeja KP  *
13e4e2d2f4SJeeja KP  * This program is distributed in the hope that it will be useful, but
14e4e2d2f4SJeeja KP  * WITHOUT ANY WARRANTY; without even the implied warranty of
15e4e2d2f4SJeeja KP  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
16e4e2d2f4SJeeja KP  * General Public License for more details.
17e4e2d2f4SJeeja KP  */
18e4e2d2f4SJeeja KP 
19e4e2d2f4SJeeja KP #include <linux/slab.h>
20e4e2d2f4SJeeja KP #include <linux/types.h>
21e4e2d2f4SJeeja KP #include <linux/firmware.h>
22e4e2d2f4SJeeja KP #include <sound/soc.h>
23e4e2d2f4SJeeja KP #include <sound/soc-topology.h>
24e4e2d2f4SJeeja KP #include "skl-sst-dsp.h"
25e4e2d2f4SJeeja KP #include "skl-sst-ipc.h"
26e4e2d2f4SJeeja KP #include "skl-topology.h"
27e4e2d2f4SJeeja KP #include "skl.h"
28e4e2d2f4SJeeja KP #include "skl-tplg-interface.h"
296c5768b3SDharageswari R #include "../common/sst-dsp.h"
306c5768b3SDharageswari R #include "../common/sst-dsp-priv.h"
31e4e2d2f4SJeeja KP 
32f7590d4fSJeeja KP #define SKL_CH_FIXUP_MASK		(1 << 0)
33f7590d4fSJeeja KP #define SKL_RATE_FIXUP_MASK		(1 << 1)
34f7590d4fSJeeja KP #define SKL_FMT_FIXUP_MASK		(1 << 2)
35f7590d4fSJeeja KP 
36e4e2d2f4SJeeja KP /*
37e4e2d2f4SJeeja KP  * SKL DSP driver modelling uses only few DAPM widgets so for rest we will
38e4e2d2f4SJeeja KP  * ignore. This helpers checks if the SKL driver handles this widget type
39e4e2d2f4SJeeja KP  */
40e4e2d2f4SJeeja KP static int is_skl_dsp_widget_type(struct snd_soc_dapm_widget *w)
41e4e2d2f4SJeeja KP {
42e4e2d2f4SJeeja KP 	switch (w->id) {
43e4e2d2f4SJeeja KP 	case snd_soc_dapm_dai_link:
44e4e2d2f4SJeeja KP 	case snd_soc_dapm_dai_in:
45e4e2d2f4SJeeja KP 	case snd_soc_dapm_aif_in:
46e4e2d2f4SJeeja KP 	case snd_soc_dapm_aif_out:
47e4e2d2f4SJeeja KP 	case snd_soc_dapm_dai_out:
48e4e2d2f4SJeeja KP 	case snd_soc_dapm_switch:
49e4e2d2f4SJeeja KP 		return false;
50e4e2d2f4SJeeja KP 	default:
51e4e2d2f4SJeeja KP 		return true;
52e4e2d2f4SJeeja KP 	}
53e4e2d2f4SJeeja KP }
54e4e2d2f4SJeeja KP 
55e4e2d2f4SJeeja KP /*
56e4e2d2f4SJeeja KP  * Each pipelines needs memory to be allocated. Check if we have free memory
57e4e2d2f4SJeeja KP  * from available pool. Then only add this to pool
58e4e2d2f4SJeeja KP  * This is freed when pipe is deleted
59e4e2d2f4SJeeja KP  * Note: DSP does actual memory management we only keep track for complete
60e4e2d2f4SJeeja KP  * pool
61e4e2d2f4SJeeja KP  */
62e4e2d2f4SJeeja KP static bool skl_tplg_alloc_pipe_mem(struct skl *skl,
63e4e2d2f4SJeeja KP 				struct skl_module_cfg *mconfig)
64e4e2d2f4SJeeja KP {
65e4e2d2f4SJeeja KP 	struct skl_sst *ctx = skl->skl_sst;
66e4e2d2f4SJeeja KP 
67e4e2d2f4SJeeja KP 	if (skl->resource.mem + mconfig->pipe->memory_pages >
68e4e2d2f4SJeeja KP 				skl->resource.max_mem) {
69e4e2d2f4SJeeja KP 		dev_err(ctx->dev,
70e4e2d2f4SJeeja KP 				"%s: module_id %d instance %d\n", __func__,
71e4e2d2f4SJeeja KP 				mconfig->id.module_id,
72e4e2d2f4SJeeja KP 				mconfig->id.instance_id);
73e4e2d2f4SJeeja KP 		dev_err(ctx->dev,
74e4e2d2f4SJeeja KP 				"exceeds ppl memory available %d mem %d\n",
75e4e2d2f4SJeeja KP 				skl->resource.max_mem, skl->resource.mem);
76e4e2d2f4SJeeja KP 		return false;
77e4e2d2f4SJeeja KP 	}
78e4e2d2f4SJeeja KP 
79e4e2d2f4SJeeja KP 	skl->resource.mem += mconfig->pipe->memory_pages;
80e4e2d2f4SJeeja KP 	return true;
81e4e2d2f4SJeeja KP }
82e4e2d2f4SJeeja KP 
83e4e2d2f4SJeeja KP /*
84e4e2d2f4SJeeja KP  * Pipeline needs needs DSP CPU resources for computation, this is
85e4e2d2f4SJeeja KP  * quantified in MCPS (Million Clocks Per Second) required for module/pipe
86e4e2d2f4SJeeja KP  *
87e4e2d2f4SJeeja KP  * Each pipelines needs mcps to be allocated. Check if we have mcps for this
88e4e2d2f4SJeeja KP  * pipe. This adds the mcps to driver counter
89e4e2d2f4SJeeja KP  * This is removed on pipeline delete
90e4e2d2f4SJeeja KP  */
91e4e2d2f4SJeeja KP static bool skl_tplg_alloc_pipe_mcps(struct skl *skl,
92e4e2d2f4SJeeja KP 				struct skl_module_cfg *mconfig)
93e4e2d2f4SJeeja KP {
94e4e2d2f4SJeeja KP 	struct skl_sst *ctx = skl->skl_sst;
95e4e2d2f4SJeeja KP 
96e4e2d2f4SJeeja KP 	if (skl->resource.mcps + mconfig->mcps > skl->resource.max_mcps) {
97e4e2d2f4SJeeja KP 		dev_err(ctx->dev,
98e4e2d2f4SJeeja KP 			"%s: module_id %d instance %d\n", __func__,
99e4e2d2f4SJeeja KP 			mconfig->id.module_id, mconfig->id.instance_id);
100e4e2d2f4SJeeja KP 		dev_err(ctx->dev,
101e4e2d2f4SJeeja KP 			"exceeds ppl memory available %d > mem %d\n",
102e4e2d2f4SJeeja KP 			skl->resource.max_mcps, skl->resource.mcps);
103e4e2d2f4SJeeja KP 		return false;
104e4e2d2f4SJeeja KP 	}
105e4e2d2f4SJeeja KP 
106e4e2d2f4SJeeja KP 	skl->resource.mcps += mconfig->mcps;
107e4e2d2f4SJeeja KP 	return true;
108e4e2d2f4SJeeja KP }
109e4e2d2f4SJeeja KP 
110e4e2d2f4SJeeja KP /*
111e4e2d2f4SJeeja KP  * Free the mcps when tearing down
112e4e2d2f4SJeeja KP  */
113e4e2d2f4SJeeja KP static void
114e4e2d2f4SJeeja KP skl_tplg_free_pipe_mcps(struct skl *skl, struct skl_module_cfg *mconfig)
115e4e2d2f4SJeeja KP {
116e4e2d2f4SJeeja KP 	skl->resource.mcps -= mconfig->mcps;
117e4e2d2f4SJeeja KP }
118e4e2d2f4SJeeja KP 
119e4e2d2f4SJeeja KP /*
120e4e2d2f4SJeeja KP  * Free the memory when tearing down
121e4e2d2f4SJeeja KP  */
122e4e2d2f4SJeeja KP static void
123e4e2d2f4SJeeja KP skl_tplg_free_pipe_mem(struct skl *skl, struct skl_module_cfg *mconfig)
124e4e2d2f4SJeeja KP {
125e4e2d2f4SJeeja KP 	skl->resource.mem -= mconfig->pipe->memory_pages;
126e4e2d2f4SJeeja KP }
127e4e2d2f4SJeeja KP 
128f7590d4fSJeeja KP 
129f7590d4fSJeeja KP static void skl_dump_mconfig(struct skl_sst *ctx,
130f7590d4fSJeeja KP 					struct skl_module_cfg *mcfg)
131f7590d4fSJeeja KP {
132f7590d4fSJeeja KP 	dev_dbg(ctx->dev, "Dumping config\n");
133f7590d4fSJeeja KP 	dev_dbg(ctx->dev, "Input Format:\n");
1344cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "channels = %d\n", mcfg->in_fmt[0].channels);
1354cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->in_fmt[0].s_freq);
1364cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->in_fmt[0].ch_cfg);
1374cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->in_fmt[0].valid_bit_depth);
138f7590d4fSJeeja KP 	dev_dbg(ctx->dev, "Output Format:\n");
1394cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "channels = %d\n", mcfg->out_fmt[0].channels);
1404cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "s_freq = %d\n", mcfg->out_fmt[0].s_freq);
1414cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "valid bit depth = %d\n", mcfg->out_fmt[0].valid_bit_depth);
1424cd9899fSHardik T Shah 	dev_dbg(ctx->dev, "ch_cfg = %d\n", mcfg->out_fmt[0].ch_cfg);
143f7590d4fSJeeja KP }
144f7590d4fSJeeja KP 
145f7590d4fSJeeja KP static void skl_tplg_update_params(struct skl_module_fmt *fmt,
146f7590d4fSJeeja KP 			struct skl_pipe_params *params, int fixup)
147f7590d4fSJeeja KP {
148f7590d4fSJeeja KP 	if (fixup & SKL_RATE_FIXUP_MASK)
149f7590d4fSJeeja KP 		fmt->s_freq = params->s_freq;
150f7590d4fSJeeja KP 	if (fixup & SKL_CH_FIXUP_MASK)
151f7590d4fSJeeja KP 		fmt->channels = params->ch;
15298256f83SJeeja KP 	if (fixup & SKL_FMT_FIXUP_MASK) {
15398256f83SJeeja KP 		fmt->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
15498256f83SJeeja KP 
15598256f83SJeeja KP 		/*
15698256f83SJeeja KP 		 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
15798256f83SJeeja KP 		 * container so update bit depth accordingly
15898256f83SJeeja KP 		 */
15998256f83SJeeja KP 		switch (fmt->valid_bit_depth) {
16098256f83SJeeja KP 		case SKL_DEPTH_16BIT:
16198256f83SJeeja KP 			fmt->bit_depth = fmt->valid_bit_depth;
16298256f83SJeeja KP 			break;
16398256f83SJeeja KP 
16498256f83SJeeja KP 		default:
16598256f83SJeeja KP 			fmt->bit_depth = SKL_DEPTH_32BIT;
16698256f83SJeeja KP 			break;
16798256f83SJeeja KP 		}
16898256f83SJeeja KP 	}
16998256f83SJeeja KP 
170f7590d4fSJeeja KP }
171f7590d4fSJeeja KP 
172f7590d4fSJeeja KP /*
173f7590d4fSJeeja KP  * A pipeline may have modules which impact the pcm parameters, like SRC,
174f7590d4fSJeeja KP  * channel converter, format converter.
175f7590d4fSJeeja KP  * We need to calculate the output params by applying the 'fixup'
176f7590d4fSJeeja KP  * Topology will tell driver which type of fixup is to be applied by
177f7590d4fSJeeja KP  * supplying the fixup mask, so based on that we calculate the output
178f7590d4fSJeeja KP  *
179f7590d4fSJeeja KP  * Now In FE the pcm hw_params is source/target format. Same is applicable
180f7590d4fSJeeja KP  * for BE with its hw_params invoked.
181f7590d4fSJeeja KP  * here based on FE, BE pipeline and direction we calculate the input and
182f7590d4fSJeeja KP  * outfix and then apply that for a module
183f7590d4fSJeeja KP  */
184f7590d4fSJeeja KP static void skl_tplg_update_params_fixup(struct skl_module_cfg *m_cfg,
185f7590d4fSJeeja KP 		struct skl_pipe_params *params, bool is_fe)
186f7590d4fSJeeja KP {
187f7590d4fSJeeja KP 	int in_fixup, out_fixup;
188f7590d4fSJeeja KP 	struct skl_module_fmt *in_fmt, *out_fmt;
189f7590d4fSJeeja KP 
1904cd9899fSHardik T Shah 	/* Fixups will be applied to pin 0 only */
1914cd9899fSHardik T Shah 	in_fmt = &m_cfg->in_fmt[0];
1924cd9899fSHardik T Shah 	out_fmt = &m_cfg->out_fmt[0];
193f7590d4fSJeeja KP 
194f7590d4fSJeeja KP 	if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
195f7590d4fSJeeja KP 		if (is_fe) {
196f7590d4fSJeeja KP 			in_fixup = m_cfg->params_fixup;
197f7590d4fSJeeja KP 			out_fixup = (~m_cfg->converter) &
198f7590d4fSJeeja KP 					m_cfg->params_fixup;
199f7590d4fSJeeja KP 		} else {
200f7590d4fSJeeja KP 			out_fixup = m_cfg->params_fixup;
201f7590d4fSJeeja KP 			in_fixup = (~m_cfg->converter) &
202f7590d4fSJeeja KP 					m_cfg->params_fixup;
203f7590d4fSJeeja KP 		}
204f7590d4fSJeeja KP 	} else {
205f7590d4fSJeeja KP 		if (is_fe) {
206f7590d4fSJeeja KP 			out_fixup = m_cfg->params_fixup;
207f7590d4fSJeeja KP 			in_fixup = (~m_cfg->converter) &
208f7590d4fSJeeja KP 					m_cfg->params_fixup;
209f7590d4fSJeeja KP 		} else {
210f7590d4fSJeeja KP 			in_fixup = m_cfg->params_fixup;
211f7590d4fSJeeja KP 			out_fixup = (~m_cfg->converter) &
212f7590d4fSJeeja KP 					m_cfg->params_fixup;
213f7590d4fSJeeja KP 		}
214f7590d4fSJeeja KP 	}
215f7590d4fSJeeja KP 
216f7590d4fSJeeja KP 	skl_tplg_update_params(in_fmt, params, in_fixup);
217f7590d4fSJeeja KP 	skl_tplg_update_params(out_fmt, params, out_fixup);
218f7590d4fSJeeja KP }
219f7590d4fSJeeja KP 
220f7590d4fSJeeja KP /*
221f7590d4fSJeeja KP  * A module needs input and output buffers, which are dependent upon pcm
222f7590d4fSJeeja KP  * params, so once we have calculate params, we need buffer calculation as
223f7590d4fSJeeja KP  * well.
224f7590d4fSJeeja KP  */
225f7590d4fSJeeja KP static void skl_tplg_update_buffer_size(struct skl_sst *ctx,
226f7590d4fSJeeja KP 				struct skl_module_cfg *mcfg)
227f7590d4fSJeeja KP {
228f7590d4fSJeeja KP 	int multiplier = 1;
2294cd9899fSHardik T Shah 	struct skl_module_fmt *in_fmt, *out_fmt;
2304cd9899fSHardik T Shah 
2314cd9899fSHardik T Shah 
2324cd9899fSHardik T Shah 	/* Since fixups is applied to pin 0 only, ibs, obs needs
2334cd9899fSHardik T Shah 	 * change for pin 0 only
2344cd9899fSHardik T Shah 	 */
2354cd9899fSHardik T Shah 	in_fmt = &mcfg->in_fmt[0];
2364cd9899fSHardik T Shah 	out_fmt = &mcfg->out_fmt[0];
237f7590d4fSJeeja KP 
238f7590d4fSJeeja KP 	if (mcfg->m_type == SKL_MODULE_TYPE_SRCINT)
239f7590d4fSJeeja KP 		multiplier = 5;
2404cd9899fSHardik T Shah 	mcfg->ibs = (in_fmt->s_freq / 1000) *
2414cd9899fSHardik T Shah 				(mcfg->in_fmt->channels) *
2424cd9899fSHardik T Shah 				(mcfg->in_fmt->bit_depth >> 3) *
243f7590d4fSJeeja KP 				multiplier;
244f7590d4fSJeeja KP 
2454cd9899fSHardik T Shah 	mcfg->obs = (mcfg->out_fmt->s_freq / 1000) *
2464cd9899fSHardik T Shah 				(mcfg->out_fmt->channels) *
2474cd9899fSHardik T Shah 				(mcfg->out_fmt->bit_depth >> 3) *
248f7590d4fSJeeja KP 				multiplier;
249f7590d4fSJeeja KP }
250f7590d4fSJeeja KP 
251f7590d4fSJeeja KP static void skl_tplg_update_module_params(struct snd_soc_dapm_widget *w,
252f7590d4fSJeeja KP 							struct skl_sst *ctx)
253f7590d4fSJeeja KP {
254f7590d4fSJeeja KP 	struct skl_module_cfg *m_cfg = w->priv;
255f7590d4fSJeeja KP 	struct skl_pipe_params *params = m_cfg->pipe->p_params;
256f7590d4fSJeeja KP 	int p_conn_type = m_cfg->pipe->conn_type;
257f7590d4fSJeeja KP 	bool is_fe;
258f7590d4fSJeeja KP 
259f7590d4fSJeeja KP 	if (!m_cfg->params_fixup)
260f7590d4fSJeeja KP 		return;
261f7590d4fSJeeja KP 
262f7590d4fSJeeja KP 	dev_dbg(ctx->dev, "Mconfig for widget=%s BEFORE updation\n",
263f7590d4fSJeeja KP 				w->name);
264f7590d4fSJeeja KP 
265f7590d4fSJeeja KP 	skl_dump_mconfig(ctx, m_cfg);
266f7590d4fSJeeja KP 
267f7590d4fSJeeja KP 	if (p_conn_type == SKL_PIPE_CONN_TYPE_FE)
268f7590d4fSJeeja KP 		is_fe = true;
269f7590d4fSJeeja KP 	else
270f7590d4fSJeeja KP 		is_fe = false;
271f7590d4fSJeeja KP 
272f7590d4fSJeeja KP 	skl_tplg_update_params_fixup(m_cfg, params, is_fe);
273f7590d4fSJeeja KP 	skl_tplg_update_buffer_size(ctx, m_cfg);
274f7590d4fSJeeja KP 
275f7590d4fSJeeja KP 	dev_dbg(ctx->dev, "Mconfig for widget=%s AFTER updation\n",
276f7590d4fSJeeja KP 				w->name);
277f7590d4fSJeeja KP 
278f7590d4fSJeeja KP 	skl_dump_mconfig(ctx, m_cfg);
279f7590d4fSJeeja KP }
280f7590d4fSJeeja KP 
281e4e2d2f4SJeeja KP /*
282e4e2d2f4SJeeja KP  * A pipe can have multiple modules, each of them will be a DAPM widget as
283e4e2d2f4SJeeja KP  * well. While managing a pipeline we need to get the list of all the
284e4e2d2f4SJeeja KP  * widgets in a pipelines, so this helper - skl_tplg_get_pipe_widget() helps
285e4e2d2f4SJeeja KP  * to get the SKL type widgets in that pipeline
286e4e2d2f4SJeeja KP  */
287e4e2d2f4SJeeja KP static int skl_tplg_alloc_pipe_widget(struct device *dev,
288e4e2d2f4SJeeja KP 	struct snd_soc_dapm_widget *w, struct skl_pipe *pipe)
289e4e2d2f4SJeeja KP {
290e4e2d2f4SJeeja KP 	struct skl_module_cfg *src_module = NULL;
291e4e2d2f4SJeeja KP 	struct snd_soc_dapm_path *p = NULL;
292e4e2d2f4SJeeja KP 	struct skl_pipe_module *p_module = NULL;
293e4e2d2f4SJeeja KP 
294e4e2d2f4SJeeja KP 	p_module = devm_kzalloc(dev, sizeof(*p_module), GFP_KERNEL);
295e4e2d2f4SJeeja KP 	if (!p_module)
296e4e2d2f4SJeeja KP 		return -ENOMEM;
297e4e2d2f4SJeeja KP 
298e4e2d2f4SJeeja KP 	p_module->w = w;
299e4e2d2f4SJeeja KP 	list_add_tail(&p_module->node, &pipe->w_list);
300e4e2d2f4SJeeja KP 
301e4e2d2f4SJeeja KP 	snd_soc_dapm_widget_for_each_sink_path(w, p) {
302e4e2d2f4SJeeja KP 		if ((p->sink->priv == NULL)
303e4e2d2f4SJeeja KP 				&& (!is_skl_dsp_widget_type(w)))
304e4e2d2f4SJeeja KP 			continue;
305e4e2d2f4SJeeja KP 
306e4e2d2f4SJeeja KP 		if ((p->sink->priv != NULL) && p->connect
307e4e2d2f4SJeeja KP 				&& is_skl_dsp_widget_type(p->sink)) {
308e4e2d2f4SJeeja KP 
309e4e2d2f4SJeeja KP 			src_module = p->sink->priv;
310e4e2d2f4SJeeja KP 			if (pipe->ppl_id == src_module->pipe->ppl_id)
311e4e2d2f4SJeeja KP 				skl_tplg_alloc_pipe_widget(dev,
312e4e2d2f4SJeeja KP 							p->sink, pipe);
313e4e2d2f4SJeeja KP 		}
314e4e2d2f4SJeeja KP 	}
315e4e2d2f4SJeeja KP 	return 0;
316e4e2d2f4SJeeja KP }
317e4e2d2f4SJeeja KP 
318e4e2d2f4SJeeja KP /*
319abb74003SJeeja KP  * some modules can have multiple params set from user control and
320abb74003SJeeja KP  * need to be set after module is initialized. If set_param flag is
321abb74003SJeeja KP  * set module params will be done after module is initialised.
322abb74003SJeeja KP  */
323abb74003SJeeja KP static int skl_tplg_set_module_params(struct snd_soc_dapm_widget *w,
324abb74003SJeeja KP 						struct skl_sst *ctx)
325abb74003SJeeja KP {
326abb74003SJeeja KP 	int i, ret;
327abb74003SJeeja KP 	struct skl_module_cfg *mconfig = w->priv;
328abb74003SJeeja KP 	const struct snd_kcontrol_new *k;
329abb74003SJeeja KP 	struct soc_bytes_ext *sb;
330abb74003SJeeja KP 	struct skl_algo_data *bc;
331abb74003SJeeja KP 	struct skl_specific_cfg *sp_cfg;
332abb74003SJeeja KP 
333abb74003SJeeja KP 	if (mconfig->formats_config.caps_size > 0 &&
3344ced1827SJeeja KP 		mconfig->formats_config.set_params == SKL_PARAM_SET) {
335abb74003SJeeja KP 		sp_cfg = &mconfig->formats_config;
336abb74003SJeeja KP 		ret = skl_set_module_params(ctx, sp_cfg->caps,
337abb74003SJeeja KP 					sp_cfg->caps_size,
338abb74003SJeeja KP 					sp_cfg->param_id, mconfig);
339abb74003SJeeja KP 		if (ret < 0)
340abb74003SJeeja KP 			return ret;
341abb74003SJeeja KP 	}
342abb74003SJeeja KP 
343abb74003SJeeja KP 	for (i = 0; i < w->num_kcontrols; i++) {
344abb74003SJeeja KP 		k = &w->kcontrol_news[i];
345abb74003SJeeja KP 		if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
346abb74003SJeeja KP 			sb = (void *) k->private_value;
347abb74003SJeeja KP 			bc = (struct skl_algo_data *)sb->dobj.private;
348abb74003SJeeja KP 
3494ced1827SJeeja KP 			if (bc->set_params == SKL_PARAM_SET) {
350abb74003SJeeja KP 				ret = skl_set_module_params(ctx,
351abb74003SJeeja KP 						(u32 *)bc->params, bc->max,
352abb74003SJeeja KP 						bc->param_id, mconfig);
353abb74003SJeeja KP 				if (ret < 0)
354abb74003SJeeja KP 					return ret;
355abb74003SJeeja KP 			}
356abb74003SJeeja KP 		}
357abb74003SJeeja KP 	}
358abb74003SJeeja KP 
359abb74003SJeeja KP 	return 0;
360abb74003SJeeja KP }
361abb74003SJeeja KP 
362abb74003SJeeja KP /*
363abb74003SJeeja KP  * some module param can set from user control and this is required as
364abb74003SJeeja KP  * when module is initailzed. if module param is required in init it is
365abb74003SJeeja KP  * identifed by set_param flag. if set_param flag is not set, then this
366abb74003SJeeja KP  * parameter needs to set as part of module init.
367abb74003SJeeja KP  */
368abb74003SJeeja KP static int skl_tplg_set_module_init_data(struct snd_soc_dapm_widget *w)
369abb74003SJeeja KP {
370abb74003SJeeja KP 	const struct snd_kcontrol_new *k;
371abb74003SJeeja KP 	struct soc_bytes_ext *sb;
372abb74003SJeeja KP 	struct skl_algo_data *bc;
373abb74003SJeeja KP 	struct skl_module_cfg *mconfig = w->priv;
374abb74003SJeeja KP 	int i;
375abb74003SJeeja KP 
376abb74003SJeeja KP 	for (i = 0; i < w->num_kcontrols; i++) {
377abb74003SJeeja KP 		k = &w->kcontrol_news[i];
378abb74003SJeeja KP 		if (k->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
379abb74003SJeeja KP 			sb = (struct soc_bytes_ext *)k->private_value;
380abb74003SJeeja KP 			bc = (struct skl_algo_data *)sb->dobj.private;
381abb74003SJeeja KP 
3824ced1827SJeeja KP 			if (bc->set_params != SKL_PARAM_INIT)
383abb74003SJeeja KP 				continue;
384abb74003SJeeja KP 
385abb74003SJeeja KP 			mconfig->formats_config.caps = (u32 *)&bc->params;
386abb74003SJeeja KP 			mconfig->formats_config.caps_size = bc->max;
387abb74003SJeeja KP 
388abb74003SJeeja KP 			break;
389abb74003SJeeja KP 		}
390abb74003SJeeja KP 	}
391abb74003SJeeja KP 
392abb74003SJeeja KP 	return 0;
393abb74003SJeeja KP }
394abb74003SJeeja KP 
395abb74003SJeeja KP /*
396e4e2d2f4SJeeja KP  * Inside a pipe instance, we can have various modules. These modules need
397e4e2d2f4SJeeja KP  * to instantiated in DSP by invoking INIT_MODULE IPC, which is achieved by
398e4e2d2f4SJeeja KP  * skl_init_module() routine, so invoke that for all modules in a pipeline
399e4e2d2f4SJeeja KP  */
400e4e2d2f4SJeeja KP static int
401e4e2d2f4SJeeja KP skl_tplg_init_pipe_modules(struct skl *skl, struct skl_pipe *pipe)
402e4e2d2f4SJeeja KP {
403e4e2d2f4SJeeja KP 	struct skl_pipe_module *w_module;
404e4e2d2f4SJeeja KP 	struct snd_soc_dapm_widget *w;
405e4e2d2f4SJeeja KP 	struct skl_module_cfg *mconfig;
406e4e2d2f4SJeeja KP 	struct skl_sst *ctx = skl->skl_sst;
407e4e2d2f4SJeeja KP 	int ret = 0;
408e4e2d2f4SJeeja KP 
409e4e2d2f4SJeeja KP 	list_for_each_entry(w_module, &pipe->w_list, node) {
410e4e2d2f4SJeeja KP 		w = w_module->w;
411e4e2d2f4SJeeja KP 		mconfig = w->priv;
412e4e2d2f4SJeeja KP 
413e4e2d2f4SJeeja KP 		/* check resource available */
414e4e2d2f4SJeeja KP 		if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
415e4e2d2f4SJeeja KP 			return -ENOMEM;
416e4e2d2f4SJeeja KP 
4176c5768b3SDharageswari R 		if (mconfig->is_loadable && ctx->dsp->fw_ops.load_mod) {
4186c5768b3SDharageswari R 			ret = ctx->dsp->fw_ops.load_mod(ctx->dsp,
4196c5768b3SDharageswari R 				mconfig->id.module_id, mconfig->guid);
4206c5768b3SDharageswari R 			if (ret < 0)
4216c5768b3SDharageswari R 				return ret;
4226c5768b3SDharageswari R 		}
4236c5768b3SDharageswari R 
424f7590d4fSJeeja KP 		/*
425f7590d4fSJeeja KP 		 * apply fix/conversion to module params based on
426f7590d4fSJeeja KP 		 * FE/BE params
427f7590d4fSJeeja KP 		 */
428f7590d4fSJeeja KP 		skl_tplg_update_module_params(w, ctx);
429abb74003SJeeja KP 
430abb74003SJeeja KP 		skl_tplg_set_module_init_data(w);
4319939a9c3SJeeja KP 		ret = skl_init_module(ctx, mconfig);
432e4e2d2f4SJeeja KP 		if (ret < 0)
433e4e2d2f4SJeeja KP 			return ret;
434abb74003SJeeja KP 
435abb74003SJeeja KP 		ret = skl_tplg_set_module_params(w, ctx);
436e4e2d2f4SJeeja KP 		if (ret < 0)
437e4e2d2f4SJeeja KP 			return ret;
438e4e2d2f4SJeeja KP 	}
439e4e2d2f4SJeeja KP 
440e4e2d2f4SJeeja KP 	return 0;
441e4e2d2f4SJeeja KP }
442d93f8e55SVinod Koul 
4436c5768b3SDharageswari R static int skl_tplg_unload_pipe_modules(struct skl_sst *ctx,
4446c5768b3SDharageswari R 	 struct skl_pipe *pipe)
4456c5768b3SDharageswari R {
4466c5768b3SDharageswari R 	struct skl_pipe_module *w_module = NULL;
4476c5768b3SDharageswari R 	struct skl_module_cfg *mconfig = NULL;
4486c5768b3SDharageswari R 
4496c5768b3SDharageswari R 	list_for_each_entry(w_module, &pipe->w_list, node) {
4506c5768b3SDharageswari R 		mconfig  = w_module->w->priv;
4516c5768b3SDharageswari R 
4526c5768b3SDharageswari R 		if (mconfig->is_loadable && ctx->dsp->fw_ops.unload_mod)
4536c5768b3SDharageswari R 			return ctx->dsp->fw_ops.unload_mod(ctx->dsp,
4546c5768b3SDharageswari R 						mconfig->id.module_id);
4556c5768b3SDharageswari R 	}
4566c5768b3SDharageswari R 
4576c5768b3SDharageswari R 	/* no modules to unload in this path, so return */
4586c5768b3SDharageswari R 	return 0;
4596c5768b3SDharageswari R }
4606c5768b3SDharageswari R 
461d93f8e55SVinod Koul /*
462d93f8e55SVinod Koul  * Mixer module represents a pipeline. So in the Pre-PMU event of mixer we
463d93f8e55SVinod Koul  * need create the pipeline. So we do following:
464d93f8e55SVinod Koul  *   - check the resources
465d93f8e55SVinod Koul  *   - Create the pipeline
466d93f8e55SVinod Koul  *   - Initialize the modules in pipeline
467d93f8e55SVinod Koul  *   - finally bind all modules together
468d93f8e55SVinod Koul  */
469d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
470d93f8e55SVinod Koul 							struct skl *skl)
471d93f8e55SVinod Koul {
472d93f8e55SVinod Koul 	int ret;
473d93f8e55SVinod Koul 	struct skl_module_cfg *mconfig = w->priv;
474d93f8e55SVinod Koul 	struct skl_pipe_module *w_module;
475d93f8e55SVinod Koul 	struct skl_pipe *s_pipe = mconfig->pipe;
476d93f8e55SVinod Koul 	struct skl_module_cfg *src_module = NULL, *dst_module;
477d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
478d93f8e55SVinod Koul 
479d93f8e55SVinod Koul 	/* check resource available */
480d93f8e55SVinod Koul 	if (!skl_tplg_alloc_pipe_mcps(skl, mconfig))
481d93f8e55SVinod Koul 		return -EBUSY;
482d93f8e55SVinod Koul 
483d93f8e55SVinod Koul 	if (!skl_tplg_alloc_pipe_mem(skl, mconfig))
484d93f8e55SVinod Koul 		return -ENOMEM;
485d93f8e55SVinod Koul 
486d93f8e55SVinod Koul 	/*
487d93f8e55SVinod Koul 	 * Create a list of modules for pipe.
488d93f8e55SVinod Koul 	 * This list contains modules from source to sink
489d93f8e55SVinod Koul 	 */
490d93f8e55SVinod Koul 	ret = skl_create_pipeline(ctx, mconfig->pipe);
491d93f8e55SVinod Koul 	if (ret < 0)
492d93f8e55SVinod Koul 		return ret;
493d93f8e55SVinod Koul 
494d93f8e55SVinod Koul 	/*
495d93f8e55SVinod Koul 	 * we create a w_list of all widgets in that pipe. This list is not
496d93f8e55SVinod Koul 	 * freed on PMD event as widgets within a pipe are static. This
497d93f8e55SVinod Koul 	 * saves us cycles to get widgets in pipe every time.
498d93f8e55SVinod Koul 	 *
499d93f8e55SVinod Koul 	 * So if we have already initialized all the widgets of a pipeline
500d93f8e55SVinod Koul 	 * we skip, so check for list_empty and create the list if empty
501d93f8e55SVinod Koul 	 */
502d93f8e55SVinod Koul 	if (list_empty(&s_pipe->w_list)) {
503d93f8e55SVinod Koul 		ret = skl_tplg_alloc_pipe_widget(ctx->dev, w, s_pipe);
504d93f8e55SVinod Koul 		if (ret < 0)
505d93f8e55SVinod Koul 			return ret;
506d93f8e55SVinod Koul 	}
507d93f8e55SVinod Koul 
508d93f8e55SVinod Koul 	/* Init all pipe modules from source to sink */
509d93f8e55SVinod Koul 	ret = skl_tplg_init_pipe_modules(skl, s_pipe);
510d93f8e55SVinod Koul 	if (ret < 0)
511d93f8e55SVinod Koul 		return ret;
512d93f8e55SVinod Koul 
513d93f8e55SVinod Koul 	/* Bind modules from source to sink */
514d93f8e55SVinod Koul 	list_for_each_entry(w_module, &s_pipe->w_list, node) {
515d93f8e55SVinod Koul 		dst_module = w_module->w->priv;
516d93f8e55SVinod Koul 
517d93f8e55SVinod Koul 		if (src_module == NULL) {
518d93f8e55SVinod Koul 			src_module = dst_module;
519d93f8e55SVinod Koul 			continue;
520d93f8e55SVinod Koul 		}
521d93f8e55SVinod Koul 
522d93f8e55SVinod Koul 		ret = skl_bind_modules(ctx, src_module, dst_module);
523d93f8e55SVinod Koul 		if (ret < 0)
524d93f8e55SVinod Koul 			return ret;
525d93f8e55SVinod Koul 
526d93f8e55SVinod Koul 		src_module = dst_module;
527d93f8e55SVinod Koul 	}
528d93f8e55SVinod Koul 
529d93f8e55SVinod Koul 	return 0;
530d93f8e55SVinod Koul }
531d93f8e55SVinod Koul 
5328724ff17SJeeja KP static int skl_tplg_bind_sinks(struct snd_soc_dapm_widget *w,
5338724ff17SJeeja KP 				struct skl *skl,
5348724ff17SJeeja KP 				struct skl_module_cfg *src_mconfig)
535d93f8e55SVinod Koul {
536d93f8e55SVinod Koul 	struct snd_soc_dapm_path *p;
5370ed95d76SJeeja KP 	struct snd_soc_dapm_widget *sink = NULL, *next_sink = NULL;
5388724ff17SJeeja KP 	struct skl_module_cfg *sink_mconfig;
539d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
5408724ff17SJeeja KP 	int ret;
541d93f8e55SVinod Koul 
5428724ff17SJeeja KP 	snd_soc_dapm_widget_for_each_sink_path(w, p) {
543d93f8e55SVinod Koul 		if (!p->connect)
544d93f8e55SVinod Koul 			continue;
545d93f8e55SVinod Koul 
546d93f8e55SVinod Koul 		dev_dbg(ctx->dev, "%s: src widget=%s\n", __func__, w->name);
547d93f8e55SVinod Koul 		dev_dbg(ctx->dev, "%s: sink widget=%s\n", __func__, p->sink->name);
548d93f8e55SVinod Koul 
5490ed95d76SJeeja KP 		next_sink = p->sink;
550d93f8e55SVinod Koul 		/*
551d93f8e55SVinod Koul 		 * here we will check widgets in sink pipelines, so that
552d93f8e55SVinod Koul 		 * can be any widgets type and we are only interested if
553d93f8e55SVinod Koul 		 * they are ones used for SKL so check that first
554d93f8e55SVinod Koul 		 */
555d93f8e55SVinod Koul 		if ((p->sink->priv != NULL) &&
556d93f8e55SVinod Koul 					is_skl_dsp_widget_type(p->sink)) {
557d93f8e55SVinod Koul 
558d93f8e55SVinod Koul 			sink = p->sink;
559d93f8e55SVinod Koul 			sink_mconfig = sink->priv;
560d93f8e55SVinod Koul 
561d93f8e55SVinod Koul 			/* Bind source to sink, mixin is always source */
562d93f8e55SVinod Koul 			ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
563d93f8e55SVinod Koul 			if (ret)
564d93f8e55SVinod Koul 				return ret;
565d93f8e55SVinod Koul 
566d93f8e55SVinod Koul 			/* Start sinks pipe first */
567d93f8e55SVinod Koul 			if (sink_mconfig->pipe->state != SKL_PIPE_STARTED) {
568d1730c3dSJeeja KP 				if (sink_mconfig->pipe->conn_type !=
569d1730c3dSJeeja KP 							SKL_PIPE_CONN_TYPE_FE)
570d1730c3dSJeeja KP 					ret = skl_run_pipe(ctx,
571d1730c3dSJeeja KP 							sink_mconfig->pipe);
572d93f8e55SVinod Koul 				if (ret)
573d93f8e55SVinod Koul 					return ret;
574d93f8e55SVinod Koul 			}
575d93f8e55SVinod Koul 		}
576d93f8e55SVinod Koul 	}
577d93f8e55SVinod Koul 
5788724ff17SJeeja KP 	if (!sink)
5790ed95d76SJeeja KP 		return skl_tplg_bind_sinks(next_sink, skl, src_mconfig);
5808724ff17SJeeja KP 
5818724ff17SJeeja KP 	return 0;
5828724ff17SJeeja KP }
5838724ff17SJeeja KP 
584d93f8e55SVinod Koul /*
585d93f8e55SVinod Koul  * A PGA represents a module in a pipeline. So in the Pre-PMU event of PGA
586d93f8e55SVinod Koul  * we need to do following:
587d93f8e55SVinod Koul  *   - Bind to sink pipeline
588d93f8e55SVinod Koul  *      Since the sink pipes can be running and we don't get mixer event on
589d93f8e55SVinod Koul  *      connect for already running mixer, we need to find the sink pipes
590d93f8e55SVinod Koul  *      here and bind to them. This way dynamic connect works.
591d93f8e55SVinod Koul  *   - Start sink pipeline, if not running
592d93f8e55SVinod Koul  *   - Then run current pipe
593d93f8e55SVinod Koul  */
594d93f8e55SVinod Koul static int skl_tplg_pga_dapm_pre_pmu_event(struct snd_soc_dapm_widget *w,
595d93f8e55SVinod Koul 								struct skl *skl)
596d93f8e55SVinod Koul {
5978724ff17SJeeja KP 	struct skl_module_cfg *src_mconfig;
598d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
599d93f8e55SVinod Koul 	int ret = 0;
600d93f8e55SVinod Koul 
6018724ff17SJeeja KP 	src_mconfig = w->priv;
602d93f8e55SVinod Koul 
603d93f8e55SVinod Koul 	/*
604d93f8e55SVinod Koul 	 * find which sink it is connected to, bind with the sink,
605d93f8e55SVinod Koul 	 * if sink is not started, start sink pipe first, then start
606d93f8e55SVinod Koul 	 * this pipe
607d93f8e55SVinod Koul 	 */
6088724ff17SJeeja KP 	ret = skl_tplg_bind_sinks(w, skl, src_mconfig);
6098724ff17SJeeja KP 	if (ret)
6108724ff17SJeeja KP 		return ret;
6118724ff17SJeeja KP 
612d93f8e55SVinod Koul 	/* Start source pipe last after starting all sinks */
613d1730c3dSJeeja KP 	if (src_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
614d1730c3dSJeeja KP 		return skl_run_pipe(ctx, src_mconfig->pipe);
615d93f8e55SVinod Koul 
616d93f8e55SVinod Koul 	return 0;
617d93f8e55SVinod Koul }
618d93f8e55SVinod Koul 
6198724ff17SJeeja KP static struct snd_soc_dapm_widget *skl_get_src_dsp_widget(
6208724ff17SJeeja KP 		struct snd_soc_dapm_widget *w, struct skl *skl)
6218724ff17SJeeja KP {
6228724ff17SJeeja KP 	struct snd_soc_dapm_path *p;
6238724ff17SJeeja KP 	struct snd_soc_dapm_widget *src_w = NULL;
6248724ff17SJeeja KP 	struct skl_sst *ctx = skl->skl_sst;
6258724ff17SJeeja KP 
626d93f8e55SVinod Koul 	snd_soc_dapm_widget_for_each_source_path(w, p) {
6278724ff17SJeeja KP 		src_w = p->source;
628d93f8e55SVinod Koul 		if (!p->connect)
629d93f8e55SVinod Koul 			continue;
630d93f8e55SVinod Koul 
6318724ff17SJeeja KP 		dev_dbg(ctx->dev, "sink widget=%s\n", w->name);
6328724ff17SJeeja KP 		dev_dbg(ctx->dev, "src widget=%s\n", p->source->name);
633d93f8e55SVinod Koul 
634d93f8e55SVinod Koul 		/*
6358724ff17SJeeja KP 		 * here we will check widgets in sink pipelines, so that can
6368724ff17SJeeja KP 		 * be any widgets type and we are only interested if they are
6378724ff17SJeeja KP 		 * ones used for SKL so check that first
638d93f8e55SVinod Koul 		 */
6398724ff17SJeeja KP 		if ((p->source->priv != NULL) &&
6408724ff17SJeeja KP 					is_skl_dsp_widget_type(p->source)) {
6418724ff17SJeeja KP 			return p->source;
642d93f8e55SVinod Koul 		}
643d93f8e55SVinod Koul 	}
644d93f8e55SVinod Koul 
6458724ff17SJeeja KP 	if (src_w != NULL)
6468724ff17SJeeja KP 		return skl_get_src_dsp_widget(src_w, skl);
647d93f8e55SVinod Koul 
6488724ff17SJeeja KP 	return NULL;
649d93f8e55SVinod Koul }
650d93f8e55SVinod Koul 
651d93f8e55SVinod Koul /*
652d93f8e55SVinod Koul  * in the Post-PMU event of mixer we need to do following:
653d93f8e55SVinod Koul  *   - Check if this pipe is running
654d93f8e55SVinod Koul  *   - if not, then
655d93f8e55SVinod Koul  *	- bind this pipeline to its source pipeline
656d93f8e55SVinod Koul  *	  if source pipe is already running, this means it is a dynamic
657d93f8e55SVinod Koul  *	  connection and we need to bind only to that pipe
658d93f8e55SVinod Koul  *	- start this pipeline
659d93f8e55SVinod Koul  */
660d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_post_pmu_event(struct snd_soc_dapm_widget *w,
661d93f8e55SVinod Koul 							struct skl *skl)
662d93f8e55SVinod Koul {
663d93f8e55SVinod Koul 	int ret = 0;
664d93f8e55SVinod Koul 	struct snd_soc_dapm_widget *source, *sink;
665d93f8e55SVinod Koul 	struct skl_module_cfg *src_mconfig, *sink_mconfig;
666d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
667d93f8e55SVinod Koul 	int src_pipe_started = 0;
668d93f8e55SVinod Koul 
669d93f8e55SVinod Koul 	sink = w;
670d93f8e55SVinod Koul 	sink_mconfig = sink->priv;
671d93f8e55SVinod Koul 
672d93f8e55SVinod Koul 	/*
673d93f8e55SVinod Koul 	 * If source pipe is already started, that means source is driving
674d93f8e55SVinod Koul 	 * one more sink before this sink got connected, Since source is
675d93f8e55SVinod Koul 	 * started, bind this sink to source and start this pipe.
676d93f8e55SVinod Koul 	 */
6778724ff17SJeeja KP 	source = skl_get_src_dsp_widget(w, skl);
6788724ff17SJeeja KP 	if (source != NULL) {
679d93f8e55SVinod Koul 		src_mconfig = source->priv;
680d93f8e55SVinod Koul 		sink_mconfig = sink->priv;
681d93f8e55SVinod Koul 		src_pipe_started = 1;
682d93f8e55SVinod Koul 
683d93f8e55SVinod Koul 		/*
6848724ff17SJeeja KP 		 * check pipe state, then no need to bind or start the
6858724ff17SJeeja KP 		 * pipe
686d93f8e55SVinod Koul 		 */
687d93f8e55SVinod Koul 		if (src_mconfig->pipe->state != SKL_PIPE_STARTED)
688d93f8e55SVinod Koul 			src_pipe_started = 0;
689d93f8e55SVinod Koul 	}
690d93f8e55SVinod Koul 
691d93f8e55SVinod Koul 	if (src_pipe_started) {
692d93f8e55SVinod Koul 		ret = skl_bind_modules(ctx, src_mconfig, sink_mconfig);
693d93f8e55SVinod Koul 		if (ret)
694d93f8e55SVinod Koul 			return ret;
695d93f8e55SVinod Koul 
696d1730c3dSJeeja KP 		if (sink_mconfig->pipe->conn_type != SKL_PIPE_CONN_TYPE_FE)
697d93f8e55SVinod Koul 			ret = skl_run_pipe(ctx, sink_mconfig->pipe);
698d93f8e55SVinod Koul 	}
699d93f8e55SVinod Koul 
700d93f8e55SVinod Koul 	return ret;
701d93f8e55SVinod Koul }
702d93f8e55SVinod Koul 
703d93f8e55SVinod Koul /*
704d93f8e55SVinod Koul  * in the Pre-PMD event of mixer we need to do following:
705d93f8e55SVinod Koul  *   - Stop the pipe
706d93f8e55SVinod Koul  *   - find the source connections and remove that from dapm_path_list
707d93f8e55SVinod Koul  *   - unbind with source pipelines if still connected
708d93f8e55SVinod Koul  */
709d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_pre_pmd_event(struct snd_soc_dapm_widget *w,
710d93f8e55SVinod Koul 							struct skl *skl)
711d93f8e55SVinod Koul {
712d93f8e55SVinod Koul 	struct skl_module_cfg *src_mconfig, *sink_mconfig;
713ce1b5551SJeeja KP 	int ret = 0, i;
714d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
715d93f8e55SVinod Koul 
716ce1b5551SJeeja KP 	sink_mconfig = w->priv;
717d93f8e55SVinod Koul 
718d93f8e55SVinod Koul 	/* Stop the pipe */
719d93f8e55SVinod Koul 	ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
720d93f8e55SVinod Koul 	if (ret)
721d93f8e55SVinod Koul 		return ret;
722d93f8e55SVinod Koul 
723ce1b5551SJeeja KP 	for (i = 0; i < sink_mconfig->max_in_queue; i++) {
724ce1b5551SJeeja KP 		if (sink_mconfig->m_in_pin[i].pin_state == SKL_PIN_BIND_DONE) {
725ce1b5551SJeeja KP 			src_mconfig = sink_mconfig->m_in_pin[i].tgt_mcfg;
726ce1b5551SJeeja KP 			if (!src_mconfig)
727ce1b5551SJeeja KP 				continue;
728d93f8e55SVinod Koul 			/*
729ce1b5551SJeeja KP 			 * If path_found == 1, that means pmd for source
730ce1b5551SJeeja KP 			 * pipe has not occurred, source is connected to
731ce1b5551SJeeja KP 			 * some other sink. so its responsibility of sink
732ce1b5551SJeeja KP 			 * to unbind itself from source.
733d93f8e55SVinod Koul 			 */
734d93f8e55SVinod Koul 			ret = skl_stop_pipe(ctx, src_mconfig->pipe);
735d93f8e55SVinod Koul 			if (ret < 0)
736d93f8e55SVinod Koul 				return ret;
737d93f8e55SVinod Koul 
738ce1b5551SJeeja KP 			ret = skl_unbind_modules(ctx,
739ce1b5551SJeeja KP 						src_mconfig, sink_mconfig);
740ce1b5551SJeeja KP 		}
741d93f8e55SVinod Koul 	}
742d93f8e55SVinod Koul 
743d93f8e55SVinod Koul 	return ret;
744d93f8e55SVinod Koul }
745d93f8e55SVinod Koul 
746d93f8e55SVinod Koul /*
747d93f8e55SVinod Koul  * in the Post-PMD event of mixer we need to do following:
748d93f8e55SVinod Koul  *   - Free the mcps used
749d93f8e55SVinod Koul  *   - Free the mem used
750d93f8e55SVinod Koul  *   - Unbind the modules within the pipeline
751d93f8e55SVinod Koul  *   - Delete the pipeline (modules are not required to be explicitly
752d93f8e55SVinod Koul  *     deleted, pipeline delete is enough here
753d93f8e55SVinod Koul  */
754d93f8e55SVinod Koul static int skl_tplg_mixer_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
755d93f8e55SVinod Koul 							struct skl *skl)
756d93f8e55SVinod Koul {
757d93f8e55SVinod Koul 	struct skl_module_cfg *mconfig = w->priv;
758d93f8e55SVinod Koul 	struct skl_pipe_module *w_module;
759d93f8e55SVinod Koul 	struct skl_module_cfg *src_module = NULL, *dst_module;
760d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
761d93f8e55SVinod Koul 	struct skl_pipe *s_pipe = mconfig->pipe;
762d93f8e55SVinod Koul 	int ret = 0;
763d93f8e55SVinod Koul 
764d93f8e55SVinod Koul 	skl_tplg_free_pipe_mcps(skl, mconfig);
76565976878SVinod Koul 	skl_tplg_free_pipe_mem(skl, mconfig);
766d93f8e55SVinod Koul 
767d93f8e55SVinod Koul 	list_for_each_entry(w_module, &s_pipe->w_list, node) {
768d93f8e55SVinod Koul 		dst_module = w_module->w->priv;
769d93f8e55SVinod Koul 
7707ae3cb15SVinod Koul 		skl_tplg_free_pipe_mcps(skl, dst_module);
771d93f8e55SVinod Koul 		if (src_module == NULL) {
772d93f8e55SVinod Koul 			src_module = dst_module;
773d93f8e55SVinod Koul 			continue;
774d93f8e55SVinod Koul 		}
775d93f8e55SVinod Koul 
776d93f8e55SVinod Koul 		ret = skl_unbind_modules(ctx, src_module, dst_module);
777d93f8e55SVinod Koul 		if (ret < 0)
778d93f8e55SVinod Koul 			return ret;
779d93f8e55SVinod Koul 
780d93f8e55SVinod Koul 		src_module = dst_module;
781d93f8e55SVinod Koul 	}
782d93f8e55SVinod Koul 
783d93f8e55SVinod Koul 	ret = skl_delete_pipe(ctx, mconfig->pipe);
784d93f8e55SVinod Koul 
7856c5768b3SDharageswari R 	return skl_tplg_unload_pipe_modules(ctx, s_pipe);
786d93f8e55SVinod Koul }
787d93f8e55SVinod Koul 
788d93f8e55SVinod Koul /*
789d93f8e55SVinod Koul  * in the Post-PMD event of PGA we need to do following:
790d93f8e55SVinod Koul  *   - Free the mcps used
791d93f8e55SVinod Koul  *   - Stop the pipeline
792d93f8e55SVinod Koul  *   - In source pipe is connected, unbind with source pipelines
793d93f8e55SVinod Koul  */
794d93f8e55SVinod Koul static int skl_tplg_pga_dapm_post_pmd_event(struct snd_soc_dapm_widget *w,
795d93f8e55SVinod Koul 								struct skl *skl)
796d93f8e55SVinod Koul {
797d93f8e55SVinod Koul 	struct skl_module_cfg *src_mconfig, *sink_mconfig;
798ce1b5551SJeeja KP 	int ret = 0, i;
799d93f8e55SVinod Koul 	struct skl_sst *ctx = skl->skl_sst;
800d93f8e55SVinod Koul 
801ce1b5551SJeeja KP 	src_mconfig = w->priv;
802d93f8e55SVinod Koul 
803d93f8e55SVinod Koul 	/* Stop the pipe since this is a mixin module */
804d93f8e55SVinod Koul 	ret = skl_stop_pipe(ctx, src_mconfig->pipe);
805d93f8e55SVinod Koul 	if (ret)
806d93f8e55SVinod Koul 		return ret;
807d93f8e55SVinod Koul 
808ce1b5551SJeeja KP 	for (i = 0; i < src_mconfig->max_out_queue; i++) {
809ce1b5551SJeeja KP 		if (src_mconfig->m_out_pin[i].pin_state == SKL_PIN_BIND_DONE) {
810ce1b5551SJeeja KP 			sink_mconfig = src_mconfig->m_out_pin[i].tgt_mcfg;
811ce1b5551SJeeja KP 			if (!sink_mconfig)
812ce1b5551SJeeja KP 				continue;
813d93f8e55SVinod Koul 			/*
814ce1b5551SJeeja KP 			 * This is a connecter and if path is found that means
815d93f8e55SVinod Koul 			 * unbind between source and sink has not happened yet
816d93f8e55SVinod Koul 			 */
817ce1b5551SJeeja KP 			ret = skl_stop_pipe(ctx, sink_mconfig->pipe);
818d93f8e55SVinod Koul 			if (ret < 0)
819d93f8e55SVinod Koul 				return ret;
820ce1b5551SJeeja KP 			ret = skl_unbind_modules(ctx, src_mconfig,
821ce1b5551SJeeja KP 							sink_mconfig);
822ce1b5551SJeeja KP 		}
823d93f8e55SVinod Koul 	}
824d93f8e55SVinod Koul 
825d93f8e55SVinod Koul 	return ret;
826d93f8e55SVinod Koul }
827d93f8e55SVinod Koul 
828d93f8e55SVinod Koul /*
829d93f8e55SVinod Koul  * In modelling, we assume there will be ONLY one mixer in a pipeline.  If
830d93f8e55SVinod Koul  * mixer is not required then it is treated as static mixer aka vmixer with
831d93f8e55SVinod Koul  * a hard path to source module
832d93f8e55SVinod Koul  * So we don't need to check if source is started or not as hard path puts
833d93f8e55SVinod Koul  * dependency on each other
834d93f8e55SVinod Koul  */
835d93f8e55SVinod Koul static int skl_tplg_vmixer_event(struct snd_soc_dapm_widget *w,
836d93f8e55SVinod Koul 				struct snd_kcontrol *k, int event)
837d93f8e55SVinod Koul {
838d93f8e55SVinod Koul 	struct snd_soc_dapm_context *dapm = w->dapm;
839d93f8e55SVinod Koul 	struct skl *skl = get_skl_ctx(dapm->dev);
840d93f8e55SVinod Koul 
841d93f8e55SVinod Koul 	switch (event) {
842d93f8e55SVinod Koul 	case SND_SOC_DAPM_PRE_PMU:
843d93f8e55SVinod Koul 		return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
844d93f8e55SVinod Koul 
845d93f8e55SVinod Koul 	case SND_SOC_DAPM_POST_PMD:
846d93f8e55SVinod Koul 		return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
847d93f8e55SVinod Koul 	}
848d93f8e55SVinod Koul 
849d93f8e55SVinod Koul 	return 0;
850d93f8e55SVinod Koul }
851d93f8e55SVinod Koul 
852d93f8e55SVinod Koul /*
853d93f8e55SVinod Koul  * In modelling, we assume there will be ONLY one mixer in a pipeline. If a
854d93f8e55SVinod Koul  * second one is required that is created as another pipe entity.
855d93f8e55SVinod Koul  * The mixer is responsible for pipe management and represent a pipeline
856d93f8e55SVinod Koul  * instance
857d93f8e55SVinod Koul  */
858d93f8e55SVinod Koul static int skl_tplg_mixer_event(struct snd_soc_dapm_widget *w,
859d93f8e55SVinod Koul 				struct snd_kcontrol *k, int event)
860d93f8e55SVinod Koul {
861d93f8e55SVinod Koul 	struct snd_soc_dapm_context *dapm = w->dapm;
862d93f8e55SVinod Koul 	struct skl *skl = get_skl_ctx(dapm->dev);
863d93f8e55SVinod Koul 
864d93f8e55SVinod Koul 	switch (event) {
865d93f8e55SVinod Koul 	case SND_SOC_DAPM_PRE_PMU:
866d93f8e55SVinod Koul 		return skl_tplg_mixer_dapm_pre_pmu_event(w, skl);
867d93f8e55SVinod Koul 
868d93f8e55SVinod Koul 	case SND_SOC_DAPM_POST_PMU:
869d93f8e55SVinod Koul 		return skl_tplg_mixer_dapm_post_pmu_event(w, skl);
870d93f8e55SVinod Koul 
871d93f8e55SVinod Koul 	case SND_SOC_DAPM_PRE_PMD:
872d93f8e55SVinod Koul 		return skl_tplg_mixer_dapm_pre_pmd_event(w, skl);
873d93f8e55SVinod Koul 
874d93f8e55SVinod Koul 	case SND_SOC_DAPM_POST_PMD:
875d93f8e55SVinod Koul 		return skl_tplg_mixer_dapm_post_pmd_event(w, skl);
876d93f8e55SVinod Koul 	}
877d93f8e55SVinod Koul 
878d93f8e55SVinod Koul 	return 0;
879d93f8e55SVinod Koul }
880d93f8e55SVinod Koul 
881d93f8e55SVinod Koul /*
882d93f8e55SVinod Koul  * In modelling, we assumed rest of the modules in pipeline are PGA. But we
883d93f8e55SVinod Koul  * are interested in last PGA (leaf PGA) in a pipeline to disconnect with
884d93f8e55SVinod Koul  * the sink when it is running (two FE to one BE or one FE to two BE)
885d93f8e55SVinod Koul  * scenarios
886d93f8e55SVinod Koul  */
887d93f8e55SVinod Koul static int skl_tplg_pga_event(struct snd_soc_dapm_widget *w,
888d93f8e55SVinod Koul 			struct snd_kcontrol *k, int event)
889d93f8e55SVinod Koul 
890d93f8e55SVinod Koul {
891d93f8e55SVinod Koul 	struct snd_soc_dapm_context *dapm = w->dapm;
892d93f8e55SVinod Koul 	struct skl *skl = get_skl_ctx(dapm->dev);
893d93f8e55SVinod Koul 
894d93f8e55SVinod Koul 	switch (event) {
895d93f8e55SVinod Koul 	case SND_SOC_DAPM_PRE_PMU:
896d93f8e55SVinod Koul 		return skl_tplg_pga_dapm_pre_pmu_event(w, skl);
897d93f8e55SVinod Koul 
898d93f8e55SVinod Koul 	case SND_SOC_DAPM_POST_PMD:
899d93f8e55SVinod Koul 		return skl_tplg_pga_dapm_post_pmd_event(w, skl);
900d93f8e55SVinod Koul 	}
901d93f8e55SVinod Koul 
902d93f8e55SVinod Koul 	return 0;
903d93f8e55SVinod Koul }
904cfb0a873SVinod Koul 
905140adfbaSJeeja KP static int skl_tplg_tlv_control_get(struct snd_kcontrol *kcontrol,
906140adfbaSJeeja KP 			unsigned int __user *data, unsigned int size)
907140adfbaSJeeja KP {
908140adfbaSJeeja KP 	struct soc_bytes_ext *sb =
909140adfbaSJeeja KP 			(struct soc_bytes_ext *)kcontrol->private_value;
910140adfbaSJeeja KP 	struct skl_algo_data *bc = (struct skl_algo_data *)sb->dobj.private;
9117d9f2911SOmair M Abdullah 	struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
9127d9f2911SOmair M Abdullah 	struct skl_module_cfg *mconfig = w->priv;
9137d9f2911SOmair M Abdullah 	struct skl *skl = get_skl_ctx(w->dapm->dev);
9147d9f2911SOmair M Abdullah 
9157d9f2911SOmair M Abdullah 	if (w->power)
9167d9f2911SOmair M Abdullah 		skl_get_module_params(skl->skl_sst, (u32 *)bc->params,
9177d9f2911SOmair M Abdullah 				      bc->max, bc->param_id, mconfig);
918140adfbaSJeeja KP 
919140adfbaSJeeja KP 	if (bc->params) {
920140adfbaSJeeja KP 		if (copy_to_user(data, &bc->param_id, sizeof(u32)))
921140adfbaSJeeja KP 			return -EFAULT;
922e8bc3c99SDan Carpenter 		if (copy_to_user(data + 1, &size, sizeof(u32)))
923140adfbaSJeeja KP 			return -EFAULT;
924e8bc3c99SDan Carpenter 		if (copy_to_user(data + 2, bc->params, size))
925140adfbaSJeeja KP 			return -EFAULT;
926140adfbaSJeeja KP 	}
927140adfbaSJeeja KP 
928140adfbaSJeeja KP 	return 0;
929140adfbaSJeeja KP }
930140adfbaSJeeja KP 
931140adfbaSJeeja KP #define SKL_PARAM_VENDOR_ID 0xff
932140adfbaSJeeja KP 
933140adfbaSJeeja KP static int skl_tplg_tlv_control_set(struct snd_kcontrol *kcontrol,
934140adfbaSJeeja KP 			const unsigned int __user *data, unsigned int size)
935140adfbaSJeeja KP {
936140adfbaSJeeja KP 	struct snd_soc_dapm_widget *w = snd_soc_dapm_kcontrol_widget(kcontrol);
937140adfbaSJeeja KP 	struct skl_module_cfg *mconfig = w->priv;
938140adfbaSJeeja KP 	struct soc_bytes_ext *sb =
939140adfbaSJeeja KP 			(struct soc_bytes_ext *)kcontrol->private_value;
940140adfbaSJeeja KP 	struct skl_algo_data *ac = (struct skl_algo_data *)sb->dobj.private;
941140adfbaSJeeja KP 	struct skl *skl = get_skl_ctx(w->dapm->dev);
942140adfbaSJeeja KP 
943140adfbaSJeeja KP 	if (ac->params) {
944140adfbaSJeeja KP 		/*
945140adfbaSJeeja KP 		 * if the param_is is of type Vendor, firmware expects actual
946140adfbaSJeeja KP 		 * parameter id and size from the control.
947140adfbaSJeeja KP 		 */
948140adfbaSJeeja KP 		if (ac->param_id == SKL_PARAM_VENDOR_ID) {
949140adfbaSJeeja KP 			if (copy_from_user(ac->params, data, size))
950140adfbaSJeeja KP 				return -EFAULT;
951140adfbaSJeeja KP 		} else {
952140adfbaSJeeja KP 			if (copy_from_user(ac->params,
95365b4bcb8SAlan 					   data + 2, size))
954140adfbaSJeeja KP 				return -EFAULT;
955140adfbaSJeeja KP 		}
956140adfbaSJeeja KP 
957140adfbaSJeeja KP 		if (w->power)
958140adfbaSJeeja KP 			return skl_set_module_params(skl->skl_sst,
959140adfbaSJeeja KP 						(u32 *)ac->params, ac->max,
960140adfbaSJeeja KP 						ac->param_id, mconfig);
961140adfbaSJeeja KP 	}
962140adfbaSJeeja KP 
963140adfbaSJeeja KP 	return 0;
964140adfbaSJeeja KP }
965140adfbaSJeeja KP 
966cfb0a873SVinod Koul /*
967cfb0a873SVinod Koul  * The FE params are passed by hw_params of the DAI.
968cfb0a873SVinod Koul  * On hw_params, the params are stored in Gateway module of the FE and we
969cfb0a873SVinod Koul  * need to calculate the format in DSP module configuration, that
970cfb0a873SVinod Koul  * conversion is done here
971cfb0a873SVinod Koul  */
972cfb0a873SVinod Koul int skl_tplg_update_pipe_params(struct device *dev,
973cfb0a873SVinod Koul 			struct skl_module_cfg *mconfig,
974cfb0a873SVinod Koul 			struct skl_pipe_params *params)
975cfb0a873SVinod Koul {
976cfb0a873SVinod Koul 	struct skl_pipe *pipe = mconfig->pipe;
977cfb0a873SVinod Koul 	struct skl_module_fmt *format = NULL;
978cfb0a873SVinod Koul 
979cfb0a873SVinod Koul 	memcpy(pipe->p_params, params, sizeof(*params));
980cfb0a873SVinod Koul 
981cfb0a873SVinod Koul 	if (params->stream == SNDRV_PCM_STREAM_PLAYBACK)
9824cd9899fSHardik T Shah 		format = &mconfig->in_fmt[0];
983cfb0a873SVinod Koul 	else
9844cd9899fSHardik T Shah 		format = &mconfig->out_fmt[0];
985cfb0a873SVinod Koul 
986cfb0a873SVinod Koul 	/* set the hw_params */
987cfb0a873SVinod Koul 	format->s_freq = params->s_freq;
988cfb0a873SVinod Koul 	format->channels = params->ch;
989cfb0a873SVinod Koul 	format->valid_bit_depth = skl_get_bit_depth(params->s_fmt);
990cfb0a873SVinod Koul 
991cfb0a873SVinod Koul 	/*
992cfb0a873SVinod Koul 	 * 16 bit is 16 bit container whereas 24 bit is in 32 bit
993cfb0a873SVinod Koul 	 * container so update bit depth accordingly
994cfb0a873SVinod Koul 	 */
995cfb0a873SVinod Koul 	switch (format->valid_bit_depth) {
996cfb0a873SVinod Koul 	case SKL_DEPTH_16BIT:
997cfb0a873SVinod Koul 		format->bit_depth = format->valid_bit_depth;
998cfb0a873SVinod Koul 		break;
999cfb0a873SVinod Koul 
1000cfb0a873SVinod Koul 	case SKL_DEPTH_24BIT:
10016654f39eSJeeja KP 	case SKL_DEPTH_32BIT:
1002cfb0a873SVinod Koul 		format->bit_depth = SKL_DEPTH_32BIT;
1003cfb0a873SVinod Koul 		break;
1004cfb0a873SVinod Koul 
1005cfb0a873SVinod Koul 	default:
1006cfb0a873SVinod Koul 		dev_err(dev, "Invalid bit depth %x for pipe\n",
1007cfb0a873SVinod Koul 				format->valid_bit_depth);
1008cfb0a873SVinod Koul 		return -EINVAL;
1009cfb0a873SVinod Koul 	}
1010cfb0a873SVinod Koul 
1011cfb0a873SVinod Koul 	if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1012cfb0a873SVinod Koul 		mconfig->ibs = (format->s_freq / 1000) *
1013cfb0a873SVinod Koul 				(format->channels) *
1014cfb0a873SVinod Koul 				(format->bit_depth >> 3);
1015cfb0a873SVinod Koul 	} else {
1016cfb0a873SVinod Koul 		mconfig->obs = (format->s_freq / 1000) *
1017cfb0a873SVinod Koul 				(format->channels) *
1018cfb0a873SVinod Koul 				(format->bit_depth >> 3);
1019cfb0a873SVinod Koul 	}
1020cfb0a873SVinod Koul 
1021cfb0a873SVinod Koul 	return 0;
1022cfb0a873SVinod Koul }
1023cfb0a873SVinod Koul 
1024cfb0a873SVinod Koul /*
1025cfb0a873SVinod Koul  * Query the module config for the FE DAI
1026cfb0a873SVinod Koul  * This is used to find the hw_params set for that DAI and apply to FE
1027cfb0a873SVinod Koul  * pipeline
1028cfb0a873SVinod Koul  */
1029cfb0a873SVinod Koul struct skl_module_cfg *
1030cfb0a873SVinod Koul skl_tplg_fe_get_cpr_module(struct snd_soc_dai *dai, int stream)
1031cfb0a873SVinod Koul {
1032cfb0a873SVinod Koul 	struct snd_soc_dapm_widget *w;
1033cfb0a873SVinod Koul 	struct snd_soc_dapm_path *p = NULL;
1034cfb0a873SVinod Koul 
1035cfb0a873SVinod Koul 	if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1036cfb0a873SVinod Koul 		w = dai->playback_widget;
1037f0900eb2SSubhransu S. Prusty 		snd_soc_dapm_widget_for_each_sink_path(w, p) {
1038cfb0a873SVinod Koul 			if (p->connect && p->sink->power &&
1039a28f51dbSJeeja KP 					!is_skl_dsp_widget_type(p->sink))
1040cfb0a873SVinod Koul 				continue;
1041cfb0a873SVinod Koul 
1042cfb0a873SVinod Koul 			if (p->sink->priv) {
1043cfb0a873SVinod Koul 				dev_dbg(dai->dev, "set params for %s\n",
1044cfb0a873SVinod Koul 						p->sink->name);
1045cfb0a873SVinod Koul 				return p->sink->priv;
1046cfb0a873SVinod Koul 			}
1047cfb0a873SVinod Koul 		}
1048cfb0a873SVinod Koul 	} else {
1049cfb0a873SVinod Koul 		w = dai->capture_widget;
1050f0900eb2SSubhransu S. Prusty 		snd_soc_dapm_widget_for_each_source_path(w, p) {
1051cfb0a873SVinod Koul 			if (p->connect && p->source->power &&
1052a28f51dbSJeeja KP 					!is_skl_dsp_widget_type(p->source))
1053cfb0a873SVinod Koul 				continue;
1054cfb0a873SVinod Koul 
1055cfb0a873SVinod Koul 			if (p->source->priv) {
1056cfb0a873SVinod Koul 				dev_dbg(dai->dev, "set params for %s\n",
1057cfb0a873SVinod Koul 						p->source->name);
1058cfb0a873SVinod Koul 				return p->source->priv;
1059cfb0a873SVinod Koul 			}
1060cfb0a873SVinod Koul 		}
1061cfb0a873SVinod Koul 	}
1062cfb0a873SVinod Koul 
1063cfb0a873SVinod Koul 	return NULL;
1064cfb0a873SVinod Koul }
1065cfb0a873SVinod Koul 
1066cfb0a873SVinod Koul static u8 skl_tplg_be_link_type(int dev_type)
1067cfb0a873SVinod Koul {
1068cfb0a873SVinod Koul 	int ret;
1069cfb0a873SVinod Koul 
1070cfb0a873SVinod Koul 	switch (dev_type) {
1071cfb0a873SVinod Koul 	case SKL_DEVICE_BT:
1072cfb0a873SVinod Koul 		ret = NHLT_LINK_SSP;
1073cfb0a873SVinod Koul 		break;
1074cfb0a873SVinod Koul 
1075cfb0a873SVinod Koul 	case SKL_DEVICE_DMIC:
1076cfb0a873SVinod Koul 		ret = NHLT_LINK_DMIC;
1077cfb0a873SVinod Koul 		break;
1078cfb0a873SVinod Koul 
1079cfb0a873SVinod Koul 	case SKL_DEVICE_I2S:
1080cfb0a873SVinod Koul 		ret = NHLT_LINK_SSP;
1081cfb0a873SVinod Koul 		break;
1082cfb0a873SVinod Koul 
1083cfb0a873SVinod Koul 	case SKL_DEVICE_HDALINK:
1084cfb0a873SVinod Koul 		ret = NHLT_LINK_HDA;
1085cfb0a873SVinod Koul 		break;
1086cfb0a873SVinod Koul 
1087cfb0a873SVinod Koul 	default:
1088cfb0a873SVinod Koul 		ret = NHLT_LINK_INVALID;
1089cfb0a873SVinod Koul 		break;
1090cfb0a873SVinod Koul 	}
1091cfb0a873SVinod Koul 
1092cfb0a873SVinod Koul 	return ret;
1093cfb0a873SVinod Koul }
1094cfb0a873SVinod Koul 
1095cfb0a873SVinod Koul /*
1096cfb0a873SVinod Koul  * Fill the BE gateway parameters
1097cfb0a873SVinod Koul  * The BE gateway expects a blob of parameters which are kept in the ACPI
1098cfb0a873SVinod Koul  * NHLT blob, so query the blob for interface type (i2s/pdm) and instance.
1099cfb0a873SVinod Koul  * The port can have multiple settings so pick based on the PCM
1100cfb0a873SVinod Koul  * parameters
1101cfb0a873SVinod Koul  */
1102cfb0a873SVinod Koul static int skl_tplg_be_fill_pipe_params(struct snd_soc_dai *dai,
1103cfb0a873SVinod Koul 				struct skl_module_cfg *mconfig,
1104cfb0a873SVinod Koul 				struct skl_pipe_params *params)
1105cfb0a873SVinod Koul {
1106cfb0a873SVinod Koul 	struct skl_pipe *pipe = mconfig->pipe;
1107cfb0a873SVinod Koul 	struct nhlt_specific_cfg *cfg;
1108cfb0a873SVinod Koul 	struct skl *skl = get_skl_ctx(dai->dev);
1109cfb0a873SVinod Koul 	int link_type = skl_tplg_be_link_type(mconfig->dev_type);
1110cfb0a873SVinod Koul 
1111cfb0a873SVinod Koul 	memcpy(pipe->p_params, params, sizeof(*params));
1112cfb0a873SVinod Koul 
1113b30c275eSJeeja KP 	if (link_type == NHLT_LINK_HDA)
1114b30c275eSJeeja KP 		return 0;
1115b30c275eSJeeja KP 
1116cfb0a873SVinod Koul 	/* update the blob based on virtual bus_id*/
1117cfb0a873SVinod Koul 	cfg = skl_get_ep_blob(skl, mconfig->vbus_id, link_type,
1118cfb0a873SVinod Koul 					params->s_fmt, params->ch,
1119cfb0a873SVinod Koul 					params->s_freq, params->stream);
1120cfb0a873SVinod Koul 	if (cfg) {
1121cfb0a873SVinod Koul 		mconfig->formats_config.caps_size = cfg->size;
1122bc03281aSJeeja KP 		mconfig->formats_config.caps = (u32 *) &cfg->caps;
1123cfb0a873SVinod Koul 	} else {
1124cfb0a873SVinod Koul 		dev_err(dai->dev, "Blob NULL for id %x type %d dirn %d\n",
1125cfb0a873SVinod Koul 					mconfig->vbus_id, link_type,
1126cfb0a873SVinod Koul 					params->stream);
1127cfb0a873SVinod Koul 		dev_err(dai->dev, "PCM: ch %d, freq %d, fmt %d\n",
1128cfb0a873SVinod Koul 				 params->ch, params->s_freq, params->s_fmt);
1129cfb0a873SVinod Koul 		return -EINVAL;
1130cfb0a873SVinod Koul 	}
1131cfb0a873SVinod Koul 
1132cfb0a873SVinod Koul 	return 0;
1133cfb0a873SVinod Koul }
1134cfb0a873SVinod Koul 
1135cfb0a873SVinod Koul static int skl_tplg_be_set_src_pipe_params(struct snd_soc_dai *dai,
1136cfb0a873SVinod Koul 				struct snd_soc_dapm_widget *w,
1137cfb0a873SVinod Koul 				struct skl_pipe_params *params)
1138cfb0a873SVinod Koul {
1139cfb0a873SVinod Koul 	struct snd_soc_dapm_path *p;
11404d8adccbSSubhransu S. Prusty 	int ret = -EIO;
1141cfb0a873SVinod Koul 
1142f0900eb2SSubhransu S. Prusty 	snd_soc_dapm_widget_for_each_source_path(w, p) {
1143cfb0a873SVinod Koul 		if (p->connect && is_skl_dsp_widget_type(p->source) &&
1144cfb0a873SVinod Koul 						p->source->priv) {
1145cfb0a873SVinod Koul 
11469a03cb49SJeeja KP 			ret = skl_tplg_be_fill_pipe_params(dai,
11479a03cb49SJeeja KP 						p->source->priv, params);
11484d8adccbSSubhransu S. Prusty 			if (ret < 0)
11494d8adccbSSubhransu S. Prusty 				return ret;
1150cfb0a873SVinod Koul 		} else {
11519a03cb49SJeeja KP 			ret = skl_tplg_be_set_src_pipe_params(dai,
11529a03cb49SJeeja KP 						p->source, params);
11534d8adccbSSubhransu S. Prusty 			if (ret < 0)
11544d8adccbSSubhransu S. Prusty 				return ret;
1155cfb0a873SVinod Koul 		}
1156cfb0a873SVinod Koul 	}
1157cfb0a873SVinod Koul 
11584d8adccbSSubhransu S. Prusty 	return ret;
1159cfb0a873SVinod Koul }
1160cfb0a873SVinod Koul 
1161cfb0a873SVinod Koul static int skl_tplg_be_set_sink_pipe_params(struct snd_soc_dai *dai,
1162cfb0a873SVinod Koul 	struct snd_soc_dapm_widget *w, struct skl_pipe_params *params)
1163cfb0a873SVinod Koul {
1164cfb0a873SVinod Koul 	struct snd_soc_dapm_path *p = NULL;
11654d8adccbSSubhransu S. Prusty 	int ret = -EIO;
1166cfb0a873SVinod Koul 
1167f0900eb2SSubhransu S. Prusty 	snd_soc_dapm_widget_for_each_sink_path(w, p) {
1168cfb0a873SVinod Koul 		if (p->connect && is_skl_dsp_widget_type(p->sink) &&
1169cfb0a873SVinod Koul 						p->sink->priv) {
1170cfb0a873SVinod Koul 
11719a03cb49SJeeja KP 			ret = skl_tplg_be_fill_pipe_params(dai,
11729a03cb49SJeeja KP 						p->sink->priv, params);
11734d8adccbSSubhransu S. Prusty 			if (ret < 0)
11744d8adccbSSubhransu S. Prusty 				return ret;
11754d8adccbSSubhransu S. Prusty 		} else {
11764d8adccbSSubhransu S. Prusty 			ret = skl_tplg_be_set_sink_pipe_params(
1177cfb0a873SVinod Koul 						dai, p->sink, params);
11784d8adccbSSubhransu S. Prusty 			if (ret < 0)
11794d8adccbSSubhransu S. Prusty 				return ret;
1180cfb0a873SVinod Koul 		}
1181cfb0a873SVinod Koul 	}
1182cfb0a873SVinod Koul 
11834d8adccbSSubhransu S. Prusty 	return ret;
1184cfb0a873SVinod Koul }
1185cfb0a873SVinod Koul 
1186cfb0a873SVinod Koul /*
1187cfb0a873SVinod Koul  * BE hw_params can be a source parameters (capture) or sink parameters
1188cfb0a873SVinod Koul  * (playback). Based on sink and source we need to either find the source
1189cfb0a873SVinod Koul  * list or the sink list and set the pipeline parameters
1190cfb0a873SVinod Koul  */
1191cfb0a873SVinod Koul int skl_tplg_be_update_params(struct snd_soc_dai *dai,
1192cfb0a873SVinod Koul 				struct skl_pipe_params *params)
1193cfb0a873SVinod Koul {
1194cfb0a873SVinod Koul 	struct snd_soc_dapm_widget *w;
1195cfb0a873SVinod Koul 
1196cfb0a873SVinod Koul 	if (params->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1197cfb0a873SVinod Koul 		w = dai->playback_widget;
1198cfb0a873SVinod Koul 
1199cfb0a873SVinod Koul 		return skl_tplg_be_set_src_pipe_params(dai, w, params);
1200cfb0a873SVinod Koul 
1201cfb0a873SVinod Koul 	} else {
1202cfb0a873SVinod Koul 		w = dai->capture_widget;
1203cfb0a873SVinod Koul 
1204cfb0a873SVinod Koul 		return skl_tplg_be_set_sink_pipe_params(dai, w, params);
1205cfb0a873SVinod Koul 	}
1206cfb0a873SVinod Koul 
1207cfb0a873SVinod Koul 	return 0;
1208cfb0a873SVinod Koul }
12093af36706SVinod Koul 
12103af36706SVinod Koul static const struct snd_soc_tplg_widget_events skl_tplg_widget_ops[] = {
12113af36706SVinod Koul 	{SKL_MIXER_EVENT, skl_tplg_mixer_event},
12123af36706SVinod Koul 	{SKL_VMIXER_EVENT, skl_tplg_vmixer_event},
12133af36706SVinod Koul 	{SKL_PGA_EVENT, skl_tplg_pga_event},
12143af36706SVinod Koul };
12153af36706SVinod Koul 
1216140adfbaSJeeja KP static const struct snd_soc_tplg_bytes_ext_ops skl_tlv_ops[] = {
1217140adfbaSJeeja KP 	{SKL_CONTROL_TYPE_BYTE_TLV, skl_tplg_tlv_control_get,
1218140adfbaSJeeja KP 					skl_tplg_tlv_control_set},
1219140adfbaSJeeja KP };
1220140adfbaSJeeja KP 
12213af36706SVinod Koul /*
12223af36706SVinod Koul  * The topology binary passes the pin info for a module so initialize the pin
12233af36706SVinod Koul  * info passed into module instance
12243af36706SVinod Koul  */
12256abca1d7SJeeja KP static void skl_fill_module_pin_info(struct skl_dfw_module_pin *dfw_pin,
12263af36706SVinod Koul 						struct skl_module_pin *m_pin,
12276abca1d7SJeeja KP 						bool is_dynamic, int max_pin)
12283af36706SVinod Koul {
12293af36706SVinod Koul 	int i;
12303af36706SVinod Koul 
12313af36706SVinod Koul 	for (i = 0; i < max_pin; i++) {
12326abca1d7SJeeja KP 		m_pin[i].id.module_id = dfw_pin[i].module_id;
12336abca1d7SJeeja KP 		m_pin[i].id.instance_id = dfw_pin[i].instance_id;
12343af36706SVinod Koul 		m_pin[i].in_use = false;
12356abca1d7SJeeja KP 		m_pin[i].is_dynamic = is_dynamic;
12364f745708SJeeja KP 		m_pin[i].pin_state = SKL_PIN_UNBIND;
12373af36706SVinod Koul 	}
12383af36706SVinod Koul }
12393af36706SVinod Koul 
12403af36706SVinod Koul /*
12413af36706SVinod Koul  * Add pipeline from topology binary into driver pipeline list
12423af36706SVinod Koul  *
12433af36706SVinod Koul  * If already added we return that instance
12443af36706SVinod Koul  * Otherwise we create a new instance and add into driver list
12453af36706SVinod Koul  */
12463af36706SVinod Koul static struct skl_pipe *skl_tplg_add_pipe(struct device *dev,
12473af36706SVinod Koul 			struct skl *skl, struct skl_dfw_pipe *dfw_pipe)
12483af36706SVinod Koul {
12493af36706SVinod Koul 	struct skl_pipeline *ppl;
12503af36706SVinod Koul 	struct skl_pipe *pipe;
12513af36706SVinod Koul 	struct skl_pipe_params *params;
12523af36706SVinod Koul 
12533af36706SVinod Koul 	list_for_each_entry(ppl, &skl->ppl_list, node) {
12543af36706SVinod Koul 		if (ppl->pipe->ppl_id == dfw_pipe->pipe_id)
12553af36706SVinod Koul 			return ppl->pipe;
12563af36706SVinod Koul 	}
12573af36706SVinod Koul 
12583af36706SVinod Koul 	ppl = devm_kzalloc(dev, sizeof(*ppl), GFP_KERNEL);
12593af36706SVinod Koul 	if (!ppl)
12603af36706SVinod Koul 		return NULL;
12613af36706SVinod Koul 
12623af36706SVinod Koul 	pipe = devm_kzalloc(dev, sizeof(*pipe), GFP_KERNEL);
12633af36706SVinod Koul 	if (!pipe)
12643af36706SVinod Koul 		return NULL;
12653af36706SVinod Koul 
12663af36706SVinod Koul 	params = devm_kzalloc(dev, sizeof(*params), GFP_KERNEL);
12673af36706SVinod Koul 	if (!params)
12683af36706SVinod Koul 		return NULL;
12693af36706SVinod Koul 
12703af36706SVinod Koul 	pipe->ppl_id = dfw_pipe->pipe_id;
12713af36706SVinod Koul 	pipe->memory_pages = dfw_pipe->memory_pages;
12723af36706SVinod Koul 	pipe->pipe_priority = dfw_pipe->pipe_priority;
12733af36706SVinod Koul 	pipe->conn_type = dfw_pipe->conn_type;
12743af36706SVinod Koul 	pipe->state = SKL_PIPE_INVALID;
12753af36706SVinod Koul 	pipe->p_params = params;
12763af36706SVinod Koul 	INIT_LIST_HEAD(&pipe->w_list);
12773af36706SVinod Koul 
12783af36706SVinod Koul 	ppl->pipe = pipe;
12793af36706SVinod Koul 	list_add(&ppl->node, &skl->ppl_list);
12803af36706SVinod Koul 
12813af36706SVinod Koul 	return ppl->pipe;
12823af36706SVinod Koul }
12833af36706SVinod Koul 
12844cd9899fSHardik T Shah static void skl_tplg_fill_fmt(struct skl_module_fmt *dst_fmt,
12854cd9899fSHardik T Shah 				struct skl_dfw_module_fmt *src_fmt,
12864cd9899fSHardik T Shah 				int pins)
12874cd9899fSHardik T Shah {
12884cd9899fSHardik T Shah 	int i;
12894cd9899fSHardik T Shah 
12904cd9899fSHardik T Shah 	for (i = 0; i < pins; i++) {
12914cd9899fSHardik T Shah 		dst_fmt[i].channels  = src_fmt[i].channels;
12924cd9899fSHardik T Shah 		dst_fmt[i].s_freq = src_fmt[i].freq;
12934cd9899fSHardik T Shah 		dst_fmt[i].bit_depth = src_fmt[i].bit_depth;
12944cd9899fSHardik T Shah 		dst_fmt[i].valid_bit_depth = src_fmt[i].valid_bit_depth;
12954cd9899fSHardik T Shah 		dst_fmt[i].ch_cfg = src_fmt[i].ch_cfg;
12964cd9899fSHardik T Shah 		dst_fmt[i].ch_map = src_fmt[i].ch_map;
12974cd9899fSHardik T Shah 		dst_fmt[i].interleaving_style = src_fmt[i].interleaving_style;
12984cd9899fSHardik T Shah 		dst_fmt[i].sample_type = src_fmt[i].sample_type;
12994cd9899fSHardik T Shah 	}
13004cd9899fSHardik T Shah }
13014cd9899fSHardik T Shah 
13023af36706SVinod Koul /*
13033af36706SVinod Koul  * Topology core widget load callback
13043af36706SVinod Koul  *
13053af36706SVinod Koul  * This is used to save the private data for each widget which gives
13063af36706SVinod Koul  * information to the driver about module and pipeline parameters which DSP
13073af36706SVinod Koul  * FW expects like ids, resource values, formats etc
13083af36706SVinod Koul  */
13093af36706SVinod Koul static int skl_tplg_widget_load(struct snd_soc_component *cmpnt,
13103af36706SVinod Koul 				struct snd_soc_dapm_widget *w,
13113af36706SVinod Koul 				struct snd_soc_tplg_dapm_widget *tplg_w)
13123af36706SVinod Koul {
13133af36706SVinod Koul 	int ret;
13143af36706SVinod Koul 	struct hdac_ext_bus *ebus = snd_soc_component_get_drvdata(cmpnt);
13153af36706SVinod Koul 	struct skl *skl = ebus_to_skl(ebus);
13163af36706SVinod Koul 	struct hdac_bus *bus = ebus_to_hbus(ebus);
13173af36706SVinod Koul 	struct skl_module_cfg *mconfig;
13183af36706SVinod Koul 	struct skl_pipe *pipe;
1319b663a8c5SJeeja KP 	struct skl_dfw_module *dfw_config =
1320b663a8c5SJeeja KP 				(struct skl_dfw_module *)tplg_w->priv.data;
13213af36706SVinod Koul 
13223af36706SVinod Koul 	if (!tplg_w->priv.size)
13233af36706SVinod Koul 		goto bind_event;
13243af36706SVinod Koul 
13253af36706SVinod Koul 	mconfig = devm_kzalloc(bus->dev, sizeof(*mconfig), GFP_KERNEL);
13263af36706SVinod Koul 
13273af36706SVinod Koul 	if (!mconfig)
13283af36706SVinod Koul 		return -ENOMEM;
13293af36706SVinod Koul 
13303af36706SVinod Koul 	w->priv = mconfig;
13313af36706SVinod Koul 	mconfig->id.module_id = dfw_config->module_id;
13323af36706SVinod Koul 	mconfig->id.instance_id = dfw_config->instance_id;
13333af36706SVinod Koul 	mconfig->mcps = dfw_config->max_mcps;
13343af36706SVinod Koul 	mconfig->ibs = dfw_config->ibs;
13353af36706SVinod Koul 	mconfig->obs = dfw_config->obs;
13363af36706SVinod Koul 	mconfig->core_id = dfw_config->core_id;
13373af36706SVinod Koul 	mconfig->max_in_queue = dfw_config->max_in_queue;
13383af36706SVinod Koul 	mconfig->max_out_queue = dfw_config->max_out_queue;
13393af36706SVinod Koul 	mconfig->is_loadable = dfw_config->is_loadable;
13404cd9899fSHardik T Shah 	skl_tplg_fill_fmt(mconfig->in_fmt, dfw_config->in_fmt,
13414cd9899fSHardik T Shah 						MODULE_MAX_IN_PINS);
13424cd9899fSHardik T Shah 	skl_tplg_fill_fmt(mconfig->out_fmt, dfw_config->out_fmt,
13434cd9899fSHardik T Shah 						MODULE_MAX_OUT_PINS);
13444cd9899fSHardik T Shah 
13453af36706SVinod Koul 	mconfig->params_fixup = dfw_config->params_fixup;
13463af36706SVinod Koul 	mconfig->converter = dfw_config->converter;
13473af36706SVinod Koul 	mconfig->m_type = dfw_config->module_type;
13483af36706SVinod Koul 	mconfig->vbus_id = dfw_config->vbus_id;
1349b18c458dSJeeja KP 	mconfig->mem_pages = dfw_config->mem_pages;
13503af36706SVinod Koul 
13513af36706SVinod Koul 	pipe = skl_tplg_add_pipe(bus->dev, skl, &dfw_config->pipe);
13523af36706SVinod Koul 	if (pipe)
13533af36706SVinod Koul 		mconfig->pipe = pipe;
13543af36706SVinod Koul 
13553af36706SVinod Koul 	mconfig->dev_type = dfw_config->dev_type;
13563af36706SVinod Koul 	mconfig->hw_conn_type = dfw_config->hw_conn_type;
13573af36706SVinod Koul 	mconfig->time_slot = dfw_config->time_slot;
13583af36706SVinod Koul 	mconfig->formats_config.caps_size = dfw_config->caps.caps_size;
13593af36706SVinod Koul 
136065aecfa8SHardik T Shah 	if (dfw_config->is_loadable)
136165aecfa8SHardik T Shah 		memcpy(mconfig->guid, dfw_config->uuid,
136265aecfa8SHardik T Shah 					ARRAY_SIZE(dfw_config->uuid));
136365aecfa8SHardik T Shah 
13644cd9899fSHardik T Shah 	mconfig->m_in_pin = devm_kzalloc(bus->dev, (mconfig->max_in_queue) *
13653af36706SVinod Koul 						sizeof(*mconfig->m_in_pin),
13663af36706SVinod Koul 						GFP_KERNEL);
13673af36706SVinod Koul 	if (!mconfig->m_in_pin)
13683af36706SVinod Koul 		return -ENOMEM;
13693af36706SVinod Koul 
13706abca1d7SJeeja KP 	mconfig->m_out_pin = devm_kzalloc(bus->dev, (mconfig->max_out_queue) *
13713af36706SVinod Koul 						sizeof(*mconfig->m_out_pin),
13723af36706SVinod Koul 						GFP_KERNEL);
13733af36706SVinod Koul 	if (!mconfig->m_out_pin)
13743af36706SVinod Koul 		return -ENOMEM;
13753af36706SVinod Koul 
13766abca1d7SJeeja KP 	skl_fill_module_pin_info(dfw_config->in_pin, mconfig->m_in_pin,
13776abca1d7SJeeja KP 						dfw_config->is_dynamic_in_pin,
13783af36706SVinod Koul 						mconfig->max_in_queue);
13796abca1d7SJeeja KP 
13806abca1d7SJeeja KP 	skl_fill_module_pin_info(dfw_config->out_pin, mconfig->m_out_pin,
13816abca1d7SJeeja KP 						 dfw_config->is_dynamic_out_pin,
13823af36706SVinod Koul 							mconfig->max_out_queue);
13833af36706SVinod Koul 
13846abca1d7SJeeja KP 
13853af36706SVinod Koul 	if (mconfig->formats_config.caps_size == 0)
13863af36706SVinod Koul 		goto bind_event;
13873af36706SVinod Koul 
13883af36706SVinod Koul 	mconfig->formats_config.caps = (u32 *)devm_kzalloc(bus->dev,
13893af36706SVinod Koul 			mconfig->formats_config.caps_size, GFP_KERNEL);
13903af36706SVinod Koul 
13913af36706SVinod Koul 	if (mconfig->formats_config.caps == NULL)
13923af36706SVinod Koul 		return -ENOMEM;
13933af36706SVinod Koul 
13943af36706SVinod Koul 	memcpy(mconfig->formats_config.caps, dfw_config->caps.caps,
13953af36706SVinod Koul 						 dfw_config->caps.caps_size);
1396abb74003SJeeja KP 	mconfig->formats_config.param_id = dfw_config->caps.param_id;
1397abb74003SJeeja KP 	mconfig->formats_config.set_params = dfw_config->caps.set_params;
13983af36706SVinod Koul 
13993af36706SVinod Koul bind_event:
14003af36706SVinod Koul 	if (tplg_w->event_type == 0) {
14013373f716SVinod Koul 		dev_dbg(bus->dev, "ASoC: No event handler required\n");
14023af36706SVinod Koul 		return 0;
14033af36706SVinod Koul 	}
14043af36706SVinod Koul 
14053af36706SVinod Koul 	ret = snd_soc_tplg_widget_bind_event(w, skl_tplg_widget_ops,
1406b663a8c5SJeeja KP 					ARRAY_SIZE(skl_tplg_widget_ops),
1407b663a8c5SJeeja KP 					tplg_w->event_type);
14083af36706SVinod Koul 
14093af36706SVinod Koul 	if (ret) {
14103af36706SVinod Koul 		dev_err(bus->dev, "%s: No matching event handlers found for %d\n",
14113af36706SVinod Koul 					__func__, tplg_w->event_type);
14123af36706SVinod Koul 		return -EINVAL;
14133af36706SVinod Koul 	}
14143af36706SVinod Koul 
14153af36706SVinod Koul 	return 0;
14163af36706SVinod Koul }
14173af36706SVinod Koul 
1418140adfbaSJeeja KP static int skl_init_algo_data(struct device *dev, struct soc_bytes_ext *be,
1419140adfbaSJeeja KP 					struct snd_soc_tplg_bytes_control *bc)
1420140adfbaSJeeja KP {
1421140adfbaSJeeja KP 	struct skl_algo_data *ac;
1422140adfbaSJeeja KP 	struct skl_dfw_algo_data *dfw_ac =
1423140adfbaSJeeja KP 				(struct skl_dfw_algo_data *)bc->priv.data;
1424140adfbaSJeeja KP 
1425140adfbaSJeeja KP 	ac = devm_kzalloc(dev, sizeof(*ac), GFP_KERNEL);
1426140adfbaSJeeja KP 	if (!ac)
1427140adfbaSJeeja KP 		return -ENOMEM;
1428140adfbaSJeeja KP 
1429140adfbaSJeeja KP 	/* Fill private data */
1430140adfbaSJeeja KP 	ac->max = dfw_ac->max;
1431140adfbaSJeeja KP 	ac->param_id = dfw_ac->param_id;
1432140adfbaSJeeja KP 	ac->set_params = dfw_ac->set_params;
1433140adfbaSJeeja KP 
1434140adfbaSJeeja KP 	if (ac->max) {
1435140adfbaSJeeja KP 		ac->params = (char *) devm_kzalloc(dev, ac->max, GFP_KERNEL);
1436140adfbaSJeeja KP 		if (!ac->params)
1437140adfbaSJeeja KP 			return -ENOMEM;
1438140adfbaSJeeja KP 
1439140adfbaSJeeja KP 		if (dfw_ac->params)
1440140adfbaSJeeja KP 			memcpy(ac->params, dfw_ac->params, ac->max);
1441140adfbaSJeeja KP 	}
1442140adfbaSJeeja KP 
1443140adfbaSJeeja KP 	be->dobj.private  = ac;
1444140adfbaSJeeja KP 	return 0;
1445140adfbaSJeeja KP }
1446140adfbaSJeeja KP 
1447140adfbaSJeeja KP static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
1448140adfbaSJeeja KP 				struct snd_kcontrol_new *kctl,
1449140adfbaSJeeja KP 				struct snd_soc_tplg_ctl_hdr *hdr)
1450140adfbaSJeeja KP {
1451140adfbaSJeeja KP 	struct soc_bytes_ext *sb;
1452140adfbaSJeeja KP 	struct snd_soc_tplg_bytes_control *tplg_bc;
1453140adfbaSJeeja KP 	struct hdac_ext_bus *ebus  = snd_soc_component_get_drvdata(cmpnt);
1454140adfbaSJeeja KP 	struct hdac_bus *bus = ebus_to_hbus(ebus);
1455140adfbaSJeeja KP 
1456140adfbaSJeeja KP 	switch (hdr->ops.info) {
1457140adfbaSJeeja KP 	case SND_SOC_TPLG_CTL_BYTES:
1458140adfbaSJeeja KP 		tplg_bc = container_of(hdr,
1459140adfbaSJeeja KP 				struct snd_soc_tplg_bytes_control, hdr);
1460140adfbaSJeeja KP 		if (kctl->access & SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK) {
1461140adfbaSJeeja KP 			sb = (struct soc_bytes_ext *)kctl->private_value;
1462140adfbaSJeeja KP 			if (tplg_bc->priv.size)
1463140adfbaSJeeja KP 				return skl_init_algo_data(
1464140adfbaSJeeja KP 						bus->dev, sb, tplg_bc);
1465140adfbaSJeeja KP 		}
1466140adfbaSJeeja KP 		break;
1467140adfbaSJeeja KP 
1468140adfbaSJeeja KP 	default:
1469140adfbaSJeeja KP 		dev_warn(bus->dev, "Control load not supported %d:%d:%d\n",
1470140adfbaSJeeja KP 			hdr->ops.get, hdr->ops.put, hdr->ops.info);
1471140adfbaSJeeja KP 		break;
1472140adfbaSJeeja KP 	}
1473140adfbaSJeeja KP 
1474140adfbaSJeeja KP 	return 0;
1475140adfbaSJeeja KP }
1476140adfbaSJeeja KP 
14773af36706SVinod Koul static struct snd_soc_tplg_ops skl_tplg_ops  = {
14783af36706SVinod Koul 	.widget_load = skl_tplg_widget_load,
1479140adfbaSJeeja KP 	.control_load = skl_tplg_control_load,
1480140adfbaSJeeja KP 	.bytes_ext_ops = skl_tlv_ops,
1481140adfbaSJeeja KP 	.bytes_ext_ops_count = ARRAY_SIZE(skl_tlv_ops),
14823af36706SVinod Koul };
14833af36706SVinod Koul 
14843af36706SVinod Koul /* This will be read from topology manifest, currently defined here */
14853af36706SVinod Koul #define SKL_MAX_MCPS 30000000
14863af36706SVinod Koul #define SKL_FW_MAX_MEM 1000000
14873af36706SVinod Koul 
14883af36706SVinod Koul /*
14893af36706SVinod Koul  * SKL topology init routine
14903af36706SVinod Koul  */
14913af36706SVinod Koul int skl_tplg_init(struct snd_soc_platform *platform, struct hdac_ext_bus *ebus)
14923af36706SVinod Koul {
14933af36706SVinod Koul 	int ret;
14943af36706SVinod Koul 	const struct firmware *fw;
14953af36706SVinod Koul 	struct hdac_bus *bus = ebus_to_hbus(ebus);
14963af36706SVinod Koul 	struct skl *skl = ebus_to_skl(ebus);
14973af36706SVinod Koul 
14983af36706SVinod Koul 	ret = request_firmware(&fw, "dfw_sst.bin", bus->dev);
14993af36706SVinod Koul 	if (ret < 0) {
1500b663a8c5SJeeja KP 		dev_err(bus->dev, "tplg fw %s load failed with %d\n",
15013af36706SVinod Koul 				"dfw_sst.bin", ret);
15023af36706SVinod Koul 		return ret;
15033af36706SVinod Koul 	}
15043af36706SVinod Koul 
15053af36706SVinod Koul 	/*
15063af36706SVinod Koul 	 * The complete tplg for SKL is loaded as index 0, we don't use
15073af36706SVinod Koul 	 * any other index
15083af36706SVinod Koul 	 */
1509b663a8c5SJeeja KP 	ret = snd_soc_tplg_component_load(&platform->component,
1510b663a8c5SJeeja KP 					&skl_tplg_ops, fw, 0);
15113af36706SVinod Koul 	if (ret < 0) {
15123af36706SVinod Koul 		dev_err(bus->dev, "tplg component load failed%d\n", ret);
15133af36706SVinod Koul 		return -EINVAL;
15143af36706SVinod Koul 	}
15153af36706SVinod Koul 
15163af36706SVinod Koul 	skl->resource.max_mcps = SKL_MAX_MCPS;
15173af36706SVinod Koul 	skl->resource.max_mem = SKL_FW_MAX_MEM;
15183af36706SVinod Koul 
1519d8018361SVinod Koul 	skl->tplg = fw;
1520d8018361SVinod Koul 
15213af36706SVinod Koul 	return 0;
15223af36706SVinod Koul }
1523