1 /* 2 * skl-sst.c - HDA DSP library functions for SKL platform 3 * 4 * Copyright (C) 2014-15, Intel Corporation. 5 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> 6 * Jeeja KP <jeeja.kp@intel.com> 7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/delay.h> 21 #include <linux/device.h> 22 #include <linux/err.h> 23 #include <linux/uuid.h> 24 #include "../common/sst-dsp.h" 25 #include "../common/sst-dsp-priv.h" 26 #include "../common/sst-ipc.h" 27 #include "skl-sst-ipc.h" 28 29 #define SKL_BASEFW_TIMEOUT 300 30 #define SKL_INIT_TIMEOUT 1000 31 32 /* Intel HD Audio SRAM Window 0*/ 33 #define SKL_ADSP_SRAM0_BASE 0x8000 34 35 /* Firmware status window */ 36 #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE 37 #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4) 38 39 #define SKL_NUM_MODULES 1 40 41 static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status) 42 { 43 u32 cur_sts; 44 45 cur_sts = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS) & SKL_FW_STS_MASK; 46 47 return (cur_sts == status); 48 } 49 50 static int skl_transfer_firmware(struct sst_dsp *ctx, 51 const void *basefw, u32 base_fw_size) 52 { 53 int ret = 0; 54 55 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, basefw, base_fw_size); 56 if (ret < 0) 57 return ret; 58 59 ret = sst_dsp_register_poll(ctx, 60 SKL_ADSP_FW_STATUS, 61 SKL_FW_STS_MASK, 62 SKL_FW_RFW_START, 63 SKL_BASEFW_TIMEOUT, 64 "Firmware boot"); 65 66 ctx->cl_dev.ops.cl_stop_dma(ctx); 67 68 return ret; 69 } 70 71 #define SKL_ADSP_FW_BIN_HDR_OFFSET 0x284 72 73 static int skl_load_base_firmware(struct sst_dsp *ctx) 74 { 75 int ret = 0, i; 76 struct skl_sst *skl = ctx->thread_context; 77 struct firmware stripped_fw; 78 u32 reg; 79 80 skl->boot_complete = false; 81 init_waitqueue_head(&skl->boot_wait); 82 83 if (ctx->fw == NULL) { 84 ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev); 85 if (ret < 0) { 86 dev_err(ctx->dev, "Request firmware failed %d\n", ret); 87 return -EIO; 88 } 89 } 90 91 ret = snd_skl_parse_uuids(ctx, SKL_ADSP_FW_BIN_HDR_OFFSET); 92 if (ret < 0) { 93 dev_err(ctx->dev, 94 "UUID parsing err: %d\n", ret); 95 release_firmware(ctx->fw); 96 skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK); 97 return ret; 98 } 99 100 /* check for extended manifest */ 101 stripped_fw.data = ctx->fw->data; 102 stripped_fw.size = ctx->fw->size; 103 104 skl_dsp_strip_extended_manifest(&stripped_fw); 105 106 ret = skl_dsp_boot(ctx); 107 if (ret < 0) { 108 dev_err(ctx->dev, "Boot dsp core failed ret: %d", ret); 109 goto skl_load_base_firmware_failed; 110 } 111 112 ret = skl_cldma_prepare(ctx); 113 if (ret < 0) { 114 dev_err(ctx->dev, "CL dma prepare failed : %d", ret); 115 goto skl_load_base_firmware_failed; 116 } 117 118 /* enable Interrupt */ 119 skl_ipc_int_enable(ctx); 120 skl_ipc_op_int_enable(ctx); 121 122 /* check ROM Status */ 123 for (i = SKL_INIT_TIMEOUT; i > 0; --i) { 124 if (skl_check_fw_status(ctx, SKL_FW_INIT)) { 125 dev_dbg(ctx->dev, 126 "ROM loaded, we can continue with FW loading\n"); 127 break; 128 } 129 mdelay(1); 130 } 131 if (!i) { 132 reg = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS); 133 dev_err(ctx->dev, 134 "Timeout waiting for ROM init done, reg:0x%x\n", reg); 135 ret = -EIO; 136 goto transfer_firmware_failed; 137 } 138 139 ret = skl_transfer_firmware(ctx, stripped_fw.data, stripped_fw.size); 140 if (ret < 0) { 141 dev_err(ctx->dev, "Transfer firmware failed%d\n", ret); 142 goto transfer_firmware_failed; 143 } else { 144 ret = wait_event_timeout(skl->boot_wait, skl->boot_complete, 145 msecs_to_jiffies(SKL_IPC_BOOT_MSECS)); 146 if (ret == 0) { 147 dev_err(ctx->dev, "DSP boot failed, FW Ready timed-out\n"); 148 ret = -EIO; 149 goto transfer_firmware_failed; 150 } 151 152 dev_dbg(ctx->dev, "Download firmware successful%d\n", ret); 153 skl->fw_loaded = true; 154 } 155 return 0; 156 transfer_firmware_failed: 157 ctx->cl_dev.ops.cl_cleanup_controller(ctx); 158 skl_load_base_firmware_failed: 159 skl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK); 160 release_firmware(ctx->fw); 161 ctx->fw = NULL; 162 return ret; 163 } 164 165 static int skl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id) 166 { 167 int ret; 168 struct skl_ipc_dxstate_info dx; 169 struct skl_sst *skl = ctx->thread_context; 170 unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); 171 172 /* If core0 is being turned on, we need to load the FW */ 173 if (core_id == SKL_DSP_CORE0_ID) { 174 ret = skl_load_base_firmware(ctx); 175 if (ret < 0) { 176 dev_err(ctx->dev, "unable to load firmware\n"); 177 return ret; 178 } 179 } 180 181 /* 182 * If any core other than core 0 is being moved to D0, enable the 183 * core and send the set dx IPC for the core. 184 */ 185 if (core_id != SKL_DSP_CORE0_ID) { 186 ret = skl_dsp_enable_core(ctx, core_mask); 187 if (ret < 0) 188 return ret; 189 190 dx.core_mask = core_mask; 191 dx.dx_mask = core_mask; 192 193 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, 194 SKL_BASE_FW_MODULE_ID, &dx); 195 if (ret < 0) { 196 dev_err(ctx->dev, "Failed to set dsp to D0:core id= %d\n", 197 core_id); 198 skl_dsp_disable_core(ctx, core_mask); 199 } 200 } 201 202 skl->cores.state[core_id] = SKL_DSP_RUNNING; 203 204 return ret; 205 } 206 207 static int skl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id) 208 { 209 int ret; 210 struct skl_ipc_dxstate_info dx; 211 struct skl_sst *skl = ctx->thread_context; 212 unsigned int core_mask = SKL_DSP_CORE_MASK(core_id); 213 214 dx.core_mask = core_mask; 215 dx.dx_mask = SKL_IPC_D3_MASK; 216 217 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx); 218 if (ret < 0) 219 dev_err(ctx->dev, "set Dx core %d fail: %d\n", core_id, ret); 220 221 if (core_id == SKL_DSP_CORE0_ID) { 222 /* disable Interrupt */ 223 ctx->cl_dev.ops.cl_cleanup_controller(ctx); 224 skl_cldma_int_disable(ctx); 225 skl_ipc_op_int_disable(ctx); 226 skl_ipc_int_disable(ctx); 227 } 228 229 ret = skl_dsp_disable_core(ctx, core_mask); 230 if (ret < 0) 231 return ret; 232 233 skl->cores.state[core_id] = SKL_DSP_RESET; 234 return ret; 235 } 236 237 static unsigned int skl_get_errorcode(struct sst_dsp *ctx) 238 { 239 return sst_dsp_shim_read(ctx, SKL_ADSP_ERROR_CODE); 240 } 241 242 /* 243 * since get/set_module are called from DAPM context, 244 * we don't need lock for usage count 245 */ 246 static int skl_get_module(struct sst_dsp *ctx, u16 mod_id) 247 { 248 struct skl_module_table *module; 249 250 list_for_each_entry(module, &ctx->module_list, list) { 251 if (module->mod_info->mod_id == mod_id) 252 return ++module->usage_cnt; 253 } 254 255 return -EINVAL; 256 } 257 258 static int skl_put_module(struct sst_dsp *ctx, u16 mod_id) 259 { 260 struct skl_module_table *module; 261 262 list_for_each_entry(module, &ctx->module_list, list) { 263 if (module->mod_info->mod_id == mod_id) 264 return --module->usage_cnt; 265 } 266 267 return -EINVAL; 268 } 269 270 static struct skl_module_table *skl_fill_module_table(struct sst_dsp *ctx, 271 char *mod_name, int mod_id) 272 { 273 const struct firmware *fw; 274 struct skl_module_table *skl_module; 275 unsigned int size; 276 int ret; 277 278 ret = request_firmware(&fw, mod_name, ctx->dev); 279 if (ret < 0) { 280 dev_err(ctx->dev, "Request Module %s failed :%d\n", 281 mod_name, ret); 282 return NULL; 283 } 284 285 skl_module = devm_kzalloc(ctx->dev, sizeof(*skl_module), GFP_KERNEL); 286 if (skl_module == NULL) { 287 release_firmware(fw); 288 return NULL; 289 } 290 291 size = sizeof(*skl_module->mod_info); 292 skl_module->mod_info = devm_kzalloc(ctx->dev, size, GFP_KERNEL); 293 if (skl_module->mod_info == NULL) { 294 release_firmware(fw); 295 return NULL; 296 } 297 298 skl_module->mod_info->mod_id = mod_id; 299 skl_module->mod_info->fw = fw; 300 list_add(&skl_module->list, &ctx->module_list); 301 302 return skl_module; 303 } 304 305 /* get a module from it's unique ID */ 306 static struct skl_module_table *skl_module_get_from_id( 307 struct sst_dsp *ctx, u16 mod_id) 308 { 309 struct skl_module_table *module; 310 311 if (list_empty(&ctx->module_list)) { 312 dev_err(ctx->dev, "Module list is empty\n"); 313 return NULL; 314 } 315 316 list_for_each_entry(module, &ctx->module_list, list) { 317 if (module->mod_info->mod_id == mod_id) 318 return module; 319 } 320 321 return NULL; 322 } 323 324 static int skl_transfer_module(struct sst_dsp *ctx, 325 struct skl_load_module_info *module) 326 { 327 int ret; 328 struct skl_sst *skl = ctx->thread_context; 329 330 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, module->fw->data, 331 module->fw->size); 332 if (ret < 0) 333 return ret; 334 335 ret = skl_ipc_load_modules(&skl->ipc, SKL_NUM_MODULES, 336 (void *)&module->mod_id); 337 if (ret < 0) 338 dev_err(ctx->dev, "Failed to Load module: %d\n", ret); 339 340 ctx->cl_dev.ops.cl_stop_dma(ctx); 341 342 return ret; 343 } 344 345 static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, u8 *guid) 346 { 347 struct skl_module_table *module_entry = NULL; 348 int ret = 0; 349 char mod_name[64]; /* guid str = 32 chars + 4 hyphens */ 350 uuid_le *uuid_mod; 351 352 uuid_mod = (uuid_le *)guid; 353 snprintf(mod_name, sizeof(mod_name), "%s%pUL%s", 354 "intel/dsp_fw_", uuid_mod, ".bin"); 355 356 module_entry = skl_module_get_from_id(ctx, mod_id); 357 if (module_entry == NULL) { 358 module_entry = skl_fill_module_table(ctx, mod_name, mod_id); 359 if (module_entry == NULL) { 360 dev_err(ctx->dev, "Failed to Load module\n"); 361 return -EINVAL; 362 } 363 } 364 365 if (!module_entry->usage_cnt) { 366 ret = skl_transfer_module(ctx, module_entry->mod_info); 367 if (ret < 0) { 368 dev_err(ctx->dev, "Failed to Load module\n"); 369 return ret; 370 } 371 } 372 373 ret = skl_get_module(ctx, mod_id); 374 375 return ret; 376 } 377 378 static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id) 379 { 380 int usage_cnt; 381 struct skl_sst *skl = ctx->thread_context; 382 int ret = 0; 383 384 usage_cnt = skl_put_module(ctx, mod_id); 385 if (usage_cnt < 0) { 386 dev_err(ctx->dev, "Module bad usage cnt!:%d\n", usage_cnt); 387 return -EIO; 388 } 389 ret = skl_ipc_unload_modules(&skl->ipc, 390 SKL_NUM_MODULES, &mod_id); 391 if (ret < 0) { 392 dev_err(ctx->dev, "Failed to UnLoad module\n"); 393 skl_get_module(ctx, mod_id); 394 return ret; 395 } 396 397 return ret; 398 } 399 400 void skl_clear_module_cnt(struct sst_dsp *ctx) 401 { 402 struct skl_module_table *module; 403 404 if (list_empty(&ctx->module_list)) 405 return; 406 407 list_for_each_entry(module, &ctx->module_list, list) { 408 module->usage_cnt = 0; 409 } 410 } 411 EXPORT_SYMBOL_GPL(skl_clear_module_cnt); 412 413 static void skl_clear_module_table(struct sst_dsp *ctx) 414 { 415 struct skl_module_table *module, *tmp; 416 417 if (list_empty(&ctx->module_list)) 418 return; 419 420 list_for_each_entry_safe(module, tmp, &ctx->module_list, list) { 421 list_del(&module->list); 422 release_firmware(module->mod_info->fw); 423 } 424 } 425 426 static struct skl_dsp_fw_ops skl_fw_ops = { 427 .set_state_D0 = skl_set_dsp_D0, 428 .set_state_D3 = skl_set_dsp_D3, 429 .load_fw = skl_load_base_firmware, 430 .get_fw_errcode = skl_get_errorcode, 431 .load_mod = skl_load_module, 432 .unload_mod = skl_unload_module, 433 }; 434 435 static struct sst_ops skl_ops = { 436 .irq_handler = skl_dsp_sst_interrupt, 437 .write = sst_shim32_write, 438 .read = sst_shim32_read, 439 .ram_read = sst_memcpy_fromio_32, 440 .ram_write = sst_memcpy_toio_32, 441 .free = skl_dsp_free, 442 }; 443 444 static struct sst_dsp_device skl_dev = { 445 .thread = skl_dsp_irq_thread_handler, 446 .ops = &skl_ops, 447 }; 448 449 int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, 450 const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp) 451 { 452 struct skl_sst *skl; 453 struct sst_dsp *sst; 454 int ret; 455 456 skl = devm_kzalloc(dev, sizeof(*skl), GFP_KERNEL); 457 if (skl == NULL) 458 return -ENOMEM; 459 460 skl->dev = dev; 461 skl_dev.thread_context = skl; 462 INIT_LIST_HEAD(&skl->uuid_list); 463 464 skl->dsp = skl_dsp_ctx_init(dev, &skl_dev, irq); 465 if (!skl->dsp) { 466 dev_err(skl->dev, "%s: no device\n", __func__); 467 return -ENODEV; 468 } 469 470 sst = skl->dsp; 471 472 sst->fw_name = fw_name; 473 sst->addr.lpe = mmio_base; 474 sst->addr.shim = mmio_base; 475 sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ), 476 SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ); 477 478 INIT_LIST_HEAD(&sst->module_list); 479 sst->dsp_ops = dsp_ops; 480 sst->fw_ops = skl_fw_ops; 481 482 ret = skl_ipc_init(dev, skl); 483 if (ret) 484 return ret; 485 486 skl->cores.count = 2; 487 skl->is_first_boot = true; 488 489 if (dsp) 490 *dsp = skl; 491 492 return ret; 493 } 494 EXPORT_SYMBOL_GPL(skl_sst_dsp_init); 495 496 int skl_sst_init_fw(struct device *dev, struct skl_sst *ctx) 497 { 498 int ret; 499 struct sst_dsp *sst = ctx->dsp; 500 501 ret = sst->fw_ops.load_fw(sst); 502 if (ret < 0) { 503 dev_err(dev, "Load base fw failed : %d", ret); 504 return ret; 505 } 506 507 skl_dsp_init_core_state(sst); 508 ctx->is_first_boot = false; 509 510 return 0; 511 } 512 EXPORT_SYMBOL_GPL(skl_sst_init_fw); 513 514 void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx) 515 { 516 skl_clear_module_table(ctx->dsp); 517 skl_freeup_uuid_list(ctx); 518 skl_ipc_free(&ctx->ipc); 519 ctx->dsp->ops->free(ctx->dsp); 520 if (ctx->boot_complete) { 521 ctx->dsp->cl_dev.ops.cl_cleanup_controller(ctx->dsp); 522 skl_cldma_int_disable(ctx->dsp); 523 } 524 } 525 EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup); 526 527 MODULE_LICENSE("GPL v2"); 528 MODULE_DESCRIPTION("Intel Skylake IPC driver"); 529