1 /* 2 * skl-sst.c - HDA DSP library functions for SKL platform 3 * 4 * Copyright (C) 2014-15, Intel Corporation. 5 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> 6 * Jeeja KP <jeeja.kp@intel.com> 7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License as version 2, as 11 * published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but 14 * WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 16 * General Public License for more details. 17 */ 18 19 #include <linux/module.h> 20 #include <linux/delay.h> 21 #include <linux/device.h> 22 #include <linux/err.h> 23 #include "../common/sst-dsp.h" 24 #include "../common/sst-dsp-priv.h" 25 #include "../common/sst-ipc.h" 26 #include "skl-sst-ipc.h" 27 28 #define SKL_BASEFW_TIMEOUT 300 29 #define SKL_INIT_TIMEOUT 1000 30 31 /* Intel HD Audio SRAM Window 0*/ 32 #define SKL_ADSP_SRAM0_BASE 0x8000 33 34 /* Firmware status window */ 35 #define SKL_ADSP_FW_STATUS SKL_ADSP_SRAM0_BASE 36 #define SKL_ADSP_ERROR_CODE (SKL_ADSP_FW_STATUS + 0x4) 37 38 #define SKL_NUM_MODULES 1 39 40 static bool skl_check_fw_status(struct sst_dsp *ctx, u32 status) 41 { 42 u32 cur_sts; 43 44 cur_sts = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS) & SKL_FW_STS_MASK; 45 46 return (cur_sts == status); 47 } 48 49 static int skl_transfer_firmware(struct sst_dsp *ctx, 50 const void *basefw, u32 base_fw_size) 51 { 52 int ret = 0; 53 54 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, basefw, base_fw_size); 55 if (ret < 0) 56 return ret; 57 58 ret = sst_dsp_register_poll(ctx, 59 SKL_ADSP_FW_STATUS, 60 SKL_FW_STS_MASK, 61 SKL_FW_RFW_START, 62 SKL_BASEFW_TIMEOUT, 63 "Firmware boot"); 64 65 ctx->cl_dev.ops.cl_stop_dma(ctx); 66 67 return ret; 68 } 69 70 static int skl_load_base_firmware(struct sst_dsp *ctx) 71 { 72 int ret = 0, i; 73 struct skl_sst *skl = ctx->thread_context; 74 u32 reg; 75 76 skl->boot_complete = false; 77 init_waitqueue_head(&skl->boot_wait); 78 79 if (ctx->fw == NULL) { 80 ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev); 81 if (ret < 0) { 82 dev_err(ctx->dev, "Request firmware failed %d\n", ret); 83 skl_dsp_disable_core(ctx); 84 return -EIO; 85 } 86 } 87 88 ret = skl_dsp_boot(ctx); 89 if (ret < 0) { 90 dev_err(ctx->dev, "Boot dsp core failed ret: %d", ret); 91 goto skl_load_base_firmware_failed; 92 } 93 94 ret = skl_cldma_prepare(ctx); 95 if (ret < 0) { 96 dev_err(ctx->dev, "CL dma prepare failed : %d", ret); 97 goto skl_load_base_firmware_failed; 98 } 99 100 /* enable Interrupt */ 101 skl_ipc_int_enable(ctx); 102 skl_ipc_op_int_enable(ctx); 103 104 /* check ROM Status */ 105 for (i = SKL_INIT_TIMEOUT; i > 0; --i) { 106 if (skl_check_fw_status(ctx, SKL_FW_INIT)) { 107 dev_dbg(ctx->dev, 108 "ROM loaded, we can continue with FW loading\n"); 109 break; 110 } 111 mdelay(1); 112 } 113 if (!i) { 114 reg = sst_dsp_shim_read(ctx, SKL_ADSP_FW_STATUS); 115 dev_err(ctx->dev, 116 "Timeout waiting for ROM init done, reg:0x%x\n", reg); 117 ret = -EIO; 118 goto transfer_firmware_failed; 119 } 120 121 ret = skl_transfer_firmware(ctx, ctx->fw->data, ctx->fw->size); 122 if (ret < 0) { 123 dev_err(ctx->dev, "Transfer firmware failed%d\n", ret); 124 goto transfer_firmware_failed; 125 } else { 126 ret = wait_event_timeout(skl->boot_wait, skl->boot_complete, 127 msecs_to_jiffies(SKL_IPC_BOOT_MSECS)); 128 if (ret == 0) { 129 dev_err(ctx->dev, "DSP boot failed, FW Ready timed-out\n"); 130 ret = -EIO; 131 goto transfer_firmware_failed; 132 } 133 134 dev_dbg(ctx->dev, "Download firmware successful%d\n", ret); 135 skl_dsp_set_state_locked(ctx, SKL_DSP_RUNNING); 136 } 137 return 0; 138 transfer_firmware_failed: 139 ctx->cl_dev.ops.cl_cleanup_controller(ctx); 140 skl_load_base_firmware_failed: 141 skl_dsp_disable_core(ctx); 142 release_firmware(ctx->fw); 143 ctx->fw = NULL; 144 return ret; 145 } 146 147 static int skl_set_dsp_D0(struct sst_dsp *ctx) 148 { 149 int ret; 150 151 ret = skl_load_base_firmware(ctx); 152 if (ret < 0) { 153 dev_err(ctx->dev, "unable to load firmware\n"); 154 return ret; 155 } 156 157 skl_dsp_set_state_locked(ctx, SKL_DSP_RUNNING); 158 159 return ret; 160 } 161 162 static int skl_set_dsp_D3(struct sst_dsp *ctx) 163 { 164 int ret; 165 struct skl_ipc_dxstate_info dx; 166 struct skl_sst *skl = ctx->thread_context; 167 168 dev_dbg(ctx->dev, "In %s:\n", __func__); 169 mutex_lock(&ctx->mutex); 170 if (!is_skl_dsp_running(ctx)) { 171 mutex_unlock(&ctx->mutex); 172 return 0; 173 } 174 mutex_unlock(&ctx->mutex); 175 176 dx.core_mask = SKL_DSP_CORE0_MASK; 177 dx.dx_mask = SKL_IPC_D3_MASK; 178 ret = skl_ipc_set_dx(&skl->ipc, SKL_INSTANCE_ID, SKL_BASE_FW_MODULE_ID, &dx); 179 if (ret < 0) 180 dev_err(ctx->dev, 181 "D3 request to FW failed, continuing reset: %d", ret); 182 183 /* disable Interrupt */ 184 ctx->cl_dev.ops.cl_cleanup_controller(ctx); 185 skl_cldma_int_disable(ctx); 186 skl_ipc_op_int_disable(ctx); 187 skl_ipc_int_disable(ctx); 188 189 ret = skl_dsp_disable_core(ctx); 190 if (ret < 0) { 191 dev_err(ctx->dev, "disable dsp core failed ret: %d\n", ret); 192 ret = -EIO; 193 } 194 skl_dsp_set_state_locked(ctx, SKL_DSP_RESET); 195 196 return ret; 197 } 198 199 static unsigned int skl_get_errorcode(struct sst_dsp *ctx) 200 { 201 return sst_dsp_shim_read(ctx, SKL_ADSP_ERROR_CODE); 202 } 203 204 /* 205 * since get/set_module are called from DAPM context, 206 * we don't need lock for usage count 207 */ 208 static int skl_get_module(struct sst_dsp *ctx, u16 mod_id) 209 { 210 struct skl_module_table *module; 211 212 list_for_each_entry(module, &ctx->module_list, list) { 213 if (module->mod_info->mod_id == mod_id) 214 return ++module->usage_cnt; 215 } 216 217 return -EINVAL; 218 } 219 220 static int skl_put_module(struct sst_dsp *ctx, u16 mod_id) 221 { 222 struct skl_module_table *module; 223 224 list_for_each_entry(module, &ctx->module_list, list) { 225 if (module->mod_info->mod_id == mod_id) 226 return --module->usage_cnt; 227 } 228 229 return -EINVAL; 230 } 231 232 static struct skl_module_table *skl_fill_module_table(struct sst_dsp *ctx, 233 char *mod_name, int mod_id) 234 { 235 const struct firmware *fw; 236 struct skl_module_table *skl_module; 237 unsigned int size; 238 int ret; 239 240 ret = request_firmware(&fw, mod_name, ctx->dev); 241 if (ret < 0) { 242 dev_err(ctx->dev, "Request Module %s failed :%d\n", 243 mod_name, ret); 244 return NULL; 245 } 246 247 skl_module = devm_kzalloc(ctx->dev, sizeof(*skl_module), GFP_KERNEL); 248 if (skl_module == NULL) { 249 release_firmware(fw); 250 return NULL; 251 } 252 253 size = sizeof(*skl_module->mod_info); 254 skl_module->mod_info = devm_kzalloc(ctx->dev, size, GFP_KERNEL); 255 if (skl_module->mod_info == NULL) { 256 release_firmware(fw); 257 return NULL; 258 } 259 260 skl_module->mod_info->mod_id = mod_id; 261 skl_module->mod_info->fw = fw; 262 list_add(&skl_module->list, &ctx->module_list); 263 264 return skl_module; 265 } 266 267 /* get a module from it's unique ID */ 268 static struct skl_module_table *skl_module_get_from_id( 269 struct sst_dsp *ctx, u16 mod_id) 270 { 271 struct skl_module_table *module; 272 273 if (list_empty(&ctx->module_list)) { 274 dev_err(ctx->dev, "Module list is empty\n"); 275 return NULL; 276 } 277 278 list_for_each_entry(module, &ctx->module_list, list) { 279 if (module->mod_info->mod_id == mod_id) 280 return module; 281 } 282 283 return NULL; 284 } 285 286 static int skl_transfer_module(struct sst_dsp *ctx, 287 struct skl_load_module_info *module) 288 { 289 int ret; 290 struct skl_sst *skl = ctx->thread_context; 291 292 ret = ctx->cl_dev.ops.cl_copy_to_dmabuf(ctx, module->fw->data, 293 module->fw->size); 294 if (ret < 0) 295 return ret; 296 297 ret = skl_ipc_load_modules(&skl->ipc, SKL_NUM_MODULES, 298 (void *)&module->mod_id); 299 if (ret < 0) 300 dev_err(ctx->dev, "Failed to Load module: %d\n", ret); 301 302 ctx->cl_dev.ops.cl_stop_dma(ctx); 303 304 return ret; 305 } 306 307 static int skl_load_module(struct sst_dsp *ctx, u16 mod_id, char *guid) 308 { 309 struct skl_module_table *module_entry = NULL; 310 int ret = 0; 311 char mod_name[64]; /* guid str = 32 chars + 4 hyphens */ 312 313 snprintf(mod_name, sizeof(mod_name), "%s%s%s", 314 "intel/dsp_fw_", guid, ".bin"); 315 316 module_entry = skl_module_get_from_id(ctx, mod_id); 317 if (module_entry == NULL) { 318 module_entry = skl_fill_module_table(ctx, mod_name, mod_id); 319 if (module_entry == NULL) { 320 dev_err(ctx->dev, "Failed to Load module\n"); 321 return -EINVAL; 322 } 323 } 324 325 if (!module_entry->usage_cnt) { 326 ret = skl_transfer_module(ctx, module_entry->mod_info); 327 if (ret < 0) { 328 dev_err(ctx->dev, "Failed to Load module\n"); 329 return ret; 330 } 331 } 332 333 ret = skl_get_module(ctx, mod_id); 334 335 return ret; 336 } 337 338 static int skl_unload_module(struct sst_dsp *ctx, u16 mod_id) 339 { 340 int usage_cnt; 341 struct skl_sst *skl = ctx->thread_context; 342 int ret = 0; 343 344 usage_cnt = skl_put_module(ctx, mod_id); 345 if (usage_cnt < 0) { 346 dev_err(ctx->dev, "Module bad usage cnt!:%d\n", usage_cnt); 347 return -EIO; 348 } 349 ret = skl_ipc_unload_modules(&skl->ipc, 350 SKL_NUM_MODULES, &mod_id); 351 if (ret < 0) { 352 dev_err(ctx->dev, "Failed to UnLoad module\n"); 353 skl_get_module(ctx, mod_id); 354 return ret; 355 } 356 357 return ret; 358 } 359 360 static void skl_clear_module_table(struct sst_dsp *ctx) 361 { 362 struct skl_module_table *module, *tmp; 363 364 if (list_empty(&ctx->module_list)) 365 return; 366 367 list_for_each_entry_safe(module, tmp, &ctx->module_list, list) { 368 list_del(&module->list); 369 release_firmware(module->mod_info->fw); 370 } 371 } 372 373 static struct skl_dsp_fw_ops skl_fw_ops = { 374 .set_state_D0 = skl_set_dsp_D0, 375 .set_state_D3 = skl_set_dsp_D3, 376 .load_fw = skl_load_base_firmware, 377 .get_fw_errcode = skl_get_errorcode, 378 .load_mod = skl_load_module, 379 .unload_mod = skl_unload_module, 380 }; 381 382 static struct sst_ops skl_ops = { 383 .irq_handler = skl_dsp_sst_interrupt, 384 .write = sst_shim32_write, 385 .read = sst_shim32_read, 386 .ram_read = sst_memcpy_fromio_32, 387 .ram_write = sst_memcpy_toio_32, 388 .free = skl_dsp_free, 389 }; 390 391 static struct sst_dsp_device skl_dev = { 392 .thread = skl_dsp_irq_thread_handler, 393 .ops = &skl_ops, 394 }; 395 396 int skl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq, 397 const char *fw_name, struct skl_dsp_loader_ops dsp_ops, struct skl_sst **dsp) 398 { 399 struct skl_sst *skl; 400 struct sst_dsp *sst; 401 int ret; 402 403 skl = devm_kzalloc(dev, sizeof(*skl), GFP_KERNEL); 404 if (skl == NULL) 405 return -ENOMEM; 406 407 skl->dev = dev; 408 skl_dev.thread_context = skl; 409 410 skl->dsp = skl_dsp_ctx_init(dev, &skl_dev, irq); 411 if (!skl->dsp) { 412 dev_err(skl->dev, "%s: no device\n", __func__); 413 return -ENODEV; 414 } 415 416 sst = skl->dsp; 417 418 sst->fw_name = fw_name; 419 sst->addr.lpe = mmio_base; 420 sst->addr.shim = mmio_base; 421 sst_dsp_mailbox_init(sst, (SKL_ADSP_SRAM0_BASE + SKL_ADSP_W0_STAT_SZ), 422 SKL_ADSP_W0_UP_SZ, SKL_ADSP_SRAM1_BASE, SKL_ADSP_W1_SZ); 423 424 INIT_LIST_HEAD(&sst->module_list); 425 sst->dsp_ops = dsp_ops; 426 sst->fw_ops = skl_fw_ops; 427 428 ret = skl_ipc_init(dev, skl); 429 if (ret) 430 return ret; 431 432 ret = sst->fw_ops.load_fw(sst); 433 if (ret < 0) { 434 dev_err(dev, "Load base fw failed : %d", ret); 435 goto cleanup; 436 } 437 438 if (dsp) 439 *dsp = skl; 440 441 return ret; 442 443 cleanup: 444 skl_sst_dsp_cleanup(dev, skl); 445 return ret; 446 } 447 EXPORT_SYMBOL_GPL(skl_sst_dsp_init); 448 449 void skl_sst_dsp_cleanup(struct device *dev, struct skl_sst *ctx) 450 { 451 skl_clear_module_table(ctx->dsp); 452 skl_ipc_free(&ctx->ipc); 453 ctx->dsp->ops->free(ctx->dsp); 454 } 455 EXPORT_SYMBOL_GPL(skl_sst_dsp_cleanup); 456 457 MODULE_LICENSE("GPL v2"); 458 MODULE_DESCRIPTION("Intel Skylake IPC driver"); 459