1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  *  skl-message.c - HDA DSP interface for FW registration, Pipe and Module
4  *  configurations
5  *
6  *  Copyright (C) 2015 Intel Corp
7  *  Author:Rafal Redzimski <rafal.f.redzimski@intel.com>
8  *	   Jeeja KP <jeeja.kp@intel.com>
9  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10  */
11 
12 #include <linux/slab.h>
13 #include <linux/pci.h>
14 #include <sound/core.h>
15 #include <sound/pcm.h>
16 #include <uapi/sound/skl-tplg-interface.h>
17 #include "skl-sst-dsp.h"
18 #include "cnl-sst-dsp.h"
19 #include "skl-sst-ipc.h"
20 #include "skl.h"
21 #include "../common/sst-dsp.h"
22 #include "../common/sst-dsp-priv.h"
23 #include "skl-topology.h"
24 
25 static int skl_alloc_dma_buf(struct device *dev,
26 		struct snd_dma_buffer *dmab, size_t size)
27 {
28 	struct hdac_bus *bus = dev_get_drvdata(dev);
29 
30 	if (!bus)
31 		return -ENODEV;
32 
33 	return  bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab);
34 }
35 
36 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab)
37 {
38 	struct hdac_bus *bus = dev_get_drvdata(dev);
39 
40 	if (!bus)
41 		return -ENODEV;
42 
43 	bus->io_ops->dma_free_pages(bus, dmab);
44 
45 	return 0;
46 }
47 
48 #define SKL_ASTATE_PARAM_ID	4
49 
50 void skl_dsp_set_astate_cfg(struct skl_dev *skl, u32 cnt, void *data)
51 {
52 	struct skl_ipc_large_config_msg	msg = {0};
53 
54 	msg.large_param_id = SKL_ASTATE_PARAM_ID;
55 	msg.param_data_size = (cnt * sizeof(struct skl_astate_param) +
56 				sizeof(cnt));
57 
58 	skl_ipc_set_large_config(&skl->ipc, &msg, data);
59 }
60 
61 #define NOTIFICATION_PARAM_ID 3
62 #define NOTIFICATION_MASK 0xf
63 
64 /* disable notfication for underruns/overruns from firmware module */
65 void skl_dsp_enable_notification(struct skl_dev *skl, bool enable)
66 {
67 	struct notification_mask mask;
68 	struct skl_ipc_large_config_msg	msg = {0};
69 
70 	mask.notify = NOTIFICATION_MASK;
71 	mask.enable = enable;
72 
73 	msg.large_param_id = NOTIFICATION_PARAM_ID;
74 	msg.param_data_size = sizeof(mask);
75 
76 	skl_ipc_set_large_config(&skl->ipc, &msg, (u32 *)&mask);
77 }
78 
79 static int skl_dsp_setup_spib(struct device *dev, unsigned int size,
80 				int stream_tag, int enable)
81 {
82 	struct hdac_bus *bus = dev_get_drvdata(dev);
83 	struct hdac_stream *stream = snd_hdac_get_stream(bus,
84 			SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
85 	struct hdac_ext_stream *estream;
86 
87 	if (!stream)
88 		return -EINVAL;
89 
90 	estream = stream_to_hdac_ext_stream(stream);
91 	/* enable/disable SPIB for this hdac stream */
92 	snd_hdac_ext_stream_spbcap_enable(bus, enable, stream->index);
93 
94 	/* set the spib value */
95 	snd_hdac_ext_stream_set_spib(bus, estream, size);
96 
97 	return 0;
98 }
99 
100 static int skl_dsp_prepare(struct device *dev, unsigned int format,
101 			unsigned int size, struct snd_dma_buffer *dmab)
102 {
103 	struct hdac_bus *bus = dev_get_drvdata(dev);
104 	struct hdac_ext_stream *estream;
105 	struct hdac_stream *stream;
106 	struct snd_pcm_substream substream;
107 	int ret;
108 
109 	if (!bus)
110 		return -ENODEV;
111 
112 	memset(&substream, 0, sizeof(substream));
113 	substream.stream = SNDRV_PCM_STREAM_PLAYBACK;
114 
115 	estream = snd_hdac_ext_stream_assign(bus, &substream,
116 					HDAC_EXT_STREAM_TYPE_HOST);
117 	if (!estream)
118 		return -ENODEV;
119 
120 	stream = hdac_stream(estream);
121 
122 	/* assign decouple host dma channel */
123 	ret = snd_hdac_dsp_prepare(stream, format, size, dmab);
124 	if (ret < 0)
125 		return ret;
126 
127 	skl_dsp_setup_spib(dev, size, stream->stream_tag, true);
128 
129 	return stream->stream_tag;
130 }
131 
132 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag)
133 {
134 	struct hdac_bus *bus = dev_get_drvdata(dev);
135 	struct hdac_stream *stream;
136 
137 	if (!bus)
138 		return -ENODEV;
139 
140 	stream = snd_hdac_get_stream(bus,
141 		SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
142 	if (!stream)
143 		return -EINVAL;
144 
145 	snd_hdac_dsp_trigger(stream, start);
146 
147 	return 0;
148 }
149 
150 static int skl_dsp_cleanup(struct device *dev,
151 		struct snd_dma_buffer *dmab, int stream_tag)
152 {
153 	struct hdac_bus *bus = dev_get_drvdata(dev);
154 	struct hdac_stream *stream;
155 	struct hdac_ext_stream *estream;
156 
157 	if (!bus)
158 		return -ENODEV;
159 
160 	stream = snd_hdac_get_stream(bus,
161 		SNDRV_PCM_STREAM_PLAYBACK, stream_tag);
162 	if (!stream)
163 		return -EINVAL;
164 
165 	estream = stream_to_hdac_ext_stream(stream);
166 	skl_dsp_setup_spib(dev, 0, stream_tag, false);
167 	snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST);
168 
169 	snd_hdac_dsp_cleanup(stream, dmab);
170 
171 	return 0;
172 }
173 
174 static struct skl_dsp_loader_ops skl_get_loader_ops(void)
175 {
176 	struct skl_dsp_loader_ops loader_ops;
177 
178 	memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops));
179 
180 	loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
181 	loader_ops.free_dma_buf = skl_free_dma_buf;
182 
183 	return loader_ops;
184 };
185 
186 static struct skl_dsp_loader_ops bxt_get_loader_ops(void)
187 {
188 	struct skl_dsp_loader_ops loader_ops;
189 
190 	memset(&loader_ops, 0, sizeof(loader_ops));
191 
192 	loader_ops.alloc_dma_buf = skl_alloc_dma_buf;
193 	loader_ops.free_dma_buf = skl_free_dma_buf;
194 	loader_ops.prepare = skl_dsp_prepare;
195 	loader_ops.trigger = skl_dsp_trigger;
196 	loader_ops.cleanup = skl_dsp_cleanup;
197 
198 	return loader_ops;
199 };
200 
201 static const struct skl_dsp_ops dsp_ops[] = {
202 	{
203 		.id = 0x9d70,
204 		.num_cores = 2,
205 		.loader_ops = skl_get_loader_ops,
206 		.init = skl_sst_dsp_init,
207 		.init_fw = skl_sst_init_fw,
208 		.cleanup = skl_sst_dsp_cleanup
209 	},
210 	{
211 		.id = 0x9d71,
212 		.num_cores = 2,
213 		.loader_ops = skl_get_loader_ops,
214 		.init = skl_sst_dsp_init,
215 		.init_fw = skl_sst_init_fw,
216 		.cleanup = skl_sst_dsp_cleanup
217 	},
218 	{
219 		.id = 0x5a98,
220 		.num_cores = 2,
221 		.loader_ops = bxt_get_loader_ops,
222 		.init = bxt_sst_dsp_init,
223 		.init_fw = bxt_sst_init_fw,
224 		.cleanup = bxt_sst_dsp_cleanup
225 	},
226 	{
227 		.id = 0x3198,
228 		.num_cores = 2,
229 		.loader_ops = bxt_get_loader_ops,
230 		.init = bxt_sst_dsp_init,
231 		.init_fw = bxt_sst_init_fw,
232 		.cleanup = bxt_sst_dsp_cleanup
233 	},
234 	{
235 		.id = 0x9dc8,
236 		.num_cores = 4,
237 		.loader_ops = bxt_get_loader_ops,
238 		.init = cnl_sst_dsp_init,
239 		.init_fw = cnl_sst_init_fw,
240 		.cleanup = cnl_sst_dsp_cleanup
241 	},
242 	{
243 		.id = 0xa348,
244 		.num_cores = 4,
245 		.loader_ops = bxt_get_loader_ops,
246 		.init = cnl_sst_dsp_init,
247 		.init_fw = cnl_sst_init_fw,
248 		.cleanup = cnl_sst_dsp_cleanup
249 	},
250 	{
251 		.id = 0x02c8,
252 		.num_cores = 4,
253 		.loader_ops = bxt_get_loader_ops,
254 		.init = cnl_sst_dsp_init,
255 		.init_fw = cnl_sst_init_fw,
256 		.cleanup = cnl_sst_dsp_cleanup
257 	},
258 	{
259 		.id = 0x06c8,
260 		.num_cores = 4,
261 		.loader_ops = bxt_get_loader_ops,
262 		.init = cnl_sst_dsp_init,
263 		.init_fw = cnl_sst_init_fw,
264 		.cleanup = cnl_sst_dsp_cleanup
265 	},
266 };
267 
268 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id)
269 {
270 	int i;
271 
272 	for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) {
273 		if (dsp_ops[i].id == pci_id)
274 			return &dsp_ops[i];
275 	}
276 
277 	return NULL;
278 }
279 
280 int skl_init_dsp(struct skl_dev *skl)
281 {
282 	void __iomem *mmio_base;
283 	struct hdac_bus *bus = skl_to_bus(skl);
284 	struct skl_dsp_loader_ops loader_ops;
285 	int irq = bus->irq;
286 	const struct skl_dsp_ops *ops;
287 	struct skl_dsp_cores *cores;
288 	int ret;
289 
290 	/* enable ppcap interrupt */
291 	snd_hdac_ext_bus_ppcap_enable(bus, true);
292 	snd_hdac_ext_bus_ppcap_int_enable(bus, true);
293 
294 	/* read the BAR of the ADSP MMIO */
295 	mmio_base = pci_ioremap_bar(skl->pci, 4);
296 	if (mmio_base == NULL) {
297 		dev_err(bus->dev, "ioremap error\n");
298 		return -ENXIO;
299 	}
300 
301 	ops = skl_get_dsp_ops(skl->pci->device);
302 	if (!ops) {
303 		ret = -EIO;
304 		goto unmap_mmio;
305 	}
306 
307 	loader_ops = ops->loader_ops();
308 	ret = ops->init(bus->dev, mmio_base, irq,
309 				skl->fw_name, loader_ops,
310 				&skl);
311 
312 	if (ret < 0)
313 		goto unmap_mmio;
314 
315 	skl->dsp_ops = ops;
316 	cores = &skl->cores;
317 	cores->count = ops->num_cores;
318 
319 	cores->state = kcalloc(cores->count, sizeof(*cores->state), GFP_KERNEL);
320 	if (!cores->state) {
321 		ret = -ENOMEM;
322 		goto unmap_mmio;
323 	}
324 
325 	cores->usage_count = kcalloc(cores->count, sizeof(*cores->usage_count),
326 				     GFP_KERNEL);
327 	if (!cores->usage_count) {
328 		ret = -ENOMEM;
329 		goto free_core_state;
330 	}
331 
332 	dev_dbg(bus->dev, "dsp registration status=%d\n", ret);
333 
334 	return 0;
335 
336 free_core_state:
337 	kfree(cores->state);
338 
339 unmap_mmio:
340 	iounmap(mmio_base);
341 
342 	return ret;
343 }
344 
345 int skl_free_dsp(struct skl_dev *skl)
346 {
347 	struct hdac_bus *bus = skl_to_bus(skl);
348 
349 	/* disable  ppcap interrupt */
350 	snd_hdac_ext_bus_ppcap_int_enable(bus, false);
351 
352 	skl->dsp_ops->cleanup(bus->dev, skl);
353 
354 	kfree(skl->cores.state);
355 	kfree(skl->cores.usage_count);
356 
357 	if (skl->dsp->addr.lpe)
358 		iounmap(skl->dsp->addr.lpe);
359 
360 	return 0;
361 }
362 
363 /*
364  * In the case of "suspend_active" i.e, the Audio IP being active
365  * during system suspend, immediately excecute any pending D0i3 work
366  * before suspending. This is needed for the IP to work in low power
367  * mode during system suspend. In the case of normal suspend, cancel
368  * any pending D0i3 work.
369  */
370 int skl_suspend_late_dsp(struct skl_dev *skl)
371 {
372 	struct delayed_work *dwork;
373 
374 	if (!skl)
375 		return 0;
376 
377 	dwork = &skl->d0i3.work;
378 
379 	if (dwork->work.func) {
380 		if (skl->supend_active)
381 			flush_delayed_work(dwork);
382 		else
383 			cancel_delayed_work_sync(dwork);
384 	}
385 
386 	return 0;
387 }
388 
389 int skl_suspend_dsp(struct skl_dev *skl)
390 {
391 	struct hdac_bus *bus = skl_to_bus(skl);
392 	int ret;
393 
394 	/* if ppcap is not supported return 0 */
395 	if (!bus->ppcap)
396 		return 0;
397 
398 	ret = skl_dsp_sleep(skl->dsp);
399 	if (ret < 0)
400 		return ret;
401 
402 	/* disable ppcap interrupt */
403 	snd_hdac_ext_bus_ppcap_int_enable(bus, false);
404 	snd_hdac_ext_bus_ppcap_enable(bus, false);
405 
406 	return 0;
407 }
408 
409 int skl_resume_dsp(struct skl_dev *skl)
410 {
411 	struct hdac_bus *bus = skl_to_bus(skl);
412 	int ret;
413 
414 	/* if ppcap is not supported return 0 */
415 	if (!bus->ppcap)
416 		return 0;
417 
418 	/* enable ppcap interrupt */
419 	snd_hdac_ext_bus_ppcap_enable(bus, true);
420 	snd_hdac_ext_bus_ppcap_int_enable(bus, true);
421 
422 	/* check if DSP 1st boot is done */
423 	if (skl->is_first_boot)
424 		return 0;
425 
426 	/*
427 	 * Disable dynamic clock and power gating during firmware
428 	 * and library download
429 	 */
430 	skl->enable_miscbdcge(skl->dev, false);
431 	skl->clock_power_gating(skl->dev, false);
432 
433 	ret = skl_dsp_wake(skl->dsp);
434 	skl->enable_miscbdcge(skl->dev, true);
435 	skl->clock_power_gating(skl->dev, true);
436 	if (ret < 0)
437 		return ret;
438 
439 	skl_dsp_enable_notification(skl, false);
440 
441 	if (skl->cfg.astate_cfg != NULL) {
442 		skl_dsp_set_astate_cfg(skl, skl->cfg.astate_cfg->count,
443 					skl->cfg.astate_cfg);
444 	}
445 	return ret;
446 }
447 
448 enum skl_bitdepth skl_get_bit_depth(int params)
449 {
450 	switch (params) {
451 	case 8:
452 		return SKL_DEPTH_8BIT;
453 
454 	case 16:
455 		return SKL_DEPTH_16BIT;
456 
457 	case 24:
458 		return SKL_DEPTH_24BIT;
459 
460 	case 32:
461 		return SKL_DEPTH_32BIT;
462 
463 	default:
464 		return SKL_DEPTH_INVALID;
465 
466 	}
467 }
468 
469 /*
470  * Each module in DSP expects a base module configuration, which consists of
471  * PCM format information, which we calculate in driver and resource values
472  * which are read from widget information passed through topology binary
473  * This is send when we create a module with INIT_INSTANCE IPC msg
474  */
475 static void skl_set_base_module_format(struct skl_dev *skl,
476 			struct skl_module_cfg *mconfig,
477 			struct skl_base_cfg *base_cfg)
478 {
479 	struct skl_module *module = mconfig->module;
480 	struct skl_module_res *res = &module->resources[mconfig->res_idx];
481 	struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
482 	struct skl_module_fmt *format = &fmt->inputs[0].fmt;
483 
484 	base_cfg->audio_fmt.number_of_channels = format->channels;
485 
486 	base_cfg->audio_fmt.s_freq = format->s_freq;
487 	base_cfg->audio_fmt.bit_depth = format->bit_depth;
488 	base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth;
489 	base_cfg->audio_fmt.ch_cfg = format->ch_cfg;
490 	base_cfg->audio_fmt.sample_type = format->sample_type;
491 
492 	dev_dbg(skl->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n",
493 			format->bit_depth, format->valid_bit_depth,
494 			format->ch_cfg);
495 
496 	base_cfg->audio_fmt.channel_map = format->ch_map;
497 
498 	base_cfg->audio_fmt.interleaving = format->interleaving_style;
499 
500 	base_cfg->cps = res->cps;
501 	base_cfg->ibs = res->ibs;
502 	base_cfg->obs = res->obs;
503 	base_cfg->is_pages = res->is_pages;
504 }
505 
506 /*
507  * Copies copier capabilities into copier module and updates copier module
508  * config size.
509  */
510 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig,
511 				struct skl_cpr_cfg *cpr_mconfig)
512 {
513 	if (mconfig->formats_config.caps_size == 0)
514 		return;
515 
516 	memcpy(cpr_mconfig->gtw_cfg.config_data,
517 			mconfig->formats_config.caps,
518 			mconfig->formats_config.caps_size);
519 
520 	cpr_mconfig->gtw_cfg.config_length =
521 			(mconfig->formats_config.caps_size) / 4;
522 }
523 
524 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF
525 /*
526  * Calculate the gatewat settings required for copier module, type of
527  * gateway and index of gateway to use
528  */
529 static u32 skl_get_node_id(struct skl_dev *skl,
530 			struct skl_module_cfg *mconfig)
531 {
532 	union skl_connector_node_id node_id = {0};
533 	union skl_ssp_dma_node ssp_node  = {0};
534 	struct skl_pipe_params *params = mconfig->pipe->p_params;
535 
536 	switch (mconfig->dev_type) {
537 	case SKL_DEVICE_BT:
538 		node_id.node.dma_type =
539 			(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
540 			SKL_DMA_I2S_LINK_OUTPUT_CLASS :
541 			SKL_DMA_I2S_LINK_INPUT_CLASS;
542 		node_id.node.vindex = params->host_dma_id +
543 					(mconfig->vbus_id << 3);
544 		break;
545 
546 	case SKL_DEVICE_I2S:
547 		node_id.node.dma_type =
548 			(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
549 			SKL_DMA_I2S_LINK_OUTPUT_CLASS :
550 			SKL_DMA_I2S_LINK_INPUT_CLASS;
551 		ssp_node.dma_node.time_slot_index = mconfig->time_slot;
552 		ssp_node.dma_node.i2s_instance = mconfig->vbus_id;
553 		node_id.node.vindex = ssp_node.val;
554 		break;
555 
556 	case SKL_DEVICE_DMIC:
557 		node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS;
558 		node_id.node.vindex = mconfig->vbus_id +
559 					 (mconfig->time_slot);
560 		break;
561 
562 	case SKL_DEVICE_HDALINK:
563 		node_id.node.dma_type =
564 			(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
565 			SKL_DMA_HDA_LINK_OUTPUT_CLASS :
566 			SKL_DMA_HDA_LINK_INPUT_CLASS;
567 		node_id.node.vindex = params->link_dma_id;
568 		break;
569 
570 	case SKL_DEVICE_HDAHOST:
571 		node_id.node.dma_type =
572 			(SKL_CONN_SOURCE == mconfig->hw_conn_type) ?
573 			SKL_DMA_HDA_HOST_OUTPUT_CLASS :
574 			SKL_DMA_HDA_HOST_INPUT_CLASS;
575 		node_id.node.vindex = params->host_dma_id;
576 		break;
577 
578 	default:
579 		node_id.val = 0xFFFFFFFF;
580 		break;
581 	}
582 
583 	return node_id.val;
584 }
585 
586 static void skl_setup_cpr_gateway_cfg(struct skl_dev *skl,
587 			struct skl_module_cfg *mconfig,
588 			struct skl_cpr_cfg *cpr_mconfig)
589 {
590 	u32 dma_io_buf;
591 	struct skl_module_res *res;
592 	int res_idx = mconfig->res_idx;
593 
594 	cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(skl, mconfig);
595 
596 	if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) {
597 		cpr_mconfig->cpr_feature_mask = 0;
598 		return;
599 	}
600 
601 	if (skl->nr_modules) {
602 		res = &mconfig->module->resources[mconfig->res_idx];
603 		cpr_mconfig->gtw_cfg.dma_buffer_size = res->dma_buffer_size;
604 		goto skip_buf_size_calc;
605 	} else {
606 		res = &mconfig->module->resources[res_idx];
607 	}
608 
609 	switch (mconfig->hw_conn_type) {
610 	case SKL_CONN_SOURCE:
611 		if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
612 			dma_io_buf =  res->ibs;
613 		else
614 			dma_io_buf =  res->obs;
615 		break;
616 
617 	case SKL_CONN_SINK:
618 		if (mconfig->dev_type == SKL_DEVICE_HDAHOST)
619 			dma_io_buf =  res->obs;
620 		else
621 			dma_io_buf =  res->ibs;
622 		break;
623 
624 	default:
625 		dev_warn(skl->dev, "wrong connection type: %d\n",
626 				mconfig->hw_conn_type);
627 		return;
628 	}
629 
630 	cpr_mconfig->gtw_cfg.dma_buffer_size =
631 				mconfig->dma_buffer_size * dma_io_buf;
632 
633 	/* fallback to 2ms default value */
634 	if (!cpr_mconfig->gtw_cfg.dma_buffer_size) {
635 		if (mconfig->hw_conn_type == SKL_CONN_SOURCE)
636 			cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->obs;
637 		else
638 			cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * res->ibs;
639 	}
640 
641 skip_buf_size_calc:
642 	cpr_mconfig->cpr_feature_mask = 0;
643 	cpr_mconfig->gtw_cfg.config_length  = 0;
644 
645 	skl_copy_copier_caps(mconfig, cpr_mconfig);
646 }
647 
648 #define DMA_CONTROL_ID 5
649 #define DMA_I2S_BLOB_SIZE 21
650 
651 int skl_dsp_set_dma_control(struct skl_dev *skl, u32 *caps,
652 				u32 caps_size, u32 node_id)
653 {
654 	struct skl_dma_control *dma_ctrl;
655 	struct skl_ipc_large_config_msg msg = {0};
656 	int err = 0;
657 
658 
659 	/*
660 	 * if blob size zero, then return
661 	 */
662 	if (caps_size == 0)
663 		return 0;
664 
665 	msg.large_param_id = DMA_CONTROL_ID;
666 	msg.param_data_size = sizeof(struct skl_dma_control) + caps_size;
667 
668 	dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL);
669 	if (dma_ctrl == NULL)
670 		return -ENOMEM;
671 
672 	dma_ctrl->node_id = node_id;
673 
674 	/*
675 	 * NHLT blob may contain additional configs along with i2s blob.
676 	 * firmware expects only the i2s blob size as the config_length.
677 	 * So fix to i2s blob size.
678 	 * size in dwords.
679 	 */
680 	dma_ctrl->config_length = DMA_I2S_BLOB_SIZE;
681 
682 	memcpy(dma_ctrl->config_data, caps, caps_size);
683 
684 	err = skl_ipc_set_large_config(&skl->ipc, &msg, (u32 *)dma_ctrl);
685 
686 	kfree(dma_ctrl);
687 	return err;
688 }
689 EXPORT_SYMBOL_GPL(skl_dsp_set_dma_control);
690 
691 static void skl_setup_out_format(struct skl_dev *skl,
692 			struct skl_module_cfg *mconfig,
693 			struct skl_audio_data_format *out_fmt)
694 {
695 	struct skl_module *module = mconfig->module;
696 	struct skl_module_iface *fmt = &module->formats[mconfig->fmt_idx];
697 	struct skl_module_fmt *format = &fmt->outputs[0].fmt;
698 
699 	out_fmt->number_of_channels = (u8)format->channels;
700 	out_fmt->s_freq = format->s_freq;
701 	out_fmt->bit_depth = format->bit_depth;
702 	out_fmt->valid_bit_depth = format->valid_bit_depth;
703 	out_fmt->ch_cfg = format->ch_cfg;
704 
705 	out_fmt->channel_map = format->ch_map;
706 	out_fmt->interleaving = format->interleaving_style;
707 	out_fmt->sample_type = format->sample_type;
708 
709 	dev_dbg(skl->dev, "copier out format chan=%d fre=%d bitdepth=%d\n",
710 		out_fmt->number_of_channels, format->s_freq, format->bit_depth);
711 }
712 
713 /*
714  * DSP needs SRC module for frequency conversion, SRC takes base module
715  * configuration and the target frequency as extra parameter passed as src
716  * config
717  */
718 static void skl_set_src_format(struct skl_dev *skl,
719 			struct skl_module_cfg *mconfig,
720 			struct skl_src_module_cfg *src_mconfig)
721 {
722 	struct skl_module *module = mconfig->module;
723 	struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
724 	struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
725 
726 	skl_set_base_module_format(skl, mconfig,
727 		(struct skl_base_cfg *)src_mconfig);
728 
729 	src_mconfig->src_cfg = fmt->s_freq;
730 }
731 
732 /*
733  * DSP needs updown module to do channel conversion. updown module take base
734  * module configuration and channel configuration
735  * It also take coefficients and now we have defaults applied here
736  */
737 static void skl_set_updown_mixer_format(struct skl_dev *skl,
738 			struct skl_module_cfg *mconfig,
739 			struct skl_up_down_mixer_cfg *mixer_mconfig)
740 {
741 	struct skl_module *module = mconfig->module;
742 	struct skl_module_iface *iface = &module->formats[mconfig->fmt_idx];
743 	struct skl_module_fmt *fmt = &iface->outputs[0].fmt;
744 
745 	skl_set_base_module_format(skl,	mconfig,
746 		(struct skl_base_cfg *)mixer_mconfig);
747 	mixer_mconfig->out_ch_cfg = fmt->ch_cfg;
748 	mixer_mconfig->ch_map = fmt->ch_map;
749 }
750 
751 /*
752  * 'copier' is DSP internal module which copies data from Host DMA (HDA host
753  * dma) or link (hda link, SSP, PDM)
754  * Here we calculate the copier module parameters, like PCM format, output
755  * format, gateway settings
756  * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg
757  */
758 static void skl_set_copier_format(struct skl_dev *skl,
759 			struct skl_module_cfg *mconfig,
760 			struct skl_cpr_cfg *cpr_mconfig)
761 {
762 	struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt;
763 	struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig;
764 
765 	skl_set_base_module_format(skl, mconfig, base_cfg);
766 
767 	skl_setup_out_format(skl, mconfig, out_fmt);
768 	skl_setup_cpr_gateway_cfg(skl, mconfig, cpr_mconfig);
769 }
770 
771 /*
772  * Algo module are DSP pre processing modules. Algo module take base module
773  * configuration and params
774  */
775 
776 static void skl_set_algo_format(struct skl_dev *skl,
777 			struct skl_module_cfg *mconfig,
778 			struct skl_algo_cfg *algo_mcfg)
779 {
780 	struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg;
781 
782 	skl_set_base_module_format(skl, mconfig, base_cfg);
783 
784 	if (mconfig->formats_config.caps_size == 0)
785 		return;
786 
787 	memcpy(algo_mcfg->params,
788 			mconfig->formats_config.caps,
789 			mconfig->formats_config.caps_size);
790 
791 }
792 
793 /*
794  * Mic select module allows selecting one or many input channels, thus
795  * acting as a demux.
796  *
797  * Mic select module take base module configuration and out-format
798  * configuration
799  */
800 static void skl_set_base_outfmt_format(struct skl_dev *skl,
801 			struct skl_module_cfg *mconfig,
802 			struct skl_base_outfmt_cfg *base_outfmt_mcfg)
803 {
804 	struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt;
805 	struct skl_base_cfg *base_cfg =
806 				(struct skl_base_cfg *)base_outfmt_mcfg;
807 
808 	skl_set_base_module_format(skl, mconfig, base_cfg);
809 	skl_setup_out_format(skl, mconfig, out_fmt);
810 }
811 
812 static u16 skl_get_module_param_size(struct skl_dev *skl,
813 			struct skl_module_cfg *mconfig)
814 {
815 	u16 param_size;
816 
817 	switch (mconfig->m_type) {
818 	case SKL_MODULE_TYPE_COPIER:
819 		param_size = sizeof(struct skl_cpr_cfg);
820 		param_size += mconfig->formats_config.caps_size;
821 		return param_size;
822 
823 	case SKL_MODULE_TYPE_SRCINT:
824 		return sizeof(struct skl_src_module_cfg);
825 
826 	case SKL_MODULE_TYPE_UPDWMIX:
827 		return sizeof(struct skl_up_down_mixer_cfg);
828 
829 	case SKL_MODULE_TYPE_ALGO:
830 		param_size = sizeof(struct skl_base_cfg);
831 		param_size += mconfig->formats_config.caps_size;
832 		return param_size;
833 
834 	case SKL_MODULE_TYPE_BASE_OUTFMT:
835 	case SKL_MODULE_TYPE_MIC_SELECT:
836 	case SKL_MODULE_TYPE_KPB:
837 		return sizeof(struct skl_base_outfmt_cfg);
838 
839 	default:
840 		/*
841 		 * return only base cfg when no specific module type is
842 		 * specified
843 		 */
844 		return sizeof(struct skl_base_cfg);
845 	}
846 
847 	return 0;
848 }
849 
850 /*
851  * DSP firmware supports various modules like copier, SRC, updown etc.
852  * These modules required various parameters to be calculated and sent for
853  * the module initialization to DSP. By default a generic module needs only
854  * base module format configuration
855  */
856 
857 static int skl_set_module_format(struct skl_dev *skl,
858 			struct skl_module_cfg *module_config,
859 			u16 *module_config_size,
860 			void **param_data)
861 {
862 	u16 param_size;
863 
864 	param_size  = skl_get_module_param_size(skl, module_config);
865 
866 	*param_data = kzalloc(param_size, GFP_KERNEL);
867 	if (NULL == *param_data)
868 		return -ENOMEM;
869 
870 	*module_config_size = param_size;
871 
872 	switch (module_config->m_type) {
873 	case SKL_MODULE_TYPE_COPIER:
874 		skl_set_copier_format(skl, module_config, *param_data);
875 		break;
876 
877 	case SKL_MODULE_TYPE_SRCINT:
878 		skl_set_src_format(skl, module_config, *param_data);
879 		break;
880 
881 	case SKL_MODULE_TYPE_UPDWMIX:
882 		skl_set_updown_mixer_format(skl, module_config, *param_data);
883 		break;
884 
885 	case SKL_MODULE_TYPE_ALGO:
886 		skl_set_algo_format(skl, module_config, *param_data);
887 		break;
888 
889 	case SKL_MODULE_TYPE_BASE_OUTFMT:
890 	case SKL_MODULE_TYPE_MIC_SELECT:
891 	case SKL_MODULE_TYPE_KPB:
892 		skl_set_base_outfmt_format(skl, module_config, *param_data);
893 		break;
894 
895 	default:
896 		skl_set_base_module_format(skl, module_config, *param_data);
897 		break;
898 
899 	}
900 
901 	dev_dbg(skl->dev, "Module type=%d config size: %d bytes\n",
902 			module_config->id.module_id, param_size);
903 	print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4,
904 			*param_data, param_size, false);
905 	return 0;
906 }
907 
908 static int skl_get_queue_index(struct skl_module_pin *mpin,
909 				struct skl_module_inst_id id, int max)
910 {
911 	int i;
912 
913 	for (i = 0; i < max; i++)  {
914 		if (mpin[i].id.module_id == id.module_id &&
915 			mpin[i].id.instance_id == id.instance_id)
916 			return i;
917 	}
918 
919 	return -EINVAL;
920 }
921 
922 /*
923  * Allocates queue for each module.
924  * if dynamic, the pin_index is allocated 0 to max_pin.
925  * In static, the pin_index is fixed based on module_id and instance id
926  */
927 static int skl_alloc_queue(struct skl_module_pin *mpin,
928 			struct skl_module_cfg *tgt_cfg, int max)
929 {
930 	int i;
931 	struct skl_module_inst_id id = tgt_cfg->id;
932 	/*
933 	 * if pin in dynamic, find first free pin
934 	 * otherwise find match module and instance id pin as topology will
935 	 * ensure a unique pin is assigned to this so no need to
936 	 * allocate/free
937 	 */
938 	for (i = 0; i < max; i++)  {
939 		if (mpin[i].is_dynamic) {
940 			if (!mpin[i].in_use &&
941 				mpin[i].pin_state == SKL_PIN_UNBIND) {
942 
943 				mpin[i].in_use = true;
944 				mpin[i].id.module_id = id.module_id;
945 				mpin[i].id.instance_id = id.instance_id;
946 				mpin[i].id.pvt_id = id.pvt_id;
947 				mpin[i].tgt_mcfg = tgt_cfg;
948 				return i;
949 			}
950 		} else {
951 			if (mpin[i].id.module_id == id.module_id &&
952 				mpin[i].id.instance_id == id.instance_id &&
953 				mpin[i].pin_state == SKL_PIN_UNBIND) {
954 
955 				mpin[i].tgt_mcfg = tgt_cfg;
956 				return i;
957 			}
958 		}
959 	}
960 
961 	return -EINVAL;
962 }
963 
964 static void skl_free_queue(struct skl_module_pin *mpin, int q_index)
965 {
966 	if (mpin[q_index].is_dynamic) {
967 		mpin[q_index].in_use = false;
968 		mpin[q_index].id.module_id = 0;
969 		mpin[q_index].id.instance_id = 0;
970 		mpin[q_index].id.pvt_id = 0;
971 	}
972 	mpin[q_index].pin_state = SKL_PIN_UNBIND;
973 	mpin[q_index].tgt_mcfg = NULL;
974 }
975 
976 /* Module state will be set to unint, if all the out pin state is UNBIND */
977 
978 static void skl_clear_module_state(struct skl_module_pin *mpin, int max,
979 						struct skl_module_cfg *mcfg)
980 {
981 	int i;
982 	bool found = false;
983 
984 	for (i = 0; i < max; i++)  {
985 		if (mpin[i].pin_state == SKL_PIN_UNBIND)
986 			continue;
987 		found = true;
988 		break;
989 	}
990 
991 	if (!found)
992 		mcfg->m_state = SKL_MODULE_INIT_DONE;
993 	return;
994 }
995 
996 /*
997  * A module needs to be instanataited in DSP. A mdoule is present in a
998  * collection of module referred as a PIPE.
999  * We first calculate the module format, based on module type and then
1000  * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper
1001  */
1002 int skl_init_module(struct skl_dev *skl,
1003 			struct skl_module_cfg *mconfig)
1004 {
1005 	u16 module_config_size = 0;
1006 	void *param_data = NULL;
1007 	int ret;
1008 	struct skl_ipc_init_instance_msg msg;
1009 
1010 	dev_dbg(skl->dev, "%s: module_id = %d instance=%d\n", __func__,
1011 		 mconfig->id.module_id, mconfig->id.pvt_id);
1012 
1013 	if (mconfig->pipe->state != SKL_PIPE_CREATED) {
1014 		dev_err(skl->dev, "Pipe not created state= %d pipe_id= %d\n",
1015 				 mconfig->pipe->state, mconfig->pipe->ppl_id);
1016 		return -EIO;
1017 	}
1018 
1019 	ret = skl_set_module_format(skl, mconfig,
1020 			&module_config_size, &param_data);
1021 	if (ret < 0) {
1022 		dev_err(skl->dev, "Failed to set module format ret=%d\n", ret);
1023 		return ret;
1024 	}
1025 
1026 	msg.module_id = mconfig->id.module_id;
1027 	msg.instance_id = mconfig->id.pvt_id;
1028 	msg.ppl_instance_id = mconfig->pipe->ppl_id;
1029 	msg.param_data_size = module_config_size;
1030 	msg.core_id = mconfig->core_id;
1031 	msg.domain = mconfig->domain;
1032 
1033 	ret = skl_ipc_init_instance(&skl->ipc, &msg, param_data);
1034 	if (ret < 0) {
1035 		dev_err(skl->dev, "Failed to init instance ret=%d\n", ret);
1036 		kfree(param_data);
1037 		return ret;
1038 	}
1039 	mconfig->m_state = SKL_MODULE_INIT_DONE;
1040 	kfree(param_data);
1041 	return ret;
1042 }
1043 
1044 static void skl_dump_bind_info(struct skl_dev *skl, struct skl_module_cfg
1045 	*src_module, struct skl_module_cfg *dst_module)
1046 {
1047 	dev_dbg(skl->dev, "%s: src module_id = %d  src_instance=%d\n",
1048 		__func__, src_module->id.module_id, src_module->id.pvt_id);
1049 	dev_dbg(skl->dev, "%s: dst_module=%d dst_instance=%d\n", __func__,
1050 		 dst_module->id.module_id, dst_module->id.pvt_id);
1051 
1052 	dev_dbg(skl->dev, "src_module state = %d dst module state = %d\n",
1053 		src_module->m_state, dst_module->m_state);
1054 }
1055 
1056 /*
1057  * On module freeup, we need to unbind the module with modules
1058  * it is already bind.
1059  * Find the pin allocated and unbind then using bind_unbind IPC
1060  */
1061 int skl_unbind_modules(struct skl_dev *skl,
1062 			struct skl_module_cfg *src_mcfg,
1063 			struct skl_module_cfg *dst_mcfg)
1064 {
1065 	int ret;
1066 	struct skl_ipc_bind_unbind_msg msg;
1067 	struct skl_module_inst_id src_id = src_mcfg->id;
1068 	struct skl_module_inst_id dst_id = dst_mcfg->id;
1069 	int in_max = dst_mcfg->module->max_input_pins;
1070 	int out_max = src_mcfg->module->max_output_pins;
1071 	int src_index, dst_index, src_pin_state, dst_pin_state;
1072 
1073 	skl_dump_bind_info(skl, src_mcfg, dst_mcfg);
1074 
1075 	/* get src queue index */
1076 	src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max);
1077 	if (src_index < 0)
1078 		return 0;
1079 
1080 	msg.src_queue = src_index;
1081 
1082 	/* get dst queue index */
1083 	dst_index  = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max);
1084 	if (dst_index < 0)
1085 		return 0;
1086 
1087 	msg.dst_queue = dst_index;
1088 
1089 	src_pin_state = src_mcfg->m_out_pin[src_index].pin_state;
1090 	dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state;
1091 
1092 	if (src_pin_state != SKL_PIN_BIND_DONE ||
1093 		dst_pin_state != SKL_PIN_BIND_DONE)
1094 		return 0;
1095 
1096 	msg.module_id = src_mcfg->id.module_id;
1097 	msg.instance_id = src_mcfg->id.pvt_id;
1098 	msg.dst_module_id = dst_mcfg->id.module_id;
1099 	msg.dst_instance_id = dst_mcfg->id.pvt_id;
1100 	msg.bind = false;
1101 
1102 	ret = skl_ipc_bind_unbind(&skl->ipc, &msg);
1103 	if (!ret) {
1104 		/* free queue only if unbind is success */
1105 		skl_free_queue(src_mcfg->m_out_pin, src_index);
1106 		skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1107 
1108 		/*
1109 		 * check only if src module bind state, bind is
1110 		 * always from src -> sink
1111 		 */
1112 		skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg);
1113 	}
1114 
1115 	return ret;
1116 }
1117 
1118 static void fill_pin_params(struct skl_audio_data_format *pin_fmt,
1119 				struct skl_module_fmt *format)
1120 {
1121 	pin_fmt->number_of_channels = format->channels;
1122 	pin_fmt->s_freq = format->s_freq;
1123 	pin_fmt->bit_depth = format->bit_depth;
1124 	pin_fmt->valid_bit_depth = format->valid_bit_depth;
1125 	pin_fmt->ch_cfg = format->ch_cfg;
1126 	pin_fmt->sample_type = format->sample_type;
1127 	pin_fmt->channel_map = format->ch_map;
1128 	pin_fmt->interleaving = format->interleaving_style;
1129 }
1130 
1131 #define CPR_SINK_FMT_PARAM_ID 2
1132 
1133 /*
1134  * Once a module is instantiated it need to be 'bind' with other modules in
1135  * the pipeline. For binding we need to find the module pins which are bind
1136  * together
1137  * This function finds the pins and then sends bund_unbind IPC message to
1138  * DSP using IPC helper
1139  */
1140 int skl_bind_modules(struct skl_dev *skl,
1141 			struct skl_module_cfg *src_mcfg,
1142 			struct skl_module_cfg *dst_mcfg)
1143 {
1144 	int ret = 0;
1145 	struct skl_ipc_bind_unbind_msg msg;
1146 	int in_max = dst_mcfg->module->max_input_pins;
1147 	int out_max = src_mcfg->module->max_output_pins;
1148 	int src_index, dst_index;
1149 	struct skl_module_fmt *format;
1150 	struct skl_cpr_pin_fmt pin_fmt;
1151 	struct skl_module *module;
1152 	struct skl_module_iface *fmt;
1153 
1154 	skl_dump_bind_info(skl, src_mcfg, dst_mcfg);
1155 
1156 	if (src_mcfg->m_state < SKL_MODULE_INIT_DONE ||
1157 		dst_mcfg->m_state < SKL_MODULE_INIT_DONE)
1158 		return 0;
1159 
1160 	src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max);
1161 	if (src_index < 0)
1162 		return -EINVAL;
1163 
1164 	msg.src_queue = src_index;
1165 	dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max);
1166 	if (dst_index < 0) {
1167 		skl_free_queue(src_mcfg->m_out_pin, src_index);
1168 		return -EINVAL;
1169 	}
1170 
1171 	/*
1172 	 * Copier module requires the separate large_config_set_ipc to
1173 	 * configure the pins other than 0
1174 	 */
1175 	if (src_mcfg->m_type == SKL_MODULE_TYPE_COPIER && src_index > 0) {
1176 		pin_fmt.sink_id = src_index;
1177 		module = src_mcfg->module;
1178 		fmt = &module->formats[src_mcfg->fmt_idx];
1179 
1180 		/* Input fmt is same as that of src module input cfg */
1181 		format = &fmt->inputs[0].fmt;
1182 		fill_pin_params(&(pin_fmt.src_fmt), format);
1183 
1184 		format = &fmt->outputs[src_index].fmt;
1185 		fill_pin_params(&(pin_fmt.dst_fmt), format);
1186 		ret = skl_set_module_params(skl, (void *)&pin_fmt,
1187 					sizeof(struct skl_cpr_pin_fmt),
1188 					CPR_SINK_FMT_PARAM_ID, src_mcfg);
1189 
1190 		if (ret < 0)
1191 			goto out;
1192 	}
1193 
1194 	msg.dst_queue = dst_index;
1195 
1196 	dev_dbg(skl->dev, "src queue = %d dst queue =%d\n",
1197 			 msg.src_queue, msg.dst_queue);
1198 
1199 	msg.module_id = src_mcfg->id.module_id;
1200 	msg.instance_id = src_mcfg->id.pvt_id;
1201 	msg.dst_module_id = dst_mcfg->id.module_id;
1202 	msg.dst_instance_id = dst_mcfg->id.pvt_id;
1203 	msg.bind = true;
1204 
1205 	ret = skl_ipc_bind_unbind(&skl->ipc, &msg);
1206 
1207 	if (!ret) {
1208 		src_mcfg->m_state = SKL_MODULE_BIND_DONE;
1209 		src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE;
1210 		dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE;
1211 		return ret;
1212 	}
1213 out:
1214 	/* error case , if IPC fails, clear the queue index */
1215 	skl_free_queue(src_mcfg->m_out_pin, src_index);
1216 	skl_free_queue(dst_mcfg->m_in_pin, dst_index);
1217 
1218 	return ret;
1219 }
1220 
1221 static int skl_set_pipe_state(struct skl_dev *skl, struct skl_pipe *pipe,
1222 	enum skl_ipc_pipeline_state state)
1223 {
1224 	dev_dbg(skl->dev, "%s: pipe_state = %d\n", __func__, state);
1225 
1226 	return skl_ipc_set_pipeline_state(&skl->ipc, pipe->ppl_id, state);
1227 }
1228 
1229 /*
1230  * A pipeline is a collection of modules. Before a module in instantiated a
1231  * pipeline needs to be created for it.
1232  * This function creates pipeline, by sending create pipeline IPC messages
1233  * to FW
1234  */
1235 int skl_create_pipeline(struct skl_dev *skl, struct skl_pipe *pipe)
1236 {
1237 	int ret;
1238 
1239 	dev_dbg(skl->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id);
1240 
1241 	ret = skl_ipc_create_pipeline(&skl->ipc, pipe->memory_pages,
1242 				pipe->pipe_priority, pipe->ppl_id,
1243 				pipe->lp_mode);
1244 	if (ret < 0) {
1245 		dev_err(skl->dev, "Failed to create pipeline\n");
1246 		return ret;
1247 	}
1248 
1249 	pipe->state = SKL_PIPE_CREATED;
1250 
1251 	return 0;
1252 }
1253 
1254 /*
1255  * A pipeline needs to be deleted on cleanup. If a pipeline is running,
1256  * then pause it first. Before actual deletion, pipeline should enter
1257  * reset state. Finish the procedure by sending delete pipeline IPC.
1258  * DSP will stop the DMA engines and release resources
1259  */
1260 int skl_delete_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1261 {
1262 	int ret;
1263 
1264 	dev_dbg(skl->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1265 
1266 	/* If pipe was not created in FW, do not try to delete it */
1267 	if (pipe->state < SKL_PIPE_CREATED)
1268 		return 0;
1269 
1270 	/* If pipe is started, do stop the pipe in FW. */
1271 	if (pipe->state >= SKL_PIPE_STARTED) {
1272 		ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1273 		if (ret < 0) {
1274 			dev_err(skl->dev, "Failed to stop pipeline\n");
1275 			return ret;
1276 		}
1277 
1278 		pipe->state = SKL_PIPE_PAUSED;
1279 	}
1280 
1281 	/* reset pipe state before deletion */
1282 	ret = skl_set_pipe_state(skl, pipe, PPL_RESET);
1283 	if (ret < 0) {
1284 		dev_err(skl->dev, "Failed to reset pipe ret=%d\n", ret);
1285 		return ret;
1286 	}
1287 
1288 	pipe->state = SKL_PIPE_RESET;
1289 
1290 	ret = skl_ipc_delete_pipeline(&skl->ipc, pipe->ppl_id);
1291 	if (ret < 0) {
1292 		dev_err(skl->dev, "Failed to delete pipeline\n");
1293 		return ret;
1294 	}
1295 
1296 	pipe->state = SKL_PIPE_INVALID;
1297 
1298 	return ret;
1299 }
1300 
1301 /*
1302  * A pipeline is also a scheduling entity in DSP which can be run, stopped
1303  * For processing data the pipe need to be run by sending IPC set pipe state
1304  * to DSP
1305  */
1306 int skl_run_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1307 {
1308 	int ret;
1309 
1310 	dev_dbg(skl->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id);
1311 
1312 	/* If pipe was not created in FW, do not try to pause or delete */
1313 	if (pipe->state < SKL_PIPE_CREATED)
1314 		return 0;
1315 
1316 	/* Pipe has to be paused before it is started */
1317 	ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1318 	if (ret < 0) {
1319 		dev_err(skl->dev, "Failed to pause pipe\n");
1320 		return ret;
1321 	}
1322 
1323 	pipe->state = SKL_PIPE_PAUSED;
1324 
1325 	ret = skl_set_pipe_state(skl, pipe, PPL_RUNNING);
1326 	if (ret < 0) {
1327 		dev_err(skl->dev, "Failed to start pipe\n");
1328 		return ret;
1329 	}
1330 
1331 	pipe->state = SKL_PIPE_STARTED;
1332 
1333 	return 0;
1334 }
1335 
1336 /*
1337  * Stop the pipeline by sending set pipe state IPC
1338  * DSP doesnt implement stop so we always send pause message
1339  */
1340 int skl_stop_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1341 {
1342 	int ret;
1343 
1344 	dev_dbg(skl->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id);
1345 
1346 	/* If pipe was not created in FW, do not try to pause or delete */
1347 	if (pipe->state < SKL_PIPE_PAUSED)
1348 		return 0;
1349 
1350 	ret = skl_set_pipe_state(skl, pipe, PPL_PAUSED);
1351 	if (ret < 0) {
1352 		dev_dbg(skl->dev, "Failed to stop pipe\n");
1353 		return ret;
1354 	}
1355 
1356 	pipe->state = SKL_PIPE_PAUSED;
1357 
1358 	return 0;
1359 }
1360 
1361 /*
1362  * Reset the pipeline by sending set pipe state IPC this will reset the DMA
1363  * from the DSP side
1364  */
1365 int skl_reset_pipe(struct skl_dev *skl, struct skl_pipe *pipe)
1366 {
1367 	int ret;
1368 
1369 	/* If pipe was not created in FW, do not try to pause or delete */
1370 	if (pipe->state < SKL_PIPE_PAUSED)
1371 		return 0;
1372 
1373 	ret = skl_set_pipe_state(skl, pipe, PPL_RESET);
1374 	if (ret < 0) {
1375 		dev_dbg(skl->dev, "Failed to reset pipe ret=%d\n", ret);
1376 		return ret;
1377 	}
1378 
1379 	pipe->state = SKL_PIPE_RESET;
1380 
1381 	return 0;
1382 }
1383 
1384 /* Algo parameter set helper function */
1385 int skl_set_module_params(struct skl_dev *skl, u32 *params, int size,
1386 				u32 param_id, struct skl_module_cfg *mcfg)
1387 {
1388 	struct skl_ipc_large_config_msg msg;
1389 
1390 	msg.module_id = mcfg->id.module_id;
1391 	msg.instance_id = mcfg->id.pvt_id;
1392 	msg.param_data_size = size;
1393 	msg.large_param_id = param_id;
1394 
1395 	return skl_ipc_set_large_config(&skl->ipc, &msg, params);
1396 }
1397 
1398 int skl_get_module_params(struct skl_dev *skl, u32 *params, int size,
1399 			  u32 param_id, struct skl_module_cfg *mcfg)
1400 {
1401 	struct skl_ipc_large_config_msg msg;
1402 
1403 	msg.module_id = mcfg->id.module_id;
1404 	msg.instance_id = mcfg->id.pvt_id;
1405 	msg.param_data_size = size;
1406 	msg.large_param_id = param_id;
1407 
1408 	return skl_ipc_get_large_config(&skl->ipc, &msg, params);
1409 }
1410