1 /* 2 * skl-message.c - HDA DSP interface for FW registration, Pipe and Module 3 * configurations 4 * 5 * Copyright (C) 2015 Intel Corp 6 * Author:Rafal Redzimski <rafal.f.redzimski@intel.com> 7 * Jeeja KP <jeeja.kp@intel.com> 8 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License as version 2, as 12 * published by the Free Software Foundation. 13 * 14 * This program is distributed in the hope that it will be useful, but 15 * WITHOUT ANY WARRANTY; without even the implied warranty of 16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 17 * General Public License for more details. 18 */ 19 20 #include <linux/slab.h> 21 #include <linux/pci.h> 22 #include <sound/core.h> 23 #include <sound/pcm.h> 24 #include "skl-sst-dsp.h" 25 #include "skl-sst-ipc.h" 26 #include "skl.h" 27 #include "../common/sst-dsp.h" 28 #include "../common/sst-dsp-priv.h" 29 #include "skl-topology.h" 30 #include "skl-tplg-interface.h" 31 32 static int skl_alloc_dma_buf(struct device *dev, 33 struct snd_dma_buffer *dmab, size_t size) 34 { 35 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 36 struct hdac_bus *bus = ebus_to_hbus(ebus); 37 38 if (!bus) 39 return -ENODEV; 40 41 return bus->io_ops->dma_alloc_pages(bus, SNDRV_DMA_TYPE_DEV, size, dmab); 42 } 43 44 static int skl_free_dma_buf(struct device *dev, struct snd_dma_buffer *dmab) 45 { 46 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 47 struct hdac_bus *bus = ebus_to_hbus(ebus); 48 49 if (!bus) 50 return -ENODEV; 51 52 bus->io_ops->dma_free_pages(bus, dmab); 53 54 return 0; 55 } 56 57 #define NOTIFICATION_PARAM_ID 3 58 #define NOTIFICATION_MASK 0xf 59 60 /* disable notfication for underruns/overruns from firmware module */ 61 static void skl_dsp_enable_notification(struct skl_sst *ctx, bool enable) 62 { 63 struct notification_mask mask; 64 struct skl_ipc_large_config_msg msg = {0}; 65 66 mask.notify = NOTIFICATION_MASK; 67 mask.enable = enable; 68 69 msg.large_param_id = NOTIFICATION_PARAM_ID; 70 msg.param_data_size = sizeof(mask); 71 72 skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)&mask); 73 } 74 75 static int skl_dsp_setup_spib(struct device *dev, unsigned int size, 76 int stream_tag, int enable) 77 { 78 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 79 struct hdac_bus *bus = ebus_to_hbus(ebus); 80 struct hdac_stream *stream = snd_hdac_get_stream(bus, 81 SNDRV_PCM_STREAM_PLAYBACK, stream_tag); 82 struct hdac_ext_stream *estream; 83 84 if (!stream) 85 return -EINVAL; 86 87 estream = stream_to_hdac_ext_stream(stream); 88 /* enable/disable SPIB for this hdac stream */ 89 snd_hdac_ext_stream_spbcap_enable(ebus, enable, stream->index); 90 91 /* set the spib value */ 92 snd_hdac_ext_stream_set_spib(ebus, estream, size); 93 94 return 0; 95 } 96 97 static int skl_dsp_prepare(struct device *dev, unsigned int format, 98 unsigned int size, struct snd_dma_buffer *dmab) 99 { 100 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 101 struct hdac_bus *bus = ebus_to_hbus(ebus); 102 struct hdac_ext_stream *estream; 103 struct hdac_stream *stream; 104 struct snd_pcm_substream substream; 105 int ret; 106 107 if (!bus) 108 return -ENODEV; 109 110 memset(&substream, 0, sizeof(substream)); 111 substream.stream = SNDRV_PCM_STREAM_PLAYBACK; 112 113 estream = snd_hdac_ext_stream_assign(ebus, &substream, 114 HDAC_EXT_STREAM_TYPE_HOST); 115 if (!estream) 116 return -ENODEV; 117 118 stream = hdac_stream(estream); 119 120 /* assign decouple host dma channel */ 121 ret = snd_hdac_dsp_prepare(stream, format, size, dmab); 122 if (ret < 0) 123 return ret; 124 125 skl_dsp_setup_spib(dev, size, stream->stream_tag, true); 126 127 return stream->stream_tag; 128 } 129 130 static int skl_dsp_trigger(struct device *dev, bool start, int stream_tag) 131 { 132 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 133 struct hdac_stream *stream; 134 struct hdac_bus *bus = ebus_to_hbus(ebus); 135 136 if (!bus) 137 return -ENODEV; 138 139 stream = snd_hdac_get_stream(bus, 140 SNDRV_PCM_STREAM_PLAYBACK, stream_tag); 141 if (!stream) 142 return -EINVAL; 143 144 snd_hdac_dsp_trigger(stream, start); 145 146 return 0; 147 } 148 149 static int skl_dsp_cleanup(struct device *dev, 150 struct snd_dma_buffer *dmab, int stream_tag) 151 { 152 struct hdac_ext_bus *ebus = dev_get_drvdata(dev); 153 struct hdac_stream *stream; 154 struct hdac_ext_stream *estream; 155 struct hdac_bus *bus = ebus_to_hbus(ebus); 156 157 if (!bus) 158 return -ENODEV; 159 160 stream = snd_hdac_get_stream(bus, 161 SNDRV_PCM_STREAM_PLAYBACK, stream_tag); 162 if (!stream) 163 return -EINVAL; 164 165 estream = stream_to_hdac_ext_stream(stream); 166 skl_dsp_setup_spib(dev, 0, stream_tag, false); 167 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST); 168 169 snd_hdac_dsp_cleanup(stream, dmab); 170 171 return 0; 172 } 173 174 static struct skl_dsp_loader_ops skl_get_loader_ops(void) 175 { 176 struct skl_dsp_loader_ops loader_ops; 177 178 memset(&loader_ops, 0, sizeof(struct skl_dsp_loader_ops)); 179 180 loader_ops.alloc_dma_buf = skl_alloc_dma_buf; 181 loader_ops.free_dma_buf = skl_free_dma_buf; 182 183 return loader_ops; 184 }; 185 186 static struct skl_dsp_loader_ops bxt_get_loader_ops(void) 187 { 188 struct skl_dsp_loader_ops loader_ops; 189 190 memset(&loader_ops, 0, sizeof(loader_ops)); 191 192 loader_ops.alloc_dma_buf = skl_alloc_dma_buf; 193 loader_ops.free_dma_buf = skl_free_dma_buf; 194 loader_ops.prepare = skl_dsp_prepare; 195 loader_ops.trigger = skl_dsp_trigger; 196 loader_ops.cleanup = skl_dsp_cleanup; 197 198 return loader_ops; 199 }; 200 201 static const struct skl_dsp_ops dsp_ops[] = { 202 { 203 .id = 0x9d70, 204 .loader_ops = skl_get_loader_ops, 205 .init = skl_sst_dsp_init, 206 .init_fw = skl_sst_init_fw, 207 .cleanup = skl_sst_dsp_cleanup 208 }, 209 { 210 .id = 0x9d71, 211 .loader_ops = skl_get_loader_ops, 212 .init = skl_sst_dsp_init, 213 .init_fw = skl_sst_init_fw, 214 .cleanup = skl_sst_dsp_cleanup 215 }, 216 { 217 .id = 0x5a98, 218 .loader_ops = bxt_get_loader_ops, 219 .init = bxt_sst_dsp_init, 220 .init_fw = bxt_sst_init_fw, 221 .cleanup = bxt_sst_dsp_cleanup 222 }, 223 { 224 .id = 0x3198, 225 .loader_ops = bxt_get_loader_ops, 226 .init = bxt_sst_dsp_init, 227 .init_fw = bxt_sst_init_fw, 228 .cleanup = bxt_sst_dsp_cleanup 229 }, 230 }; 231 232 const struct skl_dsp_ops *skl_get_dsp_ops(int pci_id) 233 { 234 int i; 235 236 for (i = 0; i < ARRAY_SIZE(dsp_ops); i++) { 237 if (dsp_ops[i].id == pci_id) 238 return &dsp_ops[i]; 239 } 240 241 return NULL; 242 } 243 244 int skl_init_dsp(struct skl *skl) 245 { 246 void __iomem *mmio_base; 247 struct hdac_ext_bus *ebus = &skl->ebus; 248 struct hdac_bus *bus = ebus_to_hbus(ebus); 249 struct skl_dsp_loader_ops loader_ops; 250 int irq = bus->irq; 251 const struct skl_dsp_ops *ops; 252 int ret; 253 254 /* enable ppcap interrupt */ 255 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); 256 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true); 257 258 /* read the BAR of the ADSP MMIO */ 259 mmio_base = pci_ioremap_bar(skl->pci, 4); 260 if (mmio_base == NULL) { 261 dev_err(bus->dev, "ioremap error\n"); 262 return -ENXIO; 263 } 264 265 ops = skl_get_dsp_ops(skl->pci->device); 266 if (!ops) 267 return -EIO; 268 269 loader_ops = ops->loader_ops(); 270 ret = ops->init(bus->dev, mmio_base, irq, 271 skl->fw_name, loader_ops, 272 &skl->skl_sst); 273 274 if (ret < 0) 275 return ret; 276 277 dev_dbg(bus->dev, "dsp registration status=%d\n", ret); 278 279 return ret; 280 } 281 282 int skl_free_dsp(struct skl *skl) 283 { 284 struct hdac_ext_bus *ebus = &skl->ebus; 285 struct hdac_bus *bus = ebus_to_hbus(ebus); 286 struct skl_sst *ctx = skl->skl_sst; 287 const struct skl_dsp_ops *ops; 288 289 /* disable ppcap interrupt */ 290 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); 291 292 ops = skl_get_dsp_ops(skl->pci->device); 293 if (!ops) 294 return -EIO; 295 296 ops->cleanup(bus->dev, ctx); 297 298 if (ctx->dsp->addr.lpe) 299 iounmap(ctx->dsp->addr.lpe); 300 301 return 0; 302 } 303 304 /* 305 * In the case of "suspend_active" i.e, the Audio IP being active 306 * during system suspend, immediately excecute any pending D0i3 work 307 * before suspending. This is needed for the IP to work in low power 308 * mode during system suspend. In the case of normal suspend, cancel 309 * any pending D0i3 work. 310 */ 311 int skl_suspend_late_dsp(struct skl *skl) 312 { 313 struct skl_sst *ctx = skl->skl_sst; 314 struct delayed_work *dwork; 315 316 if (!ctx) 317 return 0; 318 319 dwork = &ctx->d0i3.work; 320 321 if (dwork->work.func) { 322 if (skl->supend_active) 323 flush_delayed_work(dwork); 324 else 325 cancel_delayed_work_sync(dwork); 326 } 327 328 return 0; 329 } 330 331 int skl_suspend_dsp(struct skl *skl) 332 { 333 struct skl_sst *ctx = skl->skl_sst; 334 int ret; 335 336 /* if ppcap is not supported return 0 */ 337 if (!skl->ebus.bus.ppcap) 338 return 0; 339 340 ret = skl_dsp_sleep(ctx->dsp); 341 if (ret < 0) 342 return ret; 343 344 /* disable ppcap interrupt */ 345 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, false); 346 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, false); 347 348 return 0; 349 } 350 351 int skl_resume_dsp(struct skl *skl) 352 { 353 struct skl_sst *ctx = skl->skl_sst; 354 int ret; 355 356 /* if ppcap is not supported return 0 */ 357 if (!skl->ebus.bus.ppcap) 358 return 0; 359 360 /* enable ppcap interrupt */ 361 snd_hdac_ext_bus_ppcap_enable(&skl->ebus, true); 362 snd_hdac_ext_bus_ppcap_int_enable(&skl->ebus, true); 363 364 /* check if DSP 1st boot is done */ 365 if (skl->skl_sst->is_first_boot == true) 366 return 0; 367 368 ret = skl_dsp_wake(ctx->dsp); 369 if (ret < 0) 370 return ret; 371 372 skl_dsp_enable_notification(skl->skl_sst, false); 373 return ret; 374 } 375 376 enum skl_bitdepth skl_get_bit_depth(int params) 377 { 378 switch (params) { 379 case 8: 380 return SKL_DEPTH_8BIT; 381 382 case 16: 383 return SKL_DEPTH_16BIT; 384 385 case 24: 386 return SKL_DEPTH_24BIT; 387 388 case 32: 389 return SKL_DEPTH_32BIT; 390 391 default: 392 return SKL_DEPTH_INVALID; 393 394 } 395 } 396 397 /* 398 * Each module in DSP expects a base module configuration, which consists of 399 * PCM format information, which we calculate in driver and resource values 400 * which are read from widget information passed through topology binary 401 * This is send when we create a module with INIT_INSTANCE IPC msg 402 */ 403 static void skl_set_base_module_format(struct skl_sst *ctx, 404 struct skl_module_cfg *mconfig, 405 struct skl_base_cfg *base_cfg) 406 { 407 struct skl_module_fmt *format = &mconfig->in_fmt[0]; 408 409 base_cfg->audio_fmt.number_of_channels = (u8)format->channels; 410 411 base_cfg->audio_fmt.s_freq = format->s_freq; 412 base_cfg->audio_fmt.bit_depth = format->bit_depth; 413 base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth; 414 base_cfg->audio_fmt.ch_cfg = format->ch_cfg; 415 416 dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n", 417 format->bit_depth, format->valid_bit_depth, 418 format->ch_cfg); 419 420 base_cfg->audio_fmt.channel_map = format->ch_map; 421 422 base_cfg->audio_fmt.interleaving = format->interleaving_style; 423 424 base_cfg->cps = mconfig->mcps; 425 base_cfg->ibs = mconfig->ibs; 426 base_cfg->obs = mconfig->obs; 427 base_cfg->is_pages = mconfig->mem_pages; 428 } 429 430 /* 431 * Copies copier capabilities into copier module and updates copier module 432 * config size. 433 */ 434 static void skl_copy_copier_caps(struct skl_module_cfg *mconfig, 435 struct skl_cpr_cfg *cpr_mconfig) 436 { 437 if (mconfig->formats_config.caps_size == 0) 438 return; 439 440 memcpy(cpr_mconfig->gtw_cfg.config_data, 441 mconfig->formats_config.caps, 442 mconfig->formats_config.caps_size); 443 444 cpr_mconfig->gtw_cfg.config_length = 445 (mconfig->formats_config.caps_size) / 4; 446 } 447 448 #define SKL_NON_GATEWAY_CPR_NODE_ID 0xFFFFFFFF 449 /* 450 * Calculate the gatewat settings required for copier module, type of 451 * gateway and index of gateway to use 452 */ 453 static u32 skl_get_node_id(struct skl_sst *ctx, 454 struct skl_module_cfg *mconfig) 455 { 456 union skl_connector_node_id node_id = {0}; 457 union skl_ssp_dma_node ssp_node = {0}; 458 struct skl_pipe_params *params = mconfig->pipe->p_params; 459 460 switch (mconfig->dev_type) { 461 case SKL_DEVICE_BT: 462 node_id.node.dma_type = 463 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? 464 SKL_DMA_I2S_LINK_OUTPUT_CLASS : 465 SKL_DMA_I2S_LINK_INPUT_CLASS; 466 node_id.node.vindex = params->host_dma_id + 467 (mconfig->vbus_id << 3); 468 break; 469 470 case SKL_DEVICE_I2S: 471 node_id.node.dma_type = 472 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? 473 SKL_DMA_I2S_LINK_OUTPUT_CLASS : 474 SKL_DMA_I2S_LINK_INPUT_CLASS; 475 ssp_node.dma_node.time_slot_index = mconfig->time_slot; 476 ssp_node.dma_node.i2s_instance = mconfig->vbus_id; 477 node_id.node.vindex = ssp_node.val; 478 break; 479 480 case SKL_DEVICE_DMIC: 481 node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS; 482 node_id.node.vindex = mconfig->vbus_id + 483 (mconfig->time_slot); 484 break; 485 486 case SKL_DEVICE_HDALINK: 487 node_id.node.dma_type = 488 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? 489 SKL_DMA_HDA_LINK_OUTPUT_CLASS : 490 SKL_DMA_HDA_LINK_INPUT_CLASS; 491 node_id.node.vindex = params->link_dma_id; 492 break; 493 494 case SKL_DEVICE_HDAHOST: 495 node_id.node.dma_type = 496 (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? 497 SKL_DMA_HDA_HOST_OUTPUT_CLASS : 498 SKL_DMA_HDA_HOST_INPUT_CLASS; 499 node_id.node.vindex = params->host_dma_id; 500 break; 501 502 default: 503 node_id.val = 0xFFFFFFFF; 504 break; 505 } 506 507 return node_id.val; 508 } 509 510 static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, 511 struct skl_module_cfg *mconfig, 512 struct skl_cpr_cfg *cpr_mconfig) 513 { 514 cpr_mconfig->gtw_cfg.node_id = skl_get_node_id(ctx, mconfig); 515 516 if (cpr_mconfig->gtw_cfg.node_id == SKL_NON_GATEWAY_CPR_NODE_ID) { 517 cpr_mconfig->cpr_feature_mask = 0; 518 return; 519 } 520 521 if (SKL_CONN_SOURCE == mconfig->hw_conn_type) 522 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs; 523 else 524 cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs; 525 526 cpr_mconfig->cpr_feature_mask = 0; 527 cpr_mconfig->gtw_cfg.config_length = 0; 528 529 skl_copy_copier_caps(mconfig, cpr_mconfig); 530 } 531 532 #define DMA_CONTROL_ID 5 533 534 int skl_dsp_set_dma_control(struct skl_sst *ctx, struct skl_module_cfg *mconfig) 535 { 536 struct skl_dma_control *dma_ctrl; 537 struct skl_ipc_large_config_msg msg = {0}; 538 int err = 0; 539 540 541 /* 542 * if blob size zero, then return 543 */ 544 if (mconfig->formats_config.caps_size == 0) 545 return 0; 546 547 msg.large_param_id = DMA_CONTROL_ID; 548 msg.param_data_size = sizeof(struct skl_dma_control) + 549 mconfig->formats_config.caps_size; 550 551 dma_ctrl = kzalloc(msg.param_data_size, GFP_KERNEL); 552 if (dma_ctrl == NULL) 553 return -ENOMEM; 554 555 dma_ctrl->node_id = skl_get_node_id(ctx, mconfig); 556 557 /* size in dwords */ 558 dma_ctrl->config_length = mconfig->formats_config.caps_size / 4; 559 560 memcpy(dma_ctrl->config_data, mconfig->formats_config.caps, 561 mconfig->formats_config.caps_size); 562 563 err = skl_ipc_set_large_config(&ctx->ipc, &msg, (u32 *)dma_ctrl); 564 565 kfree(dma_ctrl); 566 return err; 567 } 568 569 static void skl_setup_out_format(struct skl_sst *ctx, 570 struct skl_module_cfg *mconfig, 571 struct skl_audio_data_format *out_fmt) 572 { 573 struct skl_module_fmt *format = &mconfig->out_fmt[0]; 574 575 out_fmt->number_of_channels = (u8)format->channels; 576 out_fmt->s_freq = format->s_freq; 577 out_fmt->bit_depth = format->bit_depth; 578 out_fmt->valid_bit_depth = format->valid_bit_depth; 579 out_fmt->ch_cfg = format->ch_cfg; 580 581 out_fmt->channel_map = format->ch_map; 582 out_fmt->interleaving = format->interleaving_style; 583 out_fmt->sample_type = format->sample_type; 584 585 dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n", 586 out_fmt->number_of_channels, format->s_freq, format->bit_depth); 587 } 588 589 /* 590 * DSP needs SRC module for frequency conversion, SRC takes base module 591 * configuration and the target frequency as extra parameter passed as src 592 * config 593 */ 594 static void skl_set_src_format(struct skl_sst *ctx, 595 struct skl_module_cfg *mconfig, 596 struct skl_src_module_cfg *src_mconfig) 597 { 598 struct skl_module_fmt *fmt = &mconfig->out_fmt[0]; 599 600 skl_set_base_module_format(ctx, mconfig, 601 (struct skl_base_cfg *)src_mconfig); 602 603 src_mconfig->src_cfg = fmt->s_freq; 604 } 605 606 /* 607 * DSP needs updown module to do channel conversion. updown module take base 608 * module configuration and channel configuration 609 * It also take coefficients and now we have defaults applied here 610 */ 611 static void skl_set_updown_mixer_format(struct skl_sst *ctx, 612 struct skl_module_cfg *mconfig, 613 struct skl_up_down_mixer_cfg *mixer_mconfig) 614 { 615 struct skl_module_fmt *fmt = &mconfig->out_fmt[0]; 616 int i = 0; 617 618 skl_set_base_module_format(ctx, mconfig, 619 (struct skl_base_cfg *)mixer_mconfig); 620 mixer_mconfig->out_ch_cfg = fmt->ch_cfg; 621 622 /* Select F/W default coefficient */ 623 mixer_mconfig->coeff_sel = 0x0; 624 625 /* User coeff, don't care since we are selecting F/W defaults */ 626 for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++) 627 mixer_mconfig->coeff[i] = 0xDEADBEEF; 628 } 629 630 /* 631 * 'copier' is DSP internal module which copies data from Host DMA (HDA host 632 * dma) or link (hda link, SSP, PDM) 633 * Here we calculate the copier module parameters, like PCM format, output 634 * format, gateway settings 635 * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg 636 */ 637 static void skl_set_copier_format(struct skl_sst *ctx, 638 struct skl_module_cfg *mconfig, 639 struct skl_cpr_cfg *cpr_mconfig) 640 { 641 struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt; 642 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig; 643 644 skl_set_base_module_format(ctx, mconfig, base_cfg); 645 646 skl_setup_out_format(ctx, mconfig, out_fmt); 647 skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig); 648 } 649 650 /* 651 * Algo module are DSP pre processing modules. Algo module take base module 652 * configuration and params 653 */ 654 655 static void skl_set_algo_format(struct skl_sst *ctx, 656 struct skl_module_cfg *mconfig, 657 struct skl_algo_cfg *algo_mcfg) 658 { 659 struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)algo_mcfg; 660 661 skl_set_base_module_format(ctx, mconfig, base_cfg); 662 663 if (mconfig->formats_config.caps_size == 0) 664 return; 665 666 memcpy(algo_mcfg->params, 667 mconfig->formats_config.caps, 668 mconfig->formats_config.caps_size); 669 670 } 671 672 /* 673 * Mic select module allows selecting one or many input channels, thus 674 * acting as a demux. 675 * 676 * Mic select module take base module configuration and out-format 677 * configuration 678 */ 679 static void skl_set_base_outfmt_format(struct skl_sst *ctx, 680 struct skl_module_cfg *mconfig, 681 struct skl_base_outfmt_cfg *base_outfmt_mcfg) 682 { 683 struct skl_audio_data_format *out_fmt = &base_outfmt_mcfg->out_fmt; 684 struct skl_base_cfg *base_cfg = 685 (struct skl_base_cfg *)base_outfmt_mcfg; 686 687 skl_set_base_module_format(ctx, mconfig, base_cfg); 688 skl_setup_out_format(ctx, mconfig, out_fmt); 689 } 690 691 static u16 skl_get_module_param_size(struct skl_sst *ctx, 692 struct skl_module_cfg *mconfig) 693 { 694 u16 param_size; 695 696 switch (mconfig->m_type) { 697 case SKL_MODULE_TYPE_COPIER: 698 param_size = sizeof(struct skl_cpr_cfg); 699 param_size += mconfig->formats_config.caps_size; 700 return param_size; 701 702 case SKL_MODULE_TYPE_SRCINT: 703 return sizeof(struct skl_src_module_cfg); 704 705 case SKL_MODULE_TYPE_UPDWMIX: 706 return sizeof(struct skl_up_down_mixer_cfg); 707 708 case SKL_MODULE_TYPE_ALGO: 709 param_size = sizeof(struct skl_base_cfg); 710 param_size += mconfig->formats_config.caps_size; 711 return param_size; 712 713 case SKL_MODULE_TYPE_BASE_OUTFMT: 714 case SKL_MODULE_TYPE_KPB: 715 return sizeof(struct skl_base_outfmt_cfg); 716 717 default: 718 /* 719 * return only base cfg when no specific module type is 720 * specified 721 */ 722 return sizeof(struct skl_base_cfg); 723 } 724 725 return 0; 726 } 727 728 /* 729 * DSP firmware supports various modules like copier, SRC, updown etc. 730 * These modules required various parameters to be calculated and sent for 731 * the module initialization to DSP. By default a generic module needs only 732 * base module format configuration 733 */ 734 735 static int skl_set_module_format(struct skl_sst *ctx, 736 struct skl_module_cfg *module_config, 737 u16 *module_config_size, 738 void **param_data) 739 { 740 u16 param_size; 741 742 param_size = skl_get_module_param_size(ctx, module_config); 743 744 *param_data = kzalloc(param_size, GFP_KERNEL); 745 if (NULL == *param_data) 746 return -ENOMEM; 747 748 *module_config_size = param_size; 749 750 switch (module_config->m_type) { 751 case SKL_MODULE_TYPE_COPIER: 752 skl_set_copier_format(ctx, module_config, *param_data); 753 break; 754 755 case SKL_MODULE_TYPE_SRCINT: 756 skl_set_src_format(ctx, module_config, *param_data); 757 break; 758 759 case SKL_MODULE_TYPE_UPDWMIX: 760 skl_set_updown_mixer_format(ctx, module_config, *param_data); 761 break; 762 763 case SKL_MODULE_TYPE_ALGO: 764 skl_set_algo_format(ctx, module_config, *param_data); 765 break; 766 767 case SKL_MODULE_TYPE_BASE_OUTFMT: 768 case SKL_MODULE_TYPE_KPB: 769 skl_set_base_outfmt_format(ctx, module_config, *param_data); 770 break; 771 772 default: 773 skl_set_base_module_format(ctx, module_config, *param_data); 774 break; 775 776 } 777 778 dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n", 779 module_config->id.module_id, param_size); 780 print_hex_dump_debug("Module params:", DUMP_PREFIX_OFFSET, 8, 4, 781 *param_data, param_size, false); 782 return 0; 783 } 784 785 static int skl_get_queue_index(struct skl_module_pin *mpin, 786 struct skl_module_inst_id id, int max) 787 { 788 int i; 789 790 for (i = 0; i < max; i++) { 791 if (mpin[i].id.module_id == id.module_id && 792 mpin[i].id.instance_id == id.instance_id) 793 return i; 794 } 795 796 return -EINVAL; 797 } 798 799 /* 800 * Allocates queue for each module. 801 * if dynamic, the pin_index is allocated 0 to max_pin. 802 * In static, the pin_index is fixed based on module_id and instance id 803 */ 804 static int skl_alloc_queue(struct skl_module_pin *mpin, 805 struct skl_module_cfg *tgt_cfg, int max) 806 { 807 int i; 808 struct skl_module_inst_id id = tgt_cfg->id; 809 /* 810 * if pin in dynamic, find first free pin 811 * otherwise find match module and instance id pin as topology will 812 * ensure a unique pin is assigned to this so no need to 813 * allocate/free 814 */ 815 for (i = 0; i < max; i++) { 816 if (mpin[i].is_dynamic) { 817 if (!mpin[i].in_use && 818 mpin[i].pin_state == SKL_PIN_UNBIND) { 819 820 mpin[i].in_use = true; 821 mpin[i].id.module_id = id.module_id; 822 mpin[i].id.instance_id = id.instance_id; 823 mpin[i].id.pvt_id = id.pvt_id; 824 mpin[i].tgt_mcfg = tgt_cfg; 825 return i; 826 } 827 } else { 828 if (mpin[i].id.module_id == id.module_id && 829 mpin[i].id.instance_id == id.instance_id && 830 mpin[i].pin_state == SKL_PIN_UNBIND) { 831 832 mpin[i].tgt_mcfg = tgt_cfg; 833 return i; 834 } 835 } 836 } 837 838 return -EINVAL; 839 } 840 841 static void skl_free_queue(struct skl_module_pin *mpin, int q_index) 842 { 843 if (mpin[q_index].is_dynamic) { 844 mpin[q_index].in_use = false; 845 mpin[q_index].id.module_id = 0; 846 mpin[q_index].id.instance_id = 0; 847 mpin[q_index].id.pvt_id = 0; 848 } 849 mpin[q_index].pin_state = SKL_PIN_UNBIND; 850 mpin[q_index].tgt_mcfg = NULL; 851 } 852 853 /* Module state will be set to unint, if all the out pin state is UNBIND */ 854 855 static void skl_clear_module_state(struct skl_module_pin *mpin, int max, 856 struct skl_module_cfg *mcfg) 857 { 858 int i; 859 bool found = false; 860 861 for (i = 0; i < max; i++) { 862 if (mpin[i].pin_state == SKL_PIN_UNBIND) 863 continue; 864 found = true; 865 break; 866 } 867 868 if (!found) 869 mcfg->m_state = SKL_MODULE_UNINIT; 870 return; 871 } 872 873 /* 874 * A module needs to be instanataited in DSP. A mdoule is present in a 875 * collection of module referred as a PIPE. 876 * We first calculate the module format, based on module type and then 877 * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper 878 */ 879 int skl_init_module(struct skl_sst *ctx, 880 struct skl_module_cfg *mconfig) 881 { 882 u16 module_config_size = 0; 883 void *param_data = NULL; 884 int ret; 885 struct skl_ipc_init_instance_msg msg; 886 887 dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__, 888 mconfig->id.module_id, mconfig->id.pvt_id); 889 890 if (mconfig->pipe->state != SKL_PIPE_CREATED) { 891 dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n", 892 mconfig->pipe->state, mconfig->pipe->ppl_id); 893 return -EIO; 894 } 895 896 ret = skl_set_module_format(ctx, mconfig, 897 &module_config_size, ¶m_data); 898 if (ret < 0) { 899 dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret); 900 return ret; 901 } 902 903 msg.module_id = mconfig->id.module_id; 904 msg.instance_id = mconfig->id.pvt_id; 905 msg.ppl_instance_id = mconfig->pipe->ppl_id; 906 msg.param_data_size = module_config_size; 907 msg.core_id = mconfig->core_id; 908 msg.domain = mconfig->domain; 909 910 ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data); 911 if (ret < 0) { 912 dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret); 913 kfree(param_data); 914 return ret; 915 } 916 mconfig->m_state = SKL_MODULE_INIT_DONE; 917 kfree(param_data); 918 return ret; 919 } 920 921 static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg 922 *src_module, struct skl_module_cfg *dst_module) 923 { 924 dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n", 925 __func__, src_module->id.module_id, src_module->id.pvt_id); 926 dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__, 927 dst_module->id.module_id, dst_module->id.pvt_id); 928 929 dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n", 930 src_module->m_state, dst_module->m_state); 931 } 932 933 /* 934 * On module freeup, we need to unbind the module with modules 935 * it is already bind. 936 * Find the pin allocated and unbind then using bind_unbind IPC 937 */ 938 int skl_unbind_modules(struct skl_sst *ctx, 939 struct skl_module_cfg *src_mcfg, 940 struct skl_module_cfg *dst_mcfg) 941 { 942 int ret; 943 struct skl_ipc_bind_unbind_msg msg; 944 struct skl_module_inst_id src_id = src_mcfg->id; 945 struct skl_module_inst_id dst_id = dst_mcfg->id; 946 int in_max = dst_mcfg->max_in_queue; 947 int out_max = src_mcfg->max_out_queue; 948 int src_index, dst_index, src_pin_state, dst_pin_state; 949 950 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); 951 952 /* get src queue index */ 953 src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max); 954 if (src_index < 0) 955 return 0; 956 957 msg.src_queue = src_index; 958 959 /* get dst queue index */ 960 dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max); 961 if (dst_index < 0) 962 return 0; 963 964 msg.dst_queue = dst_index; 965 966 src_pin_state = src_mcfg->m_out_pin[src_index].pin_state; 967 dst_pin_state = dst_mcfg->m_in_pin[dst_index].pin_state; 968 969 if (src_pin_state != SKL_PIN_BIND_DONE || 970 dst_pin_state != SKL_PIN_BIND_DONE) 971 return 0; 972 973 msg.module_id = src_mcfg->id.module_id; 974 msg.instance_id = src_mcfg->id.pvt_id; 975 msg.dst_module_id = dst_mcfg->id.module_id; 976 msg.dst_instance_id = dst_mcfg->id.pvt_id; 977 msg.bind = false; 978 979 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); 980 if (!ret) { 981 /* free queue only if unbind is success */ 982 skl_free_queue(src_mcfg->m_out_pin, src_index); 983 skl_free_queue(dst_mcfg->m_in_pin, dst_index); 984 985 /* 986 * check only if src module bind state, bind is 987 * always from src -> sink 988 */ 989 skl_clear_module_state(src_mcfg->m_out_pin, out_max, src_mcfg); 990 } 991 992 return ret; 993 } 994 995 /* 996 * Once a module is instantiated it need to be 'bind' with other modules in 997 * the pipeline. For binding we need to find the module pins which are bind 998 * together 999 * This function finds the pins and then sends bund_unbind IPC message to 1000 * DSP using IPC helper 1001 */ 1002 int skl_bind_modules(struct skl_sst *ctx, 1003 struct skl_module_cfg *src_mcfg, 1004 struct skl_module_cfg *dst_mcfg) 1005 { 1006 int ret; 1007 struct skl_ipc_bind_unbind_msg msg; 1008 int in_max = dst_mcfg->max_in_queue; 1009 int out_max = src_mcfg->max_out_queue; 1010 int src_index, dst_index; 1011 1012 skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); 1013 1014 if (src_mcfg->m_state < SKL_MODULE_INIT_DONE || 1015 dst_mcfg->m_state < SKL_MODULE_INIT_DONE) 1016 return 0; 1017 1018 src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_mcfg, out_max); 1019 if (src_index < 0) 1020 return -EINVAL; 1021 1022 msg.src_queue = src_index; 1023 dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_mcfg, in_max); 1024 if (dst_index < 0) { 1025 skl_free_queue(src_mcfg->m_out_pin, src_index); 1026 return -EINVAL; 1027 } 1028 1029 msg.dst_queue = dst_index; 1030 1031 dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n", 1032 msg.src_queue, msg.dst_queue); 1033 1034 msg.module_id = src_mcfg->id.module_id; 1035 msg.instance_id = src_mcfg->id.pvt_id; 1036 msg.dst_module_id = dst_mcfg->id.module_id; 1037 msg.dst_instance_id = dst_mcfg->id.pvt_id; 1038 msg.bind = true; 1039 1040 ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); 1041 1042 if (!ret) { 1043 src_mcfg->m_state = SKL_MODULE_BIND_DONE; 1044 src_mcfg->m_out_pin[src_index].pin_state = SKL_PIN_BIND_DONE; 1045 dst_mcfg->m_in_pin[dst_index].pin_state = SKL_PIN_BIND_DONE; 1046 } else { 1047 /* error case , if IPC fails, clear the queue index */ 1048 skl_free_queue(src_mcfg->m_out_pin, src_index); 1049 skl_free_queue(dst_mcfg->m_in_pin, dst_index); 1050 } 1051 1052 return ret; 1053 } 1054 1055 static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe, 1056 enum skl_ipc_pipeline_state state) 1057 { 1058 dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state); 1059 1060 return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state); 1061 } 1062 1063 /* 1064 * A pipeline is a collection of modules. Before a module in instantiated a 1065 * pipeline needs to be created for it. 1066 * This function creates pipeline, by sending create pipeline IPC messages 1067 * to FW 1068 */ 1069 int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe) 1070 { 1071 int ret; 1072 1073 dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id); 1074 1075 ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages, 1076 pipe->pipe_priority, pipe->ppl_id, 1077 pipe->lp_mode); 1078 if (ret < 0) { 1079 dev_err(ctx->dev, "Failed to create pipeline\n"); 1080 return ret; 1081 } 1082 1083 pipe->state = SKL_PIPE_CREATED; 1084 1085 return 0; 1086 } 1087 1088 /* 1089 * A pipeline needs to be deleted on cleanup. If a pipeline is running, then 1090 * pause the pipeline first and then delete it 1091 * The pipe delete is done by sending delete pipeline IPC. DSP will stop the 1092 * DMA engines and releases resources 1093 */ 1094 int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) 1095 { 1096 int ret; 1097 1098 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id); 1099 1100 /* If pipe is started, do stop the pipe in FW. */ 1101 if (pipe->state > SKL_PIPE_STARTED) { 1102 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); 1103 if (ret < 0) { 1104 dev_err(ctx->dev, "Failed to stop pipeline\n"); 1105 return ret; 1106 } 1107 1108 pipe->state = SKL_PIPE_PAUSED; 1109 } 1110 1111 /* If pipe was not created in FW, do not try to delete it */ 1112 if (pipe->state < SKL_PIPE_CREATED) 1113 return 0; 1114 1115 ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id); 1116 if (ret < 0) { 1117 dev_err(ctx->dev, "Failed to delete pipeline\n"); 1118 return ret; 1119 } 1120 1121 pipe->state = SKL_PIPE_INVALID; 1122 1123 return ret; 1124 } 1125 1126 /* 1127 * A pipeline is also a scheduling entity in DSP which can be run, stopped 1128 * For processing data the pipe need to be run by sending IPC set pipe state 1129 * to DSP 1130 */ 1131 int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) 1132 { 1133 int ret; 1134 1135 dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id); 1136 1137 /* If pipe was not created in FW, do not try to pause or delete */ 1138 if (pipe->state < SKL_PIPE_CREATED) 1139 return 0; 1140 1141 /* Pipe has to be paused before it is started */ 1142 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); 1143 if (ret < 0) { 1144 dev_err(ctx->dev, "Failed to pause pipe\n"); 1145 return ret; 1146 } 1147 1148 pipe->state = SKL_PIPE_PAUSED; 1149 1150 ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING); 1151 if (ret < 0) { 1152 dev_err(ctx->dev, "Failed to start pipe\n"); 1153 return ret; 1154 } 1155 1156 pipe->state = SKL_PIPE_STARTED; 1157 1158 return 0; 1159 } 1160 1161 /* 1162 * Stop the pipeline by sending set pipe state IPC 1163 * DSP doesnt implement stop so we always send pause message 1164 */ 1165 int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) 1166 { 1167 int ret; 1168 1169 dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id); 1170 1171 /* If pipe was not created in FW, do not try to pause or delete */ 1172 if (pipe->state < SKL_PIPE_PAUSED) 1173 return 0; 1174 1175 ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); 1176 if (ret < 0) { 1177 dev_dbg(ctx->dev, "Failed to stop pipe\n"); 1178 return ret; 1179 } 1180 1181 pipe->state = SKL_PIPE_PAUSED; 1182 1183 return 0; 1184 } 1185 1186 /* 1187 * Reset the pipeline by sending set pipe state IPC this will reset the DMA 1188 * from the DSP side 1189 */ 1190 int skl_reset_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) 1191 { 1192 int ret; 1193 1194 /* If pipe was not created in FW, do not try to pause or delete */ 1195 if (pipe->state < SKL_PIPE_PAUSED) 1196 return 0; 1197 1198 ret = skl_set_pipe_state(ctx, pipe, PPL_RESET); 1199 if (ret < 0) { 1200 dev_dbg(ctx->dev, "Failed to reset pipe ret=%d\n", ret); 1201 return ret; 1202 } 1203 1204 pipe->state = SKL_PIPE_RESET; 1205 1206 return 0; 1207 } 1208 1209 /* Algo parameter set helper function */ 1210 int skl_set_module_params(struct skl_sst *ctx, u32 *params, int size, 1211 u32 param_id, struct skl_module_cfg *mcfg) 1212 { 1213 struct skl_ipc_large_config_msg msg; 1214 1215 msg.module_id = mcfg->id.module_id; 1216 msg.instance_id = mcfg->id.pvt_id; 1217 msg.param_data_size = size; 1218 msg.large_param_id = param_id; 1219 1220 return skl_ipc_set_large_config(&ctx->ipc, &msg, params); 1221 } 1222 1223 int skl_get_module_params(struct skl_sst *ctx, u32 *params, int size, 1224 u32 param_id, struct skl_module_cfg *mcfg) 1225 { 1226 struct skl_ipc_large_config_msg msg; 1227 1228 msg.module_id = mcfg->id.module_id; 1229 msg.instance_id = mcfg->id.pvt_id; 1230 msg.param_data_size = size; 1231 msg.large_param_id = param_id; 1232 1233 return skl_ipc_get_large_config(&ctx->ipc, &msg, params); 1234 } 1235