147d7195dSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2cb6a5528SGuneshwor Singh /*
3cb6a5528SGuneshwor Singh * cnl-sst.c - DSP library functions for CNL platform
4cb6a5528SGuneshwor Singh *
5cb6a5528SGuneshwor Singh * Copyright (C) 2016-17, Intel Corporation.
6cb6a5528SGuneshwor Singh *
7cb6a5528SGuneshwor Singh * Author: Guneshwor Singh <guneshwor.o.singh@intel.com>
8cb6a5528SGuneshwor Singh *
9cb6a5528SGuneshwor Singh * Modified from:
10cb6a5528SGuneshwor Singh * HDA DSP library functions for SKL platform
11cb6a5528SGuneshwor Singh * Copyright (C) 2014-15, Intel Corporation.
12cb6a5528SGuneshwor Singh *
13cb6a5528SGuneshwor Singh * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14cb6a5528SGuneshwor Singh *
15cb6a5528SGuneshwor Singh * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
16cb6a5528SGuneshwor Singh */
17cb6a5528SGuneshwor Singh
18cb6a5528SGuneshwor Singh #include <linux/module.h>
19cb6a5528SGuneshwor Singh #include <linux/delay.h>
20cb6a5528SGuneshwor Singh #include <linux/firmware.h>
21cb6a5528SGuneshwor Singh #include <linux/device.h>
22cb6a5528SGuneshwor Singh
23cb6a5528SGuneshwor Singh #include "../common/sst-dsp.h"
24cb6a5528SGuneshwor Singh #include "../common/sst-dsp-priv.h"
25cb6a5528SGuneshwor Singh #include "../common/sst-ipc.h"
26cb6a5528SGuneshwor Singh #include "cnl-sst-dsp.h"
27bcc2a2dcSCezary Rojewski #include "skl.h"
28cb6a5528SGuneshwor Singh
29cb6a5528SGuneshwor Singh #define CNL_FW_ROM_INIT 0x1
30cb6a5528SGuneshwor Singh #define CNL_FW_INIT 0x5
31cb6a5528SGuneshwor Singh #define CNL_IPC_PURGE 0x01004000
32cb6a5528SGuneshwor Singh #define CNL_INIT_TIMEOUT 300
33cb6a5528SGuneshwor Singh #define CNL_BASEFW_TIMEOUT 3000
34cb6a5528SGuneshwor Singh
35cb6a5528SGuneshwor Singh #define CNL_ADSP_SRAM0_BASE 0x80000
36cb6a5528SGuneshwor Singh
37cb6a5528SGuneshwor Singh /* Firmware status window */
38cb6a5528SGuneshwor Singh #define CNL_ADSP_FW_STATUS CNL_ADSP_SRAM0_BASE
39cb6a5528SGuneshwor Singh #define CNL_ADSP_ERROR_CODE (CNL_ADSP_FW_STATUS + 0x4)
40cb6a5528SGuneshwor Singh
41cb6a5528SGuneshwor Singh #define CNL_INSTANCE_ID 0
42cb6a5528SGuneshwor Singh #define CNL_BASE_FW_MODULE_ID 0
43cb6a5528SGuneshwor Singh #define CNL_ADSP_FW_HDR_OFFSET 0x2000
44cb6a5528SGuneshwor Singh #define CNL_ROM_CTRL_DMA_ID 0x9
45cb6a5528SGuneshwor Singh
cnl_prepare_fw(struct sst_dsp * ctx,const void * fwdata,u32 fwsize)46cb6a5528SGuneshwor Singh static int cnl_prepare_fw(struct sst_dsp *ctx, const void *fwdata, u32 fwsize)
47cb6a5528SGuneshwor Singh {
48cb6a5528SGuneshwor Singh
49cb6a5528SGuneshwor Singh int ret, stream_tag;
50cb6a5528SGuneshwor Singh
51cb6a5528SGuneshwor Singh stream_tag = ctx->dsp_ops.prepare(ctx->dev, 0x40, fwsize, &ctx->dmab);
52cb6a5528SGuneshwor Singh if (stream_tag <= 0) {
53cb6a5528SGuneshwor Singh dev_err(ctx->dev, "dma prepare failed: 0%#x\n", stream_tag);
54cb6a5528SGuneshwor Singh return stream_tag;
55cb6a5528SGuneshwor Singh }
56cb6a5528SGuneshwor Singh
57cb6a5528SGuneshwor Singh ctx->dsp_ops.stream_tag = stream_tag;
58cb6a5528SGuneshwor Singh memcpy(ctx->dmab.area, fwdata, fwsize);
59cb6a5528SGuneshwor Singh
607693cadaSCezary Rojewski ret = skl_dsp_core_power_up(ctx, SKL_DSP_CORE0_MASK);
617693cadaSCezary Rojewski if (ret < 0) {
627693cadaSCezary Rojewski dev_err(ctx->dev, "dsp core0 power up failed\n");
637693cadaSCezary Rojewski ret = -EIO;
647693cadaSCezary Rojewski goto base_fw_load_failed;
657693cadaSCezary Rojewski }
667693cadaSCezary Rojewski
67cb6a5528SGuneshwor Singh /* purge FW request */
68cb6a5528SGuneshwor Singh sst_dsp_shim_write(ctx, CNL_ADSP_REG_HIPCIDR,
69cb6a5528SGuneshwor Singh CNL_ADSP_REG_HIPCIDR_BUSY | (CNL_IPC_PURGE |
70cb6a5528SGuneshwor Singh ((stream_tag - 1) << CNL_ROM_CTRL_DMA_ID)));
71cb6a5528SGuneshwor Singh
727693cadaSCezary Rojewski ret = skl_dsp_start_core(ctx, SKL_DSP_CORE0_MASK);
73cb6a5528SGuneshwor Singh if (ret < 0) {
747693cadaSCezary Rojewski dev_err(ctx->dev, "Start dsp core failed ret: %d\n", ret);
75cb6a5528SGuneshwor Singh ret = -EIO;
76cb6a5528SGuneshwor Singh goto base_fw_load_failed;
77cb6a5528SGuneshwor Singh }
78cb6a5528SGuneshwor Singh
797693cadaSCezary Rojewski ret = sst_dsp_register_poll(ctx, CNL_ADSP_REG_HIPCIDA,
807693cadaSCezary Rojewski CNL_ADSP_REG_HIPCIDA_DONE,
817693cadaSCezary Rojewski CNL_ADSP_REG_HIPCIDA_DONE,
827693cadaSCezary Rojewski BXT_INIT_TIMEOUT, "HIPCIDA Done");
837693cadaSCezary Rojewski if (ret < 0) {
847693cadaSCezary Rojewski dev_err(ctx->dev, "timeout for purge request: %d\n", ret);
857693cadaSCezary Rojewski goto base_fw_load_failed;
867693cadaSCezary Rojewski }
877693cadaSCezary Rojewski
88cb6a5528SGuneshwor Singh /* enable interrupt */
89cb6a5528SGuneshwor Singh cnl_ipc_int_enable(ctx);
90cb6a5528SGuneshwor Singh cnl_ipc_op_int_enable(ctx);
91cb6a5528SGuneshwor Singh
92cb6a5528SGuneshwor Singh ret = sst_dsp_register_poll(ctx, CNL_ADSP_FW_STATUS, CNL_FW_STS_MASK,
93cb6a5528SGuneshwor Singh CNL_FW_ROM_INIT, CNL_INIT_TIMEOUT,
94cb6a5528SGuneshwor Singh "rom load");
95cb6a5528SGuneshwor Singh if (ret < 0) {
96cb6a5528SGuneshwor Singh dev_err(ctx->dev, "rom init timeout, ret: %d\n", ret);
97cb6a5528SGuneshwor Singh goto base_fw_load_failed;
98cb6a5528SGuneshwor Singh }
99cb6a5528SGuneshwor Singh
100cb6a5528SGuneshwor Singh return 0;
101cb6a5528SGuneshwor Singh
102cb6a5528SGuneshwor Singh base_fw_load_failed:
103cb6a5528SGuneshwor Singh ctx->dsp_ops.cleanup(ctx->dev, &ctx->dmab, stream_tag);
104cb6a5528SGuneshwor Singh cnl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
105cb6a5528SGuneshwor Singh
106cb6a5528SGuneshwor Singh return ret;
107cb6a5528SGuneshwor Singh }
108cb6a5528SGuneshwor Singh
sst_transfer_fw_host_dma(struct sst_dsp * ctx)109cb6a5528SGuneshwor Singh static int sst_transfer_fw_host_dma(struct sst_dsp *ctx)
110cb6a5528SGuneshwor Singh {
111cb6a5528SGuneshwor Singh int ret;
112cb6a5528SGuneshwor Singh
113cb6a5528SGuneshwor Singh ctx->dsp_ops.trigger(ctx->dev, true, ctx->dsp_ops.stream_tag);
114cb6a5528SGuneshwor Singh ret = sst_dsp_register_poll(ctx, CNL_ADSP_FW_STATUS, CNL_FW_STS_MASK,
115cb6a5528SGuneshwor Singh CNL_FW_INIT, CNL_BASEFW_TIMEOUT,
116cb6a5528SGuneshwor Singh "firmware boot");
117cb6a5528SGuneshwor Singh
118cb6a5528SGuneshwor Singh ctx->dsp_ops.trigger(ctx->dev, false, ctx->dsp_ops.stream_tag);
119cb6a5528SGuneshwor Singh ctx->dsp_ops.cleanup(ctx->dev, &ctx->dmab, ctx->dsp_ops.stream_tag);
120cb6a5528SGuneshwor Singh
121cb6a5528SGuneshwor Singh return ret;
122cb6a5528SGuneshwor Singh }
123cb6a5528SGuneshwor Singh
cnl_load_base_firmware(struct sst_dsp * ctx)124cb6a5528SGuneshwor Singh static int cnl_load_base_firmware(struct sst_dsp *ctx)
125cb6a5528SGuneshwor Singh {
126cb6a5528SGuneshwor Singh struct firmware stripped_fw;
127bcc2a2dcSCezary Rojewski struct skl_dev *cnl = ctx->thread_context;
128024aa45fSCezary Rojewski int ret, i;
129cb6a5528SGuneshwor Singh
130cb6a5528SGuneshwor Singh if (!ctx->fw) {
131cb6a5528SGuneshwor Singh ret = request_firmware(&ctx->fw, ctx->fw_name, ctx->dev);
132cb6a5528SGuneshwor Singh if (ret < 0) {
133cb6a5528SGuneshwor Singh dev_err(ctx->dev, "request firmware failed: %d\n", ret);
134cb6a5528SGuneshwor Singh goto cnl_load_base_firmware_failed;
135cb6a5528SGuneshwor Singh }
136cb6a5528SGuneshwor Singh }
137cb6a5528SGuneshwor Singh
138cb6a5528SGuneshwor Singh /* parse uuids if first boot */
139cb6a5528SGuneshwor Singh if (cnl->is_first_boot) {
140cb6a5528SGuneshwor Singh ret = snd_skl_parse_uuids(ctx, ctx->fw,
141cb6a5528SGuneshwor Singh CNL_ADSP_FW_HDR_OFFSET, 0);
142cb6a5528SGuneshwor Singh if (ret < 0)
143cb6a5528SGuneshwor Singh goto cnl_load_base_firmware_failed;
144cb6a5528SGuneshwor Singh }
145cb6a5528SGuneshwor Singh
146cb6a5528SGuneshwor Singh stripped_fw.data = ctx->fw->data;
147cb6a5528SGuneshwor Singh stripped_fw.size = ctx->fw->size;
148cb6a5528SGuneshwor Singh skl_dsp_strip_extended_manifest(&stripped_fw);
149cb6a5528SGuneshwor Singh
150024aa45fSCezary Rojewski for (i = 0; i < BXT_FW_ROM_INIT_RETRY; i++) {
151cb6a5528SGuneshwor Singh ret = cnl_prepare_fw(ctx, stripped_fw.data, stripped_fw.size);
152024aa45fSCezary Rojewski if (!ret)
153024aa45fSCezary Rojewski break;
154024aa45fSCezary Rojewski dev_dbg(ctx->dev, "prepare firmware failed: %d\n", ret);
155cb6a5528SGuneshwor Singh }
156cb6a5528SGuneshwor Singh
157024aa45fSCezary Rojewski if (ret < 0)
158024aa45fSCezary Rojewski goto cnl_load_base_firmware_failed;
159024aa45fSCezary Rojewski
160cb6a5528SGuneshwor Singh ret = sst_transfer_fw_host_dma(ctx);
161cb6a5528SGuneshwor Singh if (ret < 0) {
162cb6a5528SGuneshwor Singh dev_err(ctx->dev, "transfer firmware failed: %d\n", ret);
163cb6a5528SGuneshwor Singh cnl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
164cb6a5528SGuneshwor Singh goto cnl_load_base_firmware_failed;
165cb6a5528SGuneshwor Singh }
166cb6a5528SGuneshwor Singh
167cb6a5528SGuneshwor Singh ret = wait_event_timeout(cnl->boot_wait, cnl->boot_complete,
168cb6a5528SGuneshwor Singh msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
169cb6a5528SGuneshwor Singh if (ret == 0) {
170cb6a5528SGuneshwor Singh dev_err(ctx->dev, "FW ready timed-out\n");
171cb6a5528SGuneshwor Singh cnl_dsp_disable_core(ctx, SKL_DSP_CORE0_MASK);
172cb6a5528SGuneshwor Singh ret = -EIO;
173cb6a5528SGuneshwor Singh goto cnl_load_base_firmware_failed;
174cb6a5528SGuneshwor Singh }
175cb6a5528SGuneshwor Singh
176cb6a5528SGuneshwor Singh cnl->fw_loaded = true;
177cb6a5528SGuneshwor Singh
178cb6a5528SGuneshwor Singh return 0;
179cb6a5528SGuneshwor Singh
180cb6a5528SGuneshwor Singh cnl_load_base_firmware_failed:
181024aa45fSCezary Rojewski dev_err(ctx->dev, "firmware load failed: %d\n", ret);
182cb6a5528SGuneshwor Singh release_firmware(ctx->fw);
183cb6a5528SGuneshwor Singh ctx->fw = NULL;
184cb6a5528SGuneshwor Singh
185cb6a5528SGuneshwor Singh return ret;
186cb6a5528SGuneshwor Singh }
187cb6a5528SGuneshwor Singh
cnl_set_dsp_D0(struct sst_dsp * ctx,unsigned int core_id)188cb6a5528SGuneshwor Singh static int cnl_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
189cb6a5528SGuneshwor Singh {
190bcc2a2dcSCezary Rojewski struct skl_dev *cnl = ctx->thread_context;
191cb6a5528SGuneshwor Singh unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
192cb6a5528SGuneshwor Singh struct skl_ipc_dxstate_info dx;
193cb6a5528SGuneshwor Singh int ret;
194cb6a5528SGuneshwor Singh
195cb6a5528SGuneshwor Singh if (!cnl->fw_loaded) {
196cb6a5528SGuneshwor Singh cnl->boot_complete = false;
197cb6a5528SGuneshwor Singh ret = cnl_load_base_firmware(ctx);
198cb6a5528SGuneshwor Singh if (ret < 0) {
199cb6a5528SGuneshwor Singh dev_err(ctx->dev, "fw reload failed: %d\n", ret);
200cb6a5528SGuneshwor Singh return ret;
201cb6a5528SGuneshwor Singh }
202cb6a5528SGuneshwor Singh
203cb6a5528SGuneshwor Singh cnl->cores.state[core_id] = SKL_DSP_RUNNING;
204cb6a5528SGuneshwor Singh return ret;
205cb6a5528SGuneshwor Singh }
206cb6a5528SGuneshwor Singh
207cb6a5528SGuneshwor Singh ret = cnl_dsp_enable_core(ctx, core_mask);
208cb6a5528SGuneshwor Singh if (ret < 0) {
209cb6a5528SGuneshwor Singh dev_err(ctx->dev, "enable dsp core %d failed: %d\n",
210cb6a5528SGuneshwor Singh core_id, ret);
211cb6a5528SGuneshwor Singh goto err;
212cb6a5528SGuneshwor Singh }
213cb6a5528SGuneshwor Singh
214cb6a5528SGuneshwor Singh if (core_id == SKL_DSP_CORE0_ID) {
215cb6a5528SGuneshwor Singh /* enable interrupt */
216cb6a5528SGuneshwor Singh cnl_ipc_int_enable(ctx);
217cb6a5528SGuneshwor Singh cnl_ipc_op_int_enable(ctx);
218cb6a5528SGuneshwor Singh cnl->boot_complete = false;
219cb6a5528SGuneshwor Singh
220cb6a5528SGuneshwor Singh ret = wait_event_timeout(cnl->boot_wait, cnl->boot_complete,
221cb6a5528SGuneshwor Singh msecs_to_jiffies(SKL_IPC_BOOT_MSECS));
222cb6a5528SGuneshwor Singh if (ret == 0) {
223cb6a5528SGuneshwor Singh dev_err(ctx->dev,
224cb6a5528SGuneshwor Singh "dsp boot timeout, status=%#x error=%#x\n",
225cb6a5528SGuneshwor Singh sst_dsp_shim_read(ctx, CNL_ADSP_FW_STATUS),
226cb6a5528SGuneshwor Singh sst_dsp_shim_read(ctx, CNL_ADSP_ERROR_CODE));
227*f373a811SDan Carpenter ret = -ETIMEDOUT;
228cb6a5528SGuneshwor Singh goto err;
229cb6a5528SGuneshwor Singh }
230cb6a5528SGuneshwor Singh } else {
231cb6a5528SGuneshwor Singh dx.core_mask = core_mask;
232cb6a5528SGuneshwor Singh dx.dx_mask = core_mask;
233cb6a5528SGuneshwor Singh
234cb6a5528SGuneshwor Singh ret = skl_ipc_set_dx(&cnl->ipc, CNL_INSTANCE_ID,
235cb6a5528SGuneshwor Singh CNL_BASE_FW_MODULE_ID, &dx);
236cb6a5528SGuneshwor Singh if (ret < 0) {
237cb6a5528SGuneshwor Singh dev_err(ctx->dev, "set_dx failed, core: %d ret: %d\n",
238cb6a5528SGuneshwor Singh core_id, ret);
239cb6a5528SGuneshwor Singh goto err;
240cb6a5528SGuneshwor Singh }
241cb6a5528SGuneshwor Singh }
242cb6a5528SGuneshwor Singh cnl->cores.state[core_id] = SKL_DSP_RUNNING;
243cb6a5528SGuneshwor Singh
244cb6a5528SGuneshwor Singh return 0;
245cb6a5528SGuneshwor Singh err:
246cb6a5528SGuneshwor Singh cnl_dsp_disable_core(ctx, core_mask);
247cb6a5528SGuneshwor Singh
248cb6a5528SGuneshwor Singh return ret;
249cb6a5528SGuneshwor Singh }
250cb6a5528SGuneshwor Singh
cnl_set_dsp_D3(struct sst_dsp * ctx,unsigned int core_id)251cb6a5528SGuneshwor Singh static int cnl_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
252cb6a5528SGuneshwor Singh {
253bcc2a2dcSCezary Rojewski struct skl_dev *cnl = ctx->thread_context;
254cb6a5528SGuneshwor Singh unsigned int core_mask = SKL_DSP_CORE_MASK(core_id);
255cb6a5528SGuneshwor Singh struct skl_ipc_dxstate_info dx;
256cb6a5528SGuneshwor Singh int ret;
257cb6a5528SGuneshwor Singh
258cb6a5528SGuneshwor Singh dx.core_mask = core_mask;
259cb6a5528SGuneshwor Singh dx.dx_mask = SKL_IPC_D3_MASK;
260cb6a5528SGuneshwor Singh
261cb6a5528SGuneshwor Singh ret = skl_ipc_set_dx(&cnl->ipc, CNL_INSTANCE_ID,
262cb6a5528SGuneshwor Singh CNL_BASE_FW_MODULE_ID, &dx);
263cb6a5528SGuneshwor Singh if (ret < 0) {
264cb6a5528SGuneshwor Singh dev_err(ctx->dev,
265cb6a5528SGuneshwor Singh "dsp core %d to d3 failed; continue reset\n",
266cb6a5528SGuneshwor Singh core_id);
267cb6a5528SGuneshwor Singh cnl->fw_loaded = false;
268cb6a5528SGuneshwor Singh }
269cb6a5528SGuneshwor Singh
270cb6a5528SGuneshwor Singh /* disable interrupts if core 0 */
271cb6a5528SGuneshwor Singh if (core_id == SKL_DSP_CORE0_ID) {
272cb6a5528SGuneshwor Singh skl_ipc_op_int_disable(ctx);
273cb6a5528SGuneshwor Singh skl_ipc_int_disable(ctx);
274cb6a5528SGuneshwor Singh }
275cb6a5528SGuneshwor Singh
276cb6a5528SGuneshwor Singh ret = cnl_dsp_disable_core(ctx, core_mask);
277cb6a5528SGuneshwor Singh if (ret < 0) {
278cb6a5528SGuneshwor Singh dev_err(ctx->dev, "disable dsp core %d failed: %d\n",
279cb6a5528SGuneshwor Singh core_id, ret);
280cb6a5528SGuneshwor Singh return ret;
281cb6a5528SGuneshwor Singh }
282cb6a5528SGuneshwor Singh
283cb6a5528SGuneshwor Singh cnl->cores.state[core_id] = SKL_DSP_RESET;
284cb6a5528SGuneshwor Singh
285cb6a5528SGuneshwor Singh return ret;
286cb6a5528SGuneshwor Singh }
287cb6a5528SGuneshwor Singh
cnl_get_errno(struct sst_dsp * ctx)288cb6a5528SGuneshwor Singh static unsigned int cnl_get_errno(struct sst_dsp *ctx)
289cb6a5528SGuneshwor Singh {
290cb6a5528SGuneshwor Singh return sst_dsp_shim_read(ctx, CNL_ADSP_ERROR_CODE);
291cb6a5528SGuneshwor Singh }
292cb6a5528SGuneshwor Singh
2932788808aSBhumika Goyal static const struct skl_dsp_fw_ops cnl_fw_ops = {
294cb6a5528SGuneshwor Singh .set_state_D0 = cnl_set_dsp_D0,
295cb6a5528SGuneshwor Singh .set_state_D3 = cnl_set_dsp_D3,
296cb6a5528SGuneshwor Singh .load_fw = cnl_load_base_firmware,
297cb6a5528SGuneshwor Singh .get_fw_errcode = cnl_get_errno,
298cb6a5528SGuneshwor Singh };
299cb6a5528SGuneshwor Singh
300cb6a5528SGuneshwor Singh static struct sst_ops cnl_ops = {
301cb6a5528SGuneshwor Singh .irq_handler = cnl_dsp_sst_interrupt,
302cb6a5528SGuneshwor Singh .write = sst_shim32_write,
303cb6a5528SGuneshwor Singh .read = sst_shim32_read,
304cb6a5528SGuneshwor Singh .free = cnl_dsp_free,
305cb6a5528SGuneshwor Singh };
306cb6a5528SGuneshwor Singh
307cb6a5528SGuneshwor Singh #define CNL_IPC_GLB_NOTIFY_RSP_SHIFT 29
308cb6a5528SGuneshwor Singh #define CNL_IPC_GLB_NOTIFY_RSP_MASK 0x1
309cb6a5528SGuneshwor Singh #define CNL_IPC_GLB_NOTIFY_RSP_TYPE(x) (((x) >> CNL_IPC_GLB_NOTIFY_RSP_SHIFT) \
310cb6a5528SGuneshwor Singh & CNL_IPC_GLB_NOTIFY_RSP_MASK)
311cb6a5528SGuneshwor Singh
cnl_dsp_irq_thread_handler(int irq,void * context)312cb6a5528SGuneshwor Singh static irqreturn_t cnl_dsp_irq_thread_handler(int irq, void *context)
313cb6a5528SGuneshwor Singh {
314cb6a5528SGuneshwor Singh struct sst_dsp *dsp = context;
315eb062e47SCezary Rojewski struct skl_dev *cnl = dsp->thread_context;
316cb6a5528SGuneshwor Singh struct sst_generic_ipc *ipc = &cnl->ipc;
317cb6a5528SGuneshwor Singh struct skl_ipc_header header = {0};
318cb6a5528SGuneshwor Singh u32 hipcida, hipctdr, hipctdd;
319cb6a5528SGuneshwor Singh int ipc_irq = 0;
320cb6a5528SGuneshwor Singh
321cb6a5528SGuneshwor Singh /* here we handle ipc interrupts only */
322cb6a5528SGuneshwor Singh if (!(dsp->intr_status & CNL_ADSPIS_IPC))
323cb6a5528SGuneshwor Singh return IRQ_NONE;
324cb6a5528SGuneshwor Singh
325cb6a5528SGuneshwor Singh hipcida = sst_dsp_shim_read_unlocked(dsp, CNL_ADSP_REG_HIPCIDA);
326cb6a5528SGuneshwor Singh hipctdr = sst_dsp_shim_read_unlocked(dsp, CNL_ADSP_REG_HIPCTDR);
32707875939SCezary Rojewski hipctdd = sst_dsp_shim_read_unlocked(dsp, CNL_ADSP_REG_HIPCTDD);
328cb6a5528SGuneshwor Singh
329cb6a5528SGuneshwor Singh /* reply message from dsp */
330cb6a5528SGuneshwor Singh if (hipcida & CNL_ADSP_REG_HIPCIDA_DONE) {
331cb6a5528SGuneshwor Singh sst_dsp_shim_update_bits(dsp, CNL_ADSP_REG_HIPCCTL,
332cb6a5528SGuneshwor Singh CNL_ADSP_REG_HIPCCTL_DONE, 0);
333cb6a5528SGuneshwor Singh
334cb6a5528SGuneshwor Singh /* clear done bit - tell dsp operation is complete */
335cb6a5528SGuneshwor Singh sst_dsp_shim_update_bits_forced(dsp, CNL_ADSP_REG_HIPCIDA,
336cb6a5528SGuneshwor Singh CNL_ADSP_REG_HIPCIDA_DONE, CNL_ADSP_REG_HIPCIDA_DONE);
337cb6a5528SGuneshwor Singh
338cb6a5528SGuneshwor Singh ipc_irq = 1;
339cb6a5528SGuneshwor Singh
340cb6a5528SGuneshwor Singh /* unmask done interrupt */
341cb6a5528SGuneshwor Singh sst_dsp_shim_update_bits(dsp, CNL_ADSP_REG_HIPCCTL,
342cb6a5528SGuneshwor Singh CNL_ADSP_REG_HIPCCTL_DONE, CNL_ADSP_REG_HIPCCTL_DONE);
343cb6a5528SGuneshwor Singh }
344cb6a5528SGuneshwor Singh
345cb6a5528SGuneshwor Singh /* new message from dsp */
346cb6a5528SGuneshwor Singh if (hipctdr & CNL_ADSP_REG_HIPCTDR_BUSY) {
347cb6a5528SGuneshwor Singh header.primary = hipctdr;
348cb6a5528SGuneshwor Singh header.extension = hipctdd;
349cb6a5528SGuneshwor Singh dev_dbg(dsp->dev, "IPC irq: Firmware respond primary:%x",
350cb6a5528SGuneshwor Singh header.primary);
351cb6a5528SGuneshwor Singh dev_dbg(dsp->dev, "IPC irq: Firmware respond extension:%x",
352cb6a5528SGuneshwor Singh header.extension);
353cb6a5528SGuneshwor Singh
354cb6a5528SGuneshwor Singh if (CNL_IPC_GLB_NOTIFY_RSP_TYPE(header.primary)) {
355cb6a5528SGuneshwor Singh /* Handle Immediate reply from DSP Core */
356cb6a5528SGuneshwor Singh skl_ipc_process_reply(ipc, header);
357cb6a5528SGuneshwor Singh } else {
358cb6a5528SGuneshwor Singh dev_dbg(dsp->dev, "IPC irq: Notification from firmware\n");
359cb6a5528SGuneshwor Singh skl_ipc_process_notification(ipc, header);
360cb6a5528SGuneshwor Singh }
361cb6a5528SGuneshwor Singh /* clear busy interrupt */
362cb6a5528SGuneshwor Singh sst_dsp_shim_update_bits_forced(dsp, CNL_ADSP_REG_HIPCTDR,
363cb6a5528SGuneshwor Singh CNL_ADSP_REG_HIPCTDR_BUSY, CNL_ADSP_REG_HIPCTDR_BUSY);
364cb6a5528SGuneshwor Singh
365cb6a5528SGuneshwor Singh /* set done bit to ack dsp */
366cb6a5528SGuneshwor Singh sst_dsp_shim_update_bits_forced(dsp, CNL_ADSP_REG_HIPCTDA,
367cb6a5528SGuneshwor Singh CNL_ADSP_REG_HIPCTDA_DONE, CNL_ADSP_REG_HIPCTDA_DONE);
368cb6a5528SGuneshwor Singh ipc_irq = 1;
369cb6a5528SGuneshwor Singh }
370cb6a5528SGuneshwor Singh
371cb6a5528SGuneshwor Singh if (ipc_irq == 0)
372cb6a5528SGuneshwor Singh return IRQ_NONE;
373cb6a5528SGuneshwor Singh
374cb6a5528SGuneshwor Singh cnl_ipc_int_enable(dsp);
375cb6a5528SGuneshwor Singh
376cb6a5528SGuneshwor Singh /* continue to send any remaining messages */
377cb6a5528SGuneshwor Singh schedule_work(&ipc->kwork);
378cb6a5528SGuneshwor Singh
379cb6a5528SGuneshwor Singh return IRQ_HANDLED;
380cb6a5528SGuneshwor Singh }
381cb6a5528SGuneshwor Singh
382cb6a5528SGuneshwor Singh static struct sst_dsp_device cnl_dev = {
383cb6a5528SGuneshwor Singh .thread = cnl_dsp_irq_thread_handler,
384cb6a5528SGuneshwor Singh .ops = &cnl_ops,
385cb6a5528SGuneshwor Singh };
386cb6a5528SGuneshwor Singh
cnl_ipc_tx_msg(struct sst_generic_ipc * ipc,struct ipc_message * msg)387cb6a5528SGuneshwor Singh static void cnl_ipc_tx_msg(struct sst_generic_ipc *ipc, struct ipc_message *msg)
388cb6a5528SGuneshwor Singh {
389abf31feeSCezary Rojewski struct skl_ipc_header *header = (struct skl_ipc_header *)(&msg->tx.header);
390cb6a5528SGuneshwor Singh
391abf31feeSCezary Rojewski if (msg->tx.size)
392abf31feeSCezary Rojewski sst_dsp_outbox_write(ipc->dsp, msg->tx.data, msg->tx.size);
393cb6a5528SGuneshwor Singh sst_dsp_shim_write_unlocked(ipc->dsp, CNL_ADSP_REG_HIPCIDD,
394cb6a5528SGuneshwor Singh header->extension);
395cb6a5528SGuneshwor Singh sst_dsp_shim_write_unlocked(ipc->dsp, CNL_ADSP_REG_HIPCIDR,
396cb6a5528SGuneshwor Singh header->primary | CNL_ADSP_REG_HIPCIDR_BUSY);
397cb6a5528SGuneshwor Singh }
398cb6a5528SGuneshwor Singh
cnl_ipc_is_dsp_busy(struct sst_dsp * dsp)399cb6a5528SGuneshwor Singh static bool cnl_ipc_is_dsp_busy(struct sst_dsp *dsp)
400cb6a5528SGuneshwor Singh {
401cb6a5528SGuneshwor Singh u32 hipcidr;
402cb6a5528SGuneshwor Singh
403cb6a5528SGuneshwor Singh hipcidr = sst_dsp_shim_read_unlocked(dsp, CNL_ADSP_REG_HIPCIDR);
404cb6a5528SGuneshwor Singh
405cb6a5528SGuneshwor Singh return (hipcidr & CNL_ADSP_REG_HIPCIDR_BUSY);
406cb6a5528SGuneshwor Singh }
407cb6a5528SGuneshwor Singh
cnl_ipc_init(struct device * dev,struct skl_dev * cnl)408bcc2a2dcSCezary Rojewski static int cnl_ipc_init(struct device *dev, struct skl_dev *cnl)
409cb6a5528SGuneshwor Singh {
410cb6a5528SGuneshwor Singh struct sst_generic_ipc *ipc;
411cb6a5528SGuneshwor Singh int err;
412cb6a5528SGuneshwor Singh
413cb6a5528SGuneshwor Singh ipc = &cnl->ipc;
414cb6a5528SGuneshwor Singh ipc->dsp = cnl->dsp;
415cb6a5528SGuneshwor Singh ipc->dev = dev;
416cb6a5528SGuneshwor Singh
417cb6a5528SGuneshwor Singh ipc->tx_data_max_size = CNL_ADSP_W1_SZ;
418cb6a5528SGuneshwor Singh ipc->rx_data_max_size = CNL_ADSP_W0_UP_SZ;
419cb6a5528SGuneshwor Singh
420cb6a5528SGuneshwor Singh err = sst_ipc_init(ipc);
421cb6a5528SGuneshwor Singh if (err)
422cb6a5528SGuneshwor Singh return err;
423cb6a5528SGuneshwor Singh
424cb6a5528SGuneshwor Singh /*
425cb6a5528SGuneshwor Singh * overriding tx_msg and is_dsp_busy since
426cb6a5528SGuneshwor Singh * ipc registers are different for cnl
427cb6a5528SGuneshwor Singh */
428cb6a5528SGuneshwor Singh ipc->ops.tx_msg = cnl_ipc_tx_msg;
429cb6a5528SGuneshwor Singh ipc->ops.tx_data_copy = skl_ipc_tx_data_copy;
430cb6a5528SGuneshwor Singh ipc->ops.is_dsp_busy = cnl_ipc_is_dsp_busy;
431cb6a5528SGuneshwor Singh
432cb6a5528SGuneshwor Singh return 0;
433cb6a5528SGuneshwor Singh }
434cb6a5528SGuneshwor Singh
cnl_sst_dsp_init(struct device * dev,void __iomem * mmio_base,int irq,const char * fw_name,struct skl_dsp_loader_ops dsp_ops,struct skl_dev ** dsp)435cb6a5528SGuneshwor Singh int cnl_sst_dsp_init(struct device *dev, void __iomem *mmio_base, int irq,
436cb6a5528SGuneshwor Singh const char *fw_name, struct skl_dsp_loader_ops dsp_ops,
437bcc2a2dcSCezary Rojewski struct skl_dev **dsp)
438cb6a5528SGuneshwor Singh {
439bcc2a2dcSCezary Rojewski struct skl_dev *cnl;
440cb6a5528SGuneshwor Singh struct sst_dsp *sst;
441cb6a5528SGuneshwor Singh int ret;
442cb6a5528SGuneshwor Singh
443cb6a5528SGuneshwor Singh ret = skl_sst_ctx_init(dev, irq, fw_name, dsp_ops, dsp, &cnl_dev);
444cb6a5528SGuneshwor Singh if (ret < 0) {
445cb6a5528SGuneshwor Singh dev_err(dev, "%s: no device\n", __func__);
446cb6a5528SGuneshwor Singh return ret;
447cb6a5528SGuneshwor Singh }
448cb6a5528SGuneshwor Singh
449cb6a5528SGuneshwor Singh cnl = *dsp;
450cb6a5528SGuneshwor Singh sst = cnl->dsp;
451cb6a5528SGuneshwor Singh sst->fw_ops = cnl_fw_ops;
452cb6a5528SGuneshwor Singh sst->addr.lpe = mmio_base;
453cb6a5528SGuneshwor Singh sst->addr.shim = mmio_base;
454cb6a5528SGuneshwor Singh sst->addr.sram0_base = CNL_ADSP_SRAM0_BASE;
455cb6a5528SGuneshwor Singh sst->addr.sram1_base = CNL_ADSP_SRAM1_BASE;
456cb6a5528SGuneshwor Singh sst->addr.w0_stat_sz = CNL_ADSP_W0_STAT_SZ;
457cb6a5528SGuneshwor Singh sst->addr.w0_up_sz = CNL_ADSP_W0_UP_SZ;
458cb6a5528SGuneshwor Singh
459cb6a5528SGuneshwor Singh sst_dsp_mailbox_init(sst, (CNL_ADSP_SRAM0_BASE + CNL_ADSP_W0_STAT_SZ),
460cb6a5528SGuneshwor Singh CNL_ADSP_W0_UP_SZ, CNL_ADSP_SRAM1_BASE,
461cb6a5528SGuneshwor Singh CNL_ADSP_W1_SZ);
462cb6a5528SGuneshwor Singh
463cb6a5528SGuneshwor Singh ret = cnl_ipc_init(dev, cnl);
4643b3011adSSubhransu S. Prusty if (ret) {
4653b3011adSSubhransu S. Prusty skl_dsp_free(sst);
466cb6a5528SGuneshwor Singh return ret;
4673b3011adSSubhransu S. Prusty }
468cb6a5528SGuneshwor Singh
469cb6a5528SGuneshwor Singh cnl->boot_complete = false;
470cb6a5528SGuneshwor Singh init_waitqueue_head(&cnl->boot_wait);
471cb6a5528SGuneshwor Singh
4728e9d8e19SSubhransu S. Prusty return skl_dsp_acquire_irq(sst);
473cb6a5528SGuneshwor Singh }
474cb6a5528SGuneshwor Singh EXPORT_SYMBOL_GPL(cnl_sst_dsp_init);
475cb6a5528SGuneshwor Singh
cnl_sst_init_fw(struct device * dev,struct skl_dev * skl)476bcc2a2dcSCezary Rojewski int cnl_sst_init_fw(struct device *dev, struct skl_dev *skl)
477cb6a5528SGuneshwor Singh {
478cb6a5528SGuneshwor Singh int ret;
479bcc2a2dcSCezary Rojewski struct sst_dsp *sst = skl->dsp;
480cb6a5528SGuneshwor Singh
481bcc2a2dcSCezary Rojewski ret = skl->dsp->fw_ops.load_fw(sst);
482cb6a5528SGuneshwor Singh if (ret < 0) {
483cb6a5528SGuneshwor Singh dev_err(dev, "load base fw failed: %d", ret);
484cb6a5528SGuneshwor Singh return ret;
485cb6a5528SGuneshwor Singh }
486cb6a5528SGuneshwor Singh
487cb6a5528SGuneshwor Singh skl_dsp_init_core_state(sst);
488cb6a5528SGuneshwor Singh
489bcc2a2dcSCezary Rojewski skl->is_first_boot = false;
490cb6a5528SGuneshwor Singh
491cb6a5528SGuneshwor Singh return 0;
492cb6a5528SGuneshwor Singh }
493cb6a5528SGuneshwor Singh EXPORT_SYMBOL_GPL(cnl_sst_init_fw);
494cb6a5528SGuneshwor Singh
cnl_sst_dsp_cleanup(struct device * dev,struct skl_dev * skl)495bcc2a2dcSCezary Rojewski void cnl_sst_dsp_cleanup(struct device *dev, struct skl_dev *skl)
496cb6a5528SGuneshwor Singh {
497bcc2a2dcSCezary Rojewski if (skl->dsp->fw)
498bcc2a2dcSCezary Rojewski release_firmware(skl->dsp->fw);
499cb6a5528SGuneshwor Singh
500bcc2a2dcSCezary Rojewski skl_freeup_uuid_list(skl);
501bcc2a2dcSCezary Rojewski cnl_ipc_free(&skl->ipc);
502cb6a5528SGuneshwor Singh
503bcc2a2dcSCezary Rojewski skl->dsp->ops->free(skl->dsp);
504cb6a5528SGuneshwor Singh }
505cb6a5528SGuneshwor Singh EXPORT_SYMBOL_GPL(cnl_sst_dsp_cleanup);
506cb6a5528SGuneshwor Singh
507cb6a5528SGuneshwor Singh MODULE_LICENSE("GPL v2");
508cb6a5528SGuneshwor Singh MODULE_DESCRIPTION("Intel Cannonlake IPC driver");
509