1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3  * soc-intel-quirks.h - prototypes for quirk autodetection
4  *
5  * Copyright (c) 2019, Intel Corporation.
6  *
7  */
8 
9 #ifndef _SND_SOC_INTEL_QUIRKS_H
10 #define _SND_SOC_INTEL_QUIRKS_H
11 
12 #if IS_ENABLED(CONFIG_X86)
13 
14 #include <asm/cpu_device_id.h>
15 #include <asm/intel-family.h>
16 #include <asm/iosf_mbi.h>
17 
18 #define ICPU(model)	{ X86_VENDOR_INTEL, 6, model, X86_FEATURE_ANY, }
19 
20 #define SOC_INTEL_IS_CPU(soc, type)				\
21 static inline bool soc_intel_is_##soc(void)			\
22 {								\
23 	static const struct x86_cpu_id soc##_cpu_ids[] = {	\
24 		ICPU(type),					\
25 		{}						\
26 	};							\
27 	const struct x86_cpu_id *id;				\
28 								\
29 	id = x86_match_cpu(soc##_cpu_ids);			\
30 	if (id)							\
31 		return true;					\
32 	return false;						\
33 }
34 
35 SOC_INTEL_IS_CPU(byt, INTEL_FAM6_ATOM_SILVERMONT);
36 SOC_INTEL_IS_CPU(cht, INTEL_FAM6_ATOM_AIRMONT);
37 SOC_INTEL_IS_CPU(apl, INTEL_FAM6_ATOM_GOLDMONT);
38 SOC_INTEL_IS_CPU(glk, INTEL_FAM6_ATOM_GOLDMONT_PLUS);
39 
40 static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
41 {
42 	struct device *dev = &pdev->dev;
43 	int status = 0;
44 
45 	if (!soc_intel_is_byt())
46 		return false;
47 
48 	if (iosf_mbi_available()) {
49 		u32 bios_status;
50 
51 		status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */
52 				       MBI_REG_READ, /* 0x10 */
53 				       0x006, /* BIOS_CONFIG */
54 				       &bios_status);
55 
56 		if (status) {
57 			dev_err(dev, "could not read PUNIT BIOS_CONFIG\n");
58 		} else {
59 			/* bits 26:27 mirror PMIC options */
60 			bios_status = (bios_status >> 26) & 3;
61 
62 			if (bios_status == 1 || bios_status == 3) {
63 				dev_info(dev, "Detected Baytrail-CR platform\n");
64 				return true;
65 			}
66 
67 			dev_info(dev, "BYT-CR not detected\n");
68 		}
69 	} else {
70 		dev_info(dev, "IOSF_MBI not available, no BYT-CR detection\n");
71 	}
72 
73 	if (!platform_get_resource(pdev, IORESOURCE_IRQ, 5)) {
74 		/*
75 		 * Some devices detected as BYT-T have only a single IRQ listed,
76 		 * causing platform_get_irq with index 5 to return -ENXIO.
77 		 * The correct IRQ in this case is at index 0, as on BYT-CR.
78 		 */
79 		dev_info(dev, "Falling back to Baytrail-CR platform\n");
80 		return true;
81 	}
82 
83 	return false;
84 }
85 
86 #else
87 
88 static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
89 {
90 	return false;
91 }
92 
93 static inline bool soc_intel_is_byt(void)
94 {
95 	return false;
96 }
97 
98 static inline bool soc_intel_is_cht(void)
99 {
100 	return false;
101 }
102 
103 static inline bool soc_intel_is_apl(void)
104 {
105 	return false;
106 }
107 
108 static inline bool soc_intel_is_glk(void)
109 {
110 	return false;
111 }
112 
113 #endif
114 
115  #endif /* _SND_SOC_INTEL_QUIRKS_H */
116