1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * soc-intel-quirks.h - prototypes for quirk autodetection
4  *
5  * Copyright (c) 2019, Intel Corporation.
6  *
7  */
8 
9 #ifndef _SND_SOC_INTEL_QUIRKS_H
10 #define _SND_SOC_INTEL_QUIRKS_H
11 
12 #if IS_ENABLED(CONFIG_X86)
13 
14 #include <asm/cpu_device_id.h>
15 #include <asm/intel-family.h>
16 #include <asm/iosf_mbi.h>
17 
18 #define SOC_INTEL_IS_CPU(soc, type)				\
19 static inline bool soc_intel_is_##soc(void)			\
20 {								\
21 	static const struct x86_cpu_id soc##_cpu_ids[] = {	\
22 		X86_MATCH_INTEL_FAM6_MODEL(type, NULL),		\
23 		{}						\
24 	};							\
25 	const struct x86_cpu_id *id;				\
26 								\
27 	id = x86_match_cpu(soc##_cpu_ids);			\
28 	if (id)							\
29 		return true;					\
30 	return false;						\
31 }
32 
33 SOC_INTEL_IS_CPU(byt, ATOM_SILVERMONT);
34 SOC_INTEL_IS_CPU(cht, ATOM_AIRMONT);
35 SOC_INTEL_IS_CPU(apl, ATOM_GOLDMONT);
36 SOC_INTEL_IS_CPU(glk, ATOM_GOLDMONT_PLUS);
37 SOC_INTEL_IS_CPU(cml, KABYLAKE_L);
38 
39 static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
40 {
41 	struct device *dev = &pdev->dev;
42 	int status = 0;
43 
44 	if (!soc_intel_is_byt())
45 		return false;
46 
47 	if (iosf_mbi_available()) {
48 		u32 bios_status;
49 
50 		status = iosf_mbi_read(BT_MBI_UNIT_PMC, /* 0x04 PUNIT */
51 				       MBI_REG_READ, /* 0x10 */
52 				       0x006, /* BIOS_CONFIG */
53 				       &bios_status);
54 
55 		if (status) {
56 			dev_err(dev, "could not read PUNIT BIOS_CONFIG\n");
57 		} else {
58 			/* bits 26:27 mirror PMIC options */
59 			bios_status = (bios_status >> 26) & 3;
60 
61 			if (bios_status == 1 || bios_status == 3) {
62 				dev_info(dev, "Detected Baytrail-CR platform\n");
63 				return true;
64 			}
65 
66 			dev_info(dev, "BYT-CR not detected\n");
67 		}
68 	} else {
69 		dev_info(dev, "IOSF_MBI not available, no BYT-CR detection\n");
70 	}
71 
72 	if (!platform_get_resource(pdev, IORESOURCE_IRQ, 5)) {
73 		/*
74 		 * Some devices detected as BYT-T have only a single IRQ listed,
75 		 * causing platform_get_irq with index 5 to return -ENXIO.
76 		 * The correct IRQ in this case is at index 0, as on BYT-CR.
77 		 */
78 		dev_info(dev, "Falling back to Baytrail-CR platform\n");
79 		return true;
80 	}
81 
82 	return false;
83 }
84 
85 #else
86 
87 static inline bool soc_intel_is_byt_cr(struct platform_device *pdev)
88 {
89 	return false;
90 }
91 
92 static inline bool soc_intel_is_byt(void)
93 {
94 	return false;
95 }
96 
97 static inline bool soc_intel_is_cht(void)
98 {
99 	return false;
100 }
101 
102 static inline bool soc_intel_is_apl(void)
103 {
104 	return false;
105 }
106 
107 static inline bool soc_intel_is_glk(void)
108 {
109 	return false;
110 }
111 
112 static inline bool soc_intel_is_cml(void)
113 {
114 	return false;
115 }
116 #endif
117 
118  #endif /* _SND_SOC_INTEL_QUIRKS_H */
119