1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * soc-apci-intel-tgl-match.c - tables and support for ICL ACPI enumeration.
4  *
5  * Copyright (c) 2019, Intel Corporation.
6  *
7  */
8 
9 #include <sound/soc-acpi.h>
10 #include <sound/soc-acpi-intel-match.h>
11 
12 static const struct snd_soc_acpi_codecs tgl_codecs = {
13 	.num_codecs = 1,
14 	.codecs = {"MX98357A"}
15 };
16 
17 static const struct snd_soc_acpi_endpoint single_endpoint = {
18 	.num = 0,
19 	.aggregated = 0,
20 	.group_position = 0,
21 	.group_id = 0,
22 };
23 
24 static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
25 	.num = 0,
26 	.aggregated = 1,
27 	.group_position = 0,
28 	.group_id = 1,
29 };
30 
31 static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
32 	.num = 0,
33 	.aggregated = 1,
34 	.group_position = 1,
35 	.group_id = 1,
36 };
37 
38 static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
39 	{
40 		.adr = 0x000020025D071100,
41 		.num_endpoints = 1,
42 		.endpoints = &single_endpoint,
43 		.name_prefix = "rt711"
44 	}
45 };
46 
47 static const struct snd_soc_acpi_adr_device rt711_1_adr[] = {
48 	{
49 		.adr = 0x000120025D071100,
50 		.num_endpoints = 1,
51 		.endpoints = &single_endpoint,
52 		.name_prefix = "rt711"
53 	}
54 };
55 
56 static const struct snd_soc_acpi_adr_device rt1308_1_dual_adr[] = {
57 	{
58 		.adr = 0x000120025D130800,
59 		.num_endpoints = 1,
60 		.endpoints = &spk_l_endpoint,
61 		.name_prefix = "rt1308-1"
62 	},
63 	{
64 		.adr = 0x000122025D130800,
65 		.num_endpoints = 1,
66 		.endpoints = &spk_r_endpoint,
67 		.name_prefix = "rt1308-2"
68 	}
69 };
70 
71 static const struct snd_soc_acpi_adr_device rt1308_1_single_adr[] = {
72 	{
73 		.adr = 0x000120025D130800,
74 		.num_endpoints = 1,
75 		.endpoints = &single_endpoint,
76 		.name_prefix = "rt1308-1"
77 	}
78 };
79 
80 static const struct snd_soc_acpi_adr_device rt1308_2_single_adr[] = {
81 	{
82 		.adr = 0x000220025D130800,
83 		.num_endpoints = 1,
84 		.endpoints = &single_endpoint,
85 		.name_prefix = "rt1308-1"
86 	}
87 };
88 
89 static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
90 	{
91 		.adr = 0x000120025D130800,
92 		.num_endpoints = 1,
93 		.endpoints = &spk_l_endpoint,
94 		.name_prefix = "rt1308-1"
95 	}
96 };
97 
98 static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
99 	{
100 		.adr = 0x000220025D130800,
101 		.num_endpoints = 1,
102 		.endpoints = &spk_r_endpoint,
103 		.name_prefix = "rt1308-2"
104 	}
105 };
106 
107 static const struct snd_soc_acpi_adr_device rt715_0_adr[] = {
108 	{
109 		.adr = 0x000021025D071500,
110 		.num_endpoints = 1,
111 		.endpoints = &single_endpoint,
112 		.name_prefix = "rt715"
113 	}
114 };
115 
116 static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
117 	{
118 		.adr = 0x000320025D071500,
119 		.num_endpoints = 1,
120 		.endpoints = &single_endpoint,
121 		.name_prefix = "rt715"
122 	}
123 };
124 
125 static const struct snd_soc_acpi_adr_device mx8373_1_adr[] = {
126 	{
127 		.adr = 0x000123019F837300,
128 		.num_endpoints = 1,
129 		.endpoints = &spk_l_endpoint,
130 		.name_prefix = "Right"
131 	},
132 	{
133 		.adr = 0x000127019F837300,
134 		.num_endpoints = 1,
135 		.endpoints = &spk_r_endpoint,
136 		.name_prefix = "Left"
137 	}
138 };
139 
140 static const struct snd_soc_acpi_adr_device rt5682_0_adr[] = {
141 	{
142 		.adr = 0x000021025D568200,
143 		.num_endpoints = 1,
144 		.endpoints = &single_endpoint,
145 		.name_prefix = "rt5682"
146 	}
147 };
148 
149 static const struct snd_soc_acpi_adr_device rt711_sdca_0_adr[] = {
150 	{
151 		.adr = 0x000030025D071101,
152 		.num_endpoints = 1,
153 		.endpoints = &single_endpoint,
154 		.name_prefix = "rt711"
155 	}
156 };
157 
158 static const struct snd_soc_acpi_adr_device rt1316_1_group1_adr[] = {
159 	{
160 		.adr = 0x000131025D131601, /* unique ID is set for some reason */
161 		.num_endpoints = 1,
162 		.endpoints = &spk_l_endpoint,
163 		.name_prefix = "rt1316-1"
164 	}
165 };
166 
167 static const struct snd_soc_acpi_adr_device rt1316_2_group1_adr[] = {
168 	{
169 		.adr = 0x000230025D131601,
170 		.num_endpoints = 1,
171 		.endpoints = &spk_r_endpoint,
172 		.name_prefix = "rt1316-2"
173 	}
174 };
175 
176 static const struct snd_soc_acpi_adr_device rt714_3_adr[] = {
177 	{
178 		.adr = 0x000330025D071401,
179 		.num_endpoints = 1,
180 		.endpoints = &single_endpoint,
181 		.name_prefix = "rt714"
182 	}
183 };
184 
185 static const struct snd_soc_acpi_link_adr tgl_i2s_rt1308[] = {
186 	{
187 		.mask = BIT(0),
188 		.num_adr = ARRAY_SIZE(rt711_0_adr),
189 		.adr_d = rt711_0_adr,
190 	},
191 	{}
192 };
193 
194 static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
195 	{
196 		.mask = BIT(0),
197 		.num_adr = ARRAY_SIZE(rt711_0_adr),
198 		.adr_d = rt711_0_adr,
199 	},
200 	{
201 		.mask = BIT(1),
202 		.num_adr = ARRAY_SIZE(rt1308_1_dual_adr),
203 		.adr_d = rt1308_1_dual_adr,
204 	},
205 	{}
206 };
207 
208 static const struct snd_soc_acpi_link_adr tgl_chromebook_base[] = {
209 	{
210 		.mask = BIT(0),
211 		.num_adr = ARRAY_SIZE(rt5682_0_adr),
212 		.adr_d = rt5682_0_adr,
213 	},
214 	{
215 		.mask = BIT(1),
216 		.num_adr = ARRAY_SIZE(mx8373_1_adr),
217 		.adr_d = mx8373_1_adr,
218 	},
219 	{}
220 };
221 
222 static const struct snd_soc_acpi_link_adr tgl_3_in_1_default[] = {
223 	{
224 		.mask = BIT(0),
225 		.num_adr = ARRAY_SIZE(rt711_0_adr),
226 		.adr_d = rt711_0_adr,
227 	},
228 	{
229 		.mask = BIT(1),
230 		.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
231 		.adr_d = rt1308_1_group1_adr,
232 	},
233 	{
234 		.mask = BIT(2),
235 		.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
236 		.adr_d = rt1308_2_group1_adr,
237 	},
238 	{
239 		.mask = BIT(3),
240 		.num_adr = ARRAY_SIZE(rt715_3_adr),
241 		.adr_d = rt715_3_adr,
242 	},
243 	{}
244 };
245 
246 static const struct snd_soc_acpi_link_adr tgl_3_in_1_mono_amp[] = {
247 	{
248 		.mask = BIT(0),
249 		.num_adr = ARRAY_SIZE(rt711_0_adr),
250 		.adr_d = rt711_0_adr,
251 	},
252 	{
253 		.mask = BIT(1),
254 		.num_adr = ARRAY_SIZE(rt1308_1_single_adr),
255 		.adr_d = rt1308_1_single_adr,
256 	},
257 	{
258 		.mask = BIT(3),
259 		.num_adr = ARRAY_SIZE(rt715_3_adr),
260 		.adr_d = rt715_3_adr,
261 	},
262 	{}
263 };
264 
265 static const struct snd_soc_acpi_link_adr tgl_sdw_rt711_link1_rt1308_link2_rt715_link0[] = {
266 	{
267 		.mask = BIT(1),
268 		.num_adr = ARRAY_SIZE(rt711_1_adr),
269 		.adr_d = rt711_1_adr,
270 	},
271 	{
272 		.mask = BIT(2),
273 		.num_adr = ARRAY_SIZE(rt1308_2_single_adr),
274 		.adr_d = rt1308_2_single_adr,
275 	},
276 	{
277 		.mask = BIT(0),
278 		.num_adr = ARRAY_SIZE(rt715_0_adr),
279 		.adr_d = rt715_0_adr,
280 	},
281 	{}
282 };
283 
284 static const struct snd_soc_acpi_link_adr tgl_3_in_1_sdca[] = {
285 	{
286 		.mask = BIT(0),
287 		.num_adr = ARRAY_SIZE(rt711_sdca_0_adr),
288 		.adr_d = rt711_sdca_0_adr,
289 	},
290 	{
291 		.mask = BIT(1),
292 		.num_adr = ARRAY_SIZE(rt1316_1_group1_adr),
293 		.adr_d = rt1316_1_group1_adr,
294 	},
295 	{
296 		.mask = BIT(2),
297 		.num_adr = ARRAY_SIZE(rt1316_2_group1_adr),
298 		.adr_d = rt1316_2_group1_adr,
299 	},
300 	{
301 		.mask = BIT(3),
302 		.num_adr = ARRAY_SIZE(rt714_3_adr),
303 		.adr_d = rt714_3_adr,
304 	},
305 	{}
306 };
307 
308 static const struct snd_soc_acpi_codecs tgl_max98373_amp = {
309 	.num_codecs = 1,
310 	.codecs = {"MX98373"}
311 };
312 
313 static const struct snd_soc_acpi_codecs tgl_rt1011_amp = {
314 	.num_codecs = 1,
315 	.codecs = {"10EC1011"}
316 };
317 
318 struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_machines[] = {
319 	{
320 		.id = "10EC1308",
321 		.drv_name = "sof_sdw",
322 		.link_mask = 0x1, /* RT711 on SoundWire link0 */
323 		.links = tgl_i2s_rt1308,
324 		.sof_fw_filename = "sof-tgl.ri",
325 		.sof_tplg_filename = "sof-tgl-rt711-i2s-rt1308.tplg",
326 	},
327 	{
328 		.id = "10EC5682",
329 		.drv_name = "tgl_max98357a_rt5682",
330 		.machine_quirk = snd_soc_acpi_codec_list,
331 		.quirk_data = &tgl_codecs,
332 		.sof_fw_filename = "sof-tgl.ri",
333 		.sof_tplg_filename = "sof-tgl-max98357a-rt5682.tplg",
334 	},
335 	{
336 		.id = "10EC5682",
337 		.drv_name = "tgl_max98373_rt5682",
338 		.machine_quirk = snd_soc_acpi_codec_list,
339 		.quirk_data = &tgl_max98373_amp,
340 		.sof_fw_filename = "sof-tgl.ri",
341 		.sof_tplg_filename = "sof-tgl-max98373-rt5682.tplg",
342 	},
343 	{
344 		.id = "10EC5682",
345 		.drv_name = "tgl_rt1011_rt5682",
346 		.machine_quirk = snd_soc_acpi_codec_list,
347 		.quirk_data = &tgl_rt1011_amp,
348 		.sof_fw_filename = "sof-tgl.ri",
349 		.sof_tplg_filename = "sof-tgl-rt1011-rt5682.tplg",
350 	},
351 	{},
352 };
353 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_machines);
354 
355 /* this table is used when there is no I2S codec present */
356 struct snd_soc_acpi_mach snd_soc_acpi_intel_tgl_sdw_machines[] = {
357 	{
358 		.link_mask = 0x7,
359 		.links = tgl_sdw_rt711_link1_rt1308_link2_rt715_link0,
360 		.drv_name = "sof_sdw",
361 		.sof_fw_filename = "sof-tgl.ri",
362 		.sof_tplg_filename = "sof-tgl-rt715-rt711-rt1308-mono.tplg",
363 	},
364 	{
365 		.link_mask = 0xF, /* 4 active links required */
366 		.links = tgl_3_in_1_default,
367 		.drv_name = "sof_sdw",
368 		.sof_fw_filename = "sof-tgl.ri",
369 		.sof_tplg_filename = "sof-tgl-rt711-rt1308-rt715.tplg",
370 	},
371 	{
372 		/*
373 		 * link_mask should be 0xB, but all links are enabled by BIOS.
374 		 * This entry will be selected if there is no rt1308 exposed
375 		 * on link2 since it will fail to match the above entry.
376 		 */
377 		.link_mask = 0xF,
378 		.links = tgl_3_in_1_mono_amp,
379 		.drv_name = "sof_sdw",
380 		.sof_fw_filename = "sof-tgl.ri",
381 		.sof_tplg_filename = "sof-tgl-rt711-rt1308-mono-rt715.tplg",
382 	},
383 	{
384 		.link_mask = 0xF, /* 4 active links required */
385 		.links = tgl_3_in_1_sdca,
386 		.drv_name = "sof_sdw",
387 		.sof_fw_filename = "sof-tgl.ri",
388 		.sof_tplg_filename = "sof-tgl-rt711-rt1316-rt714.tplg",
389 	},
390 	{
391 		.link_mask = 0x3, /* rt711 on link 0 and 2 rt1308s on link 1 */
392 		.links = tgl_rvp,
393 		.drv_name = "sof_sdw",
394 		.sof_fw_filename = "sof-tgl.ri",
395 		.sof_tplg_filename = "sof-tgl-rt711-rt1308.tplg",
396 	},
397 	{
398 		.link_mask = 0x3, /* rt5682 on link0 & 2xmax98373 on link 1 */
399 		.links = tgl_chromebook_base,
400 		.drv_name = "sof_sdw",
401 		.sof_fw_filename = "sof-tgl.ri",
402 		.sof_tplg_filename = "sof-tgl-sdw-max98373-rt5682.tplg",
403 	},
404 	{
405 		.link_mask = 0x1, /* this will only enable rt5682 for now */
406 		.links = tgl_chromebook_base,
407 		.drv_name = "sof_sdw",
408 		.sof_fw_filename = "sof-tgl.ri",
409 		.sof_tplg_filename = "sof-tgl-rt5682.tplg",
410 	},
411 	{},
412 };
413 EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_tgl_sdw_machines);
414 
415 MODULE_LICENSE("GPL v2");
416 MODULE_DESCRIPTION("Intel Common ACPI Match module");
417