1 /* 2 * cht-bsw-rt5645.c - ASoc Machine driver for Intel Cherryview-based platforms 3 * Cherrytrail and Braswell, with RT5645 codec. 4 * 5 * Copyright (C) 2015 Intel Corp 6 * Author: Fang, Yang A <yang.a.fang@intel.com> 7 * N,Harshapriya <harshapriya.n@intel.com> 8 * This file is modified from cht_bsw_rt5672.c 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; version 2 of the License. 14 * 15 * This program is distributed in the hope that it will be useful, but 16 * WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 18 * General Public License for more details. 19 * 20 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 21 */ 22 23 #include <linux/module.h> 24 #include <linux/platform_device.h> 25 #include <linux/acpi.h> 26 #include <linux/clk.h> 27 #include <linux/dmi.h> 28 #include <linux/slab.h> 29 #include <asm/cpu_device_id.h> 30 #include <asm/platform_sst_audio.h> 31 #include <sound/pcm.h> 32 #include <sound/pcm_params.h> 33 #include <sound/soc.h> 34 #include <sound/jack.h> 35 #include <sound/soc-acpi.h> 36 #include "../../codecs/rt5645.h" 37 #include "../atom/sst-atom-controls.h" 38 39 #define CHT_PLAT_CLK_3_HZ 19200000 40 #define CHT_CODEC_DAI1 "rt5645-aif1" 41 #define CHT_CODEC_DAI2 "rt5645-aif2" 42 43 struct cht_acpi_card { 44 char *codec_id; 45 int codec_type; 46 struct snd_soc_card *soc_card; 47 }; 48 49 struct cht_mc_private { 50 struct snd_soc_jack jack; 51 struct cht_acpi_card *acpi_card; 52 char codec_name[SND_ACPI_I2C_ID_LEN]; 53 struct clk *mclk; 54 }; 55 56 #define CHT_RT5645_MAP(quirk) ((quirk) & GENMASK(7, 0)) 57 #define CHT_RT5645_SSP2_AIF2 BIT(16) /* default is using AIF1 */ 58 #define CHT_RT5645_SSP0_AIF1 BIT(17) 59 #define CHT_RT5645_SSP0_AIF2 BIT(18) 60 61 static unsigned long cht_rt5645_quirk = 0; 62 63 static void log_quirks(struct device *dev) 64 { 65 if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) 66 dev_info(dev, "quirk SSP2_AIF2 enabled"); 67 if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) 68 dev_info(dev, "quirk SSP0_AIF1 enabled"); 69 if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2) 70 dev_info(dev, "quirk SSP0_AIF2 enabled"); 71 } 72 73 static int platform_clock_control(struct snd_soc_dapm_widget *w, 74 struct snd_kcontrol *k, int event) 75 { 76 struct snd_soc_dapm_context *dapm = w->dapm; 77 struct snd_soc_card *card = dapm->card; 78 struct snd_soc_dai *codec_dai; 79 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 80 int ret; 81 82 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI1); 83 if (!codec_dai) 84 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI2); 85 86 if (!codec_dai) { 87 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n"); 88 return -EIO; 89 } 90 91 if (SND_SOC_DAPM_EVENT_ON(event)) { 92 ret = clk_prepare_enable(ctx->mclk); 93 if (ret < 0) { 94 dev_err(card->dev, 95 "could not configure MCLK state"); 96 return ret; 97 } 98 } else { 99 /* Set codec sysclk source to its internal clock because codec PLL will 100 * be off when idle and MCLK will also be off when codec is 101 * runtime suspended. Codec needs clock for jack detection and button 102 * press. MCLK is turned off with clock framework or ACPI. 103 */ 104 ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_RCCLK, 105 48000 * 512, SND_SOC_CLOCK_IN); 106 if (ret < 0) { 107 dev_err(card->dev, "can't set codec sysclk: %d\n", ret); 108 return ret; 109 } 110 111 clk_disable_unprepare(ctx->mclk); 112 } 113 114 return 0; 115 } 116 117 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = { 118 SND_SOC_DAPM_HP("Headphone", NULL), 119 SND_SOC_DAPM_MIC("Headset Mic", NULL), 120 SND_SOC_DAPM_MIC("Int Mic", NULL), 121 SND_SOC_DAPM_MIC("Int Analog Mic", NULL), 122 SND_SOC_DAPM_SPK("Ext Spk", NULL), 123 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, 124 platform_clock_control, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 125 }; 126 127 static const struct snd_soc_dapm_route cht_rt5645_audio_map[] = { 128 {"IN1P", NULL, "Headset Mic"}, 129 {"IN1N", NULL, "Headset Mic"}, 130 {"DMIC L1", NULL, "Int Mic"}, 131 {"DMIC R1", NULL, "Int Mic"}, 132 {"IN2P", NULL, "Int Analog Mic"}, 133 {"IN2N", NULL, "Int Analog Mic"}, 134 {"Headphone", NULL, "HPOL"}, 135 {"Headphone", NULL, "HPOR"}, 136 {"Ext Spk", NULL, "SPOL"}, 137 {"Ext Spk", NULL, "SPOR"}, 138 {"Headphone", NULL, "Platform Clock"}, 139 {"Headset Mic", NULL, "Platform Clock"}, 140 {"Int Mic", NULL, "Platform Clock"}, 141 {"Int Analog Mic", NULL, "Platform Clock"}, 142 {"Int Analog Mic", NULL, "micbias1"}, 143 {"Int Analog Mic", NULL, "micbias2"}, 144 {"Ext Spk", NULL, "Platform Clock"}, 145 }; 146 147 static const struct snd_soc_dapm_route cht_rt5650_audio_map[] = { 148 {"IN1P", NULL, "Headset Mic"}, 149 {"IN1N", NULL, "Headset Mic"}, 150 {"DMIC L2", NULL, "Int Mic"}, 151 {"DMIC R2", NULL, "Int Mic"}, 152 {"Headphone", NULL, "HPOL"}, 153 {"Headphone", NULL, "HPOR"}, 154 {"Ext Spk", NULL, "SPOL"}, 155 {"Ext Spk", NULL, "SPOR"}, 156 {"Headphone", NULL, "Platform Clock"}, 157 {"Headset Mic", NULL, "Platform Clock"}, 158 {"Int Mic", NULL, "Platform Clock"}, 159 {"Ext Spk", NULL, "Platform Clock"}, 160 }; 161 162 static const struct snd_soc_dapm_route cht_rt5645_ssp2_aif1_map[] = { 163 {"AIF1 Playback", NULL, "ssp2 Tx"}, 164 {"ssp2 Tx", NULL, "codec_out0"}, 165 {"ssp2 Tx", NULL, "codec_out1"}, 166 {"codec_in0", NULL, "ssp2 Rx" }, 167 {"codec_in1", NULL, "ssp2 Rx" }, 168 {"ssp2 Rx", NULL, "AIF1 Capture"}, 169 }; 170 171 static const struct snd_soc_dapm_route cht_rt5645_ssp2_aif2_map[] = { 172 {"AIF2 Playback", NULL, "ssp2 Tx"}, 173 {"ssp2 Tx", NULL, "codec_out0"}, 174 {"ssp2 Tx", NULL, "codec_out1"}, 175 {"codec_in0", NULL, "ssp2 Rx" }, 176 {"codec_in1", NULL, "ssp2 Rx" }, 177 {"ssp2 Rx", NULL, "AIF2 Capture"}, 178 }; 179 180 static const struct snd_soc_dapm_route cht_rt5645_ssp0_aif1_map[] = { 181 {"AIF1 Playback", NULL, "ssp0 Tx"}, 182 {"ssp0 Tx", NULL, "modem_out"}, 183 {"modem_in", NULL, "ssp0 Rx" }, 184 {"ssp0 Rx", NULL, "AIF1 Capture"}, 185 }; 186 187 static const struct snd_soc_dapm_route cht_rt5645_ssp0_aif2_map[] = { 188 {"AIF2 Playback", NULL, "ssp0 Tx"}, 189 {"ssp0 Tx", NULL, "modem_out"}, 190 {"modem_in", NULL, "ssp0 Rx" }, 191 {"ssp0 Rx", NULL, "AIF2 Capture"}, 192 }; 193 194 static const struct snd_kcontrol_new cht_mc_controls[] = { 195 SOC_DAPM_PIN_SWITCH("Headphone"), 196 SOC_DAPM_PIN_SWITCH("Headset Mic"), 197 SOC_DAPM_PIN_SWITCH("Int Mic"), 198 SOC_DAPM_PIN_SWITCH("Int Analog Mic"), 199 SOC_DAPM_PIN_SWITCH("Ext Spk"), 200 }; 201 202 static struct snd_soc_jack_pin cht_bsw_jack_pins[] = { 203 { 204 .pin = "Headphone", 205 .mask = SND_JACK_HEADPHONE, 206 }, 207 { 208 .pin = "Headset Mic", 209 .mask = SND_JACK_MICROPHONE, 210 }, 211 }; 212 213 static int cht_aif1_hw_params(struct snd_pcm_substream *substream, 214 struct snd_pcm_hw_params *params) 215 { 216 struct snd_soc_pcm_runtime *rtd = substream->private_data; 217 struct snd_soc_dai *codec_dai = rtd->codec_dai; 218 int ret; 219 220 /* set codec PLL source to the 19.2MHz platform clock (MCLK) */ 221 ret = snd_soc_dai_set_pll(codec_dai, 0, RT5645_PLL1_S_MCLK, 222 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512); 223 if (ret < 0) { 224 dev_err(rtd->dev, "can't set codec pll: %d\n", ret); 225 return ret; 226 } 227 228 ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_PLL1, 229 params_rate(params) * 512, SND_SOC_CLOCK_IN); 230 if (ret < 0) { 231 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret); 232 return ret; 233 } 234 235 return 0; 236 } 237 238 /* uncomment when we have a real quirk 239 static int cht_rt5645_quirk_cb(const struct dmi_system_id *id) 240 { 241 cht_rt5645_quirk = (unsigned long)id->driver_data; 242 return 1; 243 } 244 */ 245 246 static const struct dmi_system_id cht_rt5645_quirk_table[] = { 247 { 248 }, 249 }; 250 251 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) 252 { 253 struct snd_soc_card *card = runtime->card; 254 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); 255 struct snd_soc_component *component = runtime->codec_dai->component; 256 int jack_type; 257 int ret; 258 259 if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) || 260 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 261 /* Select clk_i2s2_asrc as ASRC clock source */ 262 rt5645_sel_asrc_clk_src(component, 263 RT5645_DA_STEREO_FILTER | 264 RT5645_DA_MONO_L_FILTER | 265 RT5645_DA_MONO_R_FILTER | 266 RT5645_AD_STEREO_FILTER, 267 RT5645_CLK_SEL_I2S2_ASRC); 268 } else { 269 /* Select clk_i2s1_asrc as ASRC clock source */ 270 rt5645_sel_asrc_clk_src(component, 271 RT5645_DA_STEREO_FILTER | 272 RT5645_DA_MONO_L_FILTER | 273 RT5645_DA_MONO_R_FILTER | 274 RT5645_AD_STEREO_FILTER, 275 RT5645_CLK_SEL_I2S1_ASRC); 276 } 277 278 if (cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) { 279 ret = snd_soc_dapm_add_routes(&card->dapm, 280 cht_rt5645_ssp2_aif2_map, 281 ARRAY_SIZE(cht_rt5645_ssp2_aif2_map)); 282 } else if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) { 283 ret = snd_soc_dapm_add_routes(&card->dapm, 284 cht_rt5645_ssp0_aif1_map, 285 ARRAY_SIZE(cht_rt5645_ssp0_aif1_map)); 286 } else if (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2) { 287 ret = snd_soc_dapm_add_routes(&card->dapm, 288 cht_rt5645_ssp0_aif2_map, 289 ARRAY_SIZE(cht_rt5645_ssp0_aif2_map)); 290 } else { 291 ret = snd_soc_dapm_add_routes(&card->dapm, 292 cht_rt5645_ssp2_aif1_map, 293 ARRAY_SIZE(cht_rt5645_ssp2_aif1_map)); 294 } 295 if (ret) 296 return ret; 297 298 if (ctx->acpi_card->codec_type == CODEC_TYPE_RT5650) 299 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | 300 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 301 SND_JACK_BTN_2 | SND_JACK_BTN_3; 302 else 303 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; 304 305 ret = snd_soc_card_jack_new(runtime->card, "Headset", 306 jack_type, &ctx->jack, 307 cht_bsw_jack_pins, ARRAY_SIZE(cht_bsw_jack_pins)); 308 if (ret) { 309 dev_err(runtime->dev, "Headset jack creation failed %d\n", ret); 310 return ret; 311 } 312 313 rt5645_set_jack_detect(component, &ctx->jack, &ctx->jack, &ctx->jack); 314 315 316 /* 317 * The firmware might enable the clock at 318 * boot (this information may or may not 319 * be reflected in the enable clock register). 320 * To change the rate we must disable the clock 321 * first to cover these cases. Due to common 322 * clock framework restrictions that do not allow 323 * to disable a clock that has not been enabled, 324 * we need to enable the clock first. 325 */ 326 ret = clk_prepare_enable(ctx->mclk); 327 if (!ret) 328 clk_disable_unprepare(ctx->mclk); 329 330 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); 331 332 if (ret) 333 dev_err(runtime->dev, "unable to set MCLK rate\n"); 334 335 return ret; 336 } 337 338 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, 339 struct snd_pcm_hw_params *params) 340 { 341 int ret; 342 struct snd_interval *rate = hw_param_interval(params, 343 SNDRV_PCM_HW_PARAM_RATE); 344 struct snd_interval *channels = hw_param_interval(params, 345 SNDRV_PCM_HW_PARAM_CHANNELS); 346 347 /* The DSP will covert the FE rate to 48k, stereo, 24bits */ 348 rate->min = rate->max = 48000; 349 channels->min = channels->max = 2; 350 351 if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) || 352 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 353 354 /* set SSP0 to 16-bit */ 355 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); 356 357 /* 358 * Default mode for SSP configuration is TDM 4 slot, override config 359 * with explicit setting to I2S 2ch 16-bit. The word length is set with 360 * dai_set_tdm_slot() since there is no other API exposed 361 */ 362 ret = snd_soc_dai_set_fmt(rtd->cpu_dai, 363 SND_SOC_DAIFMT_I2S | 364 SND_SOC_DAIFMT_NB_NF | 365 SND_SOC_DAIFMT_CBS_CFS 366 ); 367 if (ret < 0) { 368 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 369 return ret; 370 } 371 372 ret = snd_soc_dai_set_fmt(rtd->codec_dai, 373 SND_SOC_DAIFMT_I2S | 374 SND_SOC_DAIFMT_NB_NF | 375 SND_SOC_DAIFMT_CBS_CFS 376 ); 377 if (ret < 0) { 378 dev_err(rtd->dev, "can't set format to I2S, err %d\n", ret); 379 return ret; 380 } 381 382 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16); 383 if (ret < 0) { 384 dev_err(rtd->dev, "can't set I2S config, err %d\n", ret); 385 return ret; 386 } 387 388 } else { 389 390 /* set SSP2 to 24-bit */ 391 params_set_format(params, SNDRV_PCM_FORMAT_S24_LE); 392 393 /* 394 * Default mode for SSP configuration is TDM 4 slot 395 */ 396 ret = snd_soc_dai_set_fmt(rtd->codec_dai, 397 SND_SOC_DAIFMT_DSP_B | 398 SND_SOC_DAIFMT_IB_NF | 399 SND_SOC_DAIFMT_CBS_CFS); 400 if (ret < 0) { 401 dev_err(rtd->dev, "can't set format to TDM %d\n", ret); 402 return ret; 403 } 404 405 /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */ 406 ret = snd_soc_dai_set_tdm_slot(rtd->codec_dai, 0xF, 0xF, 4, 24); 407 if (ret < 0) { 408 dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret); 409 return ret; 410 } 411 } 412 return 0; 413 } 414 415 static int cht_aif1_startup(struct snd_pcm_substream *substream) 416 { 417 return snd_pcm_hw_constraint_single(substream->runtime, 418 SNDRV_PCM_HW_PARAM_RATE, 48000); 419 } 420 421 static const struct snd_soc_ops cht_aif1_ops = { 422 .startup = cht_aif1_startup, 423 }; 424 425 static const struct snd_soc_ops cht_be_ssp2_ops = { 426 .hw_params = cht_aif1_hw_params, 427 }; 428 429 static struct snd_soc_dai_link cht_dailink[] = { 430 [MERR_DPCM_AUDIO] = { 431 .name = "Audio Port", 432 .stream_name = "Audio", 433 .cpu_dai_name = "media-cpu-dai", 434 .codec_dai_name = "snd-soc-dummy-dai", 435 .codec_name = "snd-soc-dummy", 436 .platform_name = "sst-mfld-platform", 437 .nonatomic = true, 438 .dynamic = 1, 439 .dpcm_playback = 1, 440 .dpcm_capture = 1, 441 .ops = &cht_aif1_ops, 442 }, 443 [MERR_DPCM_DEEP_BUFFER] = { 444 .name = "Deep-Buffer Audio Port", 445 .stream_name = "Deep-Buffer Audio", 446 .cpu_dai_name = "deepbuffer-cpu-dai", 447 .codec_dai_name = "snd-soc-dummy-dai", 448 .codec_name = "snd-soc-dummy", 449 .platform_name = "sst-mfld-platform", 450 .nonatomic = true, 451 .dynamic = 1, 452 .dpcm_playback = 1, 453 .ops = &cht_aif1_ops, 454 }, 455 /* CODEC<->CODEC link */ 456 /* back ends */ 457 { 458 .name = "SSP2-Codec", 459 .id = 0, 460 .cpu_dai_name = "ssp2-port", 461 .platform_name = "sst-mfld-platform", 462 .no_pcm = 1, 463 .codec_dai_name = "rt5645-aif1", 464 .codec_name = "i2c-10EC5645:00", 465 .init = cht_codec_init, 466 .be_hw_params_fixup = cht_codec_fixup, 467 .nonatomic = true, 468 .dpcm_playback = 1, 469 .dpcm_capture = 1, 470 .ops = &cht_be_ssp2_ops, 471 }, 472 }; 473 474 /* SoC card */ 475 static struct snd_soc_card snd_soc_card_chtrt5645 = { 476 .name = "chtrt5645", 477 .owner = THIS_MODULE, 478 .dai_link = cht_dailink, 479 .num_links = ARRAY_SIZE(cht_dailink), 480 .dapm_widgets = cht_dapm_widgets, 481 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 482 .dapm_routes = cht_rt5645_audio_map, 483 .num_dapm_routes = ARRAY_SIZE(cht_rt5645_audio_map), 484 .controls = cht_mc_controls, 485 .num_controls = ARRAY_SIZE(cht_mc_controls), 486 }; 487 488 static struct snd_soc_card snd_soc_card_chtrt5650 = { 489 .name = "chtrt5650", 490 .owner = THIS_MODULE, 491 .dai_link = cht_dailink, 492 .num_links = ARRAY_SIZE(cht_dailink), 493 .dapm_widgets = cht_dapm_widgets, 494 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 495 .dapm_routes = cht_rt5650_audio_map, 496 .num_dapm_routes = ARRAY_SIZE(cht_rt5650_audio_map), 497 .controls = cht_mc_controls, 498 .num_controls = ARRAY_SIZE(cht_mc_controls), 499 }; 500 501 static struct cht_acpi_card snd_soc_cards[] = { 502 {"10EC5640", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 503 {"10EC5645", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 504 {"10EC5648", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 505 {"10EC3270", CODEC_TYPE_RT5645, &snd_soc_card_chtrt5645}, 506 {"10EC5650", CODEC_TYPE_RT5650, &snd_soc_card_chtrt5650}, 507 }; 508 509 static char cht_rt5645_codec_name[SND_ACPI_I2C_ID_LEN]; 510 static char cht_rt5645_codec_aif_name[12]; /* = "rt5645-aif[1|2]" */ 511 static char cht_rt5645_cpu_dai_name[10]; /* = "ssp[0|2]-port" */ 512 513 static bool is_valleyview(void) 514 { 515 static const struct x86_cpu_id cpu_ids[] = { 516 { X86_VENDOR_INTEL, 6, 55 }, /* Valleyview, Bay Trail */ 517 {} 518 }; 519 520 if (!x86_match_cpu(cpu_ids)) 521 return false; 522 return true; 523 } 524 525 struct acpi_chan_package { /* ACPICA seems to require 64 bit integers */ 526 u64 aif_value; /* 1: AIF1, 2: AIF2 */ 527 u64 mclock_value; /* usually 25MHz (0x17d7940), ignored */ 528 }; 529 530 static int snd_cht_mc_probe(struct platform_device *pdev) 531 { 532 struct snd_soc_card *card = snd_soc_cards[0].soc_card; 533 struct snd_soc_acpi_mach *mach; 534 struct cht_mc_private *drv; 535 const char *i2c_name = NULL; 536 bool found = false; 537 bool is_bytcr = false; 538 int dai_index = 0; 539 int ret_val = 0; 540 int i; 541 542 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); 543 if (!drv) 544 return -ENOMEM; 545 546 mach = (&pdev->dev)->platform_data; 547 548 for (i = 0; i < ARRAY_SIZE(snd_soc_cards); i++) { 549 if (acpi_dev_found(snd_soc_cards[i].codec_id) && 550 (!strncmp(snd_soc_cards[i].codec_id, mach->id, 8))) { 551 dev_dbg(&pdev->dev, 552 "found codec %s\n", snd_soc_cards[i].codec_id); 553 card = snd_soc_cards[i].soc_card; 554 drv->acpi_card = &snd_soc_cards[i]; 555 found = true; 556 break; 557 } 558 } 559 560 if (!found) { 561 dev_err(&pdev->dev, "No matching HID found in supported list\n"); 562 return -ENODEV; 563 } 564 565 card->dev = &pdev->dev; 566 sprintf(drv->codec_name, "i2c-%s:00", drv->acpi_card->codec_id); 567 568 /* set correct codec name */ 569 for (i = 0; i < ARRAY_SIZE(cht_dailink); i++) 570 if (!strcmp(card->dai_link[i].codec_name, "i2c-10EC5645:00")) { 571 card->dai_link[i].codec_name = drv->codec_name; 572 dai_index = i; 573 } 574 575 /* fixup codec name based on HID */ 576 i2c_name = acpi_dev_get_first_match_name(mach->id, NULL, -1); 577 if (i2c_name) { 578 snprintf(cht_rt5645_codec_name, sizeof(cht_rt5645_codec_name), 579 "%s%s", "i2c-", i2c_name); 580 cht_dailink[dai_index].codec_name = cht_rt5645_codec_name; 581 } 582 583 /* 584 * swap SSP0 if bytcr is detected 585 * (will be overridden if DMI quirk is detected) 586 */ 587 if (is_valleyview()) { 588 struct sst_platform_info *p_info = mach->pdata; 589 const struct sst_res_info *res_info = p_info->res_info; 590 591 if (res_info->acpi_ipc_irq_index == 0) 592 is_bytcr = true; 593 } 594 595 if (is_bytcr) { 596 /* 597 * Baytrail CR platforms may have CHAN package in BIOS, try 598 * to find relevant routing quirk based as done on Windows 599 * platforms. We have to read the information directly from the 600 * BIOS, at this stage the card is not created and the links 601 * with the codec driver/pdata are non-existent 602 */ 603 604 struct acpi_chan_package chan_package; 605 606 /* format specified: 2 64-bit integers */ 607 struct acpi_buffer format = {sizeof("NN"), "NN"}; 608 struct acpi_buffer state = {0, NULL}; 609 struct snd_soc_acpi_package_context pkg_ctx; 610 bool pkg_found = false; 611 612 state.length = sizeof(chan_package); 613 state.pointer = &chan_package; 614 615 pkg_ctx.name = "CHAN"; 616 pkg_ctx.length = 2; 617 pkg_ctx.format = &format; 618 pkg_ctx.state = &state; 619 pkg_ctx.data_valid = false; 620 621 pkg_found = snd_soc_acpi_find_package_from_hid(mach->id, 622 &pkg_ctx); 623 if (pkg_found) { 624 if (chan_package.aif_value == 1) { 625 dev_info(&pdev->dev, "BIOS Routing: AIF1 connected\n"); 626 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF1; 627 } else if (chan_package.aif_value == 2) { 628 dev_info(&pdev->dev, "BIOS Routing: AIF2 connected\n"); 629 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF2; 630 } else { 631 dev_info(&pdev->dev, "BIOS Routing isn't valid, ignored\n"); 632 pkg_found = false; 633 } 634 } 635 636 if (!pkg_found) { 637 /* no BIOS indications, assume SSP0-AIF2 connection */ 638 cht_rt5645_quirk |= CHT_RT5645_SSP0_AIF2; 639 } 640 } 641 642 /* check quirks before creating card */ 643 dmi_check_system(cht_rt5645_quirk_table); 644 log_quirks(&pdev->dev); 645 646 if ((cht_rt5645_quirk & CHT_RT5645_SSP2_AIF2) || 647 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 648 649 /* fixup codec aif name */ 650 snprintf(cht_rt5645_codec_aif_name, 651 sizeof(cht_rt5645_codec_aif_name), 652 "%s", "rt5645-aif2"); 653 654 cht_dailink[dai_index].codec_dai_name = 655 cht_rt5645_codec_aif_name; 656 } 657 658 if ((cht_rt5645_quirk & CHT_RT5645_SSP0_AIF1) || 659 (cht_rt5645_quirk & CHT_RT5645_SSP0_AIF2)) { 660 661 /* fixup cpu dai name name */ 662 snprintf(cht_rt5645_cpu_dai_name, 663 sizeof(cht_rt5645_cpu_dai_name), 664 "%s", "ssp0-port"); 665 666 cht_dailink[dai_index].cpu_dai_name = 667 cht_rt5645_cpu_dai_name; 668 } 669 670 drv->mclk = devm_clk_get(&pdev->dev, "pmc_plt_clk_3"); 671 if (IS_ERR(drv->mclk)) { 672 dev_err(&pdev->dev, 673 "Failed to get MCLK from pmc_plt_clk_3: %ld\n", 674 PTR_ERR(drv->mclk)); 675 return PTR_ERR(drv->mclk); 676 } 677 678 snd_soc_card_set_drvdata(card, drv); 679 ret_val = devm_snd_soc_register_card(&pdev->dev, card); 680 if (ret_val) { 681 dev_err(&pdev->dev, 682 "snd_soc_register_card failed %d\n", ret_val); 683 return ret_val; 684 } 685 platform_set_drvdata(pdev, card); 686 return ret_val; 687 } 688 689 static struct platform_driver snd_cht_mc_driver = { 690 .driver = { 691 .name = "cht-bsw-rt5645", 692 }, 693 .probe = snd_cht_mc_probe, 694 }; 695 696 module_platform_driver(snd_cht_mc_driver) 697 698 MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver"); 699 MODULE_AUTHOR("Fang, Yang A,N,Harshapriya"); 700 MODULE_LICENSE("GPL v2"); 701 MODULE_ALIAS("platform:cht-bsw-rt5645"); 702