1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * cht-bsw-max98090.c - ASoc Machine driver for Intel Cherryview-based 4 * platforms Cherrytrail and Braswell, with max98090 & TI codec. 5 * 6 * Copyright (C) 2015 Intel Corp 7 * Author: Fang, Yang A <yang.a.fang@intel.com> 8 * This file is modified from cht_bsw_rt5645.c 9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 10 * 11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 12 */ 13 14 #include <linux/dmi.h> 15 #include <linux/module.h> 16 #include <linux/platform_device.h> 17 #include <linux/slab.h> 18 #include <linux/acpi.h> 19 #include <linux/clk.h> 20 #include <sound/pcm.h> 21 #include <sound/pcm_params.h> 22 #include <sound/soc.h> 23 #include <sound/soc-acpi.h> 24 #include <sound/jack.h> 25 #include "../../codecs/max98090.h" 26 #include "../atom/sst-atom-controls.h" 27 #include "../../codecs/ts3a227e.h" 28 29 #define CHT_PLAT_CLK_3_HZ 19200000 30 #define CHT_CODEC_DAI "HiFi" 31 32 #define QUIRK_PMC_PLT_CLK_0 0x01 33 34 struct cht_mc_private { 35 struct clk *mclk; 36 struct snd_soc_jack jack; 37 bool ts3a227e_present; 38 int quirks; 39 }; 40 41 static int platform_clock_control(struct snd_soc_dapm_widget *w, 42 struct snd_kcontrol *k, int event) 43 { 44 struct snd_soc_dapm_context *dapm = w->dapm; 45 struct snd_soc_card *card = dapm->card; 46 struct snd_soc_dai *codec_dai; 47 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 48 int ret; 49 50 /* See the comment in snd_cht_mc_probe() */ 51 if (ctx->quirks & QUIRK_PMC_PLT_CLK_0) 52 return 0; 53 54 codec_dai = snd_soc_card_get_codec_dai(card, CHT_CODEC_DAI); 55 if (!codec_dai) { 56 dev_err(card->dev, "Codec dai not found; Unable to set platform clock\n"); 57 return -EIO; 58 } 59 60 if (SND_SOC_DAPM_EVENT_ON(event)) { 61 ret = clk_prepare_enable(ctx->mclk); 62 if (ret < 0) { 63 dev_err(card->dev, 64 "could not configure MCLK state"); 65 return ret; 66 } 67 } else { 68 clk_disable_unprepare(ctx->mclk); 69 } 70 71 return 0; 72 } 73 74 static const struct snd_soc_dapm_widget cht_dapm_widgets[] = { 75 SND_SOC_DAPM_HP("Headphone", NULL), 76 SND_SOC_DAPM_MIC("Headset Mic", NULL), 77 SND_SOC_DAPM_MIC("Int Mic", NULL), 78 SND_SOC_DAPM_SPK("Ext Spk", NULL), 79 SND_SOC_DAPM_SUPPLY("Platform Clock", SND_SOC_NOPM, 0, 0, 80 platform_clock_control, SND_SOC_DAPM_PRE_PMU | 81 SND_SOC_DAPM_POST_PMD), 82 }; 83 84 static const struct snd_soc_dapm_route cht_audio_map[] = { 85 {"IN34", NULL, "Headset Mic"}, 86 {"Headset Mic", NULL, "MICBIAS"}, 87 {"DMICL", NULL, "Int Mic"}, 88 {"Headphone", NULL, "HPL"}, 89 {"Headphone", NULL, "HPR"}, 90 {"Ext Spk", NULL, "SPKL"}, 91 {"Ext Spk", NULL, "SPKR"}, 92 {"HiFi Playback", NULL, "ssp2 Tx"}, 93 {"ssp2 Tx", NULL, "codec_out0"}, 94 {"ssp2 Tx", NULL, "codec_out1"}, 95 {"codec_in0", NULL, "ssp2 Rx" }, 96 {"codec_in1", NULL, "ssp2 Rx" }, 97 {"ssp2 Rx", NULL, "HiFi Capture"}, 98 {"Headphone", NULL, "Platform Clock"}, 99 {"Headset Mic", NULL, "Platform Clock"}, 100 {"Int Mic", NULL, "Platform Clock"}, 101 {"Ext Spk", NULL, "Platform Clock"}, 102 }; 103 104 static const struct snd_kcontrol_new cht_mc_controls[] = { 105 SOC_DAPM_PIN_SWITCH("Headphone"), 106 SOC_DAPM_PIN_SWITCH("Headset Mic"), 107 SOC_DAPM_PIN_SWITCH("Int Mic"), 108 SOC_DAPM_PIN_SWITCH("Ext Spk"), 109 }; 110 111 static int cht_aif1_hw_params(struct snd_pcm_substream *substream, 112 struct snd_pcm_hw_params *params) 113 { 114 struct snd_soc_pcm_runtime *rtd = substream->private_data; 115 struct snd_soc_dai *codec_dai = rtd->codec_dai; 116 int ret; 117 118 ret = snd_soc_dai_set_sysclk(codec_dai, M98090_REG_SYSTEM_CLOCK, 119 CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN); 120 if (ret < 0) { 121 dev_err(rtd->dev, "can't set codec sysclk: %d\n", ret); 122 return ret; 123 } 124 125 return 0; 126 } 127 128 static int cht_ti_jack_event(struct notifier_block *nb, 129 unsigned long event, void *data) 130 { 131 struct snd_soc_jack *jack = (struct snd_soc_jack *)data; 132 struct snd_soc_dapm_context *dapm = &jack->card->dapm; 133 134 if (event & SND_JACK_MICROPHONE) { 135 snd_soc_dapm_force_enable_pin(dapm, "SHDN"); 136 snd_soc_dapm_force_enable_pin(dapm, "MICBIAS"); 137 snd_soc_dapm_sync(dapm); 138 } else { 139 snd_soc_dapm_disable_pin(dapm, "MICBIAS"); 140 snd_soc_dapm_disable_pin(dapm, "SHDN"); 141 snd_soc_dapm_sync(dapm); 142 } 143 144 return 0; 145 } 146 147 static struct notifier_block cht_jack_nb = { 148 .notifier_call = cht_ti_jack_event, 149 }; 150 151 static struct snd_soc_jack_pin hs_jack_pins[] = { 152 { 153 .pin = "Headphone", 154 .mask = SND_JACK_HEADPHONE, 155 }, 156 { 157 .pin = "Headset Mic", 158 .mask = SND_JACK_MICROPHONE, 159 }, 160 }; 161 162 static struct snd_soc_jack_gpio hs_jack_gpios[] = { 163 { 164 .name = "hp", 165 .report = SND_JACK_HEADPHONE | SND_JACK_LINEOUT, 166 .debounce_time = 200, 167 }, 168 { 169 .name = "mic", 170 .invert = 1, 171 .report = SND_JACK_MICROPHONE, 172 .debounce_time = 200, 173 }, 174 }; 175 176 static const struct acpi_gpio_params hp_gpios = { 0, 0, false }; 177 static const struct acpi_gpio_params mic_gpios = { 1, 0, false }; 178 179 static const struct acpi_gpio_mapping acpi_max98090_gpios[] = { 180 { "hp-gpios", &hp_gpios, 1 }, 181 { "mic-gpios", &mic_gpios, 1 }, 182 {}, 183 }; 184 185 static int cht_codec_init(struct snd_soc_pcm_runtime *runtime) 186 { 187 int ret; 188 int jack_type; 189 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(runtime->card); 190 struct snd_soc_jack *jack = &ctx->jack; 191 192 if (ctx->ts3a227e_present) { 193 /* 194 * The jack has already been created in the 195 * cht_max98090_headset_init() function. 196 */ 197 snd_soc_jack_notifier_register(jack, &cht_jack_nb); 198 return 0; 199 } 200 201 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE; 202 203 ret = snd_soc_card_jack_new(runtime->card, "Headset Jack", 204 jack_type, jack, 205 hs_jack_pins, ARRAY_SIZE(hs_jack_pins)); 206 if (ret) { 207 dev_err(runtime->dev, "Headset Jack creation failed %d\n", ret); 208 return ret; 209 } 210 211 ret = snd_soc_jack_add_gpiods(runtime->card->dev->parent, jack, 212 ARRAY_SIZE(hs_jack_gpios), 213 hs_jack_gpios); 214 if (ret) { 215 /* 216 * flag error but don't bail if jack detect is broken 217 * due to platform issues or bad BIOS/configuration 218 */ 219 dev_err(runtime->dev, 220 "jack detection gpios not added, error %d\n", ret); 221 } 222 223 /* See the comment in snd_cht_mc_probe() */ 224 if (ctx->quirks & QUIRK_PMC_PLT_CLK_0) 225 return 0; 226 227 /* 228 * The firmware might enable the clock at 229 * boot (this information may or may not 230 * be reflected in the enable clock register). 231 * To change the rate we must disable the clock 232 * first to cover these cases. Due to common 233 * clock framework restrictions that do not allow 234 * to disable a clock that has not been enabled, 235 * we need to enable the clock first. 236 */ 237 ret = clk_prepare_enable(ctx->mclk); 238 if (!ret) 239 clk_disable_unprepare(ctx->mclk); 240 241 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); 242 243 if (ret) 244 dev_err(runtime->dev, "unable to set MCLK rate\n"); 245 246 return ret; 247 } 248 249 static int cht_codec_fixup(struct snd_soc_pcm_runtime *rtd, 250 struct snd_pcm_hw_params *params) 251 { 252 struct snd_interval *rate = hw_param_interval(params, 253 SNDRV_PCM_HW_PARAM_RATE); 254 struct snd_interval *channels = hw_param_interval(params, 255 SNDRV_PCM_HW_PARAM_CHANNELS); 256 int ret = 0; 257 unsigned int fmt = 0; 258 259 ret = snd_soc_dai_set_tdm_slot(rtd->cpu_dai, 0x3, 0x3, 2, 16); 260 if (ret < 0) { 261 dev_err(rtd->dev, "can't set cpu_dai slot fmt: %d\n", ret); 262 return ret; 263 } 264 265 fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 266 | SND_SOC_DAIFMT_CBS_CFS; 267 268 ret = snd_soc_dai_set_fmt(rtd->cpu_dai, fmt); 269 if (ret < 0) { 270 dev_err(rtd->dev, "can't set cpu_dai set fmt: %d\n", ret); 271 return ret; 272 } 273 274 /* The DSP will covert the FE rate to 48k, stereo, 24bits */ 275 rate->min = rate->max = 48000; 276 channels->min = channels->max = 2; 277 278 /* set SSP2 to 16-bit */ 279 params_set_format(params, SNDRV_PCM_FORMAT_S16_LE); 280 return 0; 281 } 282 283 static int cht_aif1_startup(struct snd_pcm_substream *substream) 284 { 285 return snd_pcm_hw_constraint_single(substream->runtime, 286 SNDRV_PCM_HW_PARAM_RATE, 48000); 287 } 288 289 static int cht_max98090_headset_init(struct snd_soc_component *component) 290 { 291 struct snd_soc_card *card = component->card; 292 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 293 struct snd_soc_jack *jack = &ctx->jack; 294 int jack_type; 295 int ret; 296 297 /* 298 * TI supports 4 butons headset detection 299 * KEY_MEDIA 300 * KEY_VOICECOMMAND 301 * KEY_VOLUMEUP 302 * KEY_VOLUMEDOWN 303 */ 304 jack_type = SND_JACK_HEADPHONE | SND_JACK_MICROPHONE | 305 SND_JACK_BTN_0 | SND_JACK_BTN_1 | 306 SND_JACK_BTN_2 | SND_JACK_BTN_3; 307 308 ret = snd_soc_card_jack_new(card, "Headset Jack", jack_type, 309 jack, NULL, 0); 310 if (ret) { 311 dev_err(card->dev, "Headset Jack creation failed %d\n", ret); 312 return ret; 313 } 314 315 return ts3a227e_enable_jack_detect(component, jack); 316 } 317 318 static const struct snd_soc_ops cht_aif1_ops = { 319 .startup = cht_aif1_startup, 320 }; 321 322 static const struct snd_soc_ops cht_be_ssp2_ops = { 323 .hw_params = cht_aif1_hw_params, 324 }; 325 326 static struct snd_soc_aux_dev cht_max98090_headset_dev = { 327 .dlc = COMP_AUX("i2c-104C227E:00"), 328 .init = cht_max98090_headset_init, 329 }; 330 331 SND_SOC_DAILINK_DEF(dummy, 332 DAILINK_COMP_ARRAY(COMP_DUMMY())); 333 334 SND_SOC_DAILINK_DEF(media, 335 DAILINK_COMP_ARRAY(COMP_CPU("media-cpu-dai"))); 336 337 SND_SOC_DAILINK_DEF(deepbuffer, 338 DAILINK_COMP_ARRAY(COMP_CPU("deepbuffer-cpu-dai"))); 339 340 SND_SOC_DAILINK_DEF(ssp2_port, 341 DAILINK_COMP_ARRAY(COMP_CPU("ssp2-port"))); 342 SND_SOC_DAILINK_DEF(ssp2_codec, 343 DAILINK_COMP_ARRAY(COMP_CODEC("i2c-193C9890:00", "HiFi"))); 344 345 SND_SOC_DAILINK_DEF(platform, 346 DAILINK_COMP_ARRAY(COMP_PLATFORM("sst-mfld-platform"))); 347 348 static struct snd_soc_dai_link cht_dailink[] = { 349 [MERR_DPCM_AUDIO] = { 350 .name = "Audio Port", 351 .stream_name = "Audio", 352 .nonatomic = true, 353 .dynamic = 1, 354 .dpcm_playback = 1, 355 .dpcm_capture = 1, 356 .ops = &cht_aif1_ops, 357 SND_SOC_DAILINK_REG(media, dummy, platform), 358 }, 359 [MERR_DPCM_DEEP_BUFFER] = { 360 .name = "Deep-Buffer Audio Port", 361 .stream_name = "Deep-Buffer Audio", 362 .nonatomic = true, 363 .dynamic = 1, 364 .dpcm_playback = 1, 365 .ops = &cht_aif1_ops, 366 SND_SOC_DAILINK_REG(deepbuffer, dummy, platform), 367 }, 368 /* back ends */ 369 { 370 .name = "SSP2-Codec", 371 .id = 0, 372 .no_pcm = 1, 373 .dai_fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF 374 | SND_SOC_DAIFMT_CBS_CFS, 375 .init = cht_codec_init, 376 .be_hw_params_fixup = cht_codec_fixup, 377 .dpcm_playback = 1, 378 .dpcm_capture = 1, 379 .ops = &cht_be_ssp2_ops, 380 SND_SOC_DAILINK_REG(ssp2_port, ssp2_codec, platform), 381 }, 382 }; 383 384 /* SoC card */ 385 static struct snd_soc_card snd_soc_card_cht = { 386 .name = "chtmax98090", 387 .owner = THIS_MODULE, 388 .dai_link = cht_dailink, 389 .num_links = ARRAY_SIZE(cht_dailink), 390 .aux_dev = &cht_max98090_headset_dev, 391 .num_aux_devs = 1, 392 .dapm_widgets = cht_dapm_widgets, 393 .num_dapm_widgets = ARRAY_SIZE(cht_dapm_widgets), 394 .dapm_routes = cht_audio_map, 395 .num_dapm_routes = ARRAY_SIZE(cht_audio_map), 396 .controls = cht_mc_controls, 397 .num_controls = ARRAY_SIZE(cht_mc_controls), 398 }; 399 400 static const struct dmi_system_id cht_max98090_quirk_table[] = { 401 { 402 /* Banjo model Chromebook */ 403 .matches = { 404 DMI_MATCH(DMI_PRODUCT_NAME, "Banjo"), 405 }, 406 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 407 }, 408 { 409 /* Candy model Chromebook */ 410 .matches = { 411 DMI_MATCH(DMI_PRODUCT_NAME, "Candy"), 412 }, 413 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 414 }, 415 { 416 /* Clapper model Chromebook */ 417 .matches = { 418 DMI_MATCH(DMI_PRODUCT_NAME, "Clapper"), 419 }, 420 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 421 }, 422 { 423 /* Cyan model Chromebook */ 424 .matches = { 425 DMI_MATCH(DMI_PRODUCT_NAME, "Cyan"), 426 }, 427 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 428 }, 429 { 430 /* Enguarde model Chromebook */ 431 .matches = { 432 DMI_MATCH(DMI_PRODUCT_NAME, "Enguarde"), 433 }, 434 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 435 }, 436 { 437 /* Glimmer model Chromebook */ 438 .matches = { 439 DMI_MATCH(DMI_PRODUCT_NAME, "Glimmer"), 440 }, 441 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 442 }, 443 { 444 /* Gnawty model Chromebook (Acer Chromebook CB3-111) */ 445 .matches = { 446 DMI_MATCH(DMI_PRODUCT_NAME, "Gnawty"), 447 }, 448 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 449 }, 450 { 451 /* Heli model Chromebook */ 452 .matches = { 453 DMI_MATCH(DMI_PRODUCT_NAME, "Heli"), 454 }, 455 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 456 }, 457 { 458 /* Kip model Chromebook */ 459 .matches = { 460 DMI_MATCH(DMI_PRODUCT_NAME, "Kip"), 461 }, 462 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 463 }, 464 { 465 /* Ninja model Chromebook */ 466 .matches = { 467 DMI_MATCH(DMI_PRODUCT_NAME, "Ninja"), 468 }, 469 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 470 }, 471 { 472 /* Orco model Chromebook */ 473 .matches = { 474 DMI_MATCH(DMI_PRODUCT_NAME, "Orco"), 475 }, 476 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 477 }, 478 { 479 /* Quawks model Chromebook */ 480 .matches = { 481 DMI_MATCH(DMI_PRODUCT_NAME, "Quawks"), 482 }, 483 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 484 }, 485 { 486 /* Rambi model Chromebook */ 487 .matches = { 488 DMI_MATCH(DMI_PRODUCT_NAME, "Rambi"), 489 }, 490 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 491 }, 492 { 493 /* Squawks model Chromebook */ 494 .matches = { 495 DMI_MATCH(DMI_PRODUCT_NAME, "Squawks"), 496 }, 497 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 498 }, 499 { 500 /* Sumo model Chromebook */ 501 .matches = { 502 DMI_MATCH(DMI_PRODUCT_NAME, "Sumo"), 503 }, 504 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 505 }, 506 { 507 /* Swanky model Chromebook (Toshiba Chromebook 2) */ 508 .matches = { 509 DMI_MATCH(DMI_PRODUCT_NAME, "Swanky"), 510 }, 511 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 512 }, 513 { 514 /* Winky model Chromebook */ 515 .matches = { 516 DMI_MATCH(DMI_PRODUCT_NAME, "Winky"), 517 }, 518 .driver_data = (void *)QUIRK_PMC_PLT_CLK_0, 519 }, 520 {} 521 }; 522 523 static int snd_cht_mc_probe(struct platform_device *pdev) 524 { 525 const struct dmi_system_id *dmi_id; 526 struct device *dev = &pdev->dev; 527 int ret_val = 0; 528 struct cht_mc_private *drv; 529 const char *mclk_name; 530 struct snd_soc_acpi_mach *mach; 531 const char *platform_name; 532 533 drv = devm_kzalloc(&pdev->dev, sizeof(*drv), GFP_KERNEL); 534 if (!drv) 535 return -ENOMEM; 536 537 dmi_id = dmi_first_match(cht_max98090_quirk_table); 538 if (dmi_id) 539 drv->quirks = (unsigned long)dmi_id->driver_data; 540 541 drv->ts3a227e_present = acpi_dev_found("104C227E"); 542 if (!drv->ts3a227e_present) { 543 /* no need probe TI jack detection chip */ 544 snd_soc_card_cht.aux_dev = NULL; 545 snd_soc_card_cht.num_aux_devs = 0; 546 547 ret_val = devm_acpi_dev_add_driver_gpios(dev->parent, 548 acpi_max98090_gpios); 549 if (ret_val) 550 dev_dbg(dev, "Unable to add GPIO mapping table\n"); 551 } 552 553 /* override plaform name, if required */ 554 snd_soc_card_cht.dev = &pdev->dev; 555 mach = (&pdev->dev)->platform_data; 556 platform_name = mach->mach_params.platform; 557 558 ret_val = snd_soc_fixup_dai_links_platform_name(&snd_soc_card_cht, 559 platform_name); 560 if (ret_val) 561 return ret_val; 562 563 /* register the soc card */ 564 snd_soc_card_set_drvdata(&snd_soc_card_cht, drv); 565 566 if (drv->quirks & QUIRK_PMC_PLT_CLK_0) 567 mclk_name = "pmc_plt_clk_0"; 568 else 569 mclk_name = "pmc_plt_clk_3"; 570 571 drv->mclk = devm_clk_get(&pdev->dev, mclk_name); 572 if (IS_ERR(drv->mclk)) { 573 dev_err(&pdev->dev, 574 "Failed to get MCLK from %s: %ld\n", 575 mclk_name, PTR_ERR(drv->mclk)); 576 return PTR_ERR(drv->mclk); 577 } 578 579 /* 580 * Boards which have the MAX98090's clk connected to clk_0 do not seem 581 * to like it if we muck with the clock. If we disable the clock when 582 * it is unused we get "max98090 i2c-193C9890:00: PLL unlocked" errors 583 * and the PLL never seems to lock again. 584 * So for these boards we enable it here once and leave it at that. 585 */ 586 if (drv->quirks & QUIRK_PMC_PLT_CLK_0) { 587 ret_val = clk_prepare_enable(drv->mclk); 588 if (ret_val < 0) { 589 dev_err(&pdev->dev, "MCLK enable error: %d\n", ret_val); 590 return ret_val; 591 } 592 } 593 594 ret_val = devm_snd_soc_register_card(&pdev->dev, &snd_soc_card_cht); 595 if (ret_val) { 596 dev_err(&pdev->dev, 597 "snd_soc_register_card failed %d\n", ret_val); 598 return ret_val; 599 } 600 platform_set_drvdata(pdev, &snd_soc_card_cht); 601 return ret_val; 602 } 603 604 static int snd_cht_mc_remove(struct platform_device *pdev) 605 { 606 struct snd_soc_card *card = platform_get_drvdata(pdev); 607 struct cht_mc_private *ctx = snd_soc_card_get_drvdata(card); 608 609 if (ctx->quirks & QUIRK_PMC_PLT_CLK_0) 610 clk_disable_unprepare(ctx->mclk); 611 612 return 0; 613 } 614 615 static struct platform_driver snd_cht_mc_driver = { 616 .driver = { 617 .name = "cht-bsw-max98090", 618 }, 619 .probe = snd_cht_mc_probe, 620 .remove = snd_cht_mc_remove, 621 }; 622 623 module_platform_driver(snd_cht_mc_driver) 624 625 MODULE_DESCRIPTION("ASoC Intel(R) Braswell Machine driver"); 626 MODULE_AUTHOR("Fang, Yang A <yang.a.fang@intel.com>"); 627 MODULE_LICENSE("GPL v2"); 628 MODULE_ALIAS("platform:cht-bsw-max98090"); 629