1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9 #ifndef __SOUND_SOC_INTEL_AVS_MSGS_H 10 #define __SOUND_SOC_INTEL_AVS_MSGS_H 11 12 struct avs_dev; 13 14 #define AVS_MAILBOX_SIZE 4096 15 16 enum avs_msg_target { 17 AVS_FW_GEN_MSG = 0, 18 AVS_MOD_MSG = 1 19 }; 20 21 enum avs_msg_direction { 22 AVS_MSG_REQUEST = 0, 23 AVS_MSG_REPLY = 1 24 }; 25 26 enum avs_global_msg_type { 27 AVS_GLB_ROM_CONTROL = 1, 28 AVS_GLB_LOAD_MULTIPLE_MODULES = 15, 29 AVS_GLB_UNLOAD_MULTIPLE_MODULES = 16, 30 AVS_GLB_CREATE_PIPELINE = 17, 31 AVS_GLB_DELETE_PIPELINE = 18, 32 AVS_GLB_SET_PIPELINE_STATE = 19, 33 AVS_GLB_GET_PIPELINE_STATE = 20, 34 AVS_GLB_LOAD_LIBRARY = 24, 35 AVS_GLB_NOTIFICATION = 27, 36 }; 37 38 union avs_global_msg { 39 u64 val; 40 struct { 41 union { 42 u32 primary; 43 struct { 44 u32 rsvd:24; 45 u32 global_msg_type:5; 46 u32 msg_direction:1; 47 u32 msg_target:1; 48 }; 49 /* set boot config */ 50 struct { 51 u32 rom_ctrl_msg_type:9; 52 u32 dma_id:5; 53 u32 purge_request:1; 54 } boot_cfg; 55 /* module loading */ 56 struct { 57 u32 mod_cnt:8; 58 } load_multi_mods; 59 /* pipeline management */ 60 struct { 61 u32 ppl_mem_size:11; 62 u32 ppl_priority:5; 63 u32 instance_id:8; 64 } create_ppl; 65 struct { 66 u32 rsvd:16; 67 u32 instance_id:8; 68 } ppl; /* generic ppl request */ 69 struct { 70 u32 state:16; 71 u32 ppl_id:8; 72 } set_ppl_state; 73 struct { 74 u32 ppl_id:8; 75 } get_ppl_state; 76 /* library loading */ 77 struct { 78 u32 dma_id:5; 79 u32 rsvd:11; 80 u32 lib_id:4; 81 } load_lib; 82 }; 83 union { 84 u32 val; 85 /* pipeline management */ 86 struct { 87 u32 lp:1; /* low power flag */ 88 u32 rsvd:3; 89 u32 attributes:16; /* additional scheduling flags */ 90 } create_ppl; 91 } ext; 92 }; 93 } __packed; 94 95 struct avs_tlv { 96 u32 type; 97 u32 length; 98 u32 value[]; 99 } __packed; 100 101 enum avs_module_msg_type { 102 AVS_MOD_INIT_INSTANCE = 0, 103 AVS_MOD_LARGE_CONFIG_GET = 3, 104 AVS_MOD_LARGE_CONFIG_SET = 4, 105 AVS_MOD_BIND = 5, 106 AVS_MOD_UNBIND = 6, 107 AVS_MOD_SET_DX = 7, 108 AVS_MOD_SET_D0IX = 8, 109 AVS_MOD_DELETE_INSTANCE = 11, 110 }; 111 112 union avs_module_msg { 113 u64 val; 114 struct { 115 union { 116 u32 primary; 117 struct { 118 u32 module_id:16; 119 u32 instance_id:8; 120 u32 module_msg_type:5; 121 u32 msg_direction:1; 122 u32 msg_target:1; 123 }; 124 }; 125 union { 126 u32 val; 127 struct { 128 u32 param_block_size:16; 129 u32 ppl_instance_id:8; 130 u32 core_id:4; 131 u32 proc_domain:1; 132 } init_instance; 133 struct { 134 u32 data_off_size:20; 135 u32 large_param_id:8; 136 u32 final_block:1; 137 u32 init_block:1; 138 } large_config; 139 struct { 140 u32 dst_module_id:16; 141 u32 dst_instance_id:8; 142 u32 dst_queue:3; 143 u32 src_queue:3; 144 } bind_unbind; 145 struct { 146 u32 wake:1; 147 u32 streaming:1; 148 } set_d0ix; 149 } ext; 150 }; 151 } __packed; 152 153 #define AVS_IPC_NOT_SUPPORTED 15 154 155 union avs_reply_msg { 156 u64 val; 157 struct { 158 union { 159 u32 primary; 160 struct { 161 u32 status:24; 162 u32 global_msg_type:5; 163 u32 msg_direction:1; 164 u32 msg_target:1; 165 }; 166 }; 167 union { 168 u32 val; 169 /* module loading */ 170 struct { 171 u32 err_mod_id:16; 172 } load_multi_mods; 173 /* pipeline management */ 174 struct { 175 u32 state:5; 176 } get_ppl_state; 177 /* module management */ 178 struct { 179 u32 data_off_size:20; 180 u32 large_param_id:8; 181 u32 final_block:1; 182 u32 init_block:1; 183 } large_config; 184 } ext; 185 }; 186 } __packed; 187 188 enum avs_notify_msg_type { 189 AVS_NOTIFY_PHRASE_DETECTED = 4, 190 AVS_NOTIFY_RESOURCE_EVENT = 5, 191 AVS_NOTIFY_LOG_BUFFER_STATUS = 6, 192 AVS_NOTIFY_FW_READY = 8, 193 AVS_NOTIFY_EXCEPTION_CAUGHT = 10, 194 AVS_NOTIFY_MODULE_EVENT = 12, 195 }; 196 197 union avs_notify_msg { 198 u64 val; 199 struct { 200 union { 201 u32 primary; 202 struct { 203 u32 rsvd:16; 204 u32 notify_msg_type:8; 205 u32 global_msg_type:5; 206 u32 msg_direction:1; 207 u32 msg_target:1; 208 }; 209 struct { 210 u16 rsvd:12; 211 u16 core:4; 212 } log; 213 }; 214 union { 215 u32 val; 216 struct { 217 u32 core_id:2; 218 u32 stack_dump_size:16; 219 } coredump; 220 } ext; 221 }; 222 } __packed; 223 224 #define AVS_MSG(hdr) { .val = hdr } 225 226 #define AVS_GLOBAL_REQUEST(msg_type) \ 227 { \ 228 .global_msg_type = AVS_GLB_##msg_type, \ 229 .msg_direction = AVS_MSG_REQUEST, \ 230 .msg_target = AVS_FW_GEN_MSG, \ 231 } 232 233 #define AVS_MODULE_REQUEST(msg_type) \ 234 { \ 235 .module_msg_type = AVS_MOD_##msg_type, \ 236 .msg_direction = AVS_MSG_REQUEST, \ 237 .msg_target = AVS_MOD_MSG, \ 238 } 239 240 #define AVS_NOTIFICATION(msg_type) \ 241 { \ 242 .notify_msg_type = AVS_NOTIFY_##msg_type,\ 243 .global_msg_type = AVS_GLB_NOTIFICATION,\ 244 .msg_direction = AVS_MSG_REPLY, \ 245 .msg_target = AVS_FW_GEN_MSG, \ 246 } 247 248 #define avs_msg_is_reply(hdr) \ 249 ({ \ 250 union avs_reply_msg __msg = AVS_MSG(hdr); \ 251 __msg.msg_direction == AVS_MSG_REPLY && \ 252 __msg.global_msg_type != AVS_GLB_NOTIFICATION; \ 253 }) 254 255 /* Notification types */ 256 257 struct avs_notify_voice_data { 258 u16 kpd_score; 259 u16 reserved; 260 } __packed; 261 262 struct avs_notify_res_data { 263 u32 resource_type; 264 u32 resource_id; 265 u32 event_type; 266 u32 reserved; 267 u32 data[6]; 268 } __packed; 269 270 struct avs_notify_mod_data { 271 u32 module_instance_id; 272 u32 event_id; 273 u32 data_size; 274 u32 data[]; 275 } __packed; 276 277 /* ROM messages */ 278 enum avs_rom_control_msg_type { 279 AVS_ROM_SET_BOOT_CONFIG = 0, 280 }; 281 282 int avs_ipc_set_boot_config(struct avs_dev *adev, u32 dma_id, u32 purge); 283 284 /* Code loading messages */ 285 int avs_ipc_load_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 286 int avs_ipc_unload_modules(struct avs_dev *adev, u16 *mod_ids, u32 num_mod_ids); 287 int avs_ipc_load_library(struct avs_dev *adev, u32 dma_id, u32 lib_id); 288 289 /* Pipeline management messages */ 290 enum avs_pipeline_state { 291 AVS_PPL_STATE_INVALID, 292 AVS_PPL_STATE_UNINITIALIZED, 293 AVS_PPL_STATE_RESET, 294 AVS_PPL_STATE_PAUSED, 295 AVS_PPL_STATE_RUNNING, 296 }; 297 298 int avs_ipc_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 299 u8 instance_id, bool lp, u16 attributes); 300 int avs_ipc_delete_pipeline(struct avs_dev *adev, u8 instance_id); 301 int avs_ipc_set_pipeline_state(struct avs_dev *adev, u8 instance_id, 302 enum avs_pipeline_state state); 303 int avs_ipc_get_pipeline_state(struct avs_dev *adev, u8 instance_id, 304 enum avs_pipeline_state *state); 305 306 /* Module management messages */ 307 int avs_ipc_init_instance(struct avs_dev *adev, u16 module_id, u8 instance_id, 308 u8 ppl_id, u8 core_id, u8 domain, 309 void *param, u32 param_size); 310 int avs_ipc_delete_instance(struct avs_dev *adev, u16 module_id, u8 instance_id); 311 int avs_ipc_bind(struct avs_dev *adev, u16 module_id, u8 instance_id, 312 u16 dst_module_id, u8 dst_instance_id, 313 u8 dst_queue, u8 src_queue); 314 int avs_ipc_unbind(struct avs_dev *adev, u16 module_id, u8 instance_id, 315 u16 dst_module_id, u8 dst_instance_id, 316 u8 dst_queue, u8 src_queue); 317 int avs_ipc_set_large_config(struct avs_dev *adev, u16 module_id, 318 u8 instance_id, u8 param_id, 319 u8 *request, size_t request_size); 320 int avs_ipc_get_large_config(struct avs_dev *adev, u16 module_id, u8 instance_id, 321 u8 param_id, u8 *request_data, size_t request_size, 322 u8 **reply_data, size_t *reply_size); 323 324 /* DSP cores and domains power management messages */ 325 struct avs_dxstate_info { 326 u32 core_mask; /* which cores are subject for power transition */ 327 u32 dx_mask; /* bit[n]=1 core n goes to D0, bit[n]=0 it goes to D3 */ 328 } __packed; 329 330 int avs_ipc_set_dx(struct avs_dev *adev, u32 core_mask, bool powerup); 331 int avs_ipc_set_d0ix(struct avs_dev *adev, bool enable_pg, bool streaming); 332 333 /* Base-firmware runtime parameters */ 334 335 #define AVS_BASEFW_MOD_ID 0 336 #define AVS_BASEFW_INST_ID 0 337 338 enum avs_basefw_runtime_param { 339 AVS_BASEFW_ENABLE_LOGS = 6, 340 AVS_BASEFW_FIRMWARE_CONFIG = 7, 341 AVS_BASEFW_HARDWARE_CONFIG = 8, 342 AVS_BASEFW_MODULES_INFO = 9, 343 AVS_BASEFW_LIBRARIES_INFO = 16, 344 AVS_BASEFW_SYSTEM_TIME = 20, 345 }; 346 347 enum avs_log_enable { 348 AVS_LOG_DISABLE = 0, 349 AVS_LOG_ENABLE = 1 350 }; 351 352 enum avs_skl_log_priority { 353 AVS_SKL_LOG_CRITICAL = 1, 354 AVS_SKL_LOG_HIGH, 355 AVS_SKL_LOG_MEDIUM, 356 AVS_SKL_LOG_LOW, 357 AVS_SKL_LOG_VERBOSE, 358 }; 359 360 struct skl_log_state { 361 u32 enable; 362 u32 min_priority; 363 } __packed; 364 365 struct skl_log_state_info { 366 u32 core_mask; 367 struct skl_log_state logs_core[]; 368 } __packed; 369 370 struct apl_log_state_info { 371 u32 aging_timer_period; 372 u32 fifo_full_timer_period; 373 u32 core_mask; 374 struct skl_log_state logs_core[]; 375 } __packed; 376 377 int avs_ipc_set_enable_logs(struct avs_dev *adev, u8 *log_info, size_t size); 378 379 struct avs_fw_version { 380 u16 major; 381 u16 minor; 382 u16 hotfix; 383 u16 build; 384 }; 385 386 enum avs_fw_cfg_params { 387 AVS_FW_CFG_FW_VERSION = 0, 388 AVS_FW_CFG_MEMORY_RECLAIMED, 389 AVS_FW_CFG_SLOW_CLOCK_FREQ_HZ, 390 AVS_FW_CFG_FAST_CLOCK_FREQ_HZ, 391 AVS_FW_CFG_DMA_BUFFER_CONFIG, 392 AVS_FW_CFG_ALH_SUPPORT_LEVEL, 393 AVS_FW_CFG_IPC_DL_MAILBOX_BYTES, 394 AVS_FW_CFG_IPC_UL_MAILBOX_BYTES, 395 AVS_FW_CFG_TRACE_LOG_BYTES, 396 AVS_FW_CFG_MAX_PPL_COUNT, 397 AVS_FW_CFG_MAX_ASTATE_COUNT, 398 AVS_FW_CFG_MAX_MODULE_PIN_COUNT, 399 AVS_FW_CFG_MODULES_COUNT, 400 AVS_FW_CFG_MAX_MOD_INST_COUNT, 401 AVS_FW_CFG_MAX_LL_TASKS_PER_PRI_COUNT, 402 AVS_FW_CFG_LL_PRI_COUNT, 403 AVS_FW_CFG_MAX_DP_TASKS_COUNT, 404 AVS_FW_CFG_MAX_LIBS_COUNT, 405 AVS_FW_CFG_SCHEDULER_CONFIG, 406 AVS_FW_CFG_XTAL_FREQ_HZ, 407 AVS_FW_CFG_CLOCKS_CONFIG, 408 AVS_FW_CFG_RESERVED, 409 AVS_FW_CFG_POWER_GATING_POLICY, 410 AVS_FW_CFG_ASSERT_MODE, 411 }; 412 413 struct avs_fw_cfg { 414 struct avs_fw_version fw_version; 415 u32 memory_reclaimed; 416 u32 slow_clock_freq_hz; 417 u32 fast_clock_freq_hz; 418 u32 alh_support; 419 u32 ipc_dl_mailbox_bytes; 420 u32 ipc_ul_mailbox_bytes; 421 u32 trace_log_bytes; 422 u32 max_ppl_count; 423 u32 max_astate_count; 424 u32 max_module_pin_count; 425 u32 modules_count; 426 u32 max_mod_inst_count; 427 u32 max_ll_tasks_per_pri_count; 428 u32 ll_pri_count; 429 u32 max_dp_tasks_count; 430 u32 max_libs_count; 431 u32 xtal_freq_hz; 432 u32 power_gating_policy; 433 }; 434 435 int avs_ipc_get_fw_config(struct avs_dev *adev, struct avs_fw_cfg *cfg); 436 437 enum avs_hw_cfg_params { 438 AVS_HW_CFG_AVS_VER, 439 AVS_HW_CFG_DSP_CORES, 440 AVS_HW_CFG_MEM_PAGE_BYTES, 441 AVS_HW_CFG_TOTAL_PHYS_MEM_PAGES, 442 AVS_HW_CFG_I2S_CAPS, 443 AVS_HW_CFG_GPDMA_CAPS, 444 AVS_HW_CFG_GATEWAY_COUNT, 445 AVS_HW_CFG_HP_EBB_COUNT, 446 AVS_HW_CFG_LP_EBB_COUNT, 447 AVS_HW_CFG_EBB_SIZE_BYTES, 448 }; 449 450 enum avs_iface_version { 451 AVS_AVS_VER_1_5 = 0x10005, 452 AVS_AVS_VER_1_8 = 0x10008, 453 }; 454 455 enum avs_i2s_version { 456 AVS_I2S_VER_15_SKYLAKE = 0x00000, 457 AVS_I2S_VER_15_BROXTON = 0x10000, 458 AVS_I2S_VER_15_BROXTON_P = 0x20000, 459 AVS_I2S_VER_18_KBL_CNL = 0x30000, 460 }; 461 462 struct avs_i2s_caps { 463 u32 i2s_version; 464 u32 ctrl_count; 465 u32 *ctrl_base_addr; 466 }; 467 468 struct avs_hw_cfg { 469 u32 avs_version; 470 u32 dsp_cores; 471 u32 mem_page_bytes; 472 u32 total_phys_mem_pages; 473 struct avs_i2s_caps i2s_caps; 474 u32 gateway_count; 475 u32 hp_ebb_count; 476 u32 lp_ebb_count; 477 u32 ebb_size_bytes; 478 }; 479 480 int avs_ipc_get_hw_config(struct avs_dev *adev, struct avs_hw_cfg *cfg); 481 482 #define AVS_MODULE_LOAD_TYPE_BUILTIN 0 483 #define AVS_MODULE_LOAD_TYPE_LOADABLE 1 484 #define AVS_MODULE_STATE_LOADED BIT(0) 485 486 struct avs_module_type { 487 u32 load_type:4; 488 u32 auto_start:1; 489 u32 domain_ll:1; 490 u32 domain_dp:1; 491 u32 lib_code:1; 492 u32 rsvd:24; 493 } __packed; 494 495 union avs_segment_flags { 496 u32 ul; 497 struct { 498 u32 contents:1; 499 u32 alloc:1; 500 u32 load:1; 501 u32 readonly:1; 502 u32 code:1; 503 u32 data:1; 504 u32 rsvd_1:2; 505 u32 type:4; 506 u32 rsvd_2:4; 507 u32 length:16; 508 }; 509 } __packed; 510 511 struct avs_segment_desc { 512 union avs_segment_flags flags; 513 u32 v_base_addr; 514 u32 file_offset; 515 } __packed; 516 517 struct avs_module_entry { 518 u16 module_id; 519 u16 state_flags; 520 u8 name[8]; 521 guid_t uuid; 522 struct avs_module_type type; 523 u8 hash[32]; 524 u32 entry_point; 525 u16 cfg_offset; 526 u16 cfg_count; 527 u32 affinity_mask; 528 u16 instance_max_count; 529 u16 instance_bss_size; 530 struct avs_segment_desc segments[3]; 531 } __packed; 532 533 struct avs_mods_info { 534 u32 count; 535 struct avs_module_entry entries[]; 536 } __packed; 537 538 static inline bool avs_module_entry_is_loaded(struct avs_module_entry *mentry) 539 { 540 return mentry->type.load_type == AVS_MODULE_LOAD_TYPE_BUILTIN || 541 mentry->state_flags & AVS_MODULE_STATE_LOADED; 542 } 543 544 int avs_ipc_get_modules_info(struct avs_dev *adev, struct avs_mods_info **info); 545 546 struct avs_sys_time { 547 u32 val_l; 548 u32 val_u; 549 } __packed; 550 551 int avs_ipc_set_system_time(struct avs_dev *adev); 552 553 /* Module configuration */ 554 555 #define AVS_MIXIN_MOD_UUID \ 556 GUID_INIT(0x39656EB2, 0x3B71, 0x4049, 0x8D, 0x3F, 0xF9, 0x2C, 0xD5, 0xC4, 0x3C, 0x09) 557 558 #define AVS_MIXOUT_MOD_UUID \ 559 GUID_INIT(0x3C56505A, 0x24D7, 0x418F, 0xBD, 0xDC, 0xC1, 0xF5, 0xA3, 0xAC, 0x2A, 0xE0) 560 561 #define AVS_COPIER_MOD_UUID \ 562 GUID_INIT(0x9BA00C83, 0xCA12, 0x4A83, 0x94, 0x3C, 0x1F, 0xA2, 0xE8, 0x2F, 0x9D, 0xDA) 563 564 #define AVS_PEAKVOL_MOD_UUID \ 565 GUID_INIT(0x8A171323, 0x94A3, 0x4E1D, 0xAF, 0xE9, 0xFE, 0x5D, 0xBA, 0xa4, 0xC3, 0x93) 566 567 #define AVS_GAIN_MOD_UUID \ 568 GUID_INIT(0x61BCA9A8, 0x18D0, 0x4A18, 0x8E, 0x7B, 0x26, 0x39, 0x21, 0x98, 0x04, 0xB7) 569 570 #define AVS_KPBUFF_MOD_UUID \ 571 GUID_INIT(0xA8A0CB32, 0x4A77, 0x4DB1, 0x85, 0xC7, 0x53, 0xD7, 0xEE, 0x07, 0xBC, 0xE6) 572 573 #define AVS_MICSEL_MOD_UUID \ 574 GUID_INIT(0x32FE92C1, 0x1E17, 0x4FC2, 0x97, 0x58, 0xC7, 0xF3, 0x54, 0x2E, 0x98, 0x0A) 575 576 #define AVS_MUX_MOD_UUID \ 577 GUID_INIT(0x64CE6E35, 0x857A, 0x4878, 0xAC, 0xE8, 0xE2, 0xA2, 0xF4, 0x2e, 0x30, 0x69) 578 579 #define AVS_UPDWMIX_MOD_UUID \ 580 GUID_INIT(0x42F8060C, 0x832F, 0x4DBF, 0xB2, 0x47, 0x51, 0xE9, 0x61, 0x99, 0x7b, 0x35) 581 582 #define AVS_SRCINTC_MOD_UUID \ 583 GUID_INIT(0xE61BB28D, 0x149A, 0x4C1F, 0xB7, 0x09, 0x46, 0x82, 0x3E, 0xF5, 0xF5, 0xAE) 584 585 #define AVS_PROBE_MOD_UUID \ 586 GUID_INIT(0x7CAD0808, 0xAB10, 0xCD23, 0xEF, 0x45, 0x12, 0xAB, 0x34, 0xCD, 0x56, 0xEF) 587 588 #define AVS_AEC_MOD_UUID \ 589 GUID_INIT(0x46CB87FB, 0xD2C9, 0x4970, 0x96, 0xD2, 0x6D, 0x7E, 0x61, 0x4B, 0xB6, 0x05) 590 591 #define AVS_ASRC_MOD_UUID \ 592 GUID_INIT(0x66B4402D, 0xB468, 0x42F2, 0x81, 0xA7, 0xB3, 0x71, 0x21, 0x86, 0x3D, 0xD4) 593 594 #define AVS_INTELWOV_MOD_UUID \ 595 GUID_INIT(0xEC774FA9, 0x28D3, 0x424A, 0x90, 0xE4, 0x69, 0xF9, 0x84, 0xF1, 0xEE, 0xB7) 596 597 /* channel map */ 598 enum avs_channel_index { 599 AVS_CHANNEL_LEFT = 0, 600 AVS_CHANNEL_RIGHT = 1, 601 AVS_CHANNEL_CENTER = 2, 602 AVS_CHANNEL_LEFT_SURROUND = 3, 603 AVS_CHANNEL_CENTER_SURROUND = 3, 604 AVS_CHANNEL_RIGHT_SURROUND = 4, 605 AVS_CHANNEL_LFE = 7, 606 AVS_CHANNEL_INVALID = 0xF, 607 }; 608 609 enum avs_channel_config { 610 AVS_CHANNEL_CONFIG_MONO = 0, 611 AVS_CHANNEL_CONFIG_STEREO = 1, 612 AVS_CHANNEL_CONFIG_2_1 = 2, 613 AVS_CHANNEL_CONFIG_3_0 = 3, 614 AVS_CHANNEL_CONFIG_3_1 = 4, 615 AVS_CHANNEL_CONFIG_QUATRO = 5, 616 AVS_CHANNEL_CONFIG_4_0 = 6, 617 AVS_CHANNEL_CONFIG_5_0 = 7, 618 AVS_CHANNEL_CONFIG_5_1 = 8, 619 AVS_CHANNEL_CONFIG_DUAL_MONO = 9, 620 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_0 = 10, 621 AVS_CHANNEL_CONFIG_I2S_DUAL_STEREO_1 = 11, 622 AVS_CHANNEL_CONFIG_4_CHANNEL = 12, 623 AVS_CHANNEL_CONFIG_INVALID 624 }; 625 626 enum avs_interleaving { 627 AVS_INTERLEAVING_PER_CHANNEL = 0, 628 AVS_INTERLEAVING_PER_SAMPLE = 1, 629 }; 630 631 enum avs_sample_type { 632 AVS_SAMPLE_TYPE_INT_MSB = 0, 633 AVS_SAMPLE_TYPE_INT_LSB = 1, 634 AVS_SAMPLE_TYPE_INT_SIGNED = 2, 635 AVS_SAMPLE_TYPE_INT_UNSIGNED = 3, 636 AVS_SAMPLE_TYPE_FLOAT = 4, 637 }; 638 639 #define AVS_CHANNELS_MAX 8 640 #define AVS_ALL_CHANNELS_MASK UINT_MAX 641 642 struct avs_audio_format { 643 u32 sampling_freq; 644 u32 bit_depth; 645 u32 channel_map; 646 u32 channel_config; 647 u32 interleaving; 648 u32 num_channels:8; 649 u32 valid_bit_depth:8; 650 u32 sample_type:8; 651 u32 reserved:8; 652 } __packed; 653 654 struct avs_modcfg_base { 655 u32 cpc; 656 u32 ibs; 657 u32 obs; 658 u32 is_pages; 659 struct avs_audio_format audio_fmt; 660 } __packed; 661 662 struct avs_pin_format { 663 u32 pin_index; 664 u32 iobs; 665 struct avs_audio_format audio_fmt; 666 } __packed; 667 668 struct avs_modcfg_ext { 669 struct avs_modcfg_base base; 670 u16 num_input_pins; 671 u16 num_output_pins; 672 u8 reserved[12]; 673 /* input pin formats followed by output ones */ 674 struct avs_pin_format pin_fmts[]; 675 } __packed; 676 677 enum avs_dma_type { 678 AVS_DMA_HDA_HOST_OUTPUT = 0, 679 AVS_DMA_HDA_HOST_INPUT = 1, 680 AVS_DMA_HDA_LINK_OUTPUT = 8, 681 AVS_DMA_HDA_LINK_INPUT = 9, 682 AVS_DMA_DMIC_LINK_INPUT = 11, 683 AVS_DMA_I2S_LINK_OUTPUT = 12, 684 AVS_DMA_I2S_LINK_INPUT = 13, 685 }; 686 687 union avs_virtual_index { 688 u8 val; 689 struct { 690 u8 time_slot:4; 691 u8 instance:4; 692 } i2s; 693 struct { 694 u8 queue_id:3; 695 u8 time_slot:2; 696 u8 instance:3; 697 } dmic; 698 } __packed; 699 700 union avs_connector_node_id { 701 u32 val; 702 struct { 703 u32 vindex:8; 704 u32 dma_type:5; 705 u32 rsvd:19; 706 }; 707 } __packed; 708 709 #define INVALID_PIPELINE_ID 0xFF 710 #define INVALID_NODE_ID \ 711 ((union avs_connector_node_id) { UINT_MAX }) 712 713 union avs_gtw_attributes { 714 u32 val; 715 struct { 716 u32 lp_buffer_alloc:1; 717 u32 rsvd:31; 718 }; 719 } __packed; 720 721 struct avs_copier_gtw_cfg { 722 union avs_connector_node_id node_id; 723 u32 dma_buffer_size; 724 u32 config_length; 725 struct { 726 union avs_gtw_attributes attrs; 727 u32 blob[]; 728 } config; 729 } __packed; 730 731 struct avs_copier_cfg { 732 struct avs_modcfg_base base; 733 struct avs_audio_format out_fmt; 734 u32 feature_mask; 735 struct avs_copier_gtw_cfg gtw_cfg; 736 } __packed; 737 738 struct avs_volume_cfg { 739 u32 channel_id; 740 u32 target_volume; 741 u32 curve_type; 742 u32 reserved; /* alignment */ 743 u64 curve_duration; 744 } __packed; 745 746 struct avs_peakvol_cfg { 747 struct avs_modcfg_base base; 748 struct avs_volume_cfg vols[]; 749 } __packed; 750 751 struct avs_micsel_cfg { 752 struct avs_modcfg_base base; 753 struct avs_audio_format out_fmt; 754 } __packed; 755 756 struct avs_mux_cfg { 757 struct avs_modcfg_base base; 758 struct avs_audio_format ref_fmt; 759 struct avs_audio_format out_fmt; 760 } __packed; 761 762 struct avs_updown_mixer_cfg { 763 struct avs_modcfg_base base; 764 u32 out_channel_config; 765 u32 coefficients_select; 766 s32 coefficients[AVS_CHANNELS_MAX]; 767 u32 channel_map; 768 } __packed; 769 770 struct avs_src_cfg { 771 struct avs_modcfg_base base; 772 u32 out_freq; 773 } __packed; 774 775 struct avs_probe_gtw_cfg { 776 union avs_connector_node_id node_id; 777 u32 dma_buffer_size; 778 } __packed; 779 780 struct avs_probe_cfg { 781 struct avs_modcfg_base base; 782 struct avs_probe_gtw_cfg gtw_cfg; 783 } __packed; 784 785 struct avs_aec_cfg { 786 struct avs_modcfg_base base; 787 struct avs_audio_format ref_fmt; 788 struct avs_audio_format out_fmt; 789 u32 cpc_lp_mode; 790 } __packed; 791 792 struct avs_asrc_cfg { 793 struct avs_modcfg_base base; 794 u32 out_freq; 795 u32 rsvd0:1; 796 u32 mode:1; 797 u32 rsvd2:2; 798 u32 disable_jitter_buffer:1; 799 u32 rsvd3:27; 800 } __packed; 801 802 struct avs_wov_cfg { 803 struct avs_modcfg_base base; 804 u32 cpc_lp_mode; 805 } __packed; 806 807 /* Module runtime parameters */ 808 809 enum avs_copier_runtime_param { 810 AVS_COPIER_SET_SINK_FORMAT = 2, 811 }; 812 813 struct avs_copier_sink_format { 814 u32 sink_id; 815 struct avs_audio_format src_fmt; 816 struct avs_audio_format sink_fmt; 817 } __packed; 818 819 int avs_ipc_copier_set_sink_format(struct avs_dev *adev, u16 module_id, 820 u8 instance_id, u32 sink_id, 821 const struct avs_audio_format *src_fmt, 822 const struct avs_audio_format *sink_fmt); 823 824 enum avs_peakvol_runtime_param { 825 AVS_PEAKVOL_VOLUME = 0, 826 }; 827 828 enum avs_audio_curve_type { 829 AVS_AUDIO_CURVE_NONE = 0, 830 AVS_AUDIO_CURVE_WINDOWS_FADE = 1, 831 }; 832 833 int avs_ipc_peakvol_set_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 834 struct avs_volume_cfg *vol); 835 int avs_ipc_peakvol_get_volume(struct avs_dev *adev, u16 module_id, u8 instance_id, 836 struct avs_volume_cfg **vols, size_t *num_vols); 837 838 #define AVS_PROBE_INST_ID 0 839 840 enum avs_probe_runtime_param { 841 AVS_PROBE_INJECTION_DMA = 1, 842 AVS_PROBE_INJECTION_DMA_DETACH, 843 AVS_PROBE_POINTS, 844 AVS_PROBE_POINTS_DISCONNECT, 845 }; 846 847 struct avs_probe_dma { 848 union avs_connector_node_id node_id; 849 u32 dma_buffer_size; 850 } __packed; 851 852 enum avs_probe_type { 853 AVS_PROBE_TYPE_INPUT = 0, 854 AVS_PROBE_TYPE_OUTPUT, 855 AVS_PROBE_TYPE_INTERNAL 856 }; 857 858 union avs_probe_point_id { 859 u32 value; 860 struct { 861 u32 module_id:16; 862 u32 instance_id:8; 863 u32 type:2; 864 u32 index:6; 865 } id; 866 } __packed; 867 868 enum avs_connection_purpose { 869 AVS_CONNECTION_PURPOSE_EXTRACT = 0, 870 AVS_CONNECTION_PURPOSE_INJECT, 871 AVS_CONNECTION_PURPOSE_INJECT_REEXTRACT, 872 }; 873 874 struct avs_probe_point_desc { 875 union avs_probe_point_id id; 876 u32 purpose; 877 union avs_connector_node_id node_id; 878 } __packed; 879 880 int avs_ipc_probe_get_dma(struct avs_dev *adev, struct avs_probe_dma **dmas, size_t *num_dmas); 881 int avs_ipc_probe_attach_dma(struct avs_dev *adev, struct avs_probe_dma *dmas, size_t num_dmas); 882 int avs_ipc_probe_detach_dma(struct avs_dev *adev, union avs_connector_node_id *node_ids, 883 size_t num_node_ids); 884 int avs_ipc_probe_get_points(struct avs_dev *adev, struct avs_probe_point_desc **descs, 885 size_t *num_descs); 886 int avs_ipc_probe_connect_points(struct avs_dev *adev, struct avs_probe_point_desc *descs, 887 size_t num_descs); 888 int avs_ipc_probe_disconnect_points(struct avs_dev *adev, union avs_probe_point_id *ids, 889 size_t num_ids); 890 891 #endif /* __SOUND_SOC_INTEL_AVS_MSGS_H */ 892