1 // SPDX-License-Identifier: GPL-2.0-only 2 // 3 // Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 // 5 // Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 // Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 // 8 9 #include <linux/firmware.h> 10 #include <linux/module.h> 11 #include <linux/slab.h> 12 #include <sound/hdaudio.h> 13 #include <sound/hdaudio_ext.h> 14 #include "avs.h" 15 #include "cldma.h" 16 #include "messages.h" 17 #include "registers.h" 18 19 #define AVS_ROM_STS_MASK 0xFF 20 #define AVS_ROM_INIT_DONE 0x1 21 #define SKL_ROM_BASEFW_ENTERED 0xF 22 #define APL_ROM_FW_ENTERED 0x5 23 #define AVS_ROM_INIT_POLLING_US 5 24 #define SKL_ROM_INIT_TIMEOUT_US 1000000 25 #define APL_ROM_INIT_TIMEOUT_US 300000 26 #define APL_ROM_INIT_RETRIES 3 27 28 #define AVS_FW_INIT_POLLING_US 500 29 #define AVS_FW_INIT_TIMEOUT_US 3000000 30 #define AVS_FW_INIT_TIMEOUT_MS 3000 31 32 #define AVS_CLDMA_START_DELAY_MS 100 33 34 #define AVS_ROOT_DIR "intel/avs" 35 #define AVS_BASEFW_FILENAME "dsp_basefw.bin" 36 #define AVS_EXT_MANIFEST_MAGIC 0x31454124 37 #define SKL_MANIFEST_MAGIC 0x00000006 38 #define SKL_ADSPFW_OFFSET 0x284 39 40 /* Occasionally, engineering (release candidate) firmware is provided for testing. */ 41 static bool debug_ignore_fw_version; 42 module_param_named(ignore_fw_version, debug_ignore_fw_version, bool, 0444); 43 MODULE_PARM_DESC(ignore_fw_version, "Verify FW version 0=yes (default), 1=no"); 44 45 #define AVS_LIB_NAME_SIZE 8 46 47 struct avs_fw_manifest { 48 u32 id; 49 u32 len; 50 char name[AVS_LIB_NAME_SIZE]; 51 u32 preload_page_count; 52 u32 img_flags; 53 u32 feature_mask; 54 struct avs_fw_version version; 55 } __packed; 56 57 struct avs_fw_ext_manifest { 58 u32 id; 59 u32 len; 60 u16 version_major; 61 u16 version_minor; 62 u32 entries; 63 } __packed; 64 65 static int avs_fw_ext_manifest_strip(struct firmware *fw) 66 { 67 struct avs_fw_ext_manifest *man; 68 69 if (fw->size < sizeof(*man)) 70 return -EINVAL; 71 72 man = (struct avs_fw_ext_manifest *)fw->data; 73 if (man->id == AVS_EXT_MANIFEST_MAGIC) { 74 fw->data += man->len; 75 fw->size -= man->len; 76 } 77 78 return 0; 79 } 80 81 static int avs_fw_manifest_offset(struct firmware *fw) 82 { 83 /* Header type found in first DWORD of fw binary. */ 84 u32 magic = *(u32 *)fw->data; 85 86 switch (magic) { 87 case SKL_MANIFEST_MAGIC: 88 return SKL_ADSPFW_OFFSET; 89 default: 90 return -EINVAL; 91 } 92 } 93 94 static int avs_fw_manifest_strip_verify(struct avs_dev *adev, struct firmware *fw, 95 const struct avs_fw_version *min) 96 { 97 struct avs_fw_manifest *man; 98 int offset, ret; 99 100 ret = avs_fw_ext_manifest_strip(fw); 101 if (ret) 102 return ret; 103 104 offset = avs_fw_manifest_offset(fw); 105 if (offset < 0) 106 return offset; 107 108 if (fw->size < offset + sizeof(*man)) 109 return -EINVAL; 110 if (!min) 111 return 0; 112 113 man = (struct avs_fw_manifest *)(fw->data + offset); 114 if (man->version.major != min->major || 115 man->version.minor != min->minor || 116 man->version.hotfix != min->hotfix || 117 man->version.build < min->build) { 118 dev_warn(adev->dev, "bad FW version %d.%d.%d.%d, expected %d.%d.%d.%d or newer\n", 119 man->version.major, man->version.minor, 120 man->version.hotfix, man->version.build, 121 min->major, min->minor, min->hotfix, min->build); 122 123 if (!debug_ignore_fw_version) 124 return -EINVAL; 125 } 126 127 return 0; 128 } 129 130 int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw) 131 { 132 struct hda_cldma *cl = &code_loader; 133 unsigned int reg; 134 int ret; 135 136 ret = avs_dsp_op(adev, power, AVS_MAIN_CORE_MASK, true); 137 if (ret < 0) 138 return ret; 139 140 ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false); 141 if (ret < 0) 142 return ret; 143 144 ret = hda_cldma_reset(cl); 145 if (ret < 0) { 146 dev_err(adev->dev, "cldma reset failed: %d\n", ret); 147 return ret; 148 } 149 hda_cldma_setup(cl); 150 151 ret = avs_dsp_op(adev, stall, AVS_MAIN_CORE_MASK, false); 152 if (ret < 0) 153 return ret; 154 155 reinit_completion(&adev->fw_ready); 156 avs_dsp_op(adev, int_control, true); 157 158 /* await ROM init */ 159 ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg, 160 (reg & AVS_ROM_INIT_DONE) == AVS_ROM_INIT_DONE, 161 AVS_ROM_INIT_POLLING_US, SKL_ROM_INIT_TIMEOUT_US); 162 if (ret < 0) { 163 dev_err(adev->dev, "rom init timeout: %d\n", ret); 164 avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK); 165 return ret; 166 } 167 168 hda_cldma_set_data(cl, (void *)fw->data, fw->size); 169 /* transfer firmware */ 170 hda_cldma_transfer(cl, 0); 171 ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg, 172 (reg & AVS_ROM_STS_MASK) == SKL_ROM_BASEFW_ENTERED, 173 AVS_FW_INIT_POLLING_US, AVS_FW_INIT_TIMEOUT_US); 174 hda_cldma_stop(cl); 175 if (ret < 0) { 176 dev_err(adev->dev, "transfer fw failed: %d\n", ret); 177 avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK); 178 return ret; 179 } 180 181 return 0; 182 } 183 184 int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id) 185 { 186 struct hda_cldma *cl = &code_loader; 187 int ret; 188 189 hda_cldma_set_data(cl, (void *)lib->data, lib->size); 190 /* transfer modules manifest */ 191 hda_cldma_transfer(cl, msecs_to_jiffies(AVS_CLDMA_START_DELAY_MS)); 192 193 /* DMA id ignored as there is only ever one code-loader DMA */ 194 ret = avs_ipc_load_library(adev, 0, id); 195 hda_cldma_stop(cl); 196 197 if (ret) { 198 ret = AVS_IPC_RET(ret); 199 dev_err(adev->dev, "transfer lib %d failed: %d\n", id, ret); 200 } 201 202 return ret; 203 } 204 205 static int avs_cldma_load_module(struct avs_dev *adev, struct avs_module_entry *mentry) 206 { 207 struct hda_cldma *cl = &code_loader; 208 const struct firmware *mod; 209 char *mod_name; 210 int ret; 211 212 mod_name = kasprintf(GFP_KERNEL, "%s/%s/dsp_mod_%pUL.bin", AVS_ROOT_DIR, 213 adev->spec->name, mentry->uuid.b); 214 if (!mod_name) 215 return -ENOMEM; 216 217 ret = avs_request_firmware(adev, &mod, mod_name); 218 kfree(mod_name); 219 if (ret < 0) 220 return ret; 221 222 hda_cldma_set_data(cl, (void *)mod->data, mod->size); 223 hda_cldma_transfer(cl, msecs_to_jiffies(AVS_CLDMA_START_DELAY_MS)); 224 ret = avs_ipc_load_modules(adev, &mentry->module_id, 1); 225 hda_cldma_stop(cl); 226 227 if (ret) { 228 dev_err(adev->dev, "load module %d failed: %d\n", mentry->module_id, ret); 229 avs_release_last_firmware(adev); 230 return AVS_IPC_RET(ret); 231 } 232 233 return 0; 234 } 235 236 int avs_cldma_transfer_modules(struct avs_dev *adev, bool load, 237 struct avs_module_entry *mods, u32 num_mods) 238 { 239 u16 *mod_ids; 240 int ret, i; 241 242 /* Either load to DSP or unload them to free space. */ 243 if (load) { 244 for (i = 0; i < num_mods; i++) { 245 ret = avs_cldma_load_module(adev, &mods[i]); 246 if (ret) 247 return ret; 248 } 249 250 return 0; 251 } 252 253 mod_ids = kcalloc(num_mods, sizeof(u16), GFP_KERNEL); 254 if (!mod_ids) 255 return -ENOMEM; 256 257 for (i = 0; i < num_mods; i++) 258 mod_ids[i] = mods[i].module_id; 259 260 ret = avs_ipc_unload_modules(adev, mod_ids, num_mods); 261 kfree(mod_ids); 262 if (ret) 263 return AVS_IPC_RET(ret); 264 265 return 0; 266 } 267 268 static int 269 avs_hda_init_rom(struct avs_dev *adev, unsigned int dma_id, bool purge) 270 { 271 const struct avs_spec *const spec = adev->spec; 272 unsigned int corex_mask, reg; 273 int ret; 274 275 corex_mask = spec->core_init_mask & ~AVS_MAIN_CORE_MASK; 276 277 ret = avs_dsp_op(adev, power, spec->core_init_mask, true); 278 if (ret < 0) 279 goto err; 280 281 ret = avs_dsp_op(adev, reset, AVS_MAIN_CORE_MASK, false); 282 if (ret < 0) 283 goto err; 284 285 reinit_completion(&adev->fw_ready); 286 avs_dsp_op(adev, int_control, true); 287 288 /* set boot config */ 289 ret = avs_ipc_set_boot_config(adev, dma_id, purge); 290 if (ret) { 291 ret = AVS_IPC_RET(ret); 292 goto err; 293 } 294 295 /* await ROM init */ 296 ret = snd_hdac_adsp_readq_poll(adev, spec->rom_status, reg, 297 (reg & 0xF) == AVS_ROM_INIT_DONE || 298 (reg & 0xF) == APL_ROM_FW_ENTERED, 299 AVS_ROM_INIT_POLLING_US, APL_ROM_INIT_TIMEOUT_US); 300 if (ret < 0) { 301 dev_err(adev->dev, "rom init timeout: %d\n", ret); 302 goto err; 303 } 304 305 /* power down non-main cores */ 306 if (corex_mask) { 307 ret = avs_dsp_op(adev, power, corex_mask, false); 308 if (ret < 0) 309 goto err; 310 } 311 312 return 0; 313 314 err: 315 avs_dsp_core_disable(adev, spec->core_init_mask); 316 return ret; 317 } 318 319 static int avs_imr_load_basefw(struct avs_dev *adev) 320 { 321 int ret; 322 323 /* DMA id ignored when flashing from IMR as no transfer occurs. */ 324 ret = avs_hda_init_rom(adev, 0, false); 325 if (ret < 0) { 326 dev_err(adev->dev, "rom init failed: %d\n", ret); 327 return ret; 328 } 329 330 ret = wait_for_completion_timeout(&adev->fw_ready, 331 msecs_to_jiffies(AVS_FW_INIT_TIMEOUT_MS)); 332 if (!ret) { 333 dev_err(adev->dev, "firmware ready timeout\n"); 334 avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK); 335 return -ETIMEDOUT; 336 } 337 338 return 0; 339 } 340 341 int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw) 342 { 343 struct snd_pcm_substream substream; 344 struct snd_dma_buffer dmab; 345 struct hdac_ext_stream *estream; 346 struct hdac_stream *hstream; 347 struct hdac_bus *bus = &adev->base.core; 348 unsigned int sdfmt, reg; 349 int ret, i; 350 351 /* configure hda dma */ 352 memset(&substream, 0, sizeof(substream)); 353 substream.stream = SNDRV_PCM_STREAM_PLAYBACK; 354 estream = snd_hdac_ext_stream_assign(bus, &substream, 355 HDAC_EXT_STREAM_TYPE_HOST); 356 if (!estream) 357 return -ENODEV; 358 hstream = hdac_stream(estream); 359 360 /* code loading performed with default format */ 361 sdfmt = snd_hdac_calc_stream_format(48000, 1, SNDRV_PCM_FORMAT_S32_LE, 32, 0); 362 ret = snd_hdac_dsp_prepare(hstream, sdfmt, fw->size, &dmab); 363 if (ret < 0) 364 goto release_stream; 365 366 /* enable SPIB for hda stream */ 367 snd_hdac_ext_stream_spbcap_enable(bus, true, hstream->index); 368 ret = snd_hdac_ext_stream_set_spib(bus, estream, fw->size); 369 if (ret) 370 goto cleanup_resources; 371 372 memcpy(dmab.area, fw->data, fw->size); 373 374 for (i = 0; i < APL_ROM_INIT_RETRIES; i++) { 375 unsigned int dma_id = hstream->stream_tag - 1; 376 377 ret = avs_hda_init_rom(adev, dma_id, true); 378 if (!ret) 379 break; 380 dev_info(adev->dev, "#%d rom init fail: %d\n", i + 1, ret); 381 } 382 if (ret < 0) 383 goto cleanup_resources; 384 385 /* transfer firmware */ 386 snd_hdac_dsp_trigger(hstream, true); 387 ret = snd_hdac_adsp_readl_poll(adev, AVS_FW_REG_STATUS(adev), reg, 388 (reg & AVS_ROM_STS_MASK) == APL_ROM_FW_ENTERED, 389 AVS_FW_INIT_POLLING_US, AVS_FW_INIT_TIMEOUT_US); 390 snd_hdac_dsp_trigger(hstream, false); 391 if (ret < 0) { 392 dev_err(adev->dev, "transfer fw failed: %d\n", ret); 393 avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK); 394 } 395 396 cleanup_resources: 397 /* disable SPIB for hda stream */ 398 snd_hdac_ext_stream_spbcap_enable(bus, false, hstream->index); 399 snd_hdac_ext_stream_set_spib(bus, estream, 0); 400 401 snd_hdac_dsp_cleanup(hstream, &dmab); 402 release_stream: 403 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST); 404 405 return ret; 406 } 407 408 int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id) 409 { 410 struct snd_pcm_substream substream; 411 struct snd_dma_buffer dmab; 412 struct hdac_ext_stream *estream; 413 struct hdac_stream *stream; 414 struct hdac_bus *bus = &adev->base.core; 415 unsigned int sdfmt; 416 int ret; 417 418 /* configure hda dma */ 419 memset(&substream, 0, sizeof(substream)); 420 substream.stream = SNDRV_PCM_STREAM_PLAYBACK; 421 estream = snd_hdac_ext_stream_assign(bus, &substream, 422 HDAC_EXT_STREAM_TYPE_HOST); 423 if (!estream) 424 return -ENODEV; 425 stream = hdac_stream(estream); 426 427 /* code loading performed with default format */ 428 sdfmt = snd_hdac_calc_stream_format(48000, 1, SNDRV_PCM_FORMAT_S32_LE, 32, 0); 429 ret = snd_hdac_dsp_prepare(stream, sdfmt, lib->size, &dmab); 430 if (ret < 0) 431 goto release_stream; 432 433 /* enable SPIB for hda stream */ 434 snd_hdac_ext_stream_spbcap_enable(bus, true, stream->index); 435 snd_hdac_ext_stream_set_spib(bus, estream, lib->size); 436 437 memcpy(dmab.area, lib->data, lib->size); 438 439 /* transfer firmware */ 440 snd_hdac_dsp_trigger(stream, true); 441 ret = avs_ipc_load_library(adev, stream->stream_tag - 1, id); 442 snd_hdac_dsp_trigger(stream, false); 443 if (ret) { 444 dev_err(adev->dev, "transfer lib %d failed: %d\n", id, ret); 445 ret = AVS_IPC_RET(ret); 446 } 447 448 /* disable SPIB for hda stream */ 449 snd_hdac_ext_stream_spbcap_enable(bus, false, stream->index); 450 snd_hdac_ext_stream_set_spib(bus, estream, 0); 451 452 snd_hdac_dsp_cleanup(stream, &dmab); 453 release_stream: 454 snd_hdac_ext_stream_release(estream, HDAC_EXT_STREAM_TYPE_HOST); 455 456 return ret; 457 } 458 459 int avs_hda_transfer_modules(struct avs_dev *adev, bool load, 460 struct avs_module_entry *mods, u32 num_mods) 461 { 462 /* 463 * All platforms without CLDMA are equipped with IMR, 464 * and thus the module transferring is offloaded to DSP. 465 */ 466 return 0; 467 } 468 469 static int avs_dsp_load_basefw(struct avs_dev *adev) 470 { 471 const struct avs_fw_version *min_req; 472 const struct avs_spec *const spec = adev->spec; 473 const struct firmware *fw; 474 struct firmware stripped_fw; 475 char *filename; 476 int ret; 477 478 filename = kasprintf(GFP_KERNEL, "%s/%s/%s", AVS_ROOT_DIR, spec->name, AVS_BASEFW_FILENAME); 479 if (!filename) 480 return -ENOMEM; 481 482 ret = avs_request_firmware(adev, &fw, filename); 483 kfree(filename); 484 if (ret < 0) { 485 dev_err(adev->dev, "request firmware failed: %d\n", ret); 486 return ret; 487 } 488 489 stripped_fw = *fw; 490 min_req = &adev->spec->min_fw_version; 491 492 ret = avs_fw_manifest_strip_verify(adev, &stripped_fw, min_req); 493 if (ret < 0) { 494 dev_err(adev->dev, "invalid firmware data: %d\n", ret); 495 goto release_fw; 496 } 497 498 ret = avs_dsp_op(adev, load_basefw, &stripped_fw); 499 if (ret < 0) { 500 dev_err(adev->dev, "basefw load failed: %d\n", ret); 501 goto release_fw; 502 } 503 504 ret = wait_for_completion_timeout(&adev->fw_ready, 505 msecs_to_jiffies(AVS_FW_INIT_TIMEOUT_MS)); 506 if (!ret) { 507 dev_err(adev->dev, "firmware ready timeout\n"); 508 avs_dsp_core_disable(adev, AVS_MAIN_CORE_MASK); 509 ret = -ETIMEDOUT; 510 goto release_fw; 511 } 512 513 return 0; 514 515 release_fw: 516 avs_release_last_firmware(adev); 517 return ret; 518 } 519 520 int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge) 521 { 522 int ret, i; 523 524 /* Forgo full boot if flash from IMR succeeds. */ 525 if (!purge && avs_platattr_test(adev, IMR)) { 526 ret = avs_imr_load_basefw(adev); 527 if (!ret) 528 return 0; 529 530 dev_dbg(adev->dev, "firmware flash from imr failed: %d\n", ret); 531 } 532 533 /* Full boot, clear cached data except for basefw (slot 0). */ 534 for (i = 1; i < adev->fw_cfg.max_libs_count; i++) 535 memset(adev->lib_names[i], 0, AVS_LIB_NAME_SIZE); 536 537 avs_hda_clock_gating_enable(adev, false); 538 avs_hda_l1sen_enable(adev, false); 539 540 ret = avs_dsp_load_basefw(adev); 541 542 avs_hda_l1sen_enable(adev, true); 543 avs_hda_clock_gating_enable(adev, true); 544 545 if (ret < 0) 546 return ret; 547 548 /* With all code loaded, refresh module information. */ 549 ret = avs_module_info_init(adev, true); 550 if (ret) { 551 dev_err(adev->dev, "init module info failed: %d\n", ret); 552 return ret; 553 } 554 555 return 0; 556 } 557 558 int avs_dsp_first_boot_firmware(struct avs_dev *adev) 559 { 560 int ret, i; 561 562 if (avs_platattr_test(adev, CLDMA)) { 563 ret = hda_cldma_init(&code_loader, &adev->base.core, 564 adev->dsp_ba, AVS_CL_DEFAULT_BUFFER_SIZE); 565 if (ret < 0) { 566 dev_err(adev->dev, "cldma init failed: %d\n", ret); 567 return ret; 568 } 569 } 570 571 ret = avs_dsp_boot_firmware(adev, true); 572 if (ret < 0) { 573 dev_err(adev->dev, "firmware boot failed: %d\n", ret); 574 return ret; 575 } 576 577 ret = avs_ipc_get_hw_config(adev, &adev->hw_cfg); 578 if (ret) { 579 dev_err(adev->dev, "get hw cfg failed: %d\n", ret); 580 return AVS_IPC_RET(ret); 581 } 582 583 ret = avs_ipc_get_fw_config(adev, &adev->fw_cfg); 584 if (ret) { 585 dev_err(adev->dev, "get fw cfg failed: %d\n", ret); 586 return AVS_IPC_RET(ret); 587 } 588 589 adev->core_refs = devm_kcalloc(adev->dev, adev->hw_cfg.dsp_cores, 590 sizeof(*adev->core_refs), GFP_KERNEL); 591 adev->lib_names = devm_kcalloc(adev->dev, adev->fw_cfg.max_libs_count, 592 sizeof(*adev->lib_names), GFP_KERNEL); 593 if (!adev->core_refs || !adev->lib_names) 594 return -ENOMEM; 595 596 for (i = 0; i < adev->fw_cfg.max_libs_count; i++) { 597 adev->lib_names[i] = devm_kzalloc(adev->dev, AVS_LIB_NAME_SIZE, GFP_KERNEL); 598 if (!adev->lib_names[i]) 599 return -ENOMEM; 600 } 601 602 /* basefw always occupies slot 0 */ 603 strcpy(&adev->lib_names[0][0], "BASEFW"); 604 605 ida_init(&adev->ppl_ida); 606 607 return 0; 608 } 609