1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright(c) 2021-2022 Intel Corporation. All rights reserved. 4 * 5 * Authors: Cezary Rojewski <cezary.rojewski@intel.com> 6 * Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com> 7 */ 8 9 #ifndef __SOUND_SOC_INTEL_AVS_H 10 #define __SOUND_SOC_INTEL_AVS_H 11 12 #include <linux/device.h> 13 #include <linux/firmware.h> 14 #include <linux/kfifo.h> 15 #include <sound/hda_codec.h> 16 #include <sound/hda_register.h> 17 #include <sound/soc-component.h> 18 #include "messages.h" 19 #include "registers.h" 20 21 struct avs_dev; 22 struct avs_tplg; 23 struct avs_tplg_library; 24 struct avs_soc_component; 25 struct avs_ipc_msg; 26 27 /* 28 * struct avs_dsp_ops - Platform-specific DSP operations 29 * 30 * @power: Power on or off DSP cores 31 * @reset: Enter or exit reset state on DSP cores 32 * @stall: Stall or run DSP cores 33 * @irq_handler: Top half of IPC servicing 34 * @irq_thread: Bottom half of IPC servicing 35 * @int_control: Enable or disable IPC interrupts 36 */ 37 struct avs_dsp_ops { 38 int (* const power)(struct avs_dev *, u32, bool); 39 int (* const reset)(struct avs_dev *, u32, bool); 40 int (* const stall)(struct avs_dev *, u32, bool); 41 irqreturn_t (* const irq_handler)(int, void *); 42 irqreturn_t (* const irq_thread)(int, void *); 43 void (* const int_control)(struct avs_dev *, bool); 44 int (* const load_basefw)(struct avs_dev *, struct firmware *); 45 int (* const load_lib)(struct avs_dev *, struct firmware *, u32); 46 int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32); 47 int (* const enable_logs)(struct avs_dev *, enum avs_log_enable, u32, u32, unsigned long, 48 u32 *); 49 int (* const log_buffer_offset)(struct avs_dev *, u32); 50 int (* const log_buffer_status)(struct avs_dev *, union avs_notify_msg *); 51 int (* const coredump)(struct avs_dev *, union avs_notify_msg *); 52 bool (* const d0ix_toggle)(struct avs_dev *, struct avs_ipc_msg *, bool); 53 int (* const set_d0ix)(struct avs_dev *, bool); 54 }; 55 56 #define avs_dsp_op(adev, op, ...) \ 57 ((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__)) 58 59 extern const struct avs_dsp_ops skl_dsp_ops; 60 extern const struct avs_dsp_ops apl_dsp_ops; 61 62 #define AVS_PLATATTR_CLDMA BIT_ULL(0) 63 #define AVS_PLATATTR_IMR BIT_ULL(1) 64 65 #define avs_platattr_test(adev, attr) \ 66 ((adev)->spec->attributes & AVS_PLATATTR_##attr) 67 68 /* Platform specific descriptor */ 69 struct avs_spec { 70 const char *name; 71 72 const struct avs_dsp_ops *const dsp_ops; 73 struct avs_fw_version min_fw_version; /* anything below is rejected */ 74 75 const u32 core_init_mask; /* used during DSP boot */ 76 const u64 attributes; /* bitmask of AVS_PLATATTR_* */ 77 const u32 sram_base_offset; 78 const u32 sram_window_size; 79 const u32 rom_status; 80 }; 81 82 struct avs_fw_entry { 83 char *name; 84 const struct firmware *fw; 85 86 struct list_head node; 87 }; 88 89 struct avs_debug { 90 struct kfifo trace_fifo; 91 spinlock_t fifo_lock; /* serialize I/O for trace_fifo */ 92 spinlock_t trace_lock; /* serialize debug window I/O between each LOG_BUFFER_STATUS */ 93 wait_queue_head_t trace_waitq; 94 u32 aging_timer_period; 95 u32 fifo_full_timer_period; 96 u32 logged_resources; /* context dependent: core or library */ 97 }; 98 99 /* 100 * struct avs_dev - Intel HD-Audio driver data 101 * 102 * @dev: PCI device 103 * @dsp_ba: DSP bar address 104 * @spec: platform-specific descriptor 105 * @fw_cfg: Firmware configuration, obtained through FW_CONFIG message 106 * @hw_cfg: Hardware configuration, obtained through HW_CONFIG message 107 * @mods_info: Available module-types, obtained through MODULES_INFO message 108 * @mod_idas: Module instance ID pool, one per module-type 109 * @modres_mutex: For synchronizing any @mods_info updates 110 * @ppl_ida: Pipeline instance ID pool 111 * @fw_list: List of libraries loaded, including base firmware 112 */ 113 struct avs_dev { 114 struct hda_bus base; 115 struct device *dev; 116 117 void __iomem *dsp_ba; 118 const struct avs_spec *spec; 119 struct avs_ipc *ipc; 120 121 struct avs_fw_cfg fw_cfg; 122 struct avs_hw_cfg hw_cfg; 123 struct avs_mods_info *mods_info; 124 struct ida **mod_idas; 125 struct mutex modres_mutex; 126 struct ida ppl_ida; 127 struct list_head fw_list; 128 int *core_refs; /* reference count per core */ 129 char **lib_names; 130 131 struct completion fw_ready; 132 struct work_struct probe_work; 133 134 struct nhlt_acpi_table *nhlt; 135 struct list_head comp_list; 136 struct mutex comp_list_mutex; 137 struct list_head path_list; 138 spinlock_t path_list_lock; 139 struct mutex path_mutex; 140 141 struct avs_debug dbg; 142 }; 143 144 /* from hda_bus to avs_dev */ 145 #define hda_to_avs(hda) container_of(hda, struct avs_dev, base) 146 /* from hdac_bus to avs_dev */ 147 #define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac)) 148 /* from device to avs_dev */ 149 #define to_avs_dev(dev) \ 150 ({ \ 151 struct hdac_bus *__bus = dev_get_drvdata(dev); \ 152 hdac_to_avs(__bus); \ 153 }) 154 155 int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power); 156 int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset); 157 int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall); 158 int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask); 159 int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask); 160 161 /* Inter Process Communication */ 162 163 struct avs_ipc_msg { 164 union { 165 u64 header; 166 union avs_global_msg glb; 167 union avs_reply_msg rsp; 168 }; 169 void *data; 170 size_t size; 171 }; 172 173 /* 174 * struct avs_ipc - DSP IPC context 175 * 176 * @dev: PCI device 177 * @rx: Reply message cache 178 * @default_timeout_ms: default message timeout in MS 179 * @ready: whether firmware is ready and communication is open 180 * @rx_completed: whether RX for previously sent TX has been received 181 * @rx_lock: for serializing manipulation of rx_* fields 182 * @msg_lock: for synchronizing request handling 183 * @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW 184 * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW 185 */ 186 struct avs_ipc { 187 struct device *dev; 188 189 struct avs_ipc_msg rx; 190 u32 default_timeout_ms; 191 bool ready; 192 atomic_t recovering; 193 194 bool rx_completed; 195 spinlock_t rx_lock; 196 struct mutex msg_mutex; 197 struct completion done_completion; 198 struct completion busy_completion; 199 200 struct work_struct recovery_work; 201 struct delayed_work d0ix_work; 202 atomic_t d0ix_disable_depth; 203 bool in_d0ix; 204 }; 205 206 #define AVS_EIPC EREMOTEIO 207 /* 208 * IPC handlers may return positive value (firmware error code) what denotes 209 * successful HOST <-> DSP communication yet failure to process specific request. 210 * 211 * Below macro converts returned value to linux kernel error code. 212 * All IPC callers MUST use it as soon as firmware error code is consumed. 213 */ 214 #define AVS_IPC_RET(ret) \ 215 (((ret) <= 0) ? (ret) : -AVS_EIPC) 216 217 static inline void avs_ipc_err(struct avs_dev *adev, struct avs_ipc_msg *tx, 218 const char *name, int error) 219 { 220 /* 221 * If IPC channel is blocked e.g.: due to ongoing recovery, 222 * -EPERM error code is expected and thus it's not an actual error. 223 */ 224 if (error == -EPERM) 225 dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name, 226 tx->glb.primary, tx->glb.ext.val, error); 227 else 228 dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name, 229 tx->glb.primary, tx->glb.ext.val, error); 230 } 231 232 irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id); 233 irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id); 234 void avs_dsp_process_response(struct avs_dev *adev, u64 header); 235 int avs_dsp_send_msg_timeout(struct avs_dev *adev, 236 struct avs_ipc_msg *request, 237 struct avs_ipc_msg *reply, int timeout); 238 int avs_dsp_send_msg(struct avs_dev *adev, 239 struct avs_ipc_msg *request, struct avs_ipc_msg *reply); 240 /* Two variants below are for messages that control DSP power states. */ 241 int avs_dsp_send_pm_msg_timeout(struct avs_dev *adev, struct avs_ipc_msg *request, 242 struct avs_ipc_msg *reply, int timeout, bool wake_d0i0); 243 int avs_dsp_send_pm_msg(struct avs_dev *adev, struct avs_ipc_msg *request, 244 struct avs_ipc_msg *reply, bool wake_d0i0); 245 int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev, 246 struct avs_ipc_msg *request, int timeout); 247 int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request); 248 void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable); 249 int avs_ipc_init(struct avs_ipc *ipc, struct device *dev); 250 void avs_ipc_block(struct avs_ipc *ipc); 251 252 int avs_dsp_disable_d0ix(struct avs_dev *adev); 253 int avs_dsp_enable_d0ix(struct avs_dev *adev); 254 255 int skl_log_buffer_offset(struct avs_dev *adev, u32 core); 256 257 /* Firmware resources management */ 258 259 int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry); 260 int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry); 261 int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid); 262 bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id); 263 264 int avs_module_info_init(struct avs_dev *adev, bool purge); 265 void avs_module_info_free(struct avs_dev *adev); 266 int avs_module_id_alloc(struct avs_dev *adev, u16 module_id); 267 void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id); 268 int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name); 269 void avs_release_last_firmware(struct avs_dev *adev); 270 void avs_release_firmwares(struct avs_dev *adev); 271 272 int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id, 273 u8 core_id, u8 domain, void *param, u32 param_size, 274 u16 *instance_id); 275 void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id, 276 u8 ppl_instance_id, u8 core_id); 277 int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority, 278 bool lp, u16 attributes, u8 *instance_id); 279 int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id); 280 281 /* Firmware loading */ 282 283 void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable); 284 void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable); 285 void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable); 286 287 int avs_dsp_load_libraries(struct avs_dev *adev, struct avs_tplg_library *libs, u32 num_libs); 288 int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge); 289 int avs_dsp_first_boot_firmware(struct avs_dev *adev); 290 291 int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw); 292 int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id); 293 int avs_cldma_transfer_modules(struct avs_dev *adev, bool load, 294 struct avs_module_entry *mods, u32 num_mods); 295 int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw); 296 int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id); 297 int avs_hda_transfer_modules(struct avs_dev *adev, bool load, 298 struct avs_module_entry *mods, u32 num_mods); 299 300 /* Soc component members */ 301 302 struct avs_soc_component { 303 struct snd_soc_component base; 304 struct avs_tplg *tplg; 305 306 struct list_head node; 307 }; 308 309 #define to_avs_soc_component(comp) \ 310 container_of(comp, struct avs_soc_component, base) 311 312 extern const struct snd_soc_dai_ops avs_dai_fe_ops; 313 314 int avs_dmic_platform_register(struct avs_dev *adev, const char *name); 315 int avs_i2s_platform_register(struct avs_dev *adev, const char *name, unsigned long port_mask, 316 unsigned long *tdms); 317 int avs_hda_platform_register(struct avs_dev *adev, const char *name); 318 319 int avs_register_all_boards(struct avs_dev *adev); 320 void avs_unregister_all_boards(struct avs_dev *adev); 321 322 /* Firmware tracing helpers */ 323 324 unsigned int __kfifo_fromio_locked(struct kfifo *fifo, const void __iomem *src, unsigned int len, 325 spinlock_t *lock); 326 327 #define avs_log_buffer_size(adev) \ 328 ((adev)->fw_cfg.trace_log_bytes / (adev)->hw_cfg.dsp_cores) 329 330 #define avs_log_buffer_addr(adev, core) \ 331 ({ \ 332 s32 __offset = avs_dsp_op(adev, log_buffer_offset, core); \ 333 (__offset < 0) ? NULL : \ 334 (avs_sram_addr(adev, AVS_DEBUG_WINDOW) + __offset); \ 335 }) 336 337 struct apl_log_buffer_layout { 338 u32 read_ptr; 339 u32 write_ptr; 340 u8 buffer[]; 341 } __packed; 342 343 #define apl_log_payload_size(adev) \ 344 (avs_log_buffer_size(adev) - sizeof(struct apl_log_buffer_layout)) 345 346 #define apl_log_payload_addr(addr) \ 347 (addr + sizeof(struct apl_log_buffer_layout)) 348 349 #endif /* __SOUND_SOC_INTEL_AVS_H */ 350