xref: /openbmc/linux/sound/soc/intel/avs/avs.h (revision 99a15348)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright(c) 2021-2022 Intel Corporation. All rights reserved.
4  *
5  * Authors: Cezary Rojewski <cezary.rojewski@intel.com>
6  *          Amadeusz Slawinski <amadeuszx.slawinski@linux.intel.com>
7  */
8 
9 #ifndef __SOUND_SOC_INTEL_AVS_H
10 #define __SOUND_SOC_INTEL_AVS_H
11 
12 #include <linux/device.h>
13 #include <linux/firmware.h>
14 #include <sound/hda_codec.h>
15 #include <sound/hda_register.h>
16 #include "messages.h"
17 #include "registers.h"
18 
19 struct avs_dev;
20 
21 /*
22  * struct avs_dsp_ops - Platform-specific DSP operations
23  *
24  * @power: Power on or off DSP cores
25  * @reset: Enter or exit reset state on DSP cores
26  * @stall: Stall or run DSP cores
27  * @irq_handler: Top half of IPC servicing
28  * @irq_thread: Bottom half of IPC servicing
29  * @int_control: Enable or disable IPC interrupts
30  */
31 struct avs_dsp_ops {
32 	int (* const power)(struct avs_dev *, u32, bool);
33 	int (* const reset)(struct avs_dev *, u32, bool);
34 	int (* const stall)(struct avs_dev *, u32, bool);
35 	irqreturn_t (* const irq_handler)(int, void *);
36 	irqreturn_t (* const irq_thread)(int, void *);
37 	void (* const int_control)(struct avs_dev *, bool);
38 	int (* const load_basefw)(struct avs_dev *, struct firmware *);
39 	int (* const load_lib)(struct avs_dev *, struct firmware *, u32);
40 	int (* const transfer_mods)(struct avs_dev *, bool, struct avs_module_entry *, u32);
41 };
42 
43 #define avs_dsp_op(adev, op, ...) \
44 	((adev)->spec->dsp_ops->op(adev, ## __VA_ARGS__))
45 
46 #define AVS_PLATATTR_CLDMA		BIT_ULL(0)
47 #define AVS_PLATATTR_IMR		BIT_ULL(1)
48 
49 #define avs_platattr_test(adev, attr) \
50 	((adev)->spec->attributes & AVS_PLATATTR_##attr)
51 
52 /* Platform specific descriptor */
53 struct avs_spec {
54 	const char *name;
55 
56 	const struct avs_dsp_ops *const dsp_ops;
57 	struct avs_fw_version min_fw_version; /* anything below is rejected */
58 
59 	const u32 core_init_mask;	/* used during DSP boot */
60 	const u64 attributes;		/* bitmask of AVS_PLATATTR_* */
61 	const u32 sram_base_offset;
62 	const u32 sram_window_size;
63 	const u32 rom_status;
64 };
65 
66 struct avs_fw_entry {
67 	char *name;
68 	const struct firmware *fw;
69 
70 	struct list_head node;
71 };
72 
73 /*
74  * struct avs_dev - Intel HD-Audio driver data
75  *
76  * @dev: PCI device
77  * @dsp_ba: DSP bar address
78  * @spec: platform-specific descriptor
79  * @fw_cfg: Firmware configuration, obtained through FW_CONFIG message
80  * @hw_cfg: Hardware configuration, obtained through HW_CONFIG message
81  * @mods_info: Available module-types, obtained through MODULES_INFO message
82  * @mod_idas: Module instance ID pool, one per module-type
83  * @modres_mutex: For synchronizing any @mods_info updates
84  * @ppl_ida: Pipeline instance ID pool
85  * @fw_list: List of libraries loaded, including base firmware
86  */
87 struct avs_dev {
88 	struct hda_bus base;
89 	struct device *dev;
90 
91 	void __iomem *dsp_ba;
92 	const struct avs_spec *spec;
93 	struct avs_ipc *ipc;
94 
95 	struct avs_fw_cfg fw_cfg;
96 	struct avs_hw_cfg hw_cfg;
97 	struct avs_mods_info *mods_info;
98 	struct ida **mod_idas;
99 	struct mutex modres_mutex;
100 	struct ida ppl_ida;
101 	struct list_head fw_list;
102 	int *core_refs;		/* reference count per core */
103 	char **lib_names;
104 
105 	struct completion fw_ready;
106 };
107 
108 /* from hda_bus to avs_dev */
109 #define hda_to_avs(hda) container_of(hda, struct avs_dev, base)
110 /* from hdac_bus to avs_dev */
111 #define hdac_to_avs(hdac) hda_to_avs(to_hda_bus(hdac))
112 /* from device to avs_dev */
113 #define to_avs_dev(dev) \
114 ({ \
115 	struct hdac_bus *__bus = dev_get_drvdata(dev); \
116 	hdac_to_avs(__bus); \
117 })
118 
119 int avs_dsp_core_power(struct avs_dev *adev, u32 core_mask, bool power);
120 int avs_dsp_core_reset(struct avs_dev *adev, u32 core_mask, bool reset);
121 int avs_dsp_core_stall(struct avs_dev *adev, u32 core_mask, bool stall);
122 int avs_dsp_core_enable(struct avs_dev *adev, u32 core_mask);
123 int avs_dsp_core_disable(struct avs_dev *adev, u32 core_mask);
124 
125 /* Inter Process Communication */
126 
127 struct avs_ipc_msg {
128 	union {
129 		u64 header;
130 		union avs_global_msg glb;
131 		union avs_reply_msg rsp;
132 	};
133 	void *data;
134 	size_t size;
135 };
136 
137 /*
138  * struct avs_ipc - DSP IPC context
139  *
140  * @dev: PCI device
141  * @rx: Reply message cache
142  * @default_timeout_ms: default message timeout in MS
143  * @ready: whether firmware is ready and communication is open
144  * @rx_completed: whether RX for previously sent TX has been received
145  * @rx_lock: for serializing manipulation of rx_* fields
146  * @msg_lock: for synchronizing request handling
147  * @done_completion: DONE-part of IPC i.e. ROM and ACKs from FW
148  * @busy_completion: BUSY-part of IPC i.e. receiving responses from FW
149  */
150 struct avs_ipc {
151 	struct device *dev;
152 
153 	struct avs_ipc_msg rx;
154 	u32 default_timeout_ms;
155 	bool ready;
156 
157 	bool rx_completed;
158 	spinlock_t rx_lock;
159 	struct mutex msg_mutex;
160 	struct completion done_completion;
161 	struct completion busy_completion;
162 };
163 
164 #define AVS_EIPC	EREMOTEIO
165 /*
166  * IPC handlers may return positive value (firmware error code) what denotes
167  * successful HOST <-> DSP communication yet failure to process specific request.
168  *
169  * Below macro converts returned value to linux kernel error code.
170  * All IPC callers MUST use it as soon as firmware error code is consumed.
171  */
172 #define AVS_IPC_RET(ret) \
173 	(((ret) <= 0) ? (ret) : -AVS_EIPC)
174 
175 static inline void avs_ipc_err(struct avs_dev *adev, struct avs_ipc_msg *tx,
176 			       const char *name, int error)
177 {
178 	/*
179 	 * If IPC channel is blocked e.g.: due to ongoing recovery,
180 	 * -EPERM error code is expected and thus it's not an actual error.
181 	 */
182 	if (error == -EPERM)
183 		dev_dbg(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
184 			tx->glb.primary, tx->glb.ext.val, error);
185 	else
186 		dev_err(adev->dev, "%s 0x%08x 0x%08x failed: %d\n", name,
187 			tx->glb.primary, tx->glb.ext.val, error);
188 }
189 
190 irqreturn_t avs_dsp_irq_handler(int irq, void *dev_id);
191 irqreturn_t avs_dsp_irq_thread(int irq, void *dev_id);
192 void avs_dsp_process_response(struct avs_dev *adev, u64 header);
193 int avs_dsp_send_msg_timeout(struct avs_dev *adev,
194 			     struct avs_ipc_msg *request,
195 			     struct avs_ipc_msg *reply, int timeout);
196 int avs_dsp_send_msg(struct avs_dev *adev,
197 		     struct avs_ipc_msg *request, struct avs_ipc_msg *reply);
198 int avs_dsp_send_rom_msg_timeout(struct avs_dev *adev,
199 				 struct avs_ipc_msg *request, int timeout);
200 int avs_dsp_send_rom_msg(struct avs_dev *adev, struct avs_ipc_msg *request);
201 void avs_dsp_interrupt_control(struct avs_dev *adev, bool enable);
202 int avs_ipc_init(struct avs_ipc *ipc, struct device *dev);
203 void avs_ipc_block(struct avs_ipc *ipc);
204 
205 /* Firmware resources management */
206 
207 int avs_get_module_entry(struct avs_dev *adev, const guid_t *uuid, struct avs_module_entry *entry);
208 int avs_get_module_id_entry(struct avs_dev *adev, u32 module_id, struct avs_module_entry *entry);
209 int avs_get_module_id(struct avs_dev *adev, const guid_t *uuid);
210 bool avs_is_module_ida_empty(struct avs_dev *adev, u32 module_id);
211 
212 int avs_module_info_init(struct avs_dev *adev, bool purge);
213 void avs_module_info_free(struct avs_dev *adev);
214 int avs_module_id_alloc(struct avs_dev *adev, u16 module_id);
215 void avs_module_id_free(struct avs_dev *adev, u16 module_id, u8 instance_id);
216 int avs_request_firmware(struct avs_dev *adev, const struct firmware **fw_p, const char *name);
217 void avs_release_last_firmware(struct avs_dev *adev);
218 void avs_release_firmwares(struct avs_dev *adev);
219 
220 int avs_dsp_init_module(struct avs_dev *adev, u16 module_id, u8 ppl_instance_id,
221 			u8 core_id, u8 domain, void *param, u32 param_size,
222 			u16 *instance_id);
223 void avs_dsp_delete_module(struct avs_dev *adev, u16 module_id, u16 instance_id,
224 			   u8 ppl_instance_id, u8 core_id);
225 int avs_dsp_create_pipeline(struct avs_dev *adev, u16 req_size, u8 priority,
226 			    bool lp, u16 attributes, u8 *instance_id);
227 int avs_dsp_delete_pipeline(struct avs_dev *adev, u8 instance_id);
228 
229 /* Firmware loading */
230 
231 void avs_hda_clock_gating_enable(struct avs_dev *adev, bool enable);
232 void avs_hda_power_gating_enable(struct avs_dev *adev, bool enable);
233 void avs_hda_l1sen_enable(struct avs_dev *adev, bool enable);
234 
235 int avs_dsp_boot_firmware(struct avs_dev *adev, bool purge);
236 int avs_dsp_first_boot_firmware(struct avs_dev *adev);
237 
238 int avs_cldma_load_basefw(struct avs_dev *adev, struct firmware *fw);
239 int avs_cldma_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
240 int avs_cldma_transfer_modules(struct avs_dev *adev, bool load,
241 			       struct avs_module_entry *mods, u32 num_mods);
242 int avs_hda_load_basefw(struct avs_dev *adev, struct firmware *fw);
243 int avs_hda_load_library(struct avs_dev *adev, struct firmware *lib, u32 id);
244 int avs_hda_transfer_modules(struct avs_dev *adev, bool load,
245 			     struct avs_module_entry *mods, u32 num_mods);
246 
247 #endif /* __SOUND_SOC_INTEL_AVS_H */
248