1 /* 2 * linux/sound/mpc5200-ac97.c -- AC97 support for the Freescale MPC52xx chip. 3 * 4 * Copyright (C) 2009 Jon Smirl, Digispeaker 5 * Author: Jon Smirl <jonsmirl@gmail.com> 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 */ 11 12 #include <linux/module.h> 13 #include <linux/of_device.h> 14 #include <linux/of_platform.h> 15 #include <linux/delay.h> 16 17 #include <sound/pcm.h> 18 #include <sound/pcm_params.h> 19 #include <sound/soc.h> 20 21 #include <asm/time.h> 22 #include <asm/delay.h> 23 #include <asm/mpc52xx_psc.h> 24 25 #include "mpc5200_dma.h" 26 #include "mpc5200_psc_ac97.h" 27 28 #define DRV_NAME "mpc5200-psc-ac97" 29 30 /* ALSA only supports a single AC97 device so static is recommend here */ 31 static struct psc_dma *psc_dma; 32 33 static unsigned short psc_ac97_read(struct snd_ac97 *ac97, unsigned short reg) 34 { 35 int status; 36 unsigned int val; 37 38 mutex_lock(&psc_dma->mutex); 39 40 /* Wait for command send status zero = ready */ 41 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & 42 MPC52xx_PSC_SR_CMDSEND), 100, 0); 43 if (status == 0) { 44 pr_err("timeout on ac97 bus (rdy)\n"); 45 mutex_unlock(&psc_dma->mutex); 46 return -ENODEV; 47 } 48 49 /* Force clear the data valid bit */ 50 in_be32(&psc_dma->psc_regs->ac97_data); 51 52 /* Send the read */ 53 out_be32(&psc_dma->psc_regs->ac97_cmd, (1<<31) | ((reg & 0x7f) << 24)); 54 55 /* Wait for the answer */ 56 status = spin_event_timeout((in_be16(&psc_dma->psc_regs->sr_csr.status) & 57 MPC52xx_PSC_SR_DATA_VAL), 100, 0); 58 if (status == 0) { 59 pr_err("timeout on ac97 read (val) %x\n", 60 in_be16(&psc_dma->psc_regs->sr_csr.status)); 61 mutex_unlock(&psc_dma->mutex); 62 return -ENODEV; 63 } 64 /* Get the data */ 65 val = in_be32(&psc_dma->psc_regs->ac97_data); 66 if (((val >> 24) & 0x7f) != reg) { 67 pr_err("reg echo error on ac97 read\n"); 68 mutex_unlock(&psc_dma->mutex); 69 return -ENODEV; 70 } 71 val = (val >> 8) & 0xffff; 72 73 mutex_unlock(&psc_dma->mutex); 74 return (unsigned short) val; 75 } 76 77 static void psc_ac97_write(struct snd_ac97 *ac97, 78 unsigned short reg, unsigned short val) 79 { 80 int status; 81 82 mutex_lock(&psc_dma->mutex); 83 84 /* Wait for command status zero = ready */ 85 status = spin_event_timeout(!(in_be16(&psc_dma->psc_regs->sr_csr.status) & 86 MPC52xx_PSC_SR_CMDSEND), 100, 0); 87 if (status == 0) { 88 pr_err("timeout on ac97 bus (write)\n"); 89 goto out; 90 } 91 /* Write data */ 92 out_be32(&psc_dma->psc_regs->ac97_cmd, 93 ((reg & 0x7f) << 24) | (val << 8)); 94 95 out: 96 mutex_unlock(&psc_dma->mutex); 97 } 98 99 static void psc_ac97_warm_reset(struct snd_ac97 *ac97) 100 { 101 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 102 103 out_be32(®s->sicr, psc_dma->sicr | MPC52xx_PSC_SICR_AWR); 104 udelay(3); 105 out_be32(®s->sicr, psc_dma->sicr); 106 } 107 108 static void psc_ac97_cold_reset(struct snd_ac97 *ac97) 109 { 110 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 111 112 /* Do a cold reset */ 113 out_8(®s->op1, MPC52xx_PSC_OP_RES); 114 udelay(10); 115 out_8(®s->op0, MPC52xx_PSC_OP_RES); 116 msleep(1); 117 psc_ac97_warm_reset(ac97); 118 } 119 120 struct snd_ac97_bus_ops soc_ac97_ops = { 121 .read = psc_ac97_read, 122 .write = psc_ac97_write, 123 .reset = psc_ac97_cold_reset, 124 .warm_reset = psc_ac97_warm_reset, 125 }; 126 EXPORT_SYMBOL_GPL(soc_ac97_ops); 127 128 static int psc_ac97_hw_analog_params(struct snd_pcm_substream *substream, 129 struct snd_pcm_hw_params *params, 130 struct snd_soc_dai *cpu_dai) 131 { 132 struct psc_dma *psc_dma = cpu_dai->private_data; 133 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma); 134 135 dev_dbg(psc_dma->dev, "%s(substream=%p) p_size=%i p_bytes=%i" 136 " periods=%i buffer_size=%i buffer_bytes=%i channels=%i" 137 " rate=%i format=%i\n", 138 __func__, substream, params_period_size(params), 139 params_period_bytes(params), params_periods(params), 140 params_buffer_size(params), params_buffer_bytes(params), 141 params_channels(params), params_rate(params), 142 params_format(params)); 143 144 /* Determine the set of enable bits to turn on */ 145 s->ac97_slot_bits = (params_channels(params) == 1) ? 0x100 : 0x300; 146 if (substream->pstr->stream != SNDRV_PCM_STREAM_CAPTURE) 147 s->ac97_slot_bits <<= 16; 148 return 0; 149 } 150 151 static int psc_ac97_hw_digital_params(struct snd_pcm_substream *substream, 152 struct snd_pcm_hw_params *params, 153 struct snd_soc_dai *cpu_dai) 154 { 155 struct psc_dma *psc_dma = cpu_dai->private_data; 156 157 dev_dbg(psc_dma->dev, "%s(substream=%p)\n", __func__, substream); 158 159 if (params_channels(params) == 1) 160 out_be32(&psc_dma->psc_regs->ac97_slots, 0x01000000); 161 else 162 out_be32(&psc_dma->psc_regs->ac97_slots, 0x03000000); 163 164 return 0; 165 } 166 167 static int psc_ac97_trigger(struct snd_pcm_substream *substream, int cmd, 168 struct snd_soc_dai *dai) 169 { 170 struct snd_soc_pcm_runtime *rtd = substream->private_data; 171 struct psc_dma *psc_dma = rtd->dai->cpu_dai->private_data; 172 struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma); 173 174 switch (cmd) { 175 case SNDRV_PCM_TRIGGER_START: 176 dev_dbg(psc_dma->dev, "AC97 START: stream=%i\n", 177 substream->pstr->stream); 178 179 /* Set the slot enable bits */ 180 psc_dma->slots |= s->ac97_slot_bits; 181 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); 182 break; 183 184 case SNDRV_PCM_TRIGGER_STOP: 185 dev_dbg(psc_dma->dev, "AC97 STOP: stream=%i\n", 186 substream->pstr->stream); 187 188 /* Clear the slot enable bits */ 189 psc_dma->slots &= ~(s->ac97_slot_bits); 190 out_be32(&psc_dma->psc_regs->ac97_slots, psc_dma->slots); 191 break; 192 } 193 return 0; 194 } 195 196 static int psc_ac97_probe(struct platform_device *pdev, 197 struct snd_soc_dai *cpu_dai) 198 { 199 struct psc_dma *psc_dma = cpu_dai->private_data; 200 struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs; 201 202 /* Go */ 203 out_8(®s->command, MPC52xx_PSC_TX_ENABLE | MPC52xx_PSC_RX_ENABLE); 204 return 0; 205 } 206 207 /* --------------------------------------------------------------------- 208 * ALSA SoC Bindings 209 * 210 * - Digital Audio Interface (DAI) template 211 * - create/destroy dai hooks 212 */ 213 214 /** 215 * psc_ac97_dai_template: template CPU Digital Audio Interface 216 */ 217 static struct snd_soc_dai_ops psc_ac97_analog_ops = { 218 .hw_params = psc_ac97_hw_analog_params, 219 .trigger = psc_ac97_trigger, 220 }; 221 222 static struct snd_soc_dai_ops psc_ac97_digital_ops = { 223 .hw_params = psc_ac97_hw_digital_params, 224 }; 225 226 struct snd_soc_dai psc_ac97_dai[] = { 227 { 228 .name = "AC97", 229 .ac97_control = 1, 230 .probe = psc_ac97_probe, 231 .playback = { 232 .channels_min = 1, 233 .channels_max = 6, 234 .rates = SNDRV_PCM_RATE_8000_48000, 235 .formats = SNDRV_PCM_FMTBIT_S32_BE, 236 }, 237 .capture = { 238 .channels_min = 1, 239 .channels_max = 2, 240 .rates = SNDRV_PCM_RATE_8000_48000, 241 .formats = SNDRV_PCM_FMTBIT_S32_BE, 242 }, 243 .ops = &psc_ac97_analog_ops, 244 }, 245 { 246 .name = "SPDIF", 247 .ac97_control = 1, 248 .playback = { 249 .channels_min = 1, 250 .channels_max = 2, 251 .rates = SNDRV_PCM_RATE_32000 | \ 252 SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000, 253 .formats = SNDRV_PCM_FMTBIT_IEC958_SUBFRAME_BE, 254 }, 255 .ops = &psc_ac97_digital_ops, 256 } }; 257 EXPORT_SYMBOL_GPL(psc_ac97_dai); 258 259 260 261 /* --------------------------------------------------------------------- 262 * OF platform bus binding code: 263 * - Probe/remove operations 264 * - OF device match table 265 */ 266 static int __devinit psc_ac97_of_probe(struct of_device *op, 267 const struct of_device_id *match) 268 { 269 int rc, i; 270 struct snd_ac97 ac97; 271 struct mpc52xx_psc __iomem *regs; 272 273 rc = mpc5200_audio_dma_create(op); 274 if (rc != 0) 275 return rc; 276 277 for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++) 278 psc_ac97_dai[i].dev = &op->dev; 279 280 rc = snd_soc_register_dais(psc_ac97_dai, ARRAY_SIZE(psc_ac97_dai)); 281 if (rc != 0) { 282 dev_err(&op->dev, "Failed to register DAI\n"); 283 return rc; 284 } 285 286 psc_dma = dev_get_drvdata(&op->dev); 287 regs = psc_dma->psc_regs; 288 ac97.private_data = psc_dma; 289 290 for (i = 0; i < ARRAY_SIZE(psc_ac97_dai); i++) 291 psc_ac97_dai[i].private_data = psc_dma; 292 293 psc_dma->imr = 0; 294 out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr); 295 296 /* Configure the serial interface mode to AC97 */ 297 psc_dma->sicr = MPC52xx_PSC_SICR_SIM_AC97 | MPC52xx_PSC_SICR_ENAC97; 298 out_be32(®s->sicr, psc_dma->sicr); 299 300 /* No slots active */ 301 out_be32(®s->ac97_slots, 0x00000000); 302 303 return 0; 304 } 305 306 static int __devexit psc_ac97_of_remove(struct of_device *op) 307 { 308 return mpc5200_audio_dma_destroy(op); 309 } 310 311 /* Match table for of_platform binding */ 312 static struct of_device_id psc_ac97_match[] __devinitdata = { 313 { .compatible = "fsl,mpc5200-psc-ac97", }, 314 { .compatible = "fsl,mpc5200b-psc-ac97", }, 315 {} 316 }; 317 MODULE_DEVICE_TABLE(of, psc_ac97_match); 318 319 static struct of_platform_driver psc_ac97_driver = { 320 .match_table = psc_ac97_match, 321 .probe = psc_ac97_of_probe, 322 .remove = __devexit_p(psc_ac97_of_remove), 323 .driver = { 324 .name = "mpc5200-psc-ac97", 325 .owner = THIS_MODULE, 326 }, 327 }; 328 329 /* --------------------------------------------------------------------- 330 * Module setup and teardown; simply register the of_platform driver 331 * for the PSC in AC97 mode. 332 */ 333 static int __init psc_ac97_init(void) 334 { 335 return of_register_platform_driver(&psc_ac97_driver); 336 } 337 module_init(psc_ac97_init); 338 339 static void __exit psc_ac97_exit(void) 340 { 341 of_unregister_platform_driver(&psc_ac97_driver); 342 } 343 module_exit(psc_ac97_exit); 344 345 MODULE_AUTHOR("Jon Smirl <jonsmirl@gmail.com>"); 346 MODULE_DESCRIPTION("mpc5200 AC97 module"); 347 MODULE_LICENSE("GPL"); 348 349