12ba28053SFabio Estevam // SPDX-License-Identifier: GPL-2.0 22ba28053SFabio Estevam // 32ba28053SFabio Estevam // Freescale ASRC ALSA SoC Platform (DMA) driver 42ba28053SFabio Estevam // 52ba28053SFabio Estevam // Copyright (C) 2014 Freescale Semiconductor, Inc. 62ba28053SFabio Estevam // 72ba28053SFabio Estevam // Author: Nicolin Chen <nicoleotsuka@gmail.com> 83117bb31SNicolin Chen 93117bb31SNicolin Chen #include <linux/dma-mapping.h> 103117bb31SNicolin Chen #include <linux/module.h> 11c6547c2eSSascha Hauer #include <linux/dma/imx-dma.h> 123117bb31SNicolin Chen #include <sound/dmaengine_pcm.h> 133117bb31SNicolin Chen #include <sound/pcm_params.h> 143117bb31SNicolin Chen 15be7bd03fSShengjiu Wang #include "fsl_asrc_common.h" 163117bb31SNicolin Chen 173117bb31SNicolin Chen #define FSL_ASRC_DMABUF_SIZE (256 * 1024) 183117bb31SNicolin Chen 19703df441SShengjiu Wang static struct snd_pcm_hardware snd_imx_hardware = { 203117bb31SNicolin Chen .info = SNDRV_PCM_INFO_INTERLEAVED | 213117bb31SNicolin Chen SNDRV_PCM_INFO_BLOCK_TRANSFER | 223117bb31SNicolin Chen SNDRV_PCM_INFO_MMAP | 23703df441SShengjiu Wang SNDRV_PCM_INFO_MMAP_VALID, 243117bb31SNicolin Chen .buffer_bytes_max = FSL_ASRC_DMABUF_SIZE, 253117bb31SNicolin Chen .period_bytes_min = 128, 263117bb31SNicolin Chen .period_bytes_max = 65535, /* Limited by SDMA engine */ 273117bb31SNicolin Chen .periods_min = 2, 283117bb31SNicolin Chen .periods_max = 255, 293117bb31SNicolin Chen .fifo_size = 0, 303117bb31SNicolin Chen }; 313117bb31SNicolin Chen 323117bb31SNicolin Chen static bool filter(struct dma_chan *chan, void *param) 333117bb31SNicolin Chen { 343117bb31SNicolin Chen if (!imx_dma_is_general_purpose(chan)) 353117bb31SNicolin Chen return false; 363117bb31SNicolin Chen 373117bb31SNicolin Chen chan->private = param; 383117bb31SNicolin Chen 393117bb31SNicolin Chen return true; 403117bb31SNicolin Chen } 413117bb31SNicolin Chen 423117bb31SNicolin Chen static void fsl_asrc_dma_complete(void *arg) 433117bb31SNicolin Chen { 443117bb31SNicolin Chen struct snd_pcm_substream *substream = arg; 453117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 463117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 473117bb31SNicolin Chen 483117bb31SNicolin Chen pair->pos += snd_pcm_lib_period_bytes(substream); 493117bb31SNicolin Chen if (pair->pos >= snd_pcm_lib_buffer_bytes(substream)) 503117bb31SNicolin Chen pair->pos = 0; 513117bb31SNicolin Chen 523117bb31SNicolin Chen snd_pcm_period_elapsed(substream); 533117bb31SNicolin Chen } 543117bb31SNicolin Chen 558903ed25SKuninori Morimoto static int fsl_asrc_dma_prepare_and_submit(struct snd_pcm_substream *substream, 568903ed25SKuninori Morimoto struct snd_soc_component *component) 573117bb31SNicolin Chen { 583117bb31SNicolin Chen u8 dir = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ? OUT : IN; 593117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 603117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 617f110661SKuninori Morimoto struct device *dev = component->dev; 623117bb31SNicolin Chen unsigned long flags = DMA_CTRL_ACK; 633117bb31SNicolin Chen 643117bb31SNicolin Chen /* Prepare and submit Front-End DMA channel */ 653117bb31SNicolin Chen if (!substream->runtime->no_period_wakeup) 663117bb31SNicolin Chen flags |= DMA_PREP_INTERRUPT; 673117bb31SNicolin Chen 683117bb31SNicolin Chen pair->pos = 0; 693117bb31SNicolin Chen pair->desc[!dir] = dmaengine_prep_dma_cyclic( 703117bb31SNicolin Chen pair->dma_chan[!dir], runtime->dma_addr, 713117bb31SNicolin Chen snd_pcm_lib_buffer_bytes(substream), 723117bb31SNicolin Chen snd_pcm_lib_period_bytes(substream), 7324dbd9edSStefan Agner dir == OUT ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM, flags); 743117bb31SNicolin Chen if (!pair->desc[!dir]) { 753117bb31SNicolin Chen dev_err(dev, "failed to prepare slave DMA for Front-End\n"); 763117bb31SNicolin Chen return -ENOMEM; 773117bb31SNicolin Chen } 783117bb31SNicolin Chen 793117bb31SNicolin Chen pair->desc[!dir]->callback = fsl_asrc_dma_complete; 803117bb31SNicolin Chen pair->desc[!dir]->callback_param = substream; 813117bb31SNicolin Chen 823117bb31SNicolin Chen dmaengine_submit(pair->desc[!dir]); 833117bb31SNicolin Chen 843117bb31SNicolin Chen /* Prepare and submit Back-End DMA channel */ 853117bb31SNicolin Chen pair->desc[dir] = dmaengine_prep_dma_cyclic( 863117bb31SNicolin Chen pair->dma_chan[dir], 0xffff, 64, 64, DMA_DEV_TO_DEV, 0); 873117bb31SNicolin Chen if (!pair->desc[dir]) { 883117bb31SNicolin Chen dev_err(dev, "failed to prepare slave DMA for Back-End\n"); 893117bb31SNicolin Chen return -ENOMEM; 903117bb31SNicolin Chen } 913117bb31SNicolin Chen 923117bb31SNicolin Chen dmaengine_submit(pair->desc[dir]); 933117bb31SNicolin Chen 943117bb31SNicolin Chen return 0; 953117bb31SNicolin Chen } 963117bb31SNicolin Chen 978903ed25SKuninori Morimoto static int fsl_asrc_dma_trigger(struct snd_soc_component *component, 988903ed25SKuninori Morimoto struct snd_pcm_substream *substream, int cmd) 993117bb31SNicolin Chen { 1003117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 1013117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 1023117bb31SNicolin Chen int ret; 1033117bb31SNicolin Chen 1043117bb31SNicolin Chen switch (cmd) { 1053117bb31SNicolin Chen case SNDRV_PCM_TRIGGER_START: 1063117bb31SNicolin Chen case SNDRV_PCM_TRIGGER_RESUME: 1073117bb31SNicolin Chen case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1088903ed25SKuninori Morimoto ret = fsl_asrc_dma_prepare_and_submit(substream, component); 1093117bb31SNicolin Chen if (ret) 1103117bb31SNicolin Chen return ret; 1113117bb31SNicolin Chen dma_async_issue_pending(pair->dma_chan[IN]); 1123117bb31SNicolin Chen dma_async_issue_pending(pair->dma_chan[OUT]); 1133117bb31SNicolin Chen break; 1143117bb31SNicolin Chen case SNDRV_PCM_TRIGGER_STOP: 1153117bb31SNicolin Chen case SNDRV_PCM_TRIGGER_SUSPEND: 1163117bb31SNicolin Chen case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 117289a3ec0SSascha Hauer dmaengine_terminate_async(pair->dma_chan[OUT]); 118289a3ec0SSascha Hauer dmaengine_terminate_async(pair->dma_chan[IN]); 1193117bb31SNicolin Chen break; 1203117bb31SNicolin Chen default: 1213117bb31SNicolin Chen return -EINVAL; 1223117bb31SNicolin Chen } 1233117bb31SNicolin Chen 1243117bb31SNicolin Chen return 0; 1253117bb31SNicolin Chen } 1263117bb31SNicolin Chen 1278903ed25SKuninori Morimoto static int fsl_asrc_dma_hw_params(struct snd_soc_component *component, 1288903ed25SKuninori Morimoto struct snd_pcm_substream *substream, 1293117bb31SNicolin Chen struct snd_pcm_hw_params *params) 1303117bb31SNicolin Chen { 1313117bb31SNicolin Chen enum dma_slave_buswidth buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES; 1326398b004SShengjiu Wang enum sdma_peripheral_type be_peripheral_type = IMX_DMATYPE_SSI; 1339f5f078aSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 1343117bb31SNicolin Chen bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 1353117bb31SNicolin Chen struct snd_dmaengine_dai_dma_data *dma_params_fe = NULL; 1363117bb31SNicolin Chen struct snd_dmaengine_dai_dma_data *dma_params_be = NULL; 1373117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 1383117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 139706e2c88SShengjiu Wang struct dma_chan *tmp_chan = NULL, *be_chan = NULL; 140706e2c88SShengjiu Wang struct snd_soc_component *component_be = NULL; 1417470704dSShengjiu Wang struct fsl_asrc *asrc = pair->asrc; 142*1849a150SSascha Hauer struct dma_slave_config config_fe = {}, config_be = {}; 1436398b004SShengjiu Wang struct sdma_peripheral_config audio_config; 1443117bb31SNicolin Chen enum asrc_pair_index index = pair->index; 1457f110661SKuninori Morimoto struct device *dev = component->dev; 146ee427ea4SRobin Gong struct device_node *of_dma_node; 1473117bb31SNicolin Chen int stream = substream->stream; 1483117bb31SNicolin Chen struct imx_dma_data *tmp_data; 1493117bb31SNicolin Chen struct snd_soc_dpcm *dpcm; 1503117bb31SNicolin Chen struct device *dev_be; 1513117bb31SNicolin Chen u8 dir = tx ? OUT : IN; 1523117bb31SNicolin Chen dma_cap_mask_t mask; 1534520af41SShengjiu Wang int ret, width; 1543117bb31SNicolin Chen 1553117bb31SNicolin Chen /* Fetch the Back-End dma_data from DPCM */ 1568d6258a4SKuninori Morimoto for_each_dpcm_be(rtd, stream, dpcm) { 1573117bb31SNicolin Chen struct snd_soc_pcm_runtime *be = dpcm->be; 1583117bb31SNicolin Chen struct snd_pcm_substream *substream_be; 15917198ae7SKuninori Morimoto struct snd_soc_dai *dai = asoc_rtd_to_cpu(be, 0); 1603117bb31SNicolin Chen 1613117bb31SNicolin Chen if (dpcm->fe != rtd) 1623117bb31SNicolin Chen continue; 1633117bb31SNicolin Chen 1643117bb31SNicolin Chen substream_be = snd_soc_dpcm_get_substream(be, stream); 1653117bb31SNicolin Chen dma_params_be = snd_soc_dai_get_dma_data(dai, substream_be); 1663117bb31SNicolin Chen dev_be = dai->dev; 1673117bb31SNicolin Chen break; 1683117bb31SNicolin Chen } 1693117bb31SNicolin Chen 1703117bb31SNicolin Chen if (!dma_params_be) { 1713117bb31SNicolin Chen dev_err(dev, "failed to get the substream of Back-End\n"); 1723117bb31SNicolin Chen return -EINVAL; 1733117bb31SNicolin Chen } 1743117bb31SNicolin Chen 1753117bb31SNicolin Chen /* Override dma_data of the Front-End and config its dmaengine */ 17617198ae7SKuninori Morimoto dma_params_fe = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); 177be7bd03fSShengjiu Wang dma_params_fe->addr = asrc->paddr + asrc->get_fifo_addr(!dir, index); 1783117bb31SNicolin Chen dma_params_fe->maxburst = dma_params_be->maxburst; 1793117bb31SNicolin Chen 180be7bd03fSShengjiu Wang pair->dma_chan[!dir] = asrc->get_dma_channel(pair, !dir); 1813117bb31SNicolin Chen if (!pair->dma_chan[!dir]) { 1823117bb31SNicolin Chen dev_err(dev, "failed to request DMA channel\n"); 1833117bb31SNicolin Chen return -EINVAL; 1843117bb31SNicolin Chen } 1853117bb31SNicolin Chen 1863117bb31SNicolin Chen ret = snd_dmaengine_pcm_prepare_slave_config(substream, params, &config_fe); 1873117bb31SNicolin Chen if (ret) { 1883117bb31SNicolin Chen dev_err(dev, "failed to prepare DMA config for Front-End\n"); 1893117bb31SNicolin Chen return ret; 1903117bb31SNicolin Chen } 1913117bb31SNicolin Chen 1923117bb31SNicolin Chen ret = dmaengine_slave_config(pair->dma_chan[!dir], &config_fe); 1933117bb31SNicolin Chen if (ret) { 1943117bb31SNicolin Chen dev_err(dev, "failed to config DMA channel for Front-End\n"); 1953117bb31SNicolin Chen return ret; 1963117bb31SNicolin Chen } 1973117bb31SNicolin Chen 1983117bb31SNicolin Chen /* Request and config DMA channel for Back-End */ 1993117bb31SNicolin Chen dma_cap_zero(mask); 2003117bb31SNicolin Chen dma_cap_set(DMA_SLAVE, mask); 2013117bb31SNicolin Chen dma_cap_set(DMA_CYCLIC, mask); 2023117bb31SNicolin Chen 203c05f10f2SShengjiu Wang /* 204706e2c88SShengjiu Wang * The Back-End device might have already requested a DMA channel, 205706e2c88SShengjiu Wang * so try to reuse it first, and then request a new one upon NULL. 206706e2c88SShengjiu Wang */ 207706e2c88SShengjiu Wang component_be = snd_soc_lookup_component_nolocked(dev_be, SND_DMAENGINE_PCM_DRV_NAME); 208706e2c88SShengjiu Wang if (component_be) { 209706e2c88SShengjiu Wang be_chan = soc_component_to_pcm(component_be)->chan[substream->stream]; 210706e2c88SShengjiu Wang tmp_chan = be_chan; 211706e2c88SShengjiu Wang } 212706e2c88SShengjiu Wang if (!tmp_chan) 213706e2c88SShengjiu Wang tmp_chan = dma_request_slave_channel(dev_be, tx ? "tx" : "rx"); 214706e2c88SShengjiu Wang 215706e2c88SShengjiu Wang /* 216c05f10f2SShengjiu Wang * An EDMA DEV_TO_DEV channel is fixed and bound with DMA event of each 217c05f10f2SShengjiu Wang * peripheral, unlike SDMA channel that is allocated dynamically. So no 218706e2c88SShengjiu Wang * need to configure dma_request and dma_request2, but get dma_chan of 219706e2c88SShengjiu Wang * Back-End device directly via dma_request_slave_channel. 220c05f10f2SShengjiu Wang */ 221be7bd03fSShengjiu Wang if (!asrc->use_edma) { 2223117bb31SNicolin Chen /* Get DMA request of Back-End */ 2233117bb31SNicolin Chen tmp_data = tmp_chan->private; 2243117bb31SNicolin Chen pair->dma_data.dma_request = tmp_data->dma_request; 2256398b004SShengjiu Wang be_peripheral_type = tmp_data->peripheral_type; 226706e2c88SShengjiu Wang if (!be_chan) 2273117bb31SNicolin Chen dma_release_channel(tmp_chan); 2283117bb31SNicolin Chen 2293117bb31SNicolin Chen /* Get DMA request of Front-End */ 230be7bd03fSShengjiu Wang tmp_chan = asrc->get_dma_channel(pair, dir); 2313117bb31SNicolin Chen tmp_data = tmp_chan->private; 2323117bb31SNicolin Chen pair->dma_data.dma_request2 = tmp_data->dma_request; 2333117bb31SNicolin Chen pair->dma_data.peripheral_type = tmp_data->peripheral_type; 2343117bb31SNicolin Chen pair->dma_data.priority = tmp_data->priority; 2353117bb31SNicolin Chen dma_release_channel(tmp_chan); 2363117bb31SNicolin Chen 237ee427ea4SRobin Gong of_dma_node = pair->dma_chan[!dir]->device->dev->of_node; 238c05f10f2SShengjiu Wang pair->dma_chan[dir] = 239ee427ea4SRobin Gong __dma_request_channel(&mask, filter, &pair->dma_data, 240ee427ea4SRobin Gong of_dma_node); 241b287a6d9SShengjiu Wang pair->req_dma_chan = true; 242c05f10f2SShengjiu Wang } else { 243b287a6d9SShengjiu Wang pair->dma_chan[dir] = tmp_chan; 244b287a6d9SShengjiu Wang /* Do not flag to release if we are reusing the Back-End one */ 245b287a6d9SShengjiu Wang pair->req_dma_chan = !be_chan; 246c05f10f2SShengjiu Wang } 247c05f10f2SShengjiu Wang 2483117bb31SNicolin Chen if (!pair->dma_chan[dir]) { 2493117bb31SNicolin Chen dev_err(dev, "failed to request DMA channel for Back-End\n"); 2503117bb31SNicolin Chen return -EINVAL; 2513117bb31SNicolin Chen } 2523117bb31SNicolin Chen 2534520af41SShengjiu Wang width = snd_pcm_format_physical_width(asrc->asrc_format); 2544520af41SShengjiu Wang if (width < 8 || width > 64) 2554520af41SShengjiu Wang return -EINVAL; 2564520af41SShengjiu Wang else if (width == 8) 2574520af41SShengjiu Wang buswidth = DMA_SLAVE_BUSWIDTH_1_BYTE; 2584520af41SShengjiu Wang else if (width == 16) 2593117bb31SNicolin Chen buswidth = DMA_SLAVE_BUSWIDTH_2_BYTES; 2604520af41SShengjiu Wang else if (width == 24) 2614520af41SShengjiu Wang buswidth = DMA_SLAVE_BUSWIDTH_3_BYTES; 2624520af41SShengjiu Wang else if (width <= 32) 2633117bb31SNicolin Chen buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES; 2644520af41SShengjiu Wang else 2654520af41SShengjiu Wang buswidth = DMA_SLAVE_BUSWIDTH_8_BYTES; 2663117bb31SNicolin Chen 2673117bb31SNicolin Chen config_be.direction = DMA_DEV_TO_DEV; 2683117bb31SNicolin Chen config_be.src_addr_width = buswidth; 2693117bb31SNicolin Chen config_be.src_maxburst = dma_params_be->maxburst; 2703117bb31SNicolin Chen config_be.dst_addr_width = buswidth; 2713117bb31SNicolin Chen config_be.dst_maxburst = dma_params_be->maxburst; 2723117bb31SNicolin Chen 2736398b004SShengjiu Wang memset(&audio_config, 0, sizeof(audio_config)); 2746398b004SShengjiu Wang config_be.peripheral_config = &audio_config; 2756398b004SShengjiu Wang config_be.peripheral_size = sizeof(audio_config); 2766398b004SShengjiu Wang 2776398b004SShengjiu Wang if (tx && (be_peripheral_type == IMX_DMATYPE_SSI_DUAL || 2786398b004SShengjiu Wang be_peripheral_type == IMX_DMATYPE_SPDIF)) 2796398b004SShengjiu Wang audio_config.n_fifos_dst = 2; 2806398b004SShengjiu Wang if (!tx && (be_peripheral_type == IMX_DMATYPE_SSI_DUAL || 2816398b004SShengjiu Wang be_peripheral_type == IMX_DMATYPE_SPDIF)) 2826398b004SShengjiu Wang audio_config.n_fifos_src = 2; 2836398b004SShengjiu Wang 2843117bb31SNicolin Chen if (tx) { 285be7bd03fSShengjiu Wang config_be.src_addr = asrc->paddr + asrc->get_fifo_addr(OUT, index); 2863117bb31SNicolin Chen config_be.dst_addr = dma_params_be->addr; 2873117bb31SNicolin Chen } else { 288be7bd03fSShengjiu Wang config_be.dst_addr = asrc->paddr + asrc->get_fifo_addr(IN, index); 2893117bb31SNicolin Chen config_be.src_addr = dma_params_be->addr; 2903117bb31SNicolin Chen } 2913117bb31SNicolin Chen 2923117bb31SNicolin Chen ret = dmaengine_slave_config(pair->dma_chan[dir], &config_be); 2933117bb31SNicolin Chen if (ret) { 2943117bb31SNicolin Chen dev_err(dev, "failed to config DMA channel for Back-End\n"); 295b287a6d9SShengjiu Wang if (pair->req_dma_chan) 29636124fb1SXiyu Yang dma_release_channel(pair->dma_chan[dir]); 2973117bb31SNicolin Chen return ret; 2983117bb31SNicolin Chen } 2993117bb31SNicolin Chen 3003117bb31SNicolin Chen return 0; 3013117bb31SNicolin Chen } 3023117bb31SNicolin Chen 3038903ed25SKuninori Morimoto static int fsl_asrc_dma_hw_free(struct snd_soc_component *component, 3048903ed25SKuninori Morimoto struct snd_pcm_substream *substream) 3053117bb31SNicolin Chen { 306b287a6d9SShengjiu Wang bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 3073117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 3083117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 309b287a6d9SShengjiu Wang u8 dir = tx ? OUT : IN; 3103117bb31SNicolin Chen 311b287a6d9SShengjiu Wang if (pair->dma_chan[!dir]) 312b287a6d9SShengjiu Wang dma_release_channel(pair->dma_chan[!dir]); 3133117bb31SNicolin Chen 314b287a6d9SShengjiu Wang /* release dev_to_dev chan if we aren't reusing the Back-End one */ 315b287a6d9SShengjiu Wang if (pair->dma_chan[dir] && pair->req_dma_chan) 316b287a6d9SShengjiu Wang dma_release_channel(pair->dma_chan[dir]); 3173117bb31SNicolin Chen 318b287a6d9SShengjiu Wang pair->dma_chan[!dir] = NULL; 319b287a6d9SShengjiu Wang pair->dma_chan[dir] = NULL; 3203117bb31SNicolin Chen 3213117bb31SNicolin Chen return 0; 3223117bb31SNicolin Chen } 3233117bb31SNicolin Chen 3248903ed25SKuninori Morimoto static int fsl_asrc_dma_startup(struct snd_soc_component *component, 3258903ed25SKuninori Morimoto struct snd_pcm_substream *substream) 3263117bb31SNicolin Chen { 327703df441SShengjiu Wang bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 3289f5f078aSKuninori Morimoto struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream); 3293117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 330703df441SShengjiu Wang struct snd_dmaengine_dai_dma_data *dma_data; 3317f110661SKuninori Morimoto struct device *dev = component->dev; 3327470704dSShengjiu Wang struct fsl_asrc *asrc = dev_get_drvdata(dev); 3333117bb31SNicolin Chen struct fsl_asrc_pair *pair; 334703df441SShengjiu Wang struct dma_chan *tmp_chan = NULL; 335703df441SShengjiu Wang u8 dir = tx ? OUT : IN; 336703df441SShengjiu Wang bool release_pair = true; 337703df441SShengjiu Wang int ret = 0; 338703df441SShengjiu Wang 339703df441SShengjiu Wang ret = snd_pcm_hw_constraint_integer(substream->runtime, 340703df441SShengjiu Wang SNDRV_PCM_HW_PARAM_PERIODS); 341703df441SShengjiu Wang if (ret < 0) { 342703df441SShengjiu Wang dev_err(dev, "failed to set pcm hw params periods\n"); 343703df441SShengjiu Wang return ret; 344703df441SShengjiu Wang } 3453117bb31SNicolin Chen 346be7bd03fSShengjiu Wang pair = kzalloc(sizeof(*pair) + asrc->pair_priv_size, GFP_KERNEL); 347443be77eSMarkus Elfring if (!pair) 3483117bb31SNicolin Chen return -ENOMEM; 3493117bb31SNicolin Chen 3507470704dSShengjiu Wang pair->asrc = asrc; 351be7bd03fSShengjiu Wang pair->private = (void *)pair + sizeof(struct fsl_asrc_pair); 3523117bb31SNicolin Chen 3533117bb31SNicolin Chen runtime->private_data = pair; 3543117bb31SNicolin Chen 355703df441SShengjiu Wang /* Request a dummy pair, which will be released later. 356703df441SShengjiu Wang * Request pair function needs channel num as input, for this 357703df441SShengjiu Wang * dummy pair, we just request "1" channel temporarily. 358703df441SShengjiu Wang */ 359be7bd03fSShengjiu Wang ret = asrc->request_pair(1, pair); 360703df441SShengjiu Wang if (ret < 0) { 361703df441SShengjiu Wang dev_err(dev, "failed to request asrc pair\n"); 362703df441SShengjiu Wang goto req_pair_err; 363703df441SShengjiu Wang } 364703df441SShengjiu Wang 365703df441SShengjiu Wang /* Request a dummy dma channel, which will be released later. */ 366be7bd03fSShengjiu Wang tmp_chan = asrc->get_dma_channel(pair, dir); 367703df441SShengjiu Wang if (!tmp_chan) { 368703df441SShengjiu Wang dev_err(dev, "failed to get dma channel\n"); 369703df441SShengjiu Wang ret = -EINVAL; 370703df441SShengjiu Wang goto dma_chan_err; 371703df441SShengjiu Wang } 372703df441SShengjiu Wang 37317198ae7SKuninori Morimoto dma_data = snd_soc_dai_get_dma_data(asoc_rtd_to_cpu(rtd, 0), substream); 374703df441SShengjiu Wang 375703df441SShengjiu Wang /* Refine the snd_imx_hardware according to caps of DMA. */ 376703df441SShengjiu Wang ret = snd_dmaengine_pcm_refine_runtime_hwparams(substream, 377703df441SShengjiu Wang dma_data, 378703df441SShengjiu Wang &snd_imx_hardware, 379703df441SShengjiu Wang tmp_chan); 380703df441SShengjiu Wang if (ret < 0) { 381703df441SShengjiu Wang dev_err(dev, "failed to refine runtime hwparams\n"); 382703df441SShengjiu Wang goto out; 383703df441SShengjiu Wang } 384703df441SShengjiu Wang 385703df441SShengjiu Wang release_pair = false; 3863117bb31SNicolin Chen snd_soc_set_runtime_hwparams(substream, &snd_imx_hardware); 3873117bb31SNicolin Chen 388703df441SShengjiu Wang out: 389703df441SShengjiu Wang dma_release_channel(tmp_chan); 390703df441SShengjiu Wang 391703df441SShengjiu Wang dma_chan_err: 392be7bd03fSShengjiu Wang asrc->release_pair(pair); 393703df441SShengjiu Wang 394703df441SShengjiu Wang req_pair_err: 395703df441SShengjiu Wang if (release_pair) 396703df441SShengjiu Wang kfree(pair); 397703df441SShengjiu Wang 398703df441SShengjiu Wang return ret; 3993117bb31SNicolin Chen } 4003117bb31SNicolin Chen 4018903ed25SKuninori Morimoto static int fsl_asrc_dma_shutdown(struct snd_soc_component *component, 4028903ed25SKuninori Morimoto struct snd_pcm_substream *substream) 4033117bb31SNicolin Chen { 4043117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 4053117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 4067470704dSShengjiu Wang struct fsl_asrc *asrc; 4073117bb31SNicolin Chen 4086ccf62c7SNicolin Chen if (!pair) 4096ccf62c7SNicolin Chen return 0; 4106ccf62c7SNicolin Chen 4117470704dSShengjiu Wang asrc = pair->asrc; 4126ccf62c7SNicolin Chen 4137470704dSShengjiu Wang if (asrc->pair[pair->index] == pair) 4147470704dSShengjiu Wang asrc->pair[pair->index] = NULL; 4153117bb31SNicolin Chen 4163117bb31SNicolin Chen kfree(pair); 4173117bb31SNicolin Chen 4183117bb31SNicolin Chen return 0; 4193117bb31SNicolin Chen } 4203117bb31SNicolin Chen 4218903ed25SKuninori Morimoto static snd_pcm_uframes_t 4228903ed25SKuninori Morimoto fsl_asrc_dma_pcm_pointer(struct snd_soc_component *component, 4238903ed25SKuninori Morimoto struct snd_pcm_substream *substream) 4243117bb31SNicolin Chen { 4253117bb31SNicolin Chen struct snd_pcm_runtime *runtime = substream->runtime; 4263117bb31SNicolin Chen struct fsl_asrc_pair *pair = runtime->private_data; 4273117bb31SNicolin Chen 4283117bb31SNicolin Chen return bytes_to_frames(substream->runtime, pair->pos); 4293117bb31SNicolin Chen } 4303117bb31SNicolin Chen 4318903ed25SKuninori Morimoto static int fsl_asrc_dma_pcm_new(struct snd_soc_component *component, 4328903ed25SKuninori Morimoto struct snd_soc_pcm_runtime *rtd) 4333117bb31SNicolin Chen { 4343117bb31SNicolin Chen struct snd_card *card = rtd->card->snd_card; 4353117bb31SNicolin Chen struct snd_pcm *pcm = rtd->pcm; 4361855ce62STakashi Iwai int ret; 4373117bb31SNicolin Chen 4383117bb31SNicolin Chen ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32)); 4393117bb31SNicolin Chen if (ret) { 4403117bb31SNicolin Chen dev_err(card->dev, "failed to set DMA mask\n"); 4413117bb31SNicolin Chen return ret; 4423117bb31SNicolin Chen } 4433117bb31SNicolin Chen 4441855ce62STakashi Iwai return snd_pcm_set_fixed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, 4451855ce62STakashi Iwai card->dev, FSL_ASRC_DMABUF_SIZE); 4463117bb31SNicolin Chen } 4473117bb31SNicolin Chen 4487f110661SKuninori Morimoto struct snd_soc_component_driver fsl_asrc_component = { 4497f110661SKuninori Morimoto .name = DRV_NAME, 4508903ed25SKuninori Morimoto .hw_params = fsl_asrc_dma_hw_params, 4518903ed25SKuninori Morimoto .hw_free = fsl_asrc_dma_hw_free, 4528903ed25SKuninori Morimoto .trigger = fsl_asrc_dma_trigger, 4538903ed25SKuninori Morimoto .open = fsl_asrc_dma_startup, 4548903ed25SKuninori Morimoto .close = fsl_asrc_dma_shutdown, 4558903ed25SKuninori Morimoto .pointer = fsl_asrc_dma_pcm_pointer, 4568903ed25SKuninori Morimoto .pcm_construct = fsl_asrc_dma_pcm_new, 45744649974SShengjiu Wang .legacy_dai_naming = 1, 4583117bb31SNicolin Chen }; 4597f110661SKuninori Morimoto EXPORT_SYMBOL_GPL(fsl_asrc_component); 460