1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright 2019 NXP 4 * 5 */ 6 7 #ifndef _FSL_ASRC_COMMON_H 8 #define _FSL_ASRC_COMMON_H 9 10 /* directions */ 11 #define IN 0 12 #define OUT 1 13 14 enum asrc_pair_index { 15 ASRC_INVALID_PAIR = -1, 16 ASRC_PAIR_A = 0, 17 ASRC_PAIR_B = 1, 18 ASRC_PAIR_C = 2, 19 ASRC_PAIR_D = 3, 20 }; 21 22 #define PAIR_CTX_NUM 0x4 23 24 /** 25 * fsl_asrc_pair: ASRC Pair common data 26 * 27 * @asrc: pointer to its parent module 28 * @error: error record 29 * @index: pair index (ASRC_PAIR_A, ASRC_PAIR_B, ASRC_PAIR_C) 30 * @channels: occupied channel number 31 * @desc: input and output dma descriptors 32 * @dma_chan: inputer and output DMA channels 33 * @dma_data: private dma data 34 * @pos: hardware pointer position 35 * @private: pair private area 36 */ 37 struct fsl_asrc_pair { 38 struct fsl_asrc *asrc; 39 unsigned int error; 40 41 enum asrc_pair_index index; 42 unsigned int channels; 43 44 struct dma_async_tx_descriptor *desc[2]; 45 struct dma_chan *dma_chan[2]; 46 struct imx_dma_data dma_data; 47 unsigned int pos; 48 49 void *private; 50 }; 51 52 /** 53 * fsl_asrc: ASRC common data 54 * 55 * @dma_params_rx: DMA parameters for receive channel 56 * @dma_params_tx: DMA parameters for transmit channel 57 * @pdev: platform device pointer 58 * @regmap: regmap handler 59 * @paddr: physical address to the base address of registers 60 * @mem_clk: clock source to access register 61 * @ipg_clk: clock source to drive peripheral 62 * @spba_clk: SPBA clock (optional, depending on SoC design) 63 * @lock: spin lock for resource protection 64 * @pair: pair pointers 65 * @channel_avail: non-occupied channel numbers 66 * @asrc_rate: default sample rate for ASoC Back-Ends 67 * @asrc_format: default sample format for ASoC Back-Ends 68 * @use_edma: edma is used 69 * @get_dma_channel: function pointer 70 * @request_pair: function pointer 71 * @release_pair: function pointer 72 * @get_fifo_addr: function pointer 73 * @pair_priv_size: size of pair private struct. 74 * @private: private data structure 75 */ 76 struct fsl_asrc { 77 struct snd_dmaengine_dai_dma_data dma_params_rx; 78 struct snd_dmaengine_dai_dma_data dma_params_tx; 79 struct platform_device *pdev; 80 struct regmap *regmap; 81 unsigned long paddr; 82 struct clk *mem_clk; 83 struct clk *ipg_clk; 84 struct clk *spba_clk; 85 spinlock_t lock; /* spin lock for resource protection */ 86 87 struct fsl_asrc_pair *pair[PAIR_CTX_NUM]; 88 unsigned int channel_avail; 89 90 int asrc_rate; 91 snd_pcm_format_t asrc_format; 92 bool use_edma; 93 94 struct dma_chan *(*get_dma_channel)(struct fsl_asrc_pair *pair, bool dir); 95 int (*request_pair)(int channels, struct fsl_asrc_pair *pair); 96 void (*release_pair)(struct fsl_asrc_pair *pair); 97 int (*get_fifo_addr)(u8 dir, enum asrc_pair_index index); 98 size_t pair_priv_size; 99 100 void *private; 101 }; 102 103 #define DRV_NAME "fsl-asrc-dai" 104 extern struct snd_soc_component_driver fsl_asrc_component; 105 106 #endif /* _FSL_ASRC_COMMON_H */ 107