1*aa21a7d4SKrzysztof Kozlowski // SPDX-License-Identifier: GPL-2.0-only
2*aa21a7d4SKrzysztof Kozlowski /*
3*aa21a7d4SKrzysztof Kozlowski * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
4*aa21a7d4SKrzysztof Kozlowski * Copyright (c) 2023, Linaro Ltd.
5*aa21a7d4SKrzysztof Kozlowski */
6*aa21a7d4SKrzysztof Kozlowski
7*aa21a7d4SKrzysztof Kozlowski #include <linux/bitfield.h>
8*aa21a7d4SKrzysztof Kozlowski #include <linux/device.h>
9*aa21a7d4SKrzysztof Kozlowski #include <linux/gpio/consumer.h>
10*aa21a7d4SKrzysztof Kozlowski #include <linux/init.h>
11*aa21a7d4SKrzysztof Kozlowski #include <linux/kernel.h>
12*aa21a7d4SKrzysztof Kozlowski #include <linux/module.h>
13*aa21a7d4SKrzysztof Kozlowski #include <linux/pm_runtime.h>
14*aa21a7d4SKrzysztof Kozlowski #include <linux/regmap.h>
15*aa21a7d4SKrzysztof Kozlowski #include <linux/regulator/consumer.h>
16*aa21a7d4SKrzysztof Kozlowski #include <linux/slab.h>
17*aa21a7d4SKrzysztof Kozlowski #include <linux/soundwire/sdw.h>
18*aa21a7d4SKrzysztof Kozlowski #include <linux/soundwire/sdw_registers.h>
19*aa21a7d4SKrzysztof Kozlowski #include <linux/soundwire/sdw_type.h>
20*aa21a7d4SKrzysztof Kozlowski #include <sound/pcm.h>
21*aa21a7d4SKrzysztof Kozlowski #include <sound/pcm_params.h>
22*aa21a7d4SKrzysztof Kozlowski #include <sound/soc-dapm.h>
23*aa21a7d4SKrzysztof Kozlowski #include <sound/soc.h>
24*aa21a7d4SKrzysztof Kozlowski #include <sound/tlv.h>
25*aa21a7d4SKrzysztof Kozlowski
26*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BASE 0x3000
27*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_BG_TSADC_BASE (WSA884X_BASE + 0x0001)
28*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BG_CTRL (WSA884X_ANA_BG_TSADC_BASE + 0x00)
29*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_CTRL (WSA884X_ANA_BG_TSADC_BASE + 0x01)
30*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP1_PROG (WSA884X_ANA_BG_TSADC_BASE + 0x02)
31*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP2_PROG (WSA884X_ANA_BG_TSADC_BASE + 0x03)
32*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP2_PROG_BOP2_VTH_MASK 0xf0
33*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP2_PROG_BOP2_VTH_SHIFT 4
34*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP2_PROG_BOP2_HYST_MASK 0x0f
35*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP2_PROG_BOP2_HYST_SHIFT 0
36*aa21a7d4SKrzysztof Kozlowski #define WSA884X_UVLO_PROG (WSA884X_ANA_BG_TSADC_BASE + 0x04)
37*aa21a7d4SKrzysztof Kozlowski #define WSA884X_UVLO_PROG1 (WSA884X_ANA_BG_TSADC_BASE + 0x05)
38*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTRL_0 (WSA884X_ANA_BG_TSADC_BASE + 0x06)
39*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTRL_1 (WSA884X_ANA_BG_TSADC_BASE + 0x07)
40*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTRL_2 (WSA884X_ANA_BG_TSADC_BASE + 0x08)
41*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTRL_3 (WSA884X_ANA_BG_TSADC_BASE + 0x09)
42*aa21a7d4SKrzysztof Kozlowski #define WSA884X_REF_CTRL (WSA884X_ANA_BG_TSADC_BASE + 0x0a)
43*aa21a7d4SKrzysztof Kozlowski #define WSA884X_REF_CTRL_BG_RDY_SEL_MASK 0x03
44*aa21a7d4SKrzysztof Kozlowski #define WSA884X_REF_CTRL_BG_RDY_SEL_SHIFT 0
45*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BG_TEST_CTL (WSA884X_ANA_BG_TSADC_BASE + 0x0b)
46*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BG_BIAS (WSA884X_ANA_BG_TSADC_BASE + 0x0c)
47*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_PROG (WSA884X_ANA_BG_TSADC_BASE + 0x0d)
48*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_IREF_CTL (WSA884X_ANA_BG_TSADC_BASE + 0x0e)
49*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_ISENS_CTL (WSA884X_ANA_BG_TSADC_BASE + 0x0f)
50*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_CLK_CTL (WSA884X_ANA_BG_TSADC_BASE + 0x10)
51*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_TEST_CTL (WSA884X_ANA_BG_TSADC_BASE + 0x11)
52*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_BIAS (WSA884X_ANA_BG_TSADC_BASE + 0x12)
53*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_SNS (WSA884X_ANA_BG_TSADC_BASE + 0x13)
54*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DOUT_MSB (WSA884X_ANA_BG_TSADC_BASE + 0x14)
55*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DOUT_LSB (WSA884X_ANA_BG_TSADC_BASE + 0x15)
56*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP_ATEST_SEL (WSA884X_ANA_BG_TSADC_BASE + 0x16)
57*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MISC0 (WSA884X_ANA_BG_TSADC_BASE + 0x17)
58*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MISC1 (WSA884X_ANA_BG_TSADC_BASE + 0x18)
59*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MISC2 (WSA884X_ANA_BG_TSADC_BASE + 0x19)
60*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MISC3 (WSA884X_ANA_BG_TSADC_BASE + 0x1a)
61*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TSBG_0 (WSA884X_ANA_BG_TSADC_BASE + 0x1b)
62*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_0 (WSA884X_ANA_BG_TSADC_BASE + 0x1c)
63*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_1 (WSA884X_ANA_BG_TSADC_BASE + 0x1d)
64*aa21a7d4SKrzysztof Kozlowski
65*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_IVSENSE_BASE (WSA884X_BASE + 0x0020)
66*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VSENSE1 (WSA884X_ANA_IVSENSE_BASE + 0x00)
67*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VSENSE1_GAIN_VSENSE_FE_MASK 0xe0
68*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VSENSE1_GAIN_VSENSE_FE_SHIFT 5
69*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ISENSE2 (WSA884X_ANA_IVSENSE_BASE + 0x01)
70*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ISENSE2_ISENSE_GAIN_CTL_MASK 0xe0
71*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ISENSE2_ISENSE_GAIN_CTL_SHIFT 5
72*aa21a7d4SKrzysztof Kozlowski
73*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTL_1 (WSA884X_ANA_IVSENSE_BASE + 0x02)
74*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTL_2 (WSA884X_ANA_IVSENSE_BASE + 0x03)
75*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTL_3 (WSA884X_ANA_IVSENSE_BASE + 0x04)
76*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTL_4 (WSA884X_ANA_IVSENSE_BASE + 0x05)
77*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EN (WSA884X_ANA_IVSENSE_BASE + 0x06)
78*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OVERRIDE1 (WSA884X_ANA_IVSENSE_BASE + 0x07)
79*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OVERRIDE2 (WSA884X_ANA_IVSENSE_BASE + 0x08)
80*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ISENSE1 (WSA884X_ANA_IVSENSE_BASE + 0x09)
81*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ISENSE_CAL (WSA884X_ANA_IVSENSE_BASE + 0x0a)
82*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MISC (WSA884X_ANA_IVSENSE_BASE + 0x0b)
83*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_0 (WSA884X_ANA_IVSENSE_BASE + 0x0c)
84*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_1 (WSA884X_ANA_IVSENSE_BASE + 0x0d)
85*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_2 (WSA884X_ANA_IVSENSE_BASE + 0x0e)
86*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_3 (WSA884X_ANA_IVSENSE_BASE + 0x0f)
87*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_4 (WSA884X_ANA_IVSENSE_BASE + 0x10)
88*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_5 (WSA884X_ANA_IVSENSE_BASE + 0x11)
89*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_6 (WSA884X_ANA_IVSENSE_BASE + 0x12)
90*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ADC_7 (WSA884X_ANA_IVSENSE_BASE + 0x13)
91*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STATUS (WSA884X_ANA_IVSENSE_BASE + 0x14)
92*aa21a7d4SKrzysztof Kozlowski #define WSA884X_IVSENSE_SPARE_TUNE_1 (WSA884X_ANA_IVSENSE_BASE + 0x15)
93*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_2 (WSA884X_ANA_IVSENSE_BASE + 0x16)
94*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_3 (WSA884X_ANA_IVSENSE_BASE + 0x17)
95*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_4 (WSA884X_ANA_IVSENSE_BASE + 0x18)
96*aa21a7d4SKrzysztof Kozlowski
97*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_SPK_TOP_BASE (WSA884X_BASE + 0x0040)
98*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_CTRL1 (WSA884X_ANA_SPK_TOP_BASE + 0x00)
99*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_CTRL1_OCP_LOWVBAT_ITH_EN_MASK 0x01
100*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLIP_DET_CTRL1 (WSA884X_ANA_SPK_TOP_BASE + 0x01)
101*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLIP_DET_CTRL2 (WSA884X_ANA_SPK_TOP_BASE + 0x02)
102*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_CTRL1 (WSA884X_ANA_SPK_TOP_BASE + 0x03)
103*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG1 (WSA884X_ANA_SPK_TOP_BASE + 0x04)
104*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG2 (WSA884X_ANA_SPK_TOP_BASE + 0x05)
105*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG3 (WSA884X_ANA_SPK_TOP_BASE + 0x06)
106*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG4 (WSA884X_ANA_SPK_TOP_BASE + 0x07)
107*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG5 (WSA884X_ANA_SPK_TOP_BASE + 0x08)
108*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG6 (WSA884X_ANA_SPK_TOP_BASE + 0x09)
109*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x0a)
110*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_VCMO_INT1_IDLE_MODE_OVRT_MASK 0x80
111*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_VCMO_INT1_IDLE_MODE_OVRT_SHIFT 7
112*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_REG_MCLK_DIV_RATIO_MASK 0x40
113*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_REG_MCLK_DIV_RATIO_SHIFT 6
114*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_DEGLITCH_CLK_DELAY_CTRL_MASK 0x30
115*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_DEGLITCH_CLK_DELAY_CTRL_SHIFT 4
116*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_CLK_FREQ_SEL_MASK 0x08
117*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_CLK_FREQ_SEL_SHIFT 3
118*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_CLK_DIV_RATIO_MASK 0x06
119*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_CLK_DIV_RATIO_SHIFT 1
120*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_CLK_DIV_BYPASS_MASK 0x01
121*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWM_CLK_CTL_PWM_CLK_DIV_BYPASS_SHIFT 0
122*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_LDO_SEL (WSA884X_ANA_SPK_TOP_BASE + 0x0b)
123*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OCP_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x0c)
124*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDRV_HS_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x0d)
125*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDRV_LS_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x0e)
126*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_CTL_1 (WSA884X_ANA_SPK_TOP_BASE + 0x0f)
127*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_CTL_2 (WSA884X_ANA_SPK_TOP_BASE + 0x10)
128*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_CTL_3 (WSA884X_ANA_SPK_TOP_BASE + 0x11)
129*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_CTL_4 (WSA884X_ANA_SPK_TOP_BASE + 0x12)
130*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTL_5 (WSA884X_ANA_SPK_TOP_BASE + 0x13)
131*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_EN_DEBUG_REG (WSA884X_ANA_SPK_TOP_BASE + 0x14)
132*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_OPAMP_BIAS1_REG (WSA884X_ANA_SPK_TOP_BASE + 0x15)
133*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_OPAMP_BIAS2_REG (WSA884X_ANA_SPK_TOP_BASE + 0x16)
134*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_TUNE1 (WSA884X_ANA_SPK_TOP_BASE + 0x17)
135*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VOLTAGE_CTRL_REG (WSA884X_ANA_SPK_TOP_BASE + 0x18)
136*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ATEST1_REG (WSA884X_ANA_SPK_TOP_BASE + 0x19)
137*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ATEST2_REG (WSA884X_ANA_SPK_TOP_BASE + 0x1a)
138*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_BIAS_REG1 (WSA884X_ANA_SPK_TOP_BASE + 0x1b)
139*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_BIAS_REG2 (WSA884X_ANA_SPK_TOP_BASE + 0x1c)
140*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_BIAS_REG3 (WSA884X_ANA_SPK_TOP_BASE + 0x1d)
141*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_BIAS_REG4 (WSA884X_ANA_SPK_TOP_BASE + 0x1e)
142*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSTG_DBG2 (WSA884X_ANA_SPK_TOP_BASE + 0x1f)
143*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_BLK_EN (WSA884X_ANA_SPK_TOP_BASE + 0x20)
144*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_EN (WSA884X_ANA_SPK_TOP_BASE + 0x21)
145*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_MASK_DCC_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x22)
146*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_MISC_CTL1 (WSA884X_ANA_SPK_TOP_BASE + 0x23)
147*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_REG_GAIN (WSA884X_ANA_SPK_TOP_BASE + 0x24)
148*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_OS_CAL_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x25)
149*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_OS_CAL_CTL1 (WSA884X_ANA_SPK_TOP_BASE + 0x26)
150*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSTG_DBG (WSA884X_ANA_SPK_TOP_BASE + 0x27)
151*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BBM_CTL (WSA884X_ANA_SPK_TOP_BASE + 0x28)
152*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_MISC1 (WSA884X_ANA_SPK_TOP_BASE + 0x29)
153*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DAC_VCM_CTRL_REG7 (WSA884X_ANA_SPK_TOP_BASE + 0x2a)
154*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_BIAS_REG5 (WSA884X_ANA_SPK_TOP_BASE + 0x2b)
155*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRV_LF_MISC_CTL2 (WSA884X_ANA_SPK_TOP_BASE + 0x2c)
156*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_TUNE_2 (WSA884X_ANA_SPK_TOP_BASE + 0x2d)
157*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_TUNE_3 (WSA884X_ANA_SPK_TOP_BASE + 0x2e)
158*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPK_TOP_SPARE_TUNE_4 (WSA884X_ANA_SPK_TOP_BASE + 0x2f)
159*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_5 (WSA884X_ANA_SPK_TOP_BASE + 0x30)
160*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_6 (WSA884X_ANA_SPK_TOP_BASE + 0x31)
161*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_7 (WSA884X_ANA_SPK_TOP_BASE + 0x32)
162*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_8 (WSA884X_ANA_SPK_TOP_BASE + 0x33)
163*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_9 (WSA884X_ANA_SPK_TOP_BASE + 0x34)
164*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_TUNE_10 (WSA884X_ANA_SPK_TOP_BASE + 0x35)
165*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_STATUS0 (WSA884X_ANA_SPK_TOP_BASE + 0x36)
166*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_STATUS1 (WSA884X_ANA_SPK_TOP_BASE + 0x37)
167*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_STATUS2 (WSA884X_ANA_SPK_TOP_BASE + 0x38)
168*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_STATUS3 (WSA884X_ANA_SPK_TOP_BASE + 0x39)
169*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_STATUS4 (WSA884X_ANA_SPK_TOP_BASE + 0x3a)
170*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_STATUS5 (WSA884X_ANA_SPK_TOP_BASE + 0x3b)
171*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_RO_1 (WSA884X_ANA_SPK_TOP_BASE + 0x3c)
172*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_RO_2 (WSA884X_ANA_SPK_TOP_BASE + 0x3d)
173*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_RO_3 (WSA884X_ANA_SPK_TOP_BASE + 0x3e)
174*aa21a7d4SKrzysztof Kozlowski
175*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_BOOST_BASE (WSA884X_BASE + 0x0090)
176*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL1 (WSA884X_ANA_BOOST_BASE + 0x00)
177*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL1_SLOPE_COMP_CURRENT_MASK 0xf8
178*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL1_SLOPE_COMP_CURRENT_SHIFT 3
179*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL1_VOUT_FS_MASK 0x07
180*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL1_VOUT_FS_SHIFT 0
181*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CURRENT_LIMIT (WSA884X_ANA_BOOST_BASE + 0x01)
182*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_OVRD_EN_MASK 0x80
183*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_OVRD_EN_SHIFT 7
184*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_MASK 0x7c
185*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_SHIFT 2
186*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CURRENT_LIMIT_CLK_PHASE_SHIFT 0
187*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BYP_CTRL1 (WSA884X_ANA_BOOST_BASE + 0x02)
188*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_CTL_0 (WSA884X_ANA_BOOST_BASE + 0x03)
189*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOOST_SPARE_CTL_1 (WSA884X_ANA_BOOST_BASE + 0x04)
190*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_RO_0 (WSA884X_ANA_BOOST_BASE + 0x05)
191*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOOST_SPARE_RO_1 (WSA884X_ANA_BOOST_BASE + 0x06)
192*aa21a7d4SKrzysztof Kozlowski #define WSA884X_IBIAS1 (WSA884X_ANA_BOOST_BASE + 0x07)
193*aa21a7d4SKrzysztof Kozlowski #define WSA884X_IBIAS2 (WSA884X_ANA_BOOST_BASE + 0x08)
194*aa21a7d4SKrzysztof Kozlowski #define WSA884X_IBIAS3 (WSA884X_ANA_BOOST_BASE + 0x09)
195*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EN_CTRL (WSA884X_ANA_BOOST_BASE + 0x0a)
196*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL2 (WSA884X_ANA_BOOST_BASE + 0x0b)
197*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL3 (WSA884X_ANA_BOOST_BASE + 0x0c)
198*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STB_CTRL4 (WSA884X_ANA_BOOST_BASE + 0x0d)
199*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BYP_CTRL2 (WSA884X_ANA_BOOST_BASE + 0x0e)
200*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BYP_CTRL3 (WSA884X_ANA_BOOST_BASE + 0x0f)
201*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1 (WSA884X_ANA_BOOST_BASE + 0x10)
202*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_EN_MASK 0x80
203*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_EN_SHIFT 7
204*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_SW_EN_MASK 0x40
205*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_SW_EN_SHIFT 6
206*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_STAGE_DEFAULT_MASK 0x20
207*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_STAGE_DEFAULT_SHIFT 5
208*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_SW_SEL_MASK 0x18
209*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_DET_SW_SEL_SHIFT 3
210*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_BYP_MASK_IGNORE_MASK 0x04
211*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_BYP_MASK_IGNORE_SHIFT 2
212*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_BYP_MASK_DEL_MASK 0x02
213*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_ZX_BYP_MASK_DEL_SHIFT 1
214*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_BOOTCAP_REFRESH_DIS_MASK 0x01
215*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL1_BOOTCAP_REFRESH_DIS_SHIFT 0
216*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ZX_CTRL2 (WSA884X_ANA_BOOST_BASE + 0x11)
217*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BLEEDER_CTRL (WSA884X_ANA_BOOST_BASE + 0x12)
218*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOOST_MISC (WSA884X_ANA_BOOST_BASE + 0x13)
219*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSTAGE_CTRL1 (WSA884X_ANA_BOOST_BASE + 0x14)
220*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSTAGE_CTRL2 (WSA884X_ANA_BOOST_BASE + 0x15)
221*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSTAGE_CTRL3 (WSA884X_ANA_BOOST_BASE + 0x16)
222*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSTAGE_CTRL4 (WSA884X_ANA_BOOST_BASE + 0x17)
223*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MAXD_REG1 (WSA884X_ANA_BOOST_BASE + 0x18)
224*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MAXD_REG2 (WSA884X_ANA_BOOST_BASE + 0x19)
225*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1 (WSA884X_ANA_BOOST_BASE + 0x1a)
226*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_EN_AUTO_MAXD_SEL_MASK 0x80
227*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_EN_AUTO_MAXD_SEL_SHIFT 0x07
228*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_EN_ILIM_SW_CLH_MASK 0x40
229*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_EN_ILIM_SW_CLH_SHIFT 0x06
230*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_ILIM_OFFSET_CLH_MASK 0x38
231*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_ILIM_OFFSET_CLH_SHIFT 0x03
232*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_ILIM_OFFSET_PB_MASK 0x07
233*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL1_ILIM_OFFSET_PB_SHIFT 0x00
234*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ILIM_CTRL2 (WSA884X_ANA_BOOST_BASE + 0x1b)
235*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEST_CTRL1 (WSA884X_ANA_BOOST_BASE + 0x1c)
236*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEST_CTRL2 (WSA884X_ANA_BOOST_BASE + 0x1d)
237*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE1 (WSA884X_ANA_BOOST_BASE + 0x1e)
238*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOOT_CAP_CHECK (WSA884X_ANA_BOOST_BASE + 0x1f)
239*aa21a7d4SKrzysztof Kozlowski
240*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_PON_LDOL_BASE (WSA884X_BASE + 0x00b0)
241*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_CTL_0 (WSA884X_ANA_PON_LDOL_BASE + 0x00)
242*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PWRSAV_CTL (WSA884X_ANA_PON_LDOL_BASE + 0x01)
243*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_CTL_0 (WSA884X_ANA_PON_LDOL_BASE + 0x02)
244*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_CTL_1 (WSA884X_ANA_PON_LDOL_BASE + 0x03)
245*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_CTL_2 (WSA884X_ANA_PON_LDOL_BASE + 0x04)
246*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_CTL_3 (WSA884X_ANA_PON_LDOL_BASE + 0x05)
247*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_CLT_1 (WSA884X_ANA_PON_LDOL_BASE + 0x06)
248*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_CTL_2 (WSA884X_ANA_PON_LDOL_BASE + 0x07)
249*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_CTL_3 (WSA884X_ANA_PON_LDOL_BASE + 0x08)
250*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_0 (WSA884X_ANA_PON_LDOL_BASE + 0x09)
251*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_1 (WSA884X_ANA_PON_LDOL_BASE + 0x0a)
252*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_1_VPP_SW_CTL_MASK 0x20
253*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_1_VPP_SW_CTL_SHIFT 5
254*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_1_CKWD_VCOMP_VREF_SEL_MASK 0x1f
255*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_1_CKWD_VCOMP_VREF_SEL_SHIFT 0
256*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKWD_CTL_2 (WSA884X_ANA_PON_LDOL_BASE + 0x0b)
257*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CKSK_CTL_0 (WSA884X_ANA_PON_LDOL_BASE + 0x0c)
258*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PADSW_CTL_0 (WSA884X_ANA_PON_LDOL_BASE + 0x0d)
259*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEST_0 (WSA884X_ANA_PON_LDOL_BASE + 0x0e)
260*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEST_1 (WSA884X_ANA_PON_LDOL_BASE + 0x0f)
261*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STATUS_0 (WSA884X_ANA_PON_LDOL_BASE + 0x10)
262*aa21a7d4SKrzysztof Kozlowski #define WSA884X_STATUS_1 (WSA884X_ANA_PON_LDOL_BASE + 0x11)
263*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_TUNE_0 (WSA884X_ANA_PON_LDOL_BASE + 0x12)
264*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_TUNE_1 (WSA884X_ANA_PON_LDOL_BASE + 0x13)
265*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_TUNE_2 (WSA884X_ANA_PON_LDOL_BASE + 0x14)
266*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_TUNE_3 (WSA884X_ANA_PON_LDOL_BASE + 0x15)
267*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PON_LDOL_SPARE_TUNE_4 (WSA884X_ANA_PON_LDOL_BASE + 0x16)
268*aa21a7d4SKrzysztof Kozlowski
269*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_CTRL0_BASE (WSA884X_BASE + 0x0400)
270*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_CTRL0_PAGE (WSA884X_DIG_CTRL0_BASE + 0x00)
271*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CHIP_ID0 (WSA884X_DIG_CTRL0_BASE + 0x01)
272*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CHIP_ID1 (WSA884X_DIG_CTRL0_BASE + 0x02)
273*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CHIP_ID2 (WSA884X_DIG_CTRL0_BASE + 0x03)
274*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CHIP_ID3 (WSA884X_DIG_CTRL0_BASE + 0x04)
275*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BUS_ID (WSA884X_DIG_CTRL0_BASE + 0x05)
276*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_RST_CTL (WSA884X_DIG_CTRL0_BASE + 0x10)
277*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SWR_RESET_EN (WSA884X_DIG_CTRL0_BASE + 0x14)
278*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TOP_CLK_CFG (WSA884X_DIG_CTRL0_BASE + 0x18)
279*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SWR_CLK_RATE (WSA884X_DIG_CTRL0_BASE + 0x19)
280*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_PATH_MODE (WSA884X_DIG_CTRL0_BASE + 0x1a)
281*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_PATH_MODE_RXD_MODE_MASK 0x02
282*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_PATH_MODE_RXD_MODE_SHIFT 0
283*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_PATH_MODE_TXD_MODE_MASK 0x01
284*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_PATH_MODE_TXD_MODE_SHIFT 0
285*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_CLK_CTL (WSA884X_DIG_CTRL0_BASE + 0x1c)
286*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_EN (WSA884X_DIG_CTRL0_BASE + 0x30)
287*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_EN_GLOBAL_PA_EN_MASK 0x01
288*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_EN_GLOBAL_PA_EN_SHIFT 0
289*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_CTL0 (WSA884X_DIG_CTRL0_BASE + 0x31)
290*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_CTL1 (WSA884X_DIG_CTRL0_BASE + 0x32)
291*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_CTL1_NOISE_GATE_BLOCK_MASK 0x38
292*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_TIMER0 (WSA884X_DIG_CTRL0_BASE + 0x33)
293*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_TIMER1 (WSA884X_DIG_CTRL0_BASE + 0x34)
294*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_STA0 (WSA884X_DIG_CTRL0_BASE + 0x35)
295*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_STA1 (WSA884X_DIG_CTRL0_BASE + 0x36)
296*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_ERR_CTL (WSA884X_DIG_CTRL0_BASE + 0x37)
297*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_ERR_COND0 (WSA884X_DIG_CTRL0_BASE + 0x38)
298*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_ERR_COND1 (WSA884X_DIG_CTRL0_BASE + 0x39)
299*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_MSK0 (WSA884X_DIG_CTRL0_BASE + 0x3a)
300*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_MSK1 (WSA884X_DIG_CTRL0_BASE + 0x3b)
301*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_BYP_CTL (WSA884X_DIG_CTRL0_BASE + 0x3c)
302*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_BYP0 (WSA884X_DIG_CTRL0_BASE + 0x3d)
303*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_BYP1 (WSA884X_DIG_CTRL0_BASE + 0x3e)
304*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TADC_VALUE_CTL (WSA884X_DIG_CTRL0_BASE + 0x50)
305*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_DETECT_CTL (WSA884X_DIG_CTRL0_BASE + 0x51)
306*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_DIN_MSB (WSA884X_DIG_CTRL0_BASE + 0x52)
307*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_DIN_LSB (WSA884X_DIG_CTRL0_BASE + 0x53)
308*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_DOUT_MSB (WSA884X_DIG_CTRL0_BASE + 0x54)
309*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_DOUT_LSB (WSA884X_DIG_CTRL0_BASE + 0x55)
310*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_CONFIG0 (WSA884X_DIG_CTRL0_BASE + 0x56)
311*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEMP_CONFIG1 (WSA884X_DIG_CTRL0_BASE + 0x57)
312*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL (WSA884X_DIG_CTRL0_BASE + 0x58)
313*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL_THRM_COEF_SEL_MASK 0xe0
314*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL_THRM_COEF_SEL_SHIFT 5
315*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL_THRM_FLT_EN_SHIFT 4
316*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_MASK 0x0e
317*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_SHIFT 1
318*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_THRM_FLT_CTL_VBAT_FLT_EN_SHIFT 0
319*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_CAL_CTL (WSA884X_DIG_CTRL0_BASE + 0x59)
320*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_CAL_CTL_RESERVE_MASK 0x0e
321*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_CAL_CTL_VBAT_CAL_EN_MASK 0x01
322*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_DIN_MSB (WSA884X_DIG_CTRL0_BASE + 0x5a)
323*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_DIN_LSB (WSA884X_DIG_CTRL0_BASE + 0x5b)
324*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_DOUT_MSB (WSA884X_DIG_CTRL0_BASE + 0x5c)
325*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_DOUT_LSB (WSA884X_DIG_CTRL0_BASE + 0x5d)
326*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_CAL_MSB (WSA884X_DIG_CTRL0_BASE + 0x5e)
327*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_CAL_LSB (WSA884X_DIG_CTRL0_BASE + 0x5f)
328*aa21a7d4SKrzysztof Kozlowski #define WSA884X_UVLO_DEGLITCH_CTL (WSA884X_DIG_CTRL0_BASE + 0x60)
329*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP_DEGLITCH_CTL (WSA884X_DIG_CTRL0_BASE + 0x61)
330*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_SETTING_MASK 0x1e
331*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_SETTING_SHIFT 1
332*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_EN_MASK 0x1
333*aa21a7d4SKrzysztof Kozlowski #define WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_EN_SHIFT 0
334*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VBAT_ZONE_DETC_CTL (WSA884X_DIG_CTRL0_BASE + 0x64)
335*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CPS_CTL (WSA884X_DIG_CTRL0_BASE + 0x68)
336*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_RX_CTL (WSA884X_DIG_CTRL0_BASE + 0x70)
337*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A1_0 (WSA884X_DIG_CTRL0_BASE + 0x71)
338*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A1_1 (WSA884X_DIG_CTRL0_BASE + 0x72)
339*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A2_0 (WSA884X_DIG_CTRL0_BASE + 0x73)
340*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A2_1 (WSA884X_DIG_CTRL0_BASE + 0x74)
341*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A3_0 (WSA884X_DIG_CTRL0_BASE + 0x75)
342*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A3_1 (WSA884X_DIG_CTRL0_BASE + 0x76)
343*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A4_0 (WSA884X_DIG_CTRL0_BASE + 0x77)
344*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A4_1 (WSA884X_DIG_CTRL0_BASE + 0x78)
345*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A5_0 (WSA884X_DIG_CTRL0_BASE + 0x79)
346*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A5_1 (WSA884X_DIG_CTRL0_BASE + 0x7a)
347*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A6_0 (WSA884X_DIG_CTRL0_BASE + 0x7b)
348*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_A7_0 (WSA884X_DIG_CTRL0_BASE + 0x7c)
349*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_0 (WSA884X_DIG_CTRL0_BASE + 0x7d)
350*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_0_COEF_C3_MASK 0xf0
351*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_0_COEF_C3_SHIFT 4
352*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_0_COEF_C2_MASK 0x0f
353*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_0_COEF_C2_SHIFT 0
354*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_1 (WSA884X_DIG_CTRL0_BASE + 0x7e)
355*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_2 (WSA884X_DIG_CTRL0_BASE + 0x7f)
356*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_2_COEF_C7_MASK 0xf0
357*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_2_COEF_C7_SHIFT 4
358*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_2_COEF_C6_MASK 0x0f
359*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_2_COEF_C6_SHIFT 0
360*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_3 (WSA884X_DIG_CTRL0_BASE + 0x80)
361*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_3_COEF_C7_MASK 0x3f
362*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_C_3_COEF_C7_SHIFT 0
363*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R1 (WSA884X_DIG_CTRL0_BASE + 0x81)
364*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R2 (WSA884X_DIG_CTRL0_BASE + 0x82)
365*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R3 (WSA884X_DIG_CTRL0_BASE + 0x83)
366*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R4 (WSA884X_DIG_CTRL0_BASE + 0x84)
367*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R5 (WSA884X_DIG_CTRL0_BASE + 0x85)
368*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R6 (WSA884X_DIG_CTRL0_BASE + 0x86)
369*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_DSM_R7 (WSA884X_DIG_CTRL0_BASE + 0x87)
370*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_GAIN_PDM_0 (WSA884X_DIG_CTRL0_BASE + 0x88)
371*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_GAIN_PDM_1 (WSA884X_DIG_CTRL0_BASE + 0x89)
372*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CDC_SPK_GAIN_PDM_2 (WSA884X_DIG_CTRL0_BASE + 0x8a)
373*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL (WSA884X_DIG_CTRL0_BASE + 0x8b)
374*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL_HOLD_OFF_MASK 0x04
375*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL_HOLD_OFF_SHIFT 2
376*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL_TIME_OUT_SEL_MASK 0x02
377*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL_TIME_OUT_SEL_SHIFT 1
378*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL_PDM_WD_EN_MASK 0x01
379*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_WD_CTL_PDM_WD_EN_SHIFT 0
380*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DEM_BYPASS_DATA0 (WSA884X_DIG_CTRL0_BASE + 0x90)
381*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DEM_BYPASS_DATA1 (WSA884X_DIG_CTRL0_BASE + 0x91)
382*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DEM_BYPASS_DATA2 (WSA884X_DIG_CTRL0_BASE + 0x92)
383*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DEM_BYPASS_DATA3 (WSA884X_DIG_CTRL0_BASE + 0x93)
384*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_0 (WSA884X_DIG_CTRL0_BASE + 0xb0)
385*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_0_PROG_DELAY_MASK 0xf0
386*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_0_PROG_DELAY_SHIFT 4
387*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_0_OFFSET_MASK 0x07
388*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_0_OFFSET_SHIFT 0
389*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_1 (WSA884X_DIG_CTRL0_BASE + 0xb1)
390*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_1_CSR_GAIN_MASK 0x3e
391*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_1_CSR_GAIN_SHIFT 1
392*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK 0x01
393*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_CTL_1_CSR_GAIN_EN_SHIFT 0
394*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DRE_IDLE_DET_CTL (WSA884X_DIG_CTRL0_BASE + 0xb2)
395*aa21a7d4SKrzysztof Kozlowski #define WSA884X_GAIN_RAMPING_CTL (WSA884X_DIG_CTRL0_BASE + 0xb8)
396*aa21a7d4SKrzysztof Kozlowski #define WSA884X_GAIN_RAMPING_MIN (WSA884X_DIG_CTRL0_BASE + 0xb9)
397*aa21a7d4SKrzysztof Kozlowski #define WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_MASK 0x1f
398*aa21a7d4SKrzysztof Kozlowski #define WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_SHIFT 0
399*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TAGC_CTL (WSA884X_DIG_CTRL0_BASE + 0xc0)
400*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TAGC_TIME (WSA884X_DIG_CTRL0_BASE + 0xc1)
401*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TAGC_FORCE_VAL (WSA884X_DIG_CTRL0_BASE + 0xc2)
402*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VAGC_CTL (WSA884X_DIG_CTRL0_BASE + 0xc8)
403*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VAGC_TIME (WSA884X_DIG_CTRL0_BASE + 0xc9)
404*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VAGC_ATTN_LVL_1 (WSA884X_DIG_CTRL0_BASE + 0xca)
405*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VAGC_ATTN_LVL_2 (WSA884X_DIG_CTRL0_BASE + 0xcb)
406*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VAGC_ATTN_LVL_3 (WSA884X_DIG_CTRL0_BASE + 0xcc)
407*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0 (WSA884X_DIG_CTRL0_BASE + 0xd0)
408*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_CSR_GAIN_EN_SHIFT 7
409*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_DLY_CODE_MASK 0x70
410*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_DLY_CODE_SHIFT 4
411*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_DLY_RST_SHIFT 3
412*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_DLY_EN_SHIFT 2
413*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_INPUT_EN_SHIFT 1
414*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_0_CLSH_EN_SHIFT 0
415*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_CTL_1 (WSA884X_DIG_CTRL0_BASE + 0xd1)
416*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_V_HD_PA (WSA884X_DIG_CTRL0_BASE + 0xd2)
417*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_V_PA_MIN (WSA884X_DIG_CTRL0_BASE + 0xd3)
418*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_OVRD_VAL (WSA884X_DIG_CTRL0_BASE + 0xd4)
419*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_HARD_MAX (WSA884X_DIG_CTRL0_BASE + 0xd5)
420*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_SOFT_MAX (WSA884X_DIG_CTRL0_BASE + 0xd6)
421*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_SIG_DP (WSA884X_DIG_CTRL0_BASE + 0xd7)
422*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PBR_DELAY_CTL (WSA884X_DIG_CTRL0_BASE + 0xd8)
423*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_SRL_MAX_PBR (WSA884X_DIG_CTRL0_BASE + 0xe0)
424*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PBR_MAX_VOLTAGE 20
425*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PBR_MAX_CODE 255
426*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VTH_TO_REG(vth) \
427*aa21a7d4SKrzysztof Kozlowski ((vth) != 0 ? (((vth) - 150) * WSA884X_PBR_MAX_CODE / (WSA884X_PBR_MAX_VOLTAGE * 100) + 1) : 0)
428*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH1 (WSA884X_DIG_CTRL0_BASE + 0xe1)
429*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH2 (WSA884X_DIG_CTRL0_BASE + 0xe2)
430*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH3 (WSA884X_DIG_CTRL0_BASE + 0xe3)
431*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH4 (WSA884X_DIG_CTRL0_BASE + 0xe4)
432*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH5 (WSA884X_DIG_CTRL0_BASE + 0xe5)
433*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH6 (WSA884X_DIG_CTRL0_BASE + 0xe6)
434*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH7 (WSA884X_DIG_CTRL0_BASE + 0xe7)
435*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH8 (WSA884X_DIG_CTRL0_BASE + 0xe8)
436*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH9 (WSA884X_DIG_CTRL0_BASE + 0xe9)
437*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH10 (WSA884X_DIG_CTRL0_BASE + 0xea)
438*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH11 (WSA884X_DIG_CTRL0_BASE + 0xeb)
439*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH12 (WSA884X_DIG_CTRL0_BASE + 0xec)
440*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH13 (WSA884X_DIG_CTRL0_BASE + 0xed)
441*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH14 (WSA884X_DIG_CTRL0_BASE + 0xee)
442*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLSH_VTH15 (WSA884X_DIG_CTRL0_BASE + 0xef)
443*aa21a7d4SKrzysztof Kozlowski
444*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_CTRL1_BASE (WSA884X_BASE + 0x0500)
445*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_CTRL1_PAGE (WSA884X_DIG_CTRL1_BASE + 0x00)
446*aa21a7d4SKrzysztof Kozlowski #define WSA884X_VPHX_SYS_EN_STATUS (WSA884X_DIG_CTRL1_BASE + 0x01)
447*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0 (WSA884X_DIG_CTRL1_BASE + 0x04)
448*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_MODE_SHIFT 0
449*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_VPHX_SYS_EN_MASK 0xc0
450*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_PA_AUX_DISABLE 0x0
451*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_PA_AUX_18_DB 0xa
452*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_PA_AUX_0_DB 0x7
453*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_MASK 0x3c
454*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_PA_MIN_GAIN_BYP_MASK 0x02
455*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_MODE_SPEAKER 0x1
456*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_MASK 0x01
457*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_WO_CTL_1 (WSA884X_DIG_CTRL1_BASE + 0x05)
458*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PIN_CTL (WSA884X_DIG_CTRL1_BASE + 0x10)
459*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PIN_CTL_OE (WSA884X_DIG_CTRL1_BASE + 0x11)
460*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PIN_WDATA_IOPAD (WSA884X_DIG_CTRL1_BASE + 0x12)
461*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PIN_STATUS (WSA884X_DIG_CTRL1_BASE + 0x13)
462*aa21a7d4SKrzysztof Kozlowski #define WSA884X_I2C_SLAVE_CTL (WSA884X_DIG_CTRL1_BASE + 0x14)
463*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPMI_PAD_CTL0 (WSA884X_DIG_CTRL1_BASE + 0x15)
464*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPMI_PAD_CTL1 (WSA884X_DIG_CTRL1_BASE + 0x16)
465*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPMI_PAD_CTL2 (WSA884X_DIG_CTRL1_BASE + 0x17)
466*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MEM_CTL (WSA884X_DIG_CTRL1_BASE + 0x18)
467*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SWR_HM_TEST0 (WSA884X_DIG_CTRL1_BASE + 0x19)
468*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SWR_HM_TEST1 (WSA884X_DIG_CTRL1_BASE + 0x1a)
469*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_CTRL0 (WSA884X_DIG_CTRL1_BASE + 0x30)
470*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_CTRL1 (WSA884X_DIG_CTRL1_BASE + 0x31)
471*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_CTRL2 (WSA884X_DIG_CTRL1_BASE + 0x32)
472*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_STAT (WSA884X_DIG_CTRL1_BASE + 0x33)
473*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TCSP0 (WSA884X_DIG_CTRL1_BASE + 0x34)
474*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TCSP1 (WSA884X_DIG_CTRL1_BASE + 0x35)
475*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TPPS (WSA884X_DIG_CTRL1_BASE + 0x36)
476*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TVPS (WSA884X_DIG_CTRL1_BASE + 0x37)
477*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TVPH (WSA884X_DIG_CTRL1_BASE + 0x38)
478*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TPPR0 (WSA884X_DIG_CTRL1_BASE + 0x39)
479*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TPPR1 (WSA884X_DIG_CTRL1_BASE + 0x3a)
480*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_TPPH (WSA884X_DIG_CTRL1_BASE + 0x3b)
481*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_PRG_END (WSA884X_DIG_CTRL1_BASE + 0x3c)
482*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PLAY (WSA884X_DIG_CTRL1_BASE + 0x40)
483*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_CTL (WSA884X_DIG_CTRL1_BASE + 0x41)
484*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_LRA_PER_0 (WSA884X_DIG_CTRL1_BASE + 0x43)
485*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_LRA_PER_1 (WSA884X_DIG_CTRL1_BASE + 0x44)
486*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_DELTA_THETA_0 (WSA884X_DIG_CTRL1_BASE + 0x45)
487*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_DELTA_THETA_1 (WSA884X_DIG_CTRL1_BASE + 0x46)
488*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_DIRECT_AMP_0 (WSA884X_DIG_CTRL1_BASE + 0x47)
489*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_DIRECT_AMP_1 (WSA884X_DIG_CTRL1_BASE + 0x48)
490*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP0_0 (WSA884X_DIG_CTRL1_BASE + 0x49)
491*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP0_1 (WSA884X_DIG_CTRL1_BASE + 0x4a)
492*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP1_0 (WSA884X_DIG_CTRL1_BASE + 0x4b)
493*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP1_1 (WSA884X_DIG_CTRL1_BASE + 0x4c)
494*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP2_0 (WSA884X_DIG_CTRL1_BASE + 0x4d)
495*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP2_1 (WSA884X_DIG_CTRL1_BASE + 0x4e)
496*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP3_0 (WSA884X_DIG_CTRL1_BASE + 0x4f)
497*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP3_1 (WSA884X_DIG_CTRL1_BASE + 0x50)
498*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP4_0 (WSA884X_DIG_CTRL1_BASE + 0x51)
499*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP4_1 (WSA884X_DIG_CTRL1_BASE + 0x52)
500*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP5_0 (WSA884X_DIG_CTRL1_BASE + 0x53)
501*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP5_1 (WSA884X_DIG_CTRL1_BASE + 0x54)
502*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP6_0 (WSA884X_DIG_CTRL1_BASE + 0x55)
503*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP6_1 (WSA884X_DIG_CTRL1_BASE + 0x56)
504*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP7_0 (WSA884X_DIG_CTRL1_BASE + 0x57)
505*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PTRN_AMP7_1 (WSA884X_DIG_CTRL1_BASE + 0x58)
506*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PER_0_1 (WSA884X_DIG_CTRL1_BASE + 0x59)
507*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PER_2_3 (WSA884X_DIG_CTRL1_BASE + 0x5a)
508*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PER_4_5 (WSA884X_DIG_CTRL1_BASE + 0x5b)
509*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_PER_6_7 (WSA884X_DIG_CTRL1_BASE + 0x5c)
510*aa21a7d4SKrzysztof Kozlowski #define WSA884X_WAVG_STA (WSA884X_DIG_CTRL1_BASE + 0x5d)
511*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_MODE (WSA884X_DIG_CTRL1_BASE + 0x80)
512*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_MASK0 (WSA884X_DIG_CTRL1_BASE + 0x81)
513*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_MASK1 (WSA884X_DIG_CTRL1_BASE + 0x82)
514*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_STATUS0 (WSA884X_DIG_CTRL1_BASE + 0x83)
515*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_STATUS1 (WSA884X_DIG_CTRL1_BASE + 0x84)
516*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_CLEAR0 (WSA884X_DIG_CTRL1_BASE + 0x85)
517*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_CLEAR1 (WSA884X_DIG_CTRL1_BASE + 0x86)
518*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_LEVEL0 (WSA884X_DIG_CTRL1_BASE + 0x87)
519*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_LEVEL1 (WSA884X_DIG_CTRL1_BASE + 0x88)
520*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_SET0 (WSA884X_DIG_CTRL1_BASE + 0x89)
521*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_SET1 (WSA884X_DIG_CTRL1_BASE + 0x8a)
522*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_TEST0 (WSA884X_DIG_CTRL1_BASE + 0x8b)
523*aa21a7d4SKrzysztof Kozlowski #define WSA884X_INTR_TEST1 (WSA884X_DIG_CTRL1_BASE + 0x8c)
524*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PDM_TEST_MODE (WSA884X_DIG_CTRL1_BASE + 0xc0)
525*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ATE_TEST_MODE (WSA884X_DIG_CTRL1_BASE + 0xc1)
526*aa21a7d4SKrzysztof Kozlowski #define WSA884X_PA_FSM_DBG (WSA884X_DIG_CTRL1_BASE + 0xc2)
527*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_DEBUG_MODE (WSA884X_DIG_CTRL1_BASE + 0xc3)
528*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_DEBUG_SEL (WSA884X_DIG_CTRL1_BASE + 0xc4)
529*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_DEBUG_EN (WSA884X_DIG_CTRL1_BASE + 0xc5)
530*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TADC_DETECT_DBG_CTL (WSA884X_DIG_CTRL1_BASE + 0xc9)
531*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TADC_DEBUG_MSB (WSA884X_DIG_CTRL1_BASE + 0xca)
532*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TADC_DEBUG_LSB (WSA884X_DIG_CTRL1_BASE + 0xcb)
533*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SAMPLE_EDGE_SEL (WSA884X_DIG_CTRL1_BASE + 0xcc)
534*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SWR_EDGE_SEL (WSA884X_DIG_CTRL1_BASE + 0xcd)
535*aa21a7d4SKrzysztof Kozlowski #define WSA884X_TEST_MODE_CTL (WSA884X_DIG_CTRL1_BASE + 0xce)
536*aa21a7d4SKrzysztof Kozlowski #define WSA884X_IOPAD_CTL (WSA884X_DIG_CTRL1_BASE + 0xcf)
537*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_CSR_DBG_ADD (WSA884X_DIG_CTRL1_BASE + 0xd0)
538*aa21a7d4SKrzysztof Kozlowski #define WSA884X_ANA_CSR_DBG_CTL (WSA884X_DIG_CTRL1_BASE + 0xd1)
539*aa21a7d4SKrzysztof Kozlowski #define WSA884X_CLK_DBG_CTL (WSA884X_DIG_CTRL1_BASE + 0xd2)
540*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_R (WSA884X_DIG_CTRL1_BASE + 0xf0)
541*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_0 (WSA884X_DIG_CTRL1_BASE + 0xf1)
542*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_1 (WSA884X_DIG_CTRL1_BASE + 0xf2)
543*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SPARE_2 (WSA884X_DIG_CTRL1_BASE + 0xf3)
544*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SCODE (WSA884X_DIG_CTRL1_BASE + 0xff)
545*aa21a7d4SKrzysztof Kozlowski
546*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_TRIM_BASE (WSA884X_BASE + 0x0800)
547*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_TRIM_PAGE (WSA884X_DIG_TRIM_BASE + 0x00)
548*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_0 (WSA884X_DIG_TRIM_BASE + 0x80)
549*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_ID_WSA8840 0x0
550*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_ID_WSA8845 0x5
551*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_ID_WSA8845H 0xc
552*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_0_ID_MASK 0x0f
553*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_1 (WSA884X_DIG_TRIM_BASE + 0x81)
554*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_2 (WSA884X_DIG_TRIM_BASE + 0x82)
555*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_3 (WSA884X_DIG_TRIM_BASE + 0x83)
556*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_4 (WSA884X_DIG_TRIM_BASE + 0x84)
557*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_5 (WSA884X_DIG_TRIM_BASE + 0x85)
558*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_6 (WSA884X_DIG_TRIM_BASE + 0x86)
559*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_7 (WSA884X_DIG_TRIM_BASE + 0x87)
560*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_8 (WSA884X_DIG_TRIM_BASE + 0x88)
561*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_9 (WSA884X_DIG_TRIM_BASE + 0x89)
562*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_10 (WSA884X_DIG_TRIM_BASE + 0x8a)
563*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_11 (WSA884X_DIG_TRIM_BASE + 0x8b)
564*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_12 (WSA884X_DIG_TRIM_BASE + 0x8c)
565*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_13 (WSA884X_DIG_TRIM_BASE + 0x8d)
566*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_14 (WSA884X_DIG_TRIM_BASE + 0x8e)
567*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_15 (WSA884X_DIG_TRIM_BASE + 0x8f)
568*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_16 (WSA884X_DIG_TRIM_BASE + 0x90)
569*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_17 (WSA884X_DIG_TRIM_BASE + 0x91)
570*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_18 (WSA884X_DIG_TRIM_BASE + 0x92)
571*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_19 (WSA884X_DIG_TRIM_BASE + 0x93)
572*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_20 (WSA884X_DIG_TRIM_BASE + 0x94)
573*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_21 (WSA884X_DIG_TRIM_BASE + 0x95)
574*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_22 (WSA884X_DIG_TRIM_BASE + 0x96)
575*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_23 (WSA884X_DIG_TRIM_BASE + 0x97)
576*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_24 (WSA884X_DIG_TRIM_BASE + 0x98)
577*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_25 (WSA884X_DIG_TRIM_BASE + 0x99)
578*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_26 (WSA884X_DIG_TRIM_BASE + 0x9a)
579*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_27 (WSA884X_DIG_TRIM_BASE + 0x9b)
580*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_28 (WSA884X_DIG_TRIM_BASE + 0x9c)
581*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_29 (WSA884X_DIG_TRIM_BASE + 0x9d)
582*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_30 (WSA884X_DIG_TRIM_BASE + 0x9e)
583*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_31 (WSA884X_DIG_TRIM_BASE + 0x9f)
584*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_32 (WSA884X_DIG_TRIM_BASE + 0xa0)
585*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_33 (WSA884X_DIG_TRIM_BASE + 0xa1)
586*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_34 (WSA884X_DIG_TRIM_BASE + 0xa2)
587*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_35 (WSA884X_DIG_TRIM_BASE + 0xa3)
588*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_36 (WSA884X_DIG_TRIM_BASE + 0xa4)
589*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_37 (WSA884X_DIG_TRIM_BASE + 0xa5)
590*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38 (WSA884X_DIG_TRIM_BASE + 0xa6)
591*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38_RESERVER_MASK 0xf0
592*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38_RESERVER_SHIFT 4
593*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38_BST_CFG_SEL_MASK 0x08
594*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38_BST_CFG_SEL_SHIFT 3
595*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38_BOOST_ILIM_TUNE_MASK 0x07
596*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_38_BOOST_ILIM_TUNE_SHIFT 0
597*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_39 (WSA884X_DIG_TRIM_BASE + 0xa7)
598*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40 (WSA884X_DIG_TRIM_BASE + 0xa8)
599*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_SPARE_TYPE2_MASK 0xc0
600*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_SPARE_TYPE2_SHIFT 6
601*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_ISENSE_RESCAL_MASK 0x3c
602*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_ISENSE_RESCAL_SHIFT 2
603*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_ATE_BOOST_RDSON_TEST_MASK 0x2
604*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_ATE_BOOST_RDSON_TEST_SHIFT 1
605*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_ATE_CLASSD_RDSON_TEST_MASK 0x1
606*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_40_ATE_CLASSD_RDSON_TEST_SHIFT 0
607*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_41 (WSA884X_DIG_TRIM_BASE + 0xa9)
608*aa21a7d4SKrzysztof Kozlowski #define WSA884X_OTP_REG_63 (WSA884X_DIG_TRIM_BASE + 0xbf)
609*aa21a7d4SKrzysztof Kozlowski
610*aa21a7d4SKrzysztof Kozlowski #define WSA884X_DIG_EMEM_BASE (WSA884X_BASE + 0x08C0)
611*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_0 (WSA884X_DIG_EMEM_BASE + 0x00)
612*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_1 (WSA884X_DIG_EMEM_BASE + 0x01)
613*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_2 (WSA884X_DIG_EMEM_BASE + 0x02)
614*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_3 (WSA884X_DIG_EMEM_BASE + 0x03)
615*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_4 (WSA884X_DIG_EMEM_BASE + 0x04)
616*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_5 (WSA884X_DIG_EMEM_BASE + 0x05)
617*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_6 (WSA884X_DIG_EMEM_BASE + 0x06)
618*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_7 (WSA884X_DIG_EMEM_BASE + 0x07)
619*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_8 (WSA884X_DIG_EMEM_BASE + 0x08)
620*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_9 (WSA884X_DIG_EMEM_BASE + 0x09)
621*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_10 (WSA884X_DIG_EMEM_BASE + 0x0a)
622*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_11 (WSA884X_DIG_EMEM_BASE + 0x0b)
623*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_12 (WSA884X_DIG_EMEM_BASE + 0x0c)
624*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_13 (WSA884X_DIG_EMEM_BASE + 0x0d)
625*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_14 (WSA884X_DIG_EMEM_BASE + 0x0e)
626*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_15 (WSA884X_DIG_EMEM_BASE + 0x0f)
627*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_16 (WSA884X_DIG_EMEM_BASE + 0x10)
628*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_17 (WSA884X_DIG_EMEM_BASE + 0x11)
629*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_18 (WSA884X_DIG_EMEM_BASE + 0x12)
630*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_19 (WSA884X_DIG_EMEM_BASE + 0x13)
631*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_20 (WSA884X_DIG_EMEM_BASE + 0x14)
632*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_21 (WSA884X_DIG_EMEM_BASE + 0x15)
633*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_22 (WSA884X_DIG_EMEM_BASE + 0x16)
634*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_23 (WSA884X_DIG_EMEM_BASE + 0x17)
635*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_24 (WSA884X_DIG_EMEM_BASE + 0x18)
636*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_25 (WSA884X_DIG_EMEM_BASE + 0x19)
637*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_26 (WSA884X_DIG_EMEM_BASE + 0x1a)
638*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_27 (WSA884X_DIG_EMEM_BASE + 0x1b)
639*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_28 (WSA884X_DIG_EMEM_BASE + 0x1c)
640*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_29 (WSA884X_DIG_EMEM_BASE + 0x1d)
641*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_30 (WSA884X_DIG_EMEM_BASE + 0x1e)
642*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_31 (WSA884X_DIG_EMEM_BASE + 0x1f)
643*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_32 (WSA884X_DIG_EMEM_BASE + 0x20)
644*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_33 (WSA884X_DIG_EMEM_BASE + 0x21)
645*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_34 (WSA884X_DIG_EMEM_BASE + 0x22)
646*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_35 (WSA884X_DIG_EMEM_BASE + 0x23)
647*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_36 (WSA884X_DIG_EMEM_BASE + 0x24)
648*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_37 (WSA884X_DIG_EMEM_BASE + 0x25)
649*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_38 (WSA884X_DIG_EMEM_BASE + 0x26)
650*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_39 (WSA884X_DIG_EMEM_BASE + 0x27)
651*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_40 (WSA884X_DIG_EMEM_BASE + 0x28)
652*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_41 (WSA884X_DIG_EMEM_BASE + 0x29)
653*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_42 (WSA884X_DIG_EMEM_BASE + 0x2a)
654*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_43 (WSA884X_DIG_EMEM_BASE + 0x2b)
655*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_44 (WSA884X_DIG_EMEM_BASE + 0x2c)
656*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_45 (WSA884X_DIG_EMEM_BASE + 0x2d)
657*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_46 (WSA884X_DIG_EMEM_BASE + 0x2e)
658*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_47 (WSA884X_DIG_EMEM_BASE + 0x2f)
659*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_48 (WSA884X_DIG_EMEM_BASE + 0x30)
660*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_49 (WSA884X_DIG_EMEM_BASE + 0x31)
661*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_50 (WSA884X_DIG_EMEM_BASE + 0x32)
662*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_51 (WSA884X_DIG_EMEM_BASE + 0x33)
663*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_52 (WSA884X_DIG_EMEM_BASE + 0x34)
664*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_53 (WSA884X_DIG_EMEM_BASE + 0x35)
665*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_54 (WSA884X_DIG_EMEM_BASE + 0x36)
666*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_55 (WSA884X_DIG_EMEM_BASE + 0x37)
667*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_56 (WSA884X_DIG_EMEM_BASE + 0x38)
668*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_57 (WSA884X_DIG_EMEM_BASE + 0x39)
669*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_58 (WSA884X_DIG_EMEM_BASE + 0x3a)
670*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_59 (WSA884X_DIG_EMEM_BASE + 0x3b)
671*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_60 (WSA884X_DIG_EMEM_BASE + 0x3c)
672*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_61 (WSA884X_DIG_EMEM_BASE + 0x3d)
673*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_62 (WSA884X_DIG_EMEM_BASE + 0x3e)
674*aa21a7d4SKrzysztof Kozlowski #define WSA884X_EMEM_63 (WSA884X_DIG_EMEM_BASE + 0x3f)
675*aa21a7d4SKrzysztof Kozlowski
676*aa21a7d4SKrzysztof Kozlowski #define WSA884X_NUM_REGISTERS (WSA884X_EMEM_63 + 1)
677*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MAX_REGISTER (WSA884X_NUM_REGISTERS - 1)
678*aa21a7d4SKrzysztof Kozlowski
679*aa21a7d4SKrzysztof Kozlowski #define WSA884X_SUPPLIES_NUM 2
680*aa21a7d4SKrzysztof Kozlowski #define WSA884X_MAX_SWR_PORTS 6
681*aa21a7d4SKrzysztof Kozlowski #define WSA884X_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
682*aa21a7d4SKrzysztof Kozlowski SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000 |\
683*aa21a7d4SKrzysztof Kozlowski SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_192000 |\
684*aa21a7d4SKrzysztof Kozlowski SNDRV_PCM_RATE_384000)
685*aa21a7d4SKrzysztof Kozlowski /* Fractional Rates */
686*aa21a7d4SKrzysztof Kozlowski #define WSA884X_FRAC_RATES (SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_88200 |\
687*aa21a7d4SKrzysztof Kozlowski SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_352800)
688*aa21a7d4SKrzysztof Kozlowski
689*aa21a7d4SKrzysztof Kozlowski #define WSA884X_FORMATS (SNDRV_PCM_FMTBIT_S16_LE |\
690*aa21a7d4SKrzysztof Kozlowski SNDRV_PCM_FMTBIT_S24_LE |\
691*aa21a7d4SKrzysztof Kozlowski SNDRV_PCM_FMTBIT_S24_3LE | SNDRV_PCM_FMTBIT_S32_LE)
692*aa21a7d4SKrzysztof Kozlowski
693*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv {
694*aa21a7d4SKrzysztof Kozlowski struct regmap *regmap;
695*aa21a7d4SKrzysztof Kozlowski struct device *dev;
696*aa21a7d4SKrzysztof Kozlowski struct regulator_bulk_data supplies[WSA884X_SUPPLIES_NUM];
697*aa21a7d4SKrzysztof Kozlowski struct sdw_slave *slave;
698*aa21a7d4SKrzysztof Kozlowski struct sdw_stream_config sconfig;
699*aa21a7d4SKrzysztof Kozlowski struct sdw_stream_runtime *sruntime;
700*aa21a7d4SKrzysztof Kozlowski struct sdw_port_config port_config[WSA884X_MAX_SWR_PORTS];
701*aa21a7d4SKrzysztof Kozlowski struct gpio_desc *sd_n;
702*aa21a7d4SKrzysztof Kozlowski bool port_prepared[WSA884X_MAX_SWR_PORTS];
703*aa21a7d4SKrzysztof Kozlowski bool port_enable[WSA884X_MAX_SWR_PORTS];
704*aa21a7d4SKrzysztof Kozlowski unsigned int variant;
705*aa21a7d4SKrzysztof Kozlowski int active_ports;
706*aa21a7d4SKrzysztof Kozlowski int dev_mode;
707*aa21a7d4SKrzysztof Kozlowski bool hw_init;
708*aa21a7d4SKrzysztof Kozlowski };
709*aa21a7d4SKrzysztof Kozlowski
710*aa21a7d4SKrzysztof Kozlowski enum {
711*aa21a7d4SKrzysztof Kozlowski COMP_OFFSET0,
712*aa21a7d4SKrzysztof Kozlowski COMP_OFFSET1,
713*aa21a7d4SKrzysztof Kozlowski COMP_OFFSET2,
714*aa21a7d4SKrzysztof Kozlowski COMP_OFFSET3,
715*aa21a7d4SKrzysztof Kozlowski COMP_OFFSET4,
716*aa21a7d4SKrzysztof Kozlowski };
717*aa21a7d4SKrzysztof Kozlowski
718*aa21a7d4SKrzysztof Kozlowski enum wsa884x_gain {
719*aa21a7d4SKrzysztof Kozlowski G_21_DB = 0,
720*aa21a7d4SKrzysztof Kozlowski G_19P5_DB,
721*aa21a7d4SKrzysztof Kozlowski G_18_DB,
722*aa21a7d4SKrzysztof Kozlowski G_16P5_DB,
723*aa21a7d4SKrzysztof Kozlowski G_15_DB,
724*aa21a7d4SKrzysztof Kozlowski G_13P5_DB,
725*aa21a7d4SKrzysztof Kozlowski G_12_DB,
726*aa21a7d4SKrzysztof Kozlowski G_10P5_DB,
727*aa21a7d4SKrzysztof Kozlowski G_9_DB,
728*aa21a7d4SKrzysztof Kozlowski G_7P5_DB,
729*aa21a7d4SKrzysztof Kozlowski G_6_DB,
730*aa21a7d4SKrzysztof Kozlowski G_4P5_DB,
731*aa21a7d4SKrzysztof Kozlowski G_3_DB,
732*aa21a7d4SKrzysztof Kozlowski G_1P5_DB,
733*aa21a7d4SKrzysztof Kozlowski G_0_DB,
734*aa21a7d4SKrzysztof Kozlowski G_M1P5_DB,
735*aa21a7d4SKrzysztof Kozlowski G_M3_DB,
736*aa21a7d4SKrzysztof Kozlowski G_M4P5_DB,
737*aa21a7d4SKrzysztof Kozlowski G_M6_DB,
738*aa21a7d4SKrzysztof Kozlowski G_MAX_DB,
739*aa21a7d4SKrzysztof Kozlowski };
740*aa21a7d4SKrzysztof Kozlowski
741*aa21a7d4SKrzysztof Kozlowski enum wsa884x_isense {
742*aa21a7d4SKrzysztof Kozlowski ISENSE_6_DB = 0,
743*aa21a7d4SKrzysztof Kozlowski ISENSE_12_DB,
744*aa21a7d4SKrzysztof Kozlowski ISENSE_15_DB,
745*aa21a7d4SKrzysztof Kozlowski ISENSE_18_DB,
746*aa21a7d4SKrzysztof Kozlowski };
747*aa21a7d4SKrzysztof Kozlowski
748*aa21a7d4SKrzysztof Kozlowski enum wsa884x_vsense {
749*aa21a7d4SKrzysztof Kozlowski VSENSE_M12_DB = 0,
750*aa21a7d4SKrzysztof Kozlowski VSENSE_M15_DB,
751*aa21a7d4SKrzysztof Kozlowski VSENSE_M18_DB,
752*aa21a7d4SKrzysztof Kozlowski VSENSE_M21_DB,
753*aa21a7d4SKrzysztof Kozlowski VSENSE_M24_DB,
754*aa21a7d4SKrzysztof Kozlowski };
755*aa21a7d4SKrzysztof Kozlowski
756*aa21a7d4SKrzysztof Kozlowski enum wsa884x_port_ids {
757*aa21a7d4SKrzysztof Kozlowski WSA884X_PORT_DAC,
758*aa21a7d4SKrzysztof Kozlowski WSA884X_PORT_COMP,
759*aa21a7d4SKrzysztof Kozlowski WSA884X_PORT_BOOST,
760*aa21a7d4SKrzysztof Kozlowski WSA884X_PORT_PBR,
761*aa21a7d4SKrzysztof Kozlowski WSA884X_PORT_VISENSE,
762*aa21a7d4SKrzysztof Kozlowski WSA884X_PORT_CPS,
763*aa21a7d4SKrzysztof Kozlowski };
764*aa21a7d4SKrzysztof Kozlowski
765*aa21a7d4SKrzysztof Kozlowski static const char * const wsa884x_supply_name[] = {
766*aa21a7d4SKrzysztof Kozlowski "vdd-io",
767*aa21a7d4SKrzysztof Kozlowski "vdd-1p8",
768*aa21a7d4SKrzysztof Kozlowski };
769*aa21a7d4SKrzysztof Kozlowski
770*aa21a7d4SKrzysztof Kozlowski static const char * const wsa884x_dev_mode_text[] = {
771*aa21a7d4SKrzysztof Kozlowski "Speaker", "Receiver"
772*aa21a7d4SKrzysztof Kozlowski };
773*aa21a7d4SKrzysztof Kozlowski
774*aa21a7d4SKrzysztof Kozlowski enum wsa884x_mode {
775*aa21a7d4SKrzysztof Kozlowski WSA884X_SPEAKER,
776*aa21a7d4SKrzysztof Kozlowski WSA884X_RECEIVER,
777*aa21a7d4SKrzysztof Kozlowski };
778*aa21a7d4SKrzysztof Kozlowski
779*aa21a7d4SKrzysztof Kozlowski static const struct soc_enum wsa884x_dev_mode_enum =
780*aa21a7d4SKrzysztof Kozlowski SOC_ENUM_SINGLE_EXT(ARRAY_SIZE(wsa884x_dev_mode_text), wsa884x_dev_mode_text);
781*aa21a7d4SKrzysztof Kozlowski
782*aa21a7d4SKrzysztof Kozlowski static struct sdw_dpn_prop wsa884x_sink_dpn_prop[WSA884X_MAX_SWR_PORTS] = {
783*aa21a7d4SKrzysztof Kozlowski {
784*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_DAC + 1,
785*aa21a7d4SKrzysztof Kozlowski .type = SDW_DPN_SIMPLE,
786*aa21a7d4SKrzysztof Kozlowski .min_ch = 1,
787*aa21a7d4SKrzysztof Kozlowski .max_ch = 1,
788*aa21a7d4SKrzysztof Kozlowski .simple_ch_prep_sm = true,
789*aa21a7d4SKrzysztof Kozlowski .read_only_wordlength = true,
790*aa21a7d4SKrzysztof Kozlowski }, {
791*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_COMP + 1,
792*aa21a7d4SKrzysztof Kozlowski .type = SDW_DPN_SIMPLE,
793*aa21a7d4SKrzysztof Kozlowski .min_ch = 1,
794*aa21a7d4SKrzysztof Kozlowski .max_ch = 1,
795*aa21a7d4SKrzysztof Kozlowski .simple_ch_prep_sm = true,
796*aa21a7d4SKrzysztof Kozlowski .read_only_wordlength = true,
797*aa21a7d4SKrzysztof Kozlowski }, {
798*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_BOOST + 1,
799*aa21a7d4SKrzysztof Kozlowski .type = SDW_DPN_SIMPLE,
800*aa21a7d4SKrzysztof Kozlowski .min_ch = 1,
801*aa21a7d4SKrzysztof Kozlowski .max_ch = 1,
802*aa21a7d4SKrzysztof Kozlowski .simple_ch_prep_sm = true,
803*aa21a7d4SKrzysztof Kozlowski .read_only_wordlength = true,
804*aa21a7d4SKrzysztof Kozlowski }, {
805*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_PBR + 1,
806*aa21a7d4SKrzysztof Kozlowski .type = SDW_DPN_SIMPLE,
807*aa21a7d4SKrzysztof Kozlowski .min_ch = 1,
808*aa21a7d4SKrzysztof Kozlowski .max_ch = 1,
809*aa21a7d4SKrzysztof Kozlowski .simple_ch_prep_sm = true,
810*aa21a7d4SKrzysztof Kozlowski .read_only_wordlength = true,
811*aa21a7d4SKrzysztof Kozlowski }, {
812*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_VISENSE + 1,
813*aa21a7d4SKrzysztof Kozlowski .type = SDW_DPN_SIMPLE,
814*aa21a7d4SKrzysztof Kozlowski .min_ch = 1,
815*aa21a7d4SKrzysztof Kozlowski .max_ch = 1,
816*aa21a7d4SKrzysztof Kozlowski .simple_ch_prep_sm = true,
817*aa21a7d4SKrzysztof Kozlowski .read_only_wordlength = true,
818*aa21a7d4SKrzysztof Kozlowski }, {
819*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_CPS + 1,
820*aa21a7d4SKrzysztof Kozlowski .type = SDW_DPN_SIMPLE,
821*aa21a7d4SKrzysztof Kozlowski .min_ch = 1,
822*aa21a7d4SKrzysztof Kozlowski .max_ch = 1,
823*aa21a7d4SKrzysztof Kozlowski .simple_ch_prep_sm = true,
824*aa21a7d4SKrzysztof Kozlowski .read_only_wordlength = true,
825*aa21a7d4SKrzysztof Kozlowski }
826*aa21a7d4SKrzysztof Kozlowski };
827*aa21a7d4SKrzysztof Kozlowski
828*aa21a7d4SKrzysztof Kozlowski static const struct sdw_port_config wsa884x_pconfig[WSA884X_MAX_SWR_PORTS] = {
829*aa21a7d4SKrzysztof Kozlowski {
830*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_DAC + 1,
831*aa21a7d4SKrzysztof Kozlowski .ch_mask = 0x1,
832*aa21a7d4SKrzysztof Kozlowski }, {
833*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_COMP + 1,
834*aa21a7d4SKrzysztof Kozlowski .ch_mask = 0xf,
835*aa21a7d4SKrzysztof Kozlowski }, {
836*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_BOOST + 1,
837*aa21a7d4SKrzysztof Kozlowski .ch_mask = 0x3,
838*aa21a7d4SKrzysztof Kozlowski }, {
839*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_PBR + 1,
840*aa21a7d4SKrzysztof Kozlowski .ch_mask = 0x1,
841*aa21a7d4SKrzysztof Kozlowski }, {
842*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_VISENSE + 1,
843*aa21a7d4SKrzysztof Kozlowski .ch_mask = 0x3,
844*aa21a7d4SKrzysztof Kozlowski }, {
845*aa21a7d4SKrzysztof Kozlowski .num = WSA884X_PORT_CPS + 1,
846*aa21a7d4SKrzysztof Kozlowski .ch_mask = 0x3,
847*aa21a7d4SKrzysztof Kozlowski },
848*aa21a7d4SKrzysztof Kozlowski };
849*aa21a7d4SKrzysztof Kozlowski
850*aa21a7d4SKrzysztof Kozlowski static struct reg_default wsa884x_defaults[] = {
851*aa21a7d4SKrzysztof Kozlowski { WSA884X_BG_CTRL, 0xa5 },
852*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_CTRL, 0x00 },
853*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOP1_PROG, 0x22 },
854*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOP2_PROG, 0x44 },
855*aa21a7d4SKrzysztof Kozlowski { WSA884X_UVLO_PROG, 0x99 },
856*aa21a7d4SKrzysztof Kozlowski { WSA884X_UVLO_PROG1, 0x70 },
857*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTRL_0, 0x00 },
858*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTRL_1, 0x00 },
859*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTRL_2, 0x00 },
860*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTRL_3, 0x00 },
861*aa21a7d4SKrzysztof Kozlowski { WSA884X_REF_CTRL, 0xd2 },
862*aa21a7d4SKrzysztof Kozlowski { WSA884X_BG_TEST_CTL, 0x06 },
863*aa21a7d4SKrzysztof Kozlowski { WSA884X_BG_BIAS, 0xd7 },
864*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_PROG, 0x08 },
865*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_IREF_CTL, 0x57 },
866*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_ISENS_CTL, 0x47 },
867*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_CLK_CTL, 0x87 },
868*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_TEST_CTL, 0x00 },
869*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_BIAS, 0x51 },
870*aa21a7d4SKrzysztof Kozlowski { WSA884X_VBAT_SNS, 0xa0 },
871*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOP_ATEST_SEL, 0x00 },
872*aa21a7d4SKrzysztof Kozlowski { WSA884X_MISC0, 0x04 },
873*aa21a7d4SKrzysztof Kozlowski { WSA884X_MISC1, 0x75 },
874*aa21a7d4SKrzysztof Kozlowski { WSA884X_MISC2, 0x00 },
875*aa21a7d4SKrzysztof Kozlowski { WSA884X_MISC3, 0x10 },
876*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_TSBG_0, 0x00 },
877*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_TUNE_0, 0x00 },
878*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_TUNE_1, 0x00 },
879*aa21a7d4SKrzysztof Kozlowski { WSA884X_VSENSE1, 0xe7 },
880*aa21a7d4SKrzysztof Kozlowski { WSA884X_ISENSE2, 0x27 },
881*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTL_1, 0x00 },
882*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTL_2, 0x00 },
883*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTL_3, 0x00 },
884*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTL_4, 0x00 },
885*aa21a7d4SKrzysztof Kozlowski { WSA884X_EN, 0x10 },
886*aa21a7d4SKrzysztof Kozlowski { WSA884X_OVERRIDE1, 0x00 },
887*aa21a7d4SKrzysztof Kozlowski { WSA884X_OVERRIDE2, 0x08 },
888*aa21a7d4SKrzysztof Kozlowski { WSA884X_ISENSE1, 0xd4 },
889*aa21a7d4SKrzysztof Kozlowski { WSA884X_ISENSE_CAL, 0x00 },
890*aa21a7d4SKrzysztof Kozlowski { WSA884X_MISC, 0x00 },
891*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_0, 0x00 },
892*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_1, 0x00 },
893*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_2, 0x40 },
894*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_3, 0x80 },
895*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_4, 0x25 },
896*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_5, 0x24 },
897*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_6, 0x0a },
898*aa21a7d4SKrzysztof Kozlowski { WSA884X_ADC_7, 0x81 },
899*aa21a7d4SKrzysztof Kozlowski { WSA884X_IVSENSE_SPARE_TUNE_1, 0x00 },
900*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_TUNE_2, 0x00 },
901*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_TUNE_3, 0x00 },
902*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_TUNE_4, 0x00 },
903*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_CTRL1, 0xd3 },
904*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLIP_DET_CTRL1, 0x7e },
905*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLIP_DET_CTRL2, 0x4c },
906*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_CTRL1, 0xa4 },
907*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG1, 0x02 },
908*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG2, 0x00 },
909*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG3, 0x00 },
910*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG4, 0x00 },
911*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG5, 0x00 },
912*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG6, 0x00 },
913*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWM_CLK_CTL, 0x20 },
914*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_LDO_SEL, 0xaa },
915*aa21a7d4SKrzysztof Kozlowski { WSA884X_OCP_CTL, 0xc6 },
916*aa21a7d4SKrzysztof Kozlowski { WSA884X_PDRV_HS_CTL, 0x52 },
917*aa21a7d4SKrzysztof Kozlowski { WSA884X_PDRV_LS_CTL, 0x4a },
918*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPK_TOP_SPARE_CTL_1, 0x00 },
919*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPK_TOP_SPARE_CTL_2, 0x00 },
920*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPK_TOP_SPARE_CTL_3, 0x00 },
921*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPK_TOP_SPARE_CTL_4, 0x00 },
922*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTL_5, 0x00 },
923*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_EN_DEBUG_REG, 0x00 },
924*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_OPAMP_BIAS1_REG, 0x48 },
925*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_OPAMP_BIAS2_REG, 0x48 },
926*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_TUNE1, 0x02 },
927*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VOLTAGE_CTRL_REG, 0x05 },
928*aa21a7d4SKrzysztof Kozlowski { WSA884X_ATEST1_REG, 0x00 },
929*aa21a7d4SKrzysztof Kozlowski { WSA884X_ATEST2_REG, 0x00 },
930*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_BIAS_REG1, 0x6a },
931*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_BIAS_REG2, 0x65 },
932*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_BIAS_REG3, 0x55 },
933*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_BIAS_REG4, 0xa9 },
934*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSTG_DBG2, 0x21 },
935*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_BLK_EN, 0x0f },
936*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_EN, 0x0a },
937*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_MASK_DCC_CTL, 0x08 },
938*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_MISC_CTL1, 0x30 },
939*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_REG_GAIN, 0x00 },
940*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_OS_CAL_CTL, 0x00 },
941*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_OS_CAL_CTL1, 0x90 },
942*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSTG_DBG, 0x08 },
943*aa21a7d4SKrzysztof Kozlowski { WSA884X_BBM_CTL, 0x92 },
944*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_MISC1, 0x00 },
945*aa21a7d4SKrzysztof Kozlowski { WSA884X_DAC_VCM_CTRL_REG7, 0x00 },
946*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_BIAS_REG5, 0x15 },
947*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRV_LF_MISC_CTL2, 0x00 },
948*aa21a7d4SKrzysztof Kozlowski { WSA884X_STB_CTRL1, 0x42 },
949*aa21a7d4SKrzysztof Kozlowski { WSA884X_CURRENT_LIMIT, 0x54 },
950*aa21a7d4SKrzysztof Kozlowski { WSA884X_BYP_CTRL1, 0x01 },
951*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_CTL_0, 0x00 },
952*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOOST_SPARE_CTL_1, 0x00 },
953*aa21a7d4SKrzysztof Kozlowski { WSA884X_IBIAS1, 0x00 },
954*aa21a7d4SKrzysztof Kozlowski { WSA884X_IBIAS2, 0x00 },
955*aa21a7d4SKrzysztof Kozlowski { WSA884X_IBIAS3, 0x00 },
956*aa21a7d4SKrzysztof Kozlowski { WSA884X_EN_CTRL, 0x42 },
957*aa21a7d4SKrzysztof Kozlowski { WSA884X_STB_CTRL2, 0x03 },
958*aa21a7d4SKrzysztof Kozlowski { WSA884X_STB_CTRL3, 0x3c },
959*aa21a7d4SKrzysztof Kozlowski { WSA884X_STB_CTRL4, 0x30 },
960*aa21a7d4SKrzysztof Kozlowski { WSA884X_BYP_CTRL2, 0x97 },
961*aa21a7d4SKrzysztof Kozlowski { WSA884X_BYP_CTRL3, 0x11 },
962*aa21a7d4SKrzysztof Kozlowski { WSA884X_ZX_CTRL1, 0xf0 },
963*aa21a7d4SKrzysztof Kozlowski { WSA884X_ZX_CTRL2, 0x04 },
964*aa21a7d4SKrzysztof Kozlowski { WSA884X_BLEEDER_CTRL, 0x04 },
965*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOOST_MISC, 0x62 },
966*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSTAGE_CTRL1, 0x00 },
967*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSTAGE_CTRL2, 0x31 },
968*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSTAGE_CTRL3, 0x81 },
969*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSTAGE_CTRL4, 0x5f },
970*aa21a7d4SKrzysztof Kozlowski { WSA884X_MAXD_REG1, 0x00 },
971*aa21a7d4SKrzysztof Kozlowski { WSA884X_MAXD_REG2, 0x5b },
972*aa21a7d4SKrzysztof Kozlowski { WSA884X_ILIM_CTRL1, 0xe2 },
973*aa21a7d4SKrzysztof Kozlowski { WSA884X_ILIM_CTRL2, 0x90 },
974*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEST_CTRL1, 0x00 },
975*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEST_CTRL2, 0x00 },
976*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE1, 0x00 },
977*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOOT_CAP_CHECK, 0x01 },
978*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_CTL_0, 0x12 },
979*aa21a7d4SKrzysztof Kozlowski { WSA884X_PWRSAV_CTL, 0xaa },
980*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_CTL_0, 0x00 },
981*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_CTL_1, 0x00 },
982*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_CTL_2, 0x00 },
983*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_CTL_3, 0x00 },
984*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_CLT_1, 0xe1 },
985*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_CTL_2, 0x00 },
986*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_CTL_3, 0x70 },
987*aa21a7d4SKrzysztof Kozlowski { WSA884X_CKWD_CTL_0, 0x14 },
988*aa21a7d4SKrzysztof Kozlowski { WSA884X_CKWD_CTL_1, 0x3b },
989*aa21a7d4SKrzysztof Kozlowski { WSA884X_CKWD_CTL_2, 0x00 },
990*aa21a7d4SKrzysztof Kozlowski { WSA884X_CKSK_CTL_0, 0x00 },
991*aa21a7d4SKrzysztof Kozlowski { WSA884X_PADSW_CTL_0, 0x00 },
992*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEST_0, 0x00 },
993*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEST_1, 0x00 },
994*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_TUNE_0, 0x00 },
995*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_TUNE_1, 0x00 },
996*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_TUNE_2, 0x00 },
997*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_TUNE_3, 0x00 },
998*aa21a7d4SKrzysztof Kozlowski { WSA884X_PON_LDOL_SPARE_TUNE_4, 0x00 },
999*aa21a7d4SKrzysztof Kozlowski { WSA884X_DIG_CTRL0_PAGE, 0x00 },
1000*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_RST_CTL, 0x01 },
1001*aa21a7d4SKrzysztof Kozlowski { WSA884X_SWR_RESET_EN, 0x00 },
1002*aa21a7d4SKrzysztof Kozlowski { WSA884X_TOP_CLK_CFG, 0x00 },
1003*aa21a7d4SKrzysztof Kozlowski { WSA884X_SWR_CLK_RATE, 0x00 },
1004*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_PATH_MODE, 0x00 },
1005*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_CLK_CTL, 0x1f },
1006*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_EN, 0x00 },
1007*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_CTL0, 0x00 },
1008*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_CTL1, 0xfe },
1009*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_TIMER0, 0x80 },
1010*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_TIMER1, 0x80 },
1011*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_ERR_CTL, 0x00 },
1012*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_MSK0, 0x00 },
1013*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_MSK1, 0x00 },
1014*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_BYP_CTL, 0x00 },
1015*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_BYP0, 0x00 },
1016*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_BYP1, 0x00 },
1017*aa21a7d4SKrzysztof Kozlowski { WSA884X_TADC_VALUE_CTL, 0x03 },
1018*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEMP_DETECT_CTL, 0x01 },
1019*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEMP_CONFIG0, 0x00 },
1020*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEMP_CONFIG1, 0x00 },
1021*aa21a7d4SKrzysztof Kozlowski { WSA884X_VBAT_THRM_FLT_CTL, 0x7f },
1022*aa21a7d4SKrzysztof Kozlowski { WSA884X_VBAT_CAL_CTL, 0x01 },
1023*aa21a7d4SKrzysztof Kozlowski { WSA884X_UVLO_DEGLITCH_CTL, 0x05 },
1024*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOP_DEGLITCH_CTL, 0x05 },
1025*aa21a7d4SKrzysztof Kozlowski { WSA884X_VBAT_ZONE_DETC_CTL, 0x31 },
1026*aa21a7d4SKrzysztof Kozlowski { WSA884X_CPS_CTL, 0x00 },
1027*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_RX_CTL, 0xfe },
1028*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A1_0, 0x00 },
1029*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A1_1, 0x01 },
1030*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A2_0, 0x96 },
1031*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A2_1, 0x09 },
1032*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A3_0, 0xab },
1033*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A3_1, 0x05 },
1034*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A4_0, 0x1c },
1035*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A4_1, 0x02 },
1036*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A5_0, 0x17 },
1037*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A5_1, 0x02 },
1038*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A6_0, 0xaa },
1039*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A7_0, 0xe3 },
1040*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_0, 0x69 },
1041*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_1, 0x54 },
1042*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_2, 0x02 },
1043*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_3, 0x15 },
1044*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R1, 0xa4 },
1045*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R2, 0xb5 },
1046*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R3, 0x86 },
1047*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R4, 0x85 },
1048*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R5, 0xaa },
1049*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R6, 0xe2 },
1050*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R7, 0x62 },
1051*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_GAIN_PDM_0, 0x00 },
1052*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_GAIN_PDM_1, 0xfc },
1053*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_GAIN_PDM_2, 0x05 },
1054*aa21a7d4SKrzysztof Kozlowski { WSA884X_PDM_WD_CTL, 0x00 },
1055*aa21a7d4SKrzysztof Kozlowski { WSA884X_DEM_BYPASS_DATA0, 0x00 },
1056*aa21a7d4SKrzysztof Kozlowski { WSA884X_DEM_BYPASS_DATA1, 0x00 },
1057*aa21a7d4SKrzysztof Kozlowski { WSA884X_DEM_BYPASS_DATA2, 0x00 },
1058*aa21a7d4SKrzysztof Kozlowski { WSA884X_DEM_BYPASS_DATA3, 0x00 },
1059*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRE_CTL_0, 0x70 },
1060*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRE_CTL_1, 0x04 },
1061*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRE_IDLE_DET_CTL, 0x2f },
1062*aa21a7d4SKrzysztof Kozlowski { WSA884X_GAIN_RAMPING_CTL, 0x50 },
1063*aa21a7d4SKrzysztof Kozlowski { WSA884X_GAIN_RAMPING_MIN, 0x12 },
1064*aa21a7d4SKrzysztof Kozlowski { WSA884X_TAGC_CTL, 0x15 },
1065*aa21a7d4SKrzysztof Kozlowski { WSA884X_TAGC_TIME, 0xbc },
1066*aa21a7d4SKrzysztof Kozlowski { WSA884X_TAGC_FORCE_VAL, 0x00 },
1067*aa21a7d4SKrzysztof Kozlowski { WSA884X_VAGC_CTL, 0x01 },
1068*aa21a7d4SKrzysztof Kozlowski { WSA884X_VAGC_TIME, 0x0f },
1069*aa21a7d4SKrzysztof Kozlowski { WSA884X_VAGC_ATTN_LVL_1, 0x03 },
1070*aa21a7d4SKrzysztof Kozlowski { WSA884X_VAGC_ATTN_LVL_2, 0x06 },
1071*aa21a7d4SKrzysztof Kozlowski { WSA884X_VAGC_ATTN_LVL_3, 0x09 },
1072*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_CTL_0, 0x37 },
1073*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_CTL_1, 0x81 },
1074*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_V_HD_PA, 0x0c },
1075*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_V_PA_MIN, 0x00 },
1076*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_OVRD_VAL, 0x00 },
1077*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_HARD_MAX, 0xff },
1078*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_SOFT_MAX, 0xf5 },
1079*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_SIG_DP, 0x00 },
1080*aa21a7d4SKrzysztof Kozlowski { WSA884X_PBR_DELAY_CTL, 0x07 },
1081*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_SRL_MAX_PBR, 0x02 },
1082*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH1, 0x00 },
1083*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH2, 0x00 },
1084*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH3, 0x00 },
1085*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH4, 0x00 },
1086*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH5, 0x00 },
1087*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH6, 0x00 },
1088*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH7, 0x00 },
1089*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH8, 0x00 },
1090*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH9, 0x00 },
1091*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH10, 0x00 },
1092*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH11, 0x00 },
1093*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH12, 0x00 },
1094*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH13, 0x00 },
1095*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH14, 0x00 },
1096*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH15, 0x00 },
1097*aa21a7d4SKrzysztof Kozlowski { WSA884X_DIG_CTRL1_PAGE, 0x00 },
1098*aa21a7d4SKrzysztof Kozlowski { WSA884X_PIN_CTL, 0x04 },
1099*aa21a7d4SKrzysztof Kozlowski { WSA884X_PIN_CTL_OE, 0x00 },
1100*aa21a7d4SKrzysztof Kozlowski { WSA884X_PIN_WDATA_IOPAD, 0x00 },
1101*aa21a7d4SKrzysztof Kozlowski { WSA884X_I2C_SLAVE_CTL, 0x00 },
1102*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPMI_PAD_CTL0, 0x2f },
1103*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPMI_PAD_CTL1, 0x2f },
1104*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPMI_PAD_CTL2, 0x2f },
1105*aa21a7d4SKrzysztof Kozlowski { WSA884X_MEM_CTL, 0x00 },
1106*aa21a7d4SKrzysztof Kozlowski { WSA884X_SWR_HM_TEST0, 0x08 },
1107*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_CTRL0, 0x00 },
1108*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_CTRL2, 0x00 },
1109*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TCSP0, 0x77 },
1110*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TCSP1, 0x00 },
1111*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TPPS, 0x47 },
1112*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TVPS, 0x3b },
1113*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TVPH, 0x47 },
1114*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TPPR0, 0x47 },
1115*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TPPR1, 0x00 },
1116*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_TPPH, 0x47 },
1117*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_PRG_END, 0x47 },
1118*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PLAY, 0x00 },
1119*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_CTL, 0x06 },
1120*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_LRA_PER_0, 0xd1 },
1121*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_LRA_PER_1, 0x00 },
1122*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_DELTA_THETA_0, 0xe6 },
1123*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_DELTA_THETA_1, 0x04 },
1124*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_DIRECT_AMP_0, 0x50 },
1125*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_DIRECT_AMP_1, 0x00 },
1126*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP0_0, 0x50 },
1127*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP0_1, 0x00 },
1128*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP1_0, 0x50 },
1129*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP1_1, 0x00 },
1130*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP2_0, 0x50 },
1131*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP2_1, 0x00 },
1132*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP3_0, 0x50 },
1133*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP3_1, 0x00 },
1134*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP4_0, 0x50 },
1135*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP4_1, 0x00 },
1136*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP5_0, 0x50 },
1137*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP5_1, 0x00 },
1138*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP6_0, 0x50 },
1139*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP6_1, 0x00 },
1140*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP7_0, 0x50 },
1141*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PTRN_AMP7_1, 0x00 },
1142*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PER_0_1, 0x88 },
1143*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PER_2_3, 0x88 },
1144*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PER_4_5, 0x88 },
1145*aa21a7d4SKrzysztof Kozlowski { WSA884X_WAVG_PER_6_7, 0x88 },
1146*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_MODE, 0x00 },
1147*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_MASK0, 0x90 },
1148*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_MASK1, 0x00 },
1149*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_CLEAR0, 0x00 },
1150*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_CLEAR1, 0x00 },
1151*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_LEVEL0, 0x04 },
1152*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_LEVEL1, 0x00 },
1153*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_SET0, 0x00 },
1154*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_SET1, 0x00 },
1155*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_TEST0, 0x00 },
1156*aa21a7d4SKrzysztof Kozlowski { WSA884X_INTR_TEST1, 0x00 },
1157*aa21a7d4SKrzysztof Kozlowski { WSA884X_PDM_TEST_MODE, 0x00 },
1158*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_DBG, 0x00 },
1159*aa21a7d4SKrzysztof Kozlowski { WSA884X_DIG_DEBUG_MODE, 0x00 },
1160*aa21a7d4SKrzysztof Kozlowski { WSA884X_DIG_DEBUG_SEL, 0x00 },
1161*aa21a7d4SKrzysztof Kozlowski { WSA884X_DIG_DEBUG_EN, 0x00 },
1162*aa21a7d4SKrzysztof Kozlowski { WSA884X_TADC_DETECT_DBG_CTL, 0x00 },
1163*aa21a7d4SKrzysztof Kozlowski { WSA884X_TADC_DEBUG_MSB, 0x00 },
1164*aa21a7d4SKrzysztof Kozlowski { WSA884X_TADC_DEBUG_LSB, 0x00 },
1165*aa21a7d4SKrzysztof Kozlowski { WSA884X_SAMPLE_EDGE_SEL, 0x7f },
1166*aa21a7d4SKrzysztof Kozlowski { WSA884X_SWR_EDGE_SEL, 0x00 },
1167*aa21a7d4SKrzysztof Kozlowski { WSA884X_TEST_MODE_CTL, 0x05 },
1168*aa21a7d4SKrzysztof Kozlowski { WSA884X_IOPAD_CTL, 0x00 },
1169*aa21a7d4SKrzysztof Kozlowski { WSA884X_ANA_CSR_DBG_ADD, 0x00 },
1170*aa21a7d4SKrzysztof Kozlowski { WSA884X_ANA_CSR_DBG_CTL, 0x12 },
1171*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLK_DBG_CTL, 0x00 },
1172*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_0, 0x00 },
1173*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_1, 0x00 },
1174*aa21a7d4SKrzysztof Kozlowski { WSA884X_SPARE_2, 0x00 },
1175*aa21a7d4SKrzysztof Kozlowski { WSA884X_SCODE, 0x00 },
1176*aa21a7d4SKrzysztof Kozlowski { WSA884X_DIG_TRIM_PAGE, 0x00 },
1177*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_0, 0x00 },
1178*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_1, 0x00 },
1179*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_2, 0x00 },
1180*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_3, 0x00 },
1181*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_4, 0x00 },
1182*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_5, 0x00 },
1183*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_6, 0x00 },
1184*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_7, 0x00 },
1185*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_8, 0x00 },
1186*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_9, 0x00 },
1187*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_10, 0x00 },
1188*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_11, 0x00 },
1189*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_12, 0x00 },
1190*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_13, 0x00 },
1191*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_14, 0x00 },
1192*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_15, 0x00 },
1193*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_16, 0x00 },
1194*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_17, 0x00 },
1195*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_18, 0x00 },
1196*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_19, 0x00 },
1197*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_20, 0x00 },
1198*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_21, 0x00 },
1199*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_22, 0x00 },
1200*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_23, 0x00 },
1201*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_24, 0x00 },
1202*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_25, 0x00 },
1203*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_26, 0x00 },
1204*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_27, 0x00 },
1205*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_28, 0x00 },
1206*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_29, 0x00 },
1207*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_30, 0x00 },
1208*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_31, 0x00 },
1209*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_32, 0x00 },
1210*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_33, 0x00 },
1211*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_34, 0x00 },
1212*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_35, 0x00 },
1213*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_36, 0x00 },
1214*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_37, 0x00 },
1215*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_38, 0x00 },
1216*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_39, 0x00 },
1217*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_40, 0x00 },
1218*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_41, 0x00 },
1219*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_42, 0x00 },
1220*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_43, 0x00 },
1221*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_44, 0x00 },
1222*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_45, 0x00 },
1223*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_46, 0x00 },
1224*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_47, 0x00 },
1225*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_48, 0x00 },
1226*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_49, 0x00 },
1227*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_50, 0x00 },
1228*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_51, 0x00 },
1229*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_52, 0x00 },
1230*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_53, 0x00 },
1231*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_54, 0x00 },
1232*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_55, 0x00 },
1233*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_56, 0x00 },
1234*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_57, 0x00 },
1235*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_58, 0x00 },
1236*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_59, 0x00 },
1237*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_60, 0x00 },
1238*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_61, 0x00 },
1239*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_62, 0x00 },
1240*aa21a7d4SKrzysztof Kozlowski { WSA884X_EMEM_63, 0x00 },
1241*aa21a7d4SKrzysztof Kozlowski };
1242*aa21a7d4SKrzysztof Kozlowski
wsa884x_readonly_register(struct device * dev,unsigned int reg)1243*aa21a7d4SKrzysztof Kozlowski static bool wsa884x_readonly_register(struct device *dev, unsigned int reg)
1244*aa21a7d4SKrzysztof Kozlowski {
1245*aa21a7d4SKrzysztof Kozlowski switch (reg) {
1246*aa21a7d4SKrzysztof Kozlowski case WSA884X_DOUT_MSB:
1247*aa21a7d4SKrzysztof Kozlowski case WSA884X_DOUT_LSB:
1248*aa21a7d4SKrzysztof Kozlowski case WSA884X_STATUS:
1249*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPK_TOP_SPARE_TUNE_2:
1250*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPK_TOP_SPARE_TUNE_3:
1251*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPK_TOP_SPARE_TUNE_4:
1252*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_TUNE_5:
1253*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_TUNE_6:
1254*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_TUNE_7:
1255*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_TUNE_8:
1256*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_TUNE_9:
1257*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_TUNE_10:
1258*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_STATUS0:
1259*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_STATUS1:
1260*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_STATUS2:
1261*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_STATUS3:
1262*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_STATUS4:
1263*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_STATUS5:
1264*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_RO_1:
1265*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_RO_2:
1266*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_RO_3:
1267*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_RO_0:
1268*aa21a7d4SKrzysztof Kozlowski case WSA884X_BOOST_SPARE_RO_1:
1269*aa21a7d4SKrzysztof Kozlowski case WSA884X_STATUS_0:
1270*aa21a7d4SKrzysztof Kozlowski case WSA884X_STATUS_1:
1271*aa21a7d4SKrzysztof Kozlowski case WSA884X_CHIP_ID0:
1272*aa21a7d4SKrzysztof Kozlowski case WSA884X_CHIP_ID1:
1273*aa21a7d4SKrzysztof Kozlowski case WSA884X_CHIP_ID2:
1274*aa21a7d4SKrzysztof Kozlowski case WSA884X_CHIP_ID3:
1275*aa21a7d4SKrzysztof Kozlowski case WSA884X_BUS_ID:
1276*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_FSM_STA0:
1277*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_FSM_STA1:
1278*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_FSM_ERR_COND0:
1279*aa21a7d4SKrzysztof Kozlowski case WSA884X_PA_FSM_ERR_COND1:
1280*aa21a7d4SKrzysztof Kozlowski case WSA884X_TEMP_DIN_MSB:
1281*aa21a7d4SKrzysztof Kozlowski case WSA884X_TEMP_DIN_LSB:
1282*aa21a7d4SKrzysztof Kozlowski case WSA884X_TEMP_DOUT_MSB:
1283*aa21a7d4SKrzysztof Kozlowski case WSA884X_TEMP_DOUT_LSB:
1284*aa21a7d4SKrzysztof Kozlowski case WSA884X_VBAT_DIN_MSB:
1285*aa21a7d4SKrzysztof Kozlowski case WSA884X_VBAT_DIN_LSB:
1286*aa21a7d4SKrzysztof Kozlowski case WSA884X_VBAT_DOUT_MSB:
1287*aa21a7d4SKrzysztof Kozlowski case WSA884X_VBAT_DOUT_LSB:
1288*aa21a7d4SKrzysztof Kozlowski case WSA884X_VBAT_CAL_MSB:
1289*aa21a7d4SKrzysztof Kozlowski case WSA884X_VBAT_CAL_LSB:
1290*aa21a7d4SKrzysztof Kozlowski case WSA884X_VPHX_SYS_EN_STATUS:
1291*aa21a7d4SKrzysztof Kozlowski case WSA884X_PIN_STATUS:
1292*aa21a7d4SKrzysztof Kozlowski case WSA884X_SWR_HM_TEST1:
1293*aa21a7d4SKrzysztof Kozlowski case WSA884X_OTP_CTRL1:
1294*aa21a7d4SKrzysztof Kozlowski case WSA884X_OTP_STAT:
1295*aa21a7d4SKrzysztof Kozlowski case WSA884X_WAVG_STA:
1296*aa21a7d4SKrzysztof Kozlowski case WSA884X_INTR_STATUS0:
1297*aa21a7d4SKrzysztof Kozlowski case WSA884X_INTR_STATUS1:
1298*aa21a7d4SKrzysztof Kozlowski case WSA884X_ATE_TEST_MODE:
1299*aa21a7d4SKrzysztof Kozlowski case WSA884X_SPARE_R:
1300*aa21a7d4SKrzysztof Kozlowski return true;
1301*aa21a7d4SKrzysztof Kozlowski }
1302*aa21a7d4SKrzysztof Kozlowski return false;
1303*aa21a7d4SKrzysztof Kozlowski }
1304*aa21a7d4SKrzysztof Kozlowski
wsa884x_writeable_register(struct device * dev,unsigned int reg)1305*aa21a7d4SKrzysztof Kozlowski static bool wsa884x_writeable_register(struct device *dev, unsigned int reg)
1306*aa21a7d4SKrzysztof Kozlowski {
1307*aa21a7d4SKrzysztof Kozlowski return !wsa884x_readonly_register(dev, reg);
1308*aa21a7d4SKrzysztof Kozlowski }
1309*aa21a7d4SKrzysztof Kozlowski
wsa884x_volatile_register(struct device * dev,unsigned int reg)1310*aa21a7d4SKrzysztof Kozlowski static bool wsa884x_volatile_register(struct device *dev, unsigned int reg)
1311*aa21a7d4SKrzysztof Kozlowski {
1312*aa21a7d4SKrzysztof Kozlowski switch (reg) {
1313*aa21a7d4SKrzysztof Kozlowski case WSA884X_ANA_WO_CTL_0:
1314*aa21a7d4SKrzysztof Kozlowski case WSA884X_ANA_WO_CTL_1:
1315*aa21a7d4SKrzysztof Kozlowski return true;
1316*aa21a7d4SKrzysztof Kozlowski }
1317*aa21a7d4SKrzysztof Kozlowski return wsa884x_readonly_register(dev, reg);
1318*aa21a7d4SKrzysztof Kozlowski }
1319*aa21a7d4SKrzysztof Kozlowski
1320*aa21a7d4SKrzysztof Kozlowski static struct regmap_config wsa884x_regmap_config = {
1321*aa21a7d4SKrzysztof Kozlowski .reg_bits = 32,
1322*aa21a7d4SKrzysztof Kozlowski .val_bits = 8,
1323*aa21a7d4SKrzysztof Kozlowski .cache_type = REGCACHE_MAPLE,
1324*aa21a7d4SKrzysztof Kozlowski .reg_defaults = wsa884x_defaults,
1325*aa21a7d4SKrzysztof Kozlowski .max_register = WSA884X_MAX_REGISTER,
1326*aa21a7d4SKrzysztof Kozlowski .num_reg_defaults = ARRAY_SIZE(wsa884x_defaults),
1327*aa21a7d4SKrzysztof Kozlowski .volatile_reg = wsa884x_volatile_register,
1328*aa21a7d4SKrzysztof Kozlowski .writeable_reg = wsa884x_writeable_register,
1329*aa21a7d4SKrzysztof Kozlowski .reg_format_endian = REGMAP_ENDIAN_NATIVE,
1330*aa21a7d4SKrzysztof Kozlowski .val_format_endian = REGMAP_ENDIAN_NATIVE,
1331*aa21a7d4SKrzysztof Kozlowski .use_single_read = true,
1332*aa21a7d4SKrzysztof Kozlowski };
1333*aa21a7d4SKrzysztof Kozlowski
1334*aa21a7d4SKrzysztof Kozlowski static const struct reg_sequence wsa884x_reg_init[] = {
1335*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOP2_PROG, FIELD_PREP_CONST(WSA884X_BOP2_PROG_BOP2_VTH_MASK, 0x6) |
1336*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_BOP2_PROG_BOP2_HYST_MASK, 0x6) },
1337*aa21a7d4SKrzysztof Kozlowski { WSA884X_REF_CTRL, (0xd2 & ~WSA884X_REF_CTRL_BG_RDY_SEL_MASK) |
1338*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_REF_CTRL_BG_RDY_SEL_MASK, 0x1) },
1339*aa21a7d4SKrzysztof Kozlowski /*
1340*aa21a7d4SKrzysztof Kozlowski * Downstream suggests for batteries different than 1-Stacked (1S):
1341*aa21a7d4SKrzysztof Kozlowski * { WSA884X_TOP_CTRL1, 0xd3 & ~WSA884X_TOP_CTRL1_OCP_LOWVBAT_ITH_EN_MASK },
1342*aa21a7d4SKrzysztof Kozlowski */
1343*aa21a7d4SKrzysztof Kozlowski { WSA884X_STB_CTRL1, (0x42 & ~WSA884X_STB_CTRL1_SLOPE_COMP_CURRENT_MASK) |
1344*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_STB_CTRL1_SLOPE_COMP_CURRENT_MASK, 0xd) },
1345*aa21a7d4SKrzysztof Kozlowski { WSA884X_CURRENT_LIMIT, (0x54 & ~WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_MASK) |
1346*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_MASK, 0x9) },
1347*aa21a7d4SKrzysztof Kozlowski { WSA884X_ZX_CTRL1, (0xf0 & ~WSA884X_ZX_CTRL1_ZX_DET_SW_SEL_MASK) |
1348*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_ZX_CTRL1_ZX_DET_SW_SEL_MASK, 0x3) },
1349*aa21a7d4SKrzysztof Kozlowski { WSA884X_ILIM_CTRL1, (0xe2 & ~WSA884X_ILIM_CTRL1_ILIM_OFFSET_PB_MASK) |
1350*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_ILIM_CTRL1_ILIM_OFFSET_PB_MASK, 0x3) },
1351*aa21a7d4SKrzysztof Kozlowski { WSA884X_CKWD_CTL_1, FIELD_PREP_CONST(WSA884X_CKWD_CTL_1_VPP_SW_CTL_MASK, 0x0) |
1352*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_CKWD_CTL_1_CKWD_VCOMP_VREF_SEL_MASK, 0x13) },
1353*aa21a7d4SKrzysztof Kozlowski { WSA884X_PA_FSM_CTL1, (0xfe & ~WSA884X_PA_FSM_CTL1_NOISE_GATE_BLOCK_MASK) |
1354*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_PA_FSM_CTL1_NOISE_GATE_BLOCK_MASK, 0x4) }, /* == 0xfe */
1355*aa21a7d4SKrzysztof Kozlowski { WSA884X_VBAT_THRM_FLT_CTL, (0x7f & ~WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_MASK) |
1356*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_VBAT_THRM_FLT_CTL_VBAT_COEF_SEL_MASK, 0x4) },
1357*aa21a7d4SKrzysztof Kozlowski { WSA884X_VBAT_CAL_CTL, FIELD_PREP_CONST(WSA884X_VBAT_CAL_CTL_RESERVE_MASK, 0x2) |
1358*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_VBAT_CAL_CTL_VBAT_CAL_EN_MASK, 0x1) },
1359*aa21a7d4SKrzysztof Kozlowski { WSA884X_BOP_DEGLITCH_CTL, FIELD_PREP_CONST(WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_SETTING_MASK, 0x8) |
1360*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_BOP_DEGLITCH_CTL_BOP_DEGLITCH_EN_MASK, 0x1) },
1361*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A2_0, 0x0a },
1362*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A2_1, 0x08 },
1363*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A3_0, 0xf3 },
1364*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A3_1, 0x07 },
1365*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A4_0, 0x79 },
1366*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A5_0, 0x0b },
1367*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A6_0, 0x8a },
1368*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_A7_0, 0x9b },
1369*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_0, FIELD_PREP_CONST(WSA884X_CDC_SPK_DSM_C_0_COEF_C3_MASK, 0x6) |
1370*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_CDC_SPK_DSM_C_0_COEF_C2_MASK, 0x8) },
1371*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_2, FIELD_PREP_CONST(WSA884X_CDC_SPK_DSM_C_2_COEF_C7_MASK, 0xf) },
1372*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_C_3, FIELD_PREP_CONST(WSA884X_CDC_SPK_DSM_C_3_COEF_C7_MASK, 0x20) },
1373*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R1, 0x83 },
1374*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R2, 0x7f },
1375*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R3, 0x9d },
1376*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R4, 0x82 },
1377*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R5, 0x8b },
1378*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R6, 0x9b },
1379*aa21a7d4SKrzysztof Kozlowski { WSA884X_CDC_SPK_DSM_R7, 0x3f },
1380*aa21a7d4SKrzysztof Kozlowski /* Speaker mode by default */
1381*aa21a7d4SKrzysztof Kozlowski { WSA884X_DRE_CTL_0, FIELD_PREP_CONST(WSA884X_DRE_CTL_0_PROG_DELAY_MASK, 0x7) },
1382*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_CTL_0, (0x37 & ~WSA884X_CLSH_CTL_0_DLY_CODE_MASK) |
1383*aa21a7d4SKrzysztof Kozlowski FIELD_PREP_CONST(WSA884X_CLSH_CTL_0_DLY_CODE_MASK, 0x6) },
1384*aa21a7d4SKrzysztof Kozlowski /*
1385*aa21a7d4SKrzysztof Kozlowski * WSA884X_CLSH_VTH values for speaker mode with G_21_DB system gain,
1386*aa21a7d4SKrzysztof Kozlowski * battery 1S and rload 8 Ohms.
1387*aa21a7d4SKrzysztof Kozlowski */
1388*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH1, WSA884X_VTH_TO_REG(863), },
1389*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH2, WSA884X_VTH_TO_REG(918), },
1390*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH3, WSA884X_VTH_TO_REG(980), },
1391*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH4, WSA884X_VTH_TO_REG(1043), },
1392*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH5, WSA884X_VTH_TO_REG(1098), },
1393*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH6, WSA884X_VTH_TO_REG(1137), },
1394*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH7, WSA884X_VTH_TO_REG(1184), },
1395*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH8, WSA884X_VTH_TO_REG(1239), },
1396*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH9, WSA884X_VTH_TO_REG(1278), },
1397*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH10, WSA884X_VTH_TO_REG(1380), },
1398*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH11, WSA884X_VTH_TO_REG(1482), },
1399*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH12, WSA884X_VTH_TO_REG(1584), },
1400*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH13, WSA884X_VTH_TO_REG(1663), },
1401*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH14, WSA884X_VTH_TO_REG(1780), },
1402*aa21a7d4SKrzysztof Kozlowski { WSA884X_CLSH_VTH15, WSA884X_VTH_TO_REG(2000), },
1403*aa21a7d4SKrzysztof Kozlowski { WSA884X_ANA_WO_CTL_1, 0x00 },
1404*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_REG_38, 0x00 },
1405*aa21a7d4SKrzysztof Kozlowski { WSA884X_OTP_REG_40, FIELD_PREP_CONST(WSA884X_OTP_REG_40_ISENSE_RESCAL_MASK, 0x8) },
1406*aa21a7d4SKrzysztof Kozlowski };
1407*aa21a7d4SKrzysztof Kozlowski
wsa884x_set_gain_parameters(struct wsa884x_priv * wsa884x)1408*aa21a7d4SKrzysztof Kozlowski static void wsa884x_set_gain_parameters(struct wsa884x_priv *wsa884x)
1409*aa21a7d4SKrzysztof Kozlowski {
1410*aa21a7d4SKrzysztof Kozlowski struct regmap *regmap = wsa884x->regmap;
1411*aa21a7d4SKrzysztof Kozlowski unsigned int min_gain, igain, vgain, comp_offset;
1412*aa21a7d4SKrzysztof Kozlowski
1413*aa21a7d4SKrzysztof Kozlowski /*
1414*aa21a7d4SKrzysztof Kozlowski * Downstream sets gain parameters customized per boards per use-case.
1415*aa21a7d4SKrzysztof Kozlowski * Choose here some sane values matching knowon users, like QRD8550
1416*aa21a7d4SKrzysztof Kozlowski * board:.
1417*aa21a7d4SKrzysztof Kozlowski *
1418*aa21a7d4SKrzysztof Kozlowski * Values match here downstream:
1419*aa21a7d4SKrzysztof Kozlowski * For WSA884X_RECEIVER - G_7P5_DB system gain
1420*aa21a7d4SKrzysztof Kozlowski * For WSA884X_SPEAKER - G_21_DB system gain
1421*aa21a7d4SKrzysztof Kozlowski */
1422*aa21a7d4SKrzysztof Kozlowski if (wsa884x->dev_mode == WSA884X_RECEIVER) {
1423*aa21a7d4SKrzysztof Kozlowski comp_offset = COMP_OFFSET4;
1424*aa21a7d4SKrzysztof Kozlowski min_gain = G_M6_DB;
1425*aa21a7d4SKrzysztof Kozlowski igain = ISENSE_18_DB;
1426*aa21a7d4SKrzysztof Kozlowski vgain = VSENSE_M12_DB;
1427*aa21a7d4SKrzysztof Kozlowski } else {
1428*aa21a7d4SKrzysztof Kozlowski /* WSA884X_SPEAKER */
1429*aa21a7d4SKrzysztof Kozlowski comp_offset = COMP_OFFSET0;
1430*aa21a7d4SKrzysztof Kozlowski min_gain = G_0_DB;
1431*aa21a7d4SKrzysztof Kozlowski igain = ISENSE_12_DB;
1432*aa21a7d4SKrzysztof Kozlowski vgain = VSENSE_M24_DB;
1433*aa21a7d4SKrzysztof Kozlowski }
1434*aa21a7d4SKrzysztof Kozlowski
1435*aa21a7d4SKrzysztof Kozlowski regmap_update_bits(regmap, WSA884X_ISENSE2,
1436*aa21a7d4SKrzysztof Kozlowski WSA884X_ISENSE2_ISENSE_GAIN_CTL_MASK,
1437*aa21a7d4SKrzysztof Kozlowski FIELD_PREP(WSA884X_ISENSE2_ISENSE_GAIN_CTL_MASK, igain));
1438*aa21a7d4SKrzysztof Kozlowski regmap_update_bits(regmap, WSA884X_VSENSE1,
1439*aa21a7d4SKrzysztof Kozlowski WSA884X_VSENSE1_GAIN_VSENSE_FE_MASK,
1440*aa21a7d4SKrzysztof Kozlowski FIELD_PREP(WSA884X_VSENSE1_GAIN_VSENSE_FE_MASK, vgain));
1441*aa21a7d4SKrzysztof Kozlowski regmap_update_bits(regmap, WSA884X_GAIN_RAMPING_MIN,
1442*aa21a7d4SKrzysztof Kozlowski WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_MASK,
1443*aa21a7d4SKrzysztof Kozlowski FIELD_PREP(WSA884X_GAIN_RAMPING_MIN_MIN_GAIN_MASK, min_gain));
1444*aa21a7d4SKrzysztof Kozlowski
1445*aa21a7d4SKrzysztof Kozlowski if (wsa884x->port_enable[WSA884X_PORT_COMP]) {
1446*aa21a7d4SKrzysztof Kozlowski regmap_update_bits(regmap, WSA884X_DRE_CTL_0,
1447*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_0_OFFSET_MASK,
1448*aa21a7d4SKrzysztof Kozlowski FIELD_PREP(WSA884X_DRE_CTL_0_OFFSET_MASK, comp_offset));
1449*aa21a7d4SKrzysztof Kozlowski
1450*aa21a7d4SKrzysztof Kozlowski regmap_update_bits(regmap, WSA884X_DRE_CTL_1,
1451*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK,
1452*aa21a7d4SKrzysztof Kozlowski FIELD_PREP(WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK, 0x0));
1453*aa21a7d4SKrzysztof Kozlowski } else {
1454*aa21a7d4SKrzysztof Kozlowski regmap_update_bits(regmap, WSA884X_DRE_CTL_1,
1455*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK,
1456*aa21a7d4SKrzysztof Kozlowski FIELD_PREP(WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK, 0x1));
1457*aa21a7d4SKrzysztof Kozlowski }
1458*aa21a7d4SKrzysztof Kozlowski }
1459*aa21a7d4SKrzysztof Kozlowski
wsa884x_init(struct wsa884x_priv * wsa884x)1460*aa21a7d4SKrzysztof Kozlowski static void wsa884x_init(struct wsa884x_priv *wsa884x)
1461*aa21a7d4SKrzysztof Kozlowski {
1462*aa21a7d4SKrzysztof Kozlowski unsigned int wo_ctl_0;
1463*aa21a7d4SKrzysztof Kozlowski unsigned int variant = 0;
1464*aa21a7d4SKrzysztof Kozlowski
1465*aa21a7d4SKrzysztof Kozlowski if (!regmap_read(wsa884x->regmap, WSA884X_OTP_REG_0, &variant))
1466*aa21a7d4SKrzysztof Kozlowski wsa884x->variant = variant & WSA884X_OTP_REG_0_ID_MASK;
1467*aa21a7d4SKrzysztof Kozlowski
1468*aa21a7d4SKrzysztof Kozlowski regmap_multi_reg_write(wsa884x->regmap, wsa884x_reg_init,
1469*aa21a7d4SKrzysztof Kozlowski ARRAY_SIZE(wsa884x_reg_init));
1470*aa21a7d4SKrzysztof Kozlowski
1471*aa21a7d4SKrzysztof Kozlowski wo_ctl_0 = 0xc;
1472*aa21a7d4SKrzysztof Kozlowski wo_ctl_0 |= FIELD_PREP(WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_MASK,
1473*aa21a7d4SKrzysztof Kozlowski WSA884X_ANA_WO_CTL_0_DAC_CM_CLAMP_EN_MODE_SPEAKER);
1474*aa21a7d4SKrzysztof Kozlowski /* Assume that compander is enabled by default unless it is haptics sku */
1475*aa21a7d4SKrzysztof Kozlowski if (wsa884x->variant == WSA884X_OTP_ID_WSA8845H)
1476*aa21a7d4SKrzysztof Kozlowski wo_ctl_0 |= FIELD_PREP(WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_MASK,
1477*aa21a7d4SKrzysztof Kozlowski WSA884X_ANA_WO_CTL_0_PA_AUX_18_DB);
1478*aa21a7d4SKrzysztof Kozlowski else
1479*aa21a7d4SKrzysztof Kozlowski wo_ctl_0 |= FIELD_PREP(WSA884X_ANA_WO_CTL_0_PA_AUX_GAIN_MASK,
1480*aa21a7d4SKrzysztof Kozlowski WSA884X_ANA_WO_CTL_0_PA_AUX_0_DB);
1481*aa21a7d4SKrzysztof Kozlowski regmap_write(wsa884x->regmap, WSA884X_ANA_WO_CTL_0, wo_ctl_0);
1482*aa21a7d4SKrzysztof Kozlowski
1483*aa21a7d4SKrzysztof Kozlowski wsa884x_set_gain_parameters(wsa884x);
1484*aa21a7d4SKrzysztof Kozlowski
1485*aa21a7d4SKrzysztof Kozlowski wsa884x->hw_init = false;
1486*aa21a7d4SKrzysztof Kozlowski }
1487*aa21a7d4SKrzysztof Kozlowski
wsa884x_update_status(struct sdw_slave * slave,enum sdw_slave_status status)1488*aa21a7d4SKrzysztof Kozlowski static int wsa884x_update_status(struct sdw_slave *slave,
1489*aa21a7d4SKrzysztof Kozlowski enum sdw_slave_status status)
1490*aa21a7d4SKrzysztof Kozlowski {
1491*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = dev_get_drvdata(&slave->dev);
1492*aa21a7d4SKrzysztof Kozlowski int ret;
1493*aa21a7d4SKrzysztof Kozlowski
1494*aa21a7d4SKrzysztof Kozlowski if (status == SDW_SLAVE_UNATTACHED) {
1495*aa21a7d4SKrzysztof Kozlowski wsa884x->hw_init = false;
1496*aa21a7d4SKrzysztof Kozlowski regcache_cache_only(wsa884x->regmap, true);
1497*aa21a7d4SKrzysztof Kozlowski regcache_mark_dirty(wsa884x->regmap);
1498*aa21a7d4SKrzysztof Kozlowski return 0;
1499*aa21a7d4SKrzysztof Kozlowski }
1500*aa21a7d4SKrzysztof Kozlowski
1501*aa21a7d4SKrzysztof Kozlowski if (wsa884x->hw_init || status != SDW_SLAVE_ATTACHED)
1502*aa21a7d4SKrzysztof Kozlowski return 0;
1503*aa21a7d4SKrzysztof Kozlowski
1504*aa21a7d4SKrzysztof Kozlowski regcache_cache_only(wsa884x->regmap, false);
1505*aa21a7d4SKrzysztof Kozlowski ret = regcache_sync(wsa884x->regmap);
1506*aa21a7d4SKrzysztof Kozlowski if (ret < 0) {
1507*aa21a7d4SKrzysztof Kozlowski dev_err(&slave->dev, "Cannot sync regmap cache\n");
1508*aa21a7d4SKrzysztof Kozlowski return ret;
1509*aa21a7d4SKrzysztof Kozlowski }
1510*aa21a7d4SKrzysztof Kozlowski
1511*aa21a7d4SKrzysztof Kozlowski wsa884x_init(wsa884x);
1512*aa21a7d4SKrzysztof Kozlowski
1513*aa21a7d4SKrzysztof Kozlowski return 0;
1514*aa21a7d4SKrzysztof Kozlowski }
1515*aa21a7d4SKrzysztof Kozlowski
wsa884x_port_prep(struct sdw_slave * slave,struct sdw_prepare_ch * prepare_ch,enum sdw_port_prep_ops state)1516*aa21a7d4SKrzysztof Kozlowski static int wsa884x_port_prep(struct sdw_slave *slave,
1517*aa21a7d4SKrzysztof Kozlowski struct sdw_prepare_ch *prepare_ch,
1518*aa21a7d4SKrzysztof Kozlowski enum sdw_port_prep_ops state)
1519*aa21a7d4SKrzysztof Kozlowski {
1520*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = dev_get_drvdata(&slave->dev);
1521*aa21a7d4SKrzysztof Kozlowski
1522*aa21a7d4SKrzysztof Kozlowski if (state == SDW_OPS_PORT_POST_PREP)
1523*aa21a7d4SKrzysztof Kozlowski wsa884x->port_prepared[prepare_ch->num - 1] = true;
1524*aa21a7d4SKrzysztof Kozlowski else
1525*aa21a7d4SKrzysztof Kozlowski wsa884x->port_prepared[prepare_ch->num - 1] = false;
1526*aa21a7d4SKrzysztof Kozlowski
1527*aa21a7d4SKrzysztof Kozlowski return 0;
1528*aa21a7d4SKrzysztof Kozlowski }
1529*aa21a7d4SKrzysztof Kozlowski
1530*aa21a7d4SKrzysztof Kozlowski static const struct sdw_slave_ops wsa884x_slave_ops = {
1531*aa21a7d4SKrzysztof Kozlowski .update_status = wsa884x_update_status,
1532*aa21a7d4SKrzysztof Kozlowski .port_prep = wsa884x_port_prep,
1533*aa21a7d4SKrzysztof Kozlowski };
1534*aa21a7d4SKrzysztof Kozlowski
wsa884x_dev_mode_get(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1535*aa21a7d4SKrzysztof Kozlowski static int wsa884x_dev_mode_get(struct snd_kcontrol *kcontrol,
1536*aa21a7d4SKrzysztof Kozlowski struct snd_ctl_elem_value *ucontrol)
1537*aa21a7d4SKrzysztof Kozlowski {
1538*aa21a7d4SKrzysztof Kozlowski struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1539*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
1540*aa21a7d4SKrzysztof Kozlowski
1541*aa21a7d4SKrzysztof Kozlowski ucontrol->value.enumerated.item[0] = wsa884x->dev_mode;
1542*aa21a7d4SKrzysztof Kozlowski
1543*aa21a7d4SKrzysztof Kozlowski return 0;
1544*aa21a7d4SKrzysztof Kozlowski }
1545*aa21a7d4SKrzysztof Kozlowski
wsa884x_dev_mode_put(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1546*aa21a7d4SKrzysztof Kozlowski static int wsa884x_dev_mode_put(struct snd_kcontrol *kcontrol,
1547*aa21a7d4SKrzysztof Kozlowski struct snd_ctl_elem_value *ucontrol)
1548*aa21a7d4SKrzysztof Kozlowski {
1549*aa21a7d4SKrzysztof Kozlowski struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
1550*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
1551*aa21a7d4SKrzysztof Kozlowski
1552*aa21a7d4SKrzysztof Kozlowski if (wsa884x->dev_mode == ucontrol->value.enumerated.item[0])
1553*aa21a7d4SKrzysztof Kozlowski return 0;
1554*aa21a7d4SKrzysztof Kozlowski
1555*aa21a7d4SKrzysztof Kozlowski wsa884x->dev_mode = ucontrol->value.enumerated.item[0];
1556*aa21a7d4SKrzysztof Kozlowski
1557*aa21a7d4SKrzysztof Kozlowski return 1;
1558*aa21a7d4SKrzysztof Kozlowski }
1559*aa21a7d4SKrzysztof Kozlowski
wsa884x_get_swr_port(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1560*aa21a7d4SKrzysztof Kozlowski static int wsa884x_get_swr_port(struct snd_kcontrol *kcontrol,
1561*aa21a7d4SKrzysztof Kozlowski struct snd_ctl_elem_value *ucontrol)
1562*aa21a7d4SKrzysztof Kozlowski {
1563*aa21a7d4SKrzysztof Kozlowski struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
1564*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(comp);
1565*aa21a7d4SKrzysztof Kozlowski struct soc_mixer_control *mixer = (struct soc_mixer_control *)kcontrol->private_value;
1566*aa21a7d4SKrzysztof Kozlowski int portidx = mixer->reg;
1567*aa21a7d4SKrzysztof Kozlowski
1568*aa21a7d4SKrzysztof Kozlowski ucontrol->value.integer.value[0] = wsa884x->port_enable[portidx];
1569*aa21a7d4SKrzysztof Kozlowski
1570*aa21a7d4SKrzysztof Kozlowski return 0;
1571*aa21a7d4SKrzysztof Kozlowski }
1572*aa21a7d4SKrzysztof Kozlowski
wsa884x_set_swr_port(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)1573*aa21a7d4SKrzysztof Kozlowski static int wsa884x_set_swr_port(struct snd_kcontrol *kcontrol,
1574*aa21a7d4SKrzysztof Kozlowski struct snd_ctl_elem_value *ucontrol)
1575*aa21a7d4SKrzysztof Kozlowski {
1576*aa21a7d4SKrzysztof Kozlowski struct snd_soc_component *comp = snd_soc_kcontrol_component(kcontrol);
1577*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(comp);
1578*aa21a7d4SKrzysztof Kozlowski struct soc_mixer_control *mixer = (struct soc_mixer_control *)kcontrol->private_value;
1579*aa21a7d4SKrzysztof Kozlowski int portidx = mixer->reg;
1580*aa21a7d4SKrzysztof Kozlowski
1581*aa21a7d4SKrzysztof Kozlowski if (ucontrol->value.integer.value[0]) {
1582*aa21a7d4SKrzysztof Kozlowski if (wsa884x->port_enable[portidx])
1583*aa21a7d4SKrzysztof Kozlowski return 0;
1584*aa21a7d4SKrzysztof Kozlowski
1585*aa21a7d4SKrzysztof Kozlowski wsa884x->port_enable[portidx] = true;
1586*aa21a7d4SKrzysztof Kozlowski } else {
1587*aa21a7d4SKrzysztof Kozlowski if (!wsa884x->port_enable[portidx])
1588*aa21a7d4SKrzysztof Kozlowski return 0;
1589*aa21a7d4SKrzysztof Kozlowski
1590*aa21a7d4SKrzysztof Kozlowski wsa884x->port_enable[portidx] = false;
1591*aa21a7d4SKrzysztof Kozlowski }
1592*aa21a7d4SKrzysztof Kozlowski
1593*aa21a7d4SKrzysztof Kozlowski return 1;
1594*aa21a7d4SKrzysztof Kozlowski }
1595*aa21a7d4SKrzysztof Kozlowski
wsa884x_codec_probe(struct snd_soc_component * comp)1596*aa21a7d4SKrzysztof Kozlowski static int wsa884x_codec_probe(struct snd_soc_component *comp)
1597*aa21a7d4SKrzysztof Kozlowski {
1598*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(comp);
1599*aa21a7d4SKrzysztof Kozlowski
1600*aa21a7d4SKrzysztof Kozlowski snd_soc_component_init_regmap(comp, wsa884x->regmap);
1601*aa21a7d4SKrzysztof Kozlowski
1602*aa21a7d4SKrzysztof Kozlowski return 0;
1603*aa21a7d4SKrzysztof Kozlowski }
1604*aa21a7d4SKrzysztof Kozlowski
wsa884x_spkr_post_pmu(struct snd_soc_component * component,struct wsa884x_priv * wsa884x)1605*aa21a7d4SKrzysztof Kozlowski static void wsa884x_spkr_post_pmu(struct snd_soc_component *component,
1606*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x)
1607*aa21a7d4SKrzysztof Kozlowski {
1608*aa21a7d4SKrzysztof Kozlowski unsigned int curr_limit, curr_ovrd_en;
1609*aa21a7d4SKrzysztof Kozlowski
1610*aa21a7d4SKrzysztof Kozlowski wsa884x_set_gain_parameters(wsa884x);
1611*aa21a7d4SKrzysztof Kozlowski if (wsa884x->dev_mode == WSA884X_RECEIVER) {
1612*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_DRE_CTL_0,
1613*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_0_PROG_DELAY_MASK, 0x3);
1614*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_CDC_PATH_MODE,
1615*aa21a7d4SKrzysztof Kozlowski WSA884X_CDC_PATH_MODE_RXD_MODE_MASK,
1616*aa21a7d4SKrzysztof Kozlowski 0x1);
1617*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PWM_CLK_CTL,
1618*aa21a7d4SKrzysztof Kozlowski WSA884X_PWM_CLK_CTL_PWM_CLK_FREQ_SEL_MASK,
1619*aa21a7d4SKrzysztof Kozlowski 0x1);
1620*aa21a7d4SKrzysztof Kozlowski } else {
1621*aa21a7d4SKrzysztof Kozlowski /* WSA884X_SPEAKER */
1622*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_DRE_CTL_0,
1623*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_0_PROG_DELAY_MASK, 0xf);
1624*aa21a7d4SKrzysztof Kozlowski }
1625*aa21a7d4SKrzysztof Kozlowski
1626*aa21a7d4SKrzysztof Kozlowski if (wsa884x->port_enable[WSA884X_PORT_PBR]) {
1627*aa21a7d4SKrzysztof Kozlowski curr_ovrd_en = 0x0;
1628*aa21a7d4SKrzysztof Kozlowski curr_limit = 0x15;
1629*aa21a7d4SKrzysztof Kozlowski } else {
1630*aa21a7d4SKrzysztof Kozlowski curr_ovrd_en = 0x1;
1631*aa21a7d4SKrzysztof Kozlowski if (wsa884x->dev_mode == WSA884X_RECEIVER)
1632*aa21a7d4SKrzysztof Kozlowski curr_limit = 0x9;
1633*aa21a7d4SKrzysztof Kozlowski else
1634*aa21a7d4SKrzysztof Kozlowski curr_limit = 0x15;
1635*aa21a7d4SKrzysztof Kozlowski }
1636*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_CURRENT_LIMIT,
1637*aa21a7d4SKrzysztof Kozlowski WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_OVRD_EN_MASK,
1638*aa21a7d4SKrzysztof Kozlowski curr_ovrd_en);
1639*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_CURRENT_LIMIT,
1640*aa21a7d4SKrzysztof Kozlowski WSA884X_CURRENT_LIMIT_CURRENT_LIMIT_MASK,
1641*aa21a7d4SKrzysztof Kozlowski curr_limit);
1642*aa21a7d4SKrzysztof Kozlowski }
1643*aa21a7d4SKrzysztof Kozlowski
wsa884x_spkr_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)1644*aa21a7d4SKrzysztof Kozlowski static int wsa884x_spkr_event(struct snd_soc_dapm_widget *w,
1645*aa21a7d4SKrzysztof Kozlowski struct snd_kcontrol *kcontrol, int event)
1646*aa21a7d4SKrzysztof Kozlowski {
1647*aa21a7d4SKrzysztof Kozlowski struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
1648*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = snd_soc_component_get_drvdata(component);
1649*aa21a7d4SKrzysztof Kozlowski
1650*aa21a7d4SKrzysztof Kozlowski switch (event) {
1651*aa21a7d4SKrzysztof Kozlowski case SND_SOC_DAPM_POST_PMU:
1652*aa21a7d4SKrzysztof Kozlowski wsa884x_spkr_post_pmu(component, wsa884x);
1653*aa21a7d4SKrzysztof Kozlowski
1654*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PDM_WD_CTL,
1655*aa21a7d4SKrzysztof Kozlowski WSA884X_PDM_WD_CTL_PDM_WD_EN_MASK,
1656*aa21a7d4SKrzysztof Kozlowski 0x1);
1657*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PA_FSM_EN,
1658*aa21a7d4SKrzysztof Kozlowski WSA884X_PA_FSM_EN_GLOBAL_PA_EN_MASK,
1659*aa21a7d4SKrzysztof Kozlowski 0x1);
1660*aa21a7d4SKrzysztof Kozlowski
1661*aa21a7d4SKrzysztof Kozlowski break;
1662*aa21a7d4SKrzysztof Kozlowski case SND_SOC_DAPM_PRE_PMD:
1663*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PA_FSM_EN,
1664*aa21a7d4SKrzysztof Kozlowski WSA884X_PA_FSM_EN_GLOBAL_PA_EN_MASK,
1665*aa21a7d4SKrzysztof Kozlowski 0x0);
1666*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PDM_WD_CTL,
1667*aa21a7d4SKrzysztof Kozlowski WSA884X_PDM_WD_CTL_PDM_WD_EN_MASK,
1668*aa21a7d4SKrzysztof Kozlowski 0x0);
1669*aa21a7d4SKrzysztof Kozlowski break;
1670*aa21a7d4SKrzysztof Kozlowski }
1671*aa21a7d4SKrzysztof Kozlowski
1672*aa21a7d4SKrzysztof Kozlowski return 0;
1673*aa21a7d4SKrzysztof Kozlowski }
1674*aa21a7d4SKrzysztof Kozlowski
1675*aa21a7d4SKrzysztof Kozlowski static const struct snd_soc_dapm_widget wsa884x_dapm_widgets[] = {
1676*aa21a7d4SKrzysztof Kozlowski SND_SOC_DAPM_INPUT("IN"),
1677*aa21a7d4SKrzysztof Kozlowski SND_SOC_DAPM_SPK("SPKR", wsa884x_spkr_event),
1678*aa21a7d4SKrzysztof Kozlowski };
1679*aa21a7d4SKrzysztof Kozlowski
1680*aa21a7d4SKrzysztof Kozlowski static const DECLARE_TLV_DB_SCALE(pa_gain, -900, 150, -900);
1681*aa21a7d4SKrzysztof Kozlowski
1682*aa21a7d4SKrzysztof Kozlowski static const struct snd_kcontrol_new wsa884x_snd_controls[] = {
1683*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_RANGE_TLV("PA Volume", WSA884X_DRE_CTL_1,
1684*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_1_CSR_GAIN_SHIFT,
1685*aa21a7d4SKrzysztof Kozlowski 0x0, 0x1f, 1, pa_gain),
1686*aa21a7d4SKrzysztof Kozlowski SOC_ENUM_EXT("WSA MODE", wsa884x_dev_mode_enum,
1687*aa21a7d4SKrzysztof Kozlowski wsa884x_dev_mode_get, wsa884x_dev_mode_put),
1688*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_EXT("DAC Switch", WSA884X_PORT_DAC, 0, 1, 0,
1689*aa21a7d4SKrzysztof Kozlowski wsa884x_get_swr_port, wsa884x_set_swr_port),
1690*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_EXT("COMP Switch", WSA884X_PORT_COMP, 0, 1, 0,
1691*aa21a7d4SKrzysztof Kozlowski wsa884x_get_swr_port, wsa884x_set_swr_port),
1692*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_EXT("BOOST Switch", WSA884X_PORT_BOOST, 0, 1, 0,
1693*aa21a7d4SKrzysztof Kozlowski wsa884x_get_swr_port, wsa884x_set_swr_port),
1694*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_EXT("PBR Switch", WSA884X_PORT_PBR, 0, 1, 0,
1695*aa21a7d4SKrzysztof Kozlowski wsa884x_get_swr_port, wsa884x_set_swr_port),
1696*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_EXT("VISENSE Switch", WSA884X_PORT_VISENSE, 0, 1, 0,
1697*aa21a7d4SKrzysztof Kozlowski wsa884x_get_swr_port, wsa884x_set_swr_port),
1698*aa21a7d4SKrzysztof Kozlowski SOC_SINGLE_EXT("CPS Switch", WSA884X_PORT_CPS, 0, 1, 0,
1699*aa21a7d4SKrzysztof Kozlowski wsa884x_get_swr_port, wsa884x_set_swr_port),
1700*aa21a7d4SKrzysztof Kozlowski };
1701*aa21a7d4SKrzysztof Kozlowski
1702*aa21a7d4SKrzysztof Kozlowski static const struct snd_soc_dapm_route wsa884x_audio_map[] = {
1703*aa21a7d4SKrzysztof Kozlowski {"SPKR", NULL, "IN"},
1704*aa21a7d4SKrzysztof Kozlowski };
1705*aa21a7d4SKrzysztof Kozlowski
1706*aa21a7d4SKrzysztof Kozlowski static const struct snd_soc_component_driver wsa884x_component_drv = {
1707*aa21a7d4SKrzysztof Kozlowski .name = "WSA884x",
1708*aa21a7d4SKrzysztof Kozlowski .probe = wsa884x_codec_probe,
1709*aa21a7d4SKrzysztof Kozlowski .controls = wsa884x_snd_controls,
1710*aa21a7d4SKrzysztof Kozlowski .num_controls = ARRAY_SIZE(wsa884x_snd_controls),
1711*aa21a7d4SKrzysztof Kozlowski .dapm_widgets = wsa884x_dapm_widgets,
1712*aa21a7d4SKrzysztof Kozlowski .num_dapm_widgets = ARRAY_SIZE(wsa884x_dapm_widgets),
1713*aa21a7d4SKrzysztof Kozlowski .dapm_routes = wsa884x_audio_map,
1714*aa21a7d4SKrzysztof Kozlowski .num_dapm_routes = ARRAY_SIZE(wsa884x_audio_map),
1715*aa21a7d4SKrzysztof Kozlowski };
1716*aa21a7d4SKrzysztof Kozlowski
wsa884x_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1717*aa21a7d4SKrzysztof Kozlowski static int wsa884x_hw_params(struct snd_pcm_substream *substream,
1718*aa21a7d4SKrzysztof Kozlowski struct snd_pcm_hw_params *params,
1719*aa21a7d4SKrzysztof Kozlowski struct snd_soc_dai *dai)
1720*aa21a7d4SKrzysztof Kozlowski {
1721*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = dev_get_drvdata(dai->dev);
1722*aa21a7d4SKrzysztof Kozlowski int i;
1723*aa21a7d4SKrzysztof Kozlowski
1724*aa21a7d4SKrzysztof Kozlowski wsa884x->active_ports = 0;
1725*aa21a7d4SKrzysztof Kozlowski for (i = 0; i < WSA884X_MAX_SWR_PORTS; i++) {
1726*aa21a7d4SKrzysztof Kozlowski if (!wsa884x->port_enable[i])
1727*aa21a7d4SKrzysztof Kozlowski continue;
1728*aa21a7d4SKrzysztof Kozlowski
1729*aa21a7d4SKrzysztof Kozlowski wsa884x->port_config[wsa884x->active_ports] = wsa884x_pconfig[i];
1730*aa21a7d4SKrzysztof Kozlowski wsa884x->active_ports++;
1731*aa21a7d4SKrzysztof Kozlowski }
1732*aa21a7d4SKrzysztof Kozlowski
1733*aa21a7d4SKrzysztof Kozlowski wsa884x->sconfig.frame_rate = params_rate(params);
1734*aa21a7d4SKrzysztof Kozlowski
1735*aa21a7d4SKrzysztof Kozlowski return sdw_stream_add_slave(wsa884x->slave, &wsa884x->sconfig,
1736*aa21a7d4SKrzysztof Kozlowski wsa884x->port_config, wsa884x->active_ports,
1737*aa21a7d4SKrzysztof Kozlowski wsa884x->sruntime);
1738*aa21a7d4SKrzysztof Kozlowski }
1739*aa21a7d4SKrzysztof Kozlowski
wsa884x_hw_free(struct snd_pcm_substream * substream,struct snd_soc_dai * dai)1740*aa21a7d4SKrzysztof Kozlowski static int wsa884x_hw_free(struct snd_pcm_substream *substream,
1741*aa21a7d4SKrzysztof Kozlowski struct snd_soc_dai *dai)
1742*aa21a7d4SKrzysztof Kozlowski {
1743*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = dev_get_drvdata(dai->dev);
1744*aa21a7d4SKrzysztof Kozlowski
1745*aa21a7d4SKrzysztof Kozlowski sdw_stream_remove_slave(wsa884x->slave, wsa884x->sruntime);
1746*aa21a7d4SKrzysztof Kozlowski
1747*aa21a7d4SKrzysztof Kozlowski return 0;
1748*aa21a7d4SKrzysztof Kozlowski }
1749*aa21a7d4SKrzysztof Kozlowski
wsa884x_mute_stream(struct snd_soc_dai * dai,int mute,int stream)1750*aa21a7d4SKrzysztof Kozlowski static int wsa884x_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
1751*aa21a7d4SKrzysztof Kozlowski {
1752*aa21a7d4SKrzysztof Kozlowski struct snd_soc_component *component = dai->component;
1753*aa21a7d4SKrzysztof Kozlowski
1754*aa21a7d4SKrzysztof Kozlowski if (mute) {
1755*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_DRE_CTL_1,
1756*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK,
1757*aa21a7d4SKrzysztof Kozlowski 0x0);
1758*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PA_FSM_EN,
1759*aa21a7d4SKrzysztof Kozlowski WSA884X_PA_FSM_EN_GLOBAL_PA_EN_MASK,
1760*aa21a7d4SKrzysztof Kozlowski 0x0);
1761*aa21a7d4SKrzysztof Kozlowski
1762*aa21a7d4SKrzysztof Kozlowski } else {
1763*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_DRE_CTL_1,
1764*aa21a7d4SKrzysztof Kozlowski WSA884X_DRE_CTL_1_CSR_GAIN_EN_MASK,
1765*aa21a7d4SKrzysztof Kozlowski 0x1);
1766*aa21a7d4SKrzysztof Kozlowski snd_soc_component_write_field(component, WSA884X_PA_FSM_EN,
1767*aa21a7d4SKrzysztof Kozlowski WSA884X_PA_FSM_EN_GLOBAL_PA_EN_MASK,
1768*aa21a7d4SKrzysztof Kozlowski 0x1);
1769*aa21a7d4SKrzysztof Kozlowski }
1770*aa21a7d4SKrzysztof Kozlowski
1771*aa21a7d4SKrzysztof Kozlowski return 0;
1772*aa21a7d4SKrzysztof Kozlowski }
1773*aa21a7d4SKrzysztof Kozlowski
wsa884x_set_stream(struct snd_soc_dai * dai,void * stream,int direction)1774*aa21a7d4SKrzysztof Kozlowski static int wsa884x_set_stream(struct snd_soc_dai *dai,
1775*aa21a7d4SKrzysztof Kozlowski void *stream, int direction)
1776*aa21a7d4SKrzysztof Kozlowski {
1777*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x = dev_get_drvdata(dai->dev);
1778*aa21a7d4SKrzysztof Kozlowski
1779*aa21a7d4SKrzysztof Kozlowski wsa884x->sruntime = stream;
1780*aa21a7d4SKrzysztof Kozlowski
1781*aa21a7d4SKrzysztof Kozlowski return 0;
1782*aa21a7d4SKrzysztof Kozlowski }
1783*aa21a7d4SKrzysztof Kozlowski
1784*aa21a7d4SKrzysztof Kozlowski static const struct snd_soc_dai_ops wsa884x_dai_ops = {
1785*aa21a7d4SKrzysztof Kozlowski .hw_params = wsa884x_hw_params,
1786*aa21a7d4SKrzysztof Kozlowski .hw_free = wsa884x_hw_free,
1787*aa21a7d4SKrzysztof Kozlowski .mute_stream = wsa884x_mute_stream,
1788*aa21a7d4SKrzysztof Kozlowski .set_stream = wsa884x_set_stream,
1789*aa21a7d4SKrzysztof Kozlowski };
1790*aa21a7d4SKrzysztof Kozlowski
1791*aa21a7d4SKrzysztof Kozlowski static struct snd_soc_dai_driver wsa884x_dais[] = {
1792*aa21a7d4SKrzysztof Kozlowski {
1793*aa21a7d4SKrzysztof Kozlowski .name = "SPKR",
1794*aa21a7d4SKrzysztof Kozlowski .playback = {
1795*aa21a7d4SKrzysztof Kozlowski .stream_name = "SPKR Playback",
1796*aa21a7d4SKrzysztof Kozlowski .rates = WSA884X_RATES | WSA884X_FRAC_RATES,
1797*aa21a7d4SKrzysztof Kozlowski .formats = WSA884X_FORMATS,
1798*aa21a7d4SKrzysztof Kozlowski .rate_min = 8000,
1799*aa21a7d4SKrzysztof Kozlowski .rate_max = 384000,
1800*aa21a7d4SKrzysztof Kozlowski .channels_min = 1,
1801*aa21a7d4SKrzysztof Kozlowski .channels_max = 1,
1802*aa21a7d4SKrzysztof Kozlowski },
1803*aa21a7d4SKrzysztof Kozlowski .ops = &wsa884x_dai_ops,
1804*aa21a7d4SKrzysztof Kozlowski },
1805*aa21a7d4SKrzysztof Kozlowski };
1806*aa21a7d4SKrzysztof Kozlowski
wsa884x_gpio_powerdown(void * data)1807*aa21a7d4SKrzysztof Kozlowski static void wsa884x_gpio_powerdown(void *data)
1808*aa21a7d4SKrzysztof Kozlowski {
1809*aa21a7d4SKrzysztof Kozlowski gpiod_direction_output(data, 1);
1810*aa21a7d4SKrzysztof Kozlowski }
1811*aa21a7d4SKrzysztof Kozlowski
wsa884x_regulator_disable(void * data)1812*aa21a7d4SKrzysztof Kozlowski static void wsa884x_regulator_disable(void *data)
1813*aa21a7d4SKrzysztof Kozlowski {
1814*aa21a7d4SKrzysztof Kozlowski regulator_bulk_disable(WSA884X_SUPPLIES_NUM, data);
1815*aa21a7d4SKrzysztof Kozlowski }
1816*aa21a7d4SKrzysztof Kozlowski
wsa884x_probe(struct sdw_slave * pdev,const struct sdw_device_id * id)1817*aa21a7d4SKrzysztof Kozlowski static int wsa884x_probe(struct sdw_slave *pdev,
1818*aa21a7d4SKrzysztof Kozlowski const struct sdw_device_id *id)
1819*aa21a7d4SKrzysztof Kozlowski {
1820*aa21a7d4SKrzysztof Kozlowski struct device *dev = &pdev->dev;
1821*aa21a7d4SKrzysztof Kozlowski struct wsa884x_priv *wsa884x;
1822*aa21a7d4SKrzysztof Kozlowski unsigned int i;
1823*aa21a7d4SKrzysztof Kozlowski int ret;
1824*aa21a7d4SKrzysztof Kozlowski
1825*aa21a7d4SKrzysztof Kozlowski wsa884x = devm_kzalloc(dev, sizeof(*wsa884x), GFP_KERNEL);
1826*aa21a7d4SKrzysztof Kozlowski if (!wsa884x)
1827*aa21a7d4SKrzysztof Kozlowski return -ENOMEM;
1828*aa21a7d4SKrzysztof Kozlowski
1829*aa21a7d4SKrzysztof Kozlowski for (i = 0; i < WSA884X_SUPPLIES_NUM; i++)
1830*aa21a7d4SKrzysztof Kozlowski wsa884x->supplies[i].supply = wsa884x_supply_name[i];
1831*aa21a7d4SKrzysztof Kozlowski
1832*aa21a7d4SKrzysztof Kozlowski ret = devm_regulator_bulk_get(dev, WSA884X_SUPPLIES_NUM,
1833*aa21a7d4SKrzysztof Kozlowski wsa884x->supplies);
1834*aa21a7d4SKrzysztof Kozlowski if (ret)
1835*aa21a7d4SKrzysztof Kozlowski return dev_err_probe(dev, ret, "Failed to get regulators\n");
1836*aa21a7d4SKrzysztof Kozlowski
1837*aa21a7d4SKrzysztof Kozlowski ret = regulator_bulk_enable(WSA884X_SUPPLIES_NUM, wsa884x->supplies);
1838*aa21a7d4SKrzysztof Kozlowski if (ret)
1839*aa21a7d4SKrzysztof Kozlowski return dev_err_probe(dev, ret, "Failed to enable regulators\n");
1840*aa21a7d4SKrzysztof Kozlowski
1841*aa21a7d4SKrzysztof Kozlowski ret = devm_add_action_or_reset(dev, wsa884x_regulator_disable,
1842*aa21a7d4SKrzysztof Kozlowski wsa884x->supplies);
1843*aa21a7d4SKrzysztof Kozlowski if (ret)
1844*aa21a7d4SKrzysztof Kozlowski return ret;
1845*aa21a7d4SKrzysztof Kozlowski
1846*aa21a7d4SKrzysztof Kozlowski wsa884x->sd_n = devm_gpiod_get_optional(dev, "powerdown",
1847*aa21a7d4SKrzysztof Kozlowski GPIOD_OUT_HIGH);
1848*aa21a7d4SKrzysztof Kozlowski if (IS_ERR(wsa884x->sd_n))
1849*aa21a7d4SKrzysztof Kozlowski return dev_err_probe(dev, PTR_ERR(wsa884x->sd_n),
1850*aa21a7d4SKrzysztof Kozlowski "Shutdown Control GPIO not found\n");
1851*aa21a7d4SKrzysztof Kozlowski
1852*aa21a7d4SKrzysztof Kozlowski dev_set_drvdata(dev, wsa884x);
1853*aa21a7d4SKrzysztof Kozlowski wsa884x->slave = pdev;
1854*aa21a7d4SKrzysztof Kozlowski wsa884x->dev = dev;
1855*aa21a7d4SKrzysztof Kozlowski wsa884x->dev_mode = WSA884X_SPEAKER;
1856*aa21a7d4SKrzysztof Kozlowski wsa884x->sconfig.ch_count = 1;
1857*aa21a7d4SKrzysztof Kozlowski wsa884x->sconfig.bps = 1;
1858*aa21a7d4SKrzysztof Kozlowski wsa884x->sconfig.direction = SDW_DATA_DIR_RX;
1859*aa21a7d4SKrzysztof Kozlowski wsa884x->sconfig.type = SDW_STREAM_PDM;
1860*aa21a7d4SKrzysztof Kozlowski
1861*aa21a7d4SKrzysztof Kozlowski pdev->prop.sink_ports = GENMASK(WSA884X_MAX_SWR_PORTS, 0);
1862*aa21a7d4SKrzysztof Kozlowski pdev->prop.simple_clk_stop_capable = true;
1863*aa21a7d4SKrzysztof Kozlowski pdev->prop.sink_dpn_prop = wsa884x_sink_dpn_prop;
1864*aa21a7d4SKrzysztof Kozlowski pdev->prop.scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
1865*aa21a7d4SKrzysztof Kozlowski
1866*aa21a7d4SKrzysztof Kozlowski /* Bring out of reset */
1867*aa21a7d4SKrzysztof Kozlowski gpiod_direction_output(wsa884x->sd_n, 0);
1868*aa21a7d4SKrzysztof Kozlowski ret = devm_add_action_or_reset(dev, wsa884x_gpio_powerdown, wsa884x->sd_n);
1869*aa21a7d4SKrzysztof Kozlowski if (ret)
1870*aa21a7d4SKrzysztof Kozlowski return ret;
1871*aa21a7d4SKrzysztof Kozlowski
1872*aa21a7d4SKrzysztof Kozlowski wsa884x->regmap = devm_regmap_init_sdw(pdev, &wsa884x_regmap_config);
1873*aa21a7d4SKrzysztof Kozlowski if (IS_ERR(wsa884x->regmap))
1874*aa21a7d4SKrzysztof Kozlowski return dev_err_probe(dev, PTR_ERR(wsa884x->regmap),
1875*aa21a7d4SKrzysztof Kozlowski "regmap_init failed\n");
1876*aa21a7d4SKrzysztof Kozlowski
1877*aa21a7d4SKrzysztof Kozlowski /* Start in cache-only until device is enumerated */
1878*aa21a7d4SKrzysztof Kozlowski regcache_cache_only(wsa884x->regmap, true);
1879*aa21a7d4SKrzysztof Kozlowski wsa884x->hw_init = true;
1880*aa21a7d4SKrzysztof Kozlowski
1881*aa21a7d4SKrzysztof Kozlowski pm_runtime_set_autosuspend_delay(dev, 3000);
1882*aa21a7d4SKrzysztof Kozlowski pm_runtime_use_autosuspend(dev);
1883*aa21a7d4SKrzysztof Kozlowski pm_runtime_mark_last_busy(dev);
1884*aa21a7d4SKrzysztof Kozlowski pm_runtime_set_active(dev);
1885*aa21a7d4SKrzysztof Kozlowski pm_runtime_enable(dev);
1886*aa21a7d4SKrzysztof Kozlowski
1887*aa21a7d4SKrzysztof Kozlowski return devm_snd_soc_register_component(dev,
1888*aa21a7d4SKrzysztof Kozlowski &wsa884x_component_drv,
1889*aa21a7d4SKrzysztof Kozlowski wsa884x_dais,
1890*aa21a7d4SKrzysztof Kozlowski ARRAY_SIZE(wsa884x_dais));
1891*aa21a7d4SKrzysztof Kozlowski }
1892*aa21a7d4SKrzysztof Kozlowski
wsa884x_runtime_suspend(struct device * dev)1893*aa21a7d4SKrzysztof Kozlowski static int __maybe_unused wsa884x_runtime_suspend(struct device *dev)
1894*aa21a7d4SKrzysztof Kozlowski {
1895*aa21a7d4SKrzysztof Kozlowski struct regmap *regmap = dev_get_regmap(dev, NULL);
1896*aa21a7d4SKrzysztof Kozlowski
1897*aa21a7d4SKrzysztof Kozlowski regcache_cache_only(regmap, true);
1898*aa21a7d4SKrzysztof Kozlowski regcache_mark_dirty(regmap);
1899*aa21a7d4SKrzysztof Kozlowski
1900*aa21a7d4SKrzysztof Kozlowski return 0;
1901*aa21a7d4SKrzysztof Kozlowski }
1902*aa21a7d4SKrzysztof Kozlowski
wsa884x_runtime_resume(struct device * dev)1903*aa21a7d4SKrzysztof Kozlowski static int __maybe_unused wsa884x_runtime_resume(struct device *dev)
1904*aa21a7d4SKrzysztof Kozlowski {
1905*aa21a7d4SKrzysztof Kozlowski struct regmap *regmap = dev_get_regmap(dev, NULL);
1906*aa21a7d4SKrzysztof Kozlowski
1907*aa21a7d4SKrzysztof Kozlowski regcache_cache_only(regmap, false);
1908*aa21a7d4SKrzysztof Kozlowski regcache_sync(regmap);
1909*aa21a7d4SKrzysztof Kozlowski
1910*aa21a7d4SKrzysztof Kozlowski return 0;
1911*aa21a7d4SKrzysztof Kozlowski }
1912*aa21a7d4SKrzysztof Kozlowski
1913*aa21a7d4SKrzysztof Kozlowski static const struct dev_pm_ops wsa884x_pm_ops = {
1914*aa21a7d4SKrzysztof Kozlowski SET_RUNTIME_PM_OPS(wsa884x_runtime_suspend, wsa884x_runtime_resume, NULL)
1915*aa21a7d4SKrzysztof Kozlowski };
1916*aa21a7d4SKrzysztof Kozlowski
1917*aa21a7d4SKrzysztof Kozlowski static const struct sdw_device_id wsa884x_swr_id[] = {
1918*aa21a7d4SKrzysztof Kozlowski SDW_SLAVE_ENTRY(0x0217, 0x204, 0),
1919*aa21a7d4SKrzysztof Kozlowski {},
1920*aa21a7d4SKrzysztof Kozlowski };
1921*aa21a7d4SKrzysztof Kozlowski MODULE_DEVICE_TABLE(sdw, wsa884x_swr_id);
1922*aa21a7d4SKrzysztof Kozlowski
1923*aa21a7d4SKrzysztof Kozlowski static struct sdw_driver wsa884x_codec_driver = {
1924*aa21a7d4SKrzysztof Kozlowski .driver = {
1925*aa21a7d4SKrzysztof Kozlowski .name = "wsa884x-codec",
1926*aa21a7d4SKrzysztof Kozlowski .pm = &wsa884x_pm_ops,
1927*aa21a7d4SKrzysztof Kozlowski },
1928*aa21a7d4SKrzysztof Kozlowski .probe = wsa884x_probe,
1929*aa21a7d4SKrzysztof Kozlowski .ops = &wsa884x_slave_ops,
1930*aa21a7d4SKrzysztof Kozlowski .id_table = wsa884x_swr_id,
1931*aa21a7d4SKrzysztof Kozlowski };
1932*aa21a7d4SKrzysztof Kozlowski module_sdw_driver(wsa884x_codec_driver);
1933*aa21a7d4SKrzysztof Kozlowski
1934*aa21a7d4SKrzysztof Kozlowski MODULE_AUTHOR("Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>");
1935*aa21a7d4SKrzysztof Kozlowski MODULE_DESCRIPTION("WSA884x codec driver");
1936*aa21a7d4SKrzysztof Kozlowski MODULE_LICENSE("GPL");
1937