1 /* 2 * wm_hubs.c -- WM8993/4 common code 3 * 4 * Copyright 2009 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/mfd/wm8994/registers.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/soc.h> 25 #include <sound/initval.h> 26 #include <sound/tlv.h> 27 28 #include "wm8993.h" 29 #include "wm_hubs.h" 30 31 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0); 32 EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv); 33 34 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0); 35 static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0); 36 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1); 37 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0); 38 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0); 39 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1); 40 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0); 41 static const unsigned int spkboost_tlv[] = { 42 TLV_DB_RANGE_HEAD(2), 43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), 45 }; 46 static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0); 47 48 static const char *speaker_ref_text[] = { 49 "SPKVDD/2", 50 "VMID", 51 }; 52 53 static const struct soc_enum speaker_ref = 54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text); 55 56 static const char *speaker_mode_text[] = { 57 "Class D", 58 "Class AB", 59 }; 60 61 static const struct soc_enum speaker_mode = 62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text); 63 64 static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op) 65 { 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 67 unsigned int reg; 68 int count = 0; 69 int timeout; 70 unsigned int val; 71 72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1; 73 74 /* Trigger the command */ 75 snd_soc_write(codec, WM8993_DC_SERVO_0, val); 76 77 dev_dbg(codec->dev, "Waiting for DC servo...\n"); 78 79 if (hubs->dcs_done_irq) 80 timeout = 4; 81 else 82 timeout = 400; 83 84 do { 85 count++; 86 87 if (hubs->dcs_done_irq) 88 wait_for_completion_timeout(&hubs->dcs_done, 89 msecs_to_jiffies(250)); 90 else 91 msleep(1); 92 93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0); 94 dev_dbg(codec->dev, "DC servo: %x\n", reg); 95 } while (reg & op && count < timeout); 96 97 if (reg & op) 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n", 99 op); 100 } 101 102 irqreturn_t wm_hubs_dcs_done(int irq, void *data) 103 { 104 struct wm_hubs_data *hubs = data; 105 106 complete(&hubs->dcs_done); 107 108 return IRQ_HANDLED; 109 } 110 EXPORT_SYMBOL_GPL(wm_hubs_dcs_done); 111 112 /* 113 * Startup calibration of the DC servo 114 */ 115 static void calibrate_dc_servo(struct snd_soc_codec *codec) 116 { 117 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 118 s8 offset; 119 u16 reg, reg_l, reg_r, dcs_cfg, dcs_reg; 120 121 switch (hubs->dcs_readback_mode) { 122 case 2: 123 dcs_reg = WM8994_DC_SERVO_4E; 124 break; 125 default: 126 dcs_reg = WM8993_DC_SERVO_3; 127 break; 128 } 129 130 /* If we're using a digital only path and have a previously 131 * callibrated DC servo offset stored then use that. */ 132 if (hubs->class_w && hubs->class_w_dcs) { 133 dev_dbg(codec->dev, "Using cached DC servo offset %x\n", 134 hubs->class_w_dcs); 135 snd_soc_write(codec, dcs_reg, hubs->class_w_dcs); 136 wait_for_dc_servo(codec, 137 WM8993_DCS_TRIG_DAC_WR_0 | 138 WM8993_DCS_TRIG_DAC_WR_1); 139 return; 140 } 141 142 if (hubs->series_startup) { 143 /* Set for 32 series updates */ 144 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 145 WM8993_DCS_SERIES_NO_01_MASK, 146 32 << WM8993_DCS_SERIES_NO_01_SHIFT); 147 wait_for_dc_servo(codec, 148 WM8993_DCS_TRIG_SERIES_0 | 149 WM8993_DCS_TRIG_SERIES_1); 150 } else { 151 wait_for_dc_servo(codec, 152 WM8993_DCS_TRIG_STARTUP_0 | 153 WM8993_DCS_TRIG_STARTUP_1); 154 } 155 156 /* Different chips in the family support different readback 157 * methods. 158 */ 159 switch (hubs->dcs_readback_mode) { 160 case 0: 161 reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1) 162 & WM8993_DCS_INTEG_CHAN_0_MASK; 163 reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2) 164 & WM8993_DCS_INTEG_CHAN_1_MASK; 165 break; 166 case 2: 167 case 1: 168 reg = snd_soc_read(codec, dcs_reg); 169 reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK) 170 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT; 171 reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK; 172 break; 173 default: 174 WARN(1, "Unknown DCS readback method\n"); 175 return; 176 } 177 178 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r); 179 180 /* Apply correction to DC servo result */ 181 if (hubs->dcs_codes_l || hubs->dcs_codes_r) { 182 dev_dbg(codec->dev, 183 "Applying %d/%d code DC servo correction\n", 184 hubs->dcs_codes_l, hubs->dcs_codes_r); 185 186 /* HPOUT1R */ 187 offset = reg_r; 188 offset += hubs->dcs_codes_r; 189 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 190 191 /* HPOUT1L */ 192 offset = reg_l; 193 offset += hubs->dcs_codes_l; 194 dcs_cfg |= (u8)offset; 195 196 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg); 197 198 /* Do it */ 199 snd_soc_write(codec, dcs_reg, dcs_cfg); 200 wait_for_dc_servo(codec, 201 WM8993_DCS_TRIG_DAC_WR_0 | 202 WM8993_DCS_TRIG_DAC_WR_1); 203 } else { 204 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 205 dcs_cfg |= reg_l; 206 } 207 208 /* Save the callibrated offset if we're in class W mode and 209 * therefore don't have any analogue signal mixed in. */ 210 if (hubs->class_w && !hubs->no_cache_class_w) 211 hubs->class_w_dcs = dcs_cfg; 212 } 213 214 /* 215 * Update the DC servo calibration on gain changes 216 */ 217 static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, 218 struct snd_ctl_elem_value *ucontrol) 219 { 220 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 221 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 222 int ret; 223 224 ret = snd_soc_put_volsw(kcontrol, ucontrol); 225 226 /* Updating the analogue gains invalidates the DC servo cache */ 227 hubs->class_w_dcs = 0; 228 229 /* If we're applying an offset correction then updating the 230 * callibration would be likely to introduce further offsets. */ 231 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update) 232 return ret; 233 234 /* Only need to do this if the outputs are active */ 235 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1) 236 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA)) 237 snd_soc_update_bits(codec, 238 WM8993_DC_SERVO_0, 239 WM8993_DCS_TRIG_SINGLE_0 | 240 WM8993_DCS_TRIG_SINGLE_1, 241 WM8993_DCS_TRIG_SINGLE_0 | 242 WM8993_DCS_TRIG_SINGLE_1); 243 244 return ret; 245 } 246 247 static const struct snd_kcontrol_new analogue_snd_controls[] = { 248 SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 249 inpga_tlv), 250 SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 251 SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 252 253 SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 254 inpga_tlv), 255 SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 256 SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 257 258 259 SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 260 inpga_tlv), 261 SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 262 SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 263 264 SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 265 inpga_tlv), 266 SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 267 SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 268 269 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0, 270 inmix_sw_tlv), 271 SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0, 272 inmix_sw_tlv), 273 SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0, 274 inmix_tlv), 275 SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv), 276 SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0, 277 inmix_tlv), 278 279 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0, 280 inmix_sw_tlv), 281 SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0, 282 inmix_sw_tlv), 283 SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0, 284 inmix_tlv), 285 SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv), 286 SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0, 287 inmix_tlv), 288 289 SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1, 290 outmix_tlv), 291 SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1, 292 outmix_tlv), 293 SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1, 294 outmix_tlv), 295 SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1, 296 outmix_tlv), 297 SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1, 298 outmix_tlv), 299 SOC_SINGLE_TLV("Left Output Mixer Right Input Volume", 300 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv), 301 SOC_SINGLE_TLV("Left Output Mixer Left Input Volume", 302 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv), 303 SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1, 304 outmix_tlv), 305 306 SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume", 307 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 308 SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume", 309 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv), 310 SOC_SINGLE_TLV("Right Output Mixer IN1L Volume", 311 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv), 312 SOC_SINGLE_TLV("Right Output Mixer IN1R Volume", 313 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv), 314 SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume", 315 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv), 316 SOC_SINGLE_TLV("Right Output Mixer Left Input Volume", 317 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv), 318 SOC_SINGLE_TLV("Right Output Mixer Right Input Volume", 319 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 320 SOC_SINGLE_TLV("Right Output Mixer DAC Volume", 321 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv), 322 323 SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME, 324 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv), 325 SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME, 326 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0), 327 SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME, 328 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0), 329 330 SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1), 331 SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv), 332 333 SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION, 334 5, 1, 1, wm_hubs_spkmix_tlv), 335 SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION, 336 4, 1, 1, wm_hubs_spkmix_tlv), 337 SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION, 338 3, 1, 1, wm_hubs_spkmix_tlv), 339 340 SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION, 341 5, 1, 1, wm_hubs_spkmix_tlv), 342 SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION, 343 4, 1, 1, wm_hubs_spkmix_tlv), 344 SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION, 345 3, 1, 1, wm_hubs_spkmix_tlv), 346 347 SOC_DOUBLE_R_TLV("Speaker Mixer Volume", 348 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION, 349 0, 3, 1, spkmixout_tlv), 350 SOC_DOUBLE_R_TLV("Speaker Volume", 351 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 352 0, 63, 0, outpga_tlv), 353 SOC_DOUBLE_R("Speaker Switch", 354 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 355 6, 1, 0), 356 SOC_DOUBLE_R("Speaker ZC Switch", 357 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 358 7, 1, 0), 359 SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0, 360 spkboost_tlv), 361 SOC_ENUM("Speaker Reference", speaker_ref), 362 SOC_ENUM("Speaker Mode", speaker_mode), 363 364 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", 365 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME, 366 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo, 367 outpga_tlv), 368 369 SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME, 370 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0), 371 SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME, 372 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0), 373 374 SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1), 375 SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1), 376 SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1, 377 line_tlv), 378 379 SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1), 380 SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1), 381 SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1, 382 line_tlv), 383 }; 384 385 static int hp_supply_event(struct snd_soc_dapm_widget *w, 386 struct snd_kcontrol *kcontrol, int event) 387 { 388 struct snd_soc_codec *codec = w->codec; 389 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 390 391 switch (event) { 392 case SND_SOC_DAPM_PRE_PMU: 393 switch (hubs->hp_startup_mode) { 394 case 0: 395 break; 396 case 1: 397 /* Enable the headphone amp */ 398 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 399 WM8993_HPOUT1L_ENA | 400 WM8993_HPOUT1R_ENA, 401 WM8993_HPOUT1L_ENA | 402 WM8993_HPOUT1R_ENA); 403 404 /* Enable the second stage */ 405 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 406 WM8993_HPOUT1L_DLY | 407 WM8993_HPOUT1R_DLY, 408 WM8993_HPOUT1L_DLY | 409 WM8993_HPOUT1R_DLY); 410 break; 411 default: 412 dev_err(codec->dev, "Unknown HP startup mode %d\n", 413 hubs->hp_startup_mode); 414 break; 415 } 416 417 case SND_SOC_DAPM_PRE_PMD: 418 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 419 WM8993_CP_ENA, 0); 420 break; 421 } 422 423 return 0; 424 } 425 426 static int hp_event(struct snd_soc_dapm_widget *w, 427 struct snd_kcontrol *kcontrol, int event) 428 { 429 struct snd_soc_codec *codec = w->codec; 430 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0); 431 432 switch (event) { 433 case SND_SOC_DAPM_POST_PMU: 434 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 435 WM8993_CP_ENA, WM8993_CP_ENA); 436 437 msleep(5); 438 439 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 440 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 441 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA); 442 443 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY; 444 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 445 446 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 447 WM8993_DCS_TIMER_PERIOD_01_MASK, 0); 448 449 calibrate_dc_servo(codec); 450 451 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT | 452 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT; 453 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 454 break; 455 456 case SND_SOC_DAPM_PRE_PMD: 457 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 458 WM8993_HPOUT1L_OUTP | 459 WM8993_HPOUT1R_OUTP | 460 WM8993_HPOUT1L_RMV_SHORT | 461 WM8993_HPOUT1R_RMV_SHORT, 0); 462 463 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 464 WM8993_HPOUT1L_DLY | 465 WM8993_HPOUT1R_DLY, 0); 466 467 snd_soc_write(codec, WM8993_DC_SERVO_0, 0); 468 469 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 470 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 471 0); 472 break; 473 } 474 475 return 0; 476 } 477 478 static int earpiece_event(struct snd_soc_dapm_widget *w, 479 struct snd_kcontrol *control, int event) 480 { 481 struct snd_soc_codec *codec = w->codec; 482 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA; 483 484 switch (event) { 485 case SND_SOC_DAPM_PRE_PMU: 486 reg |= WM8993_HPOUT2_IN_ENA; 487 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 488 udelay(50); 489 break; 490 491 case SND_SOC_DAPM_POST_PMD: 492 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 493 break; 494 495 default: 496 BUG(); 497 break; 498 } 499 500 return 0; 501 } 502 503 static int lineout_event(struct snd_soc_dapm_widget *w, 504 struct snd_kcontrol *control, int event) 505 { 506 struct snd_soc_codec *codec = w->codec; 507 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 508 bool *flag; 509 510 switch (w->shift) { 511 case WM8993_LINEOUT1N_ENA_SHIFT: 512 flag = &hubs->lineout1n_ena; 513 break; 514 case WM8993_LINEOUT1P_ENA_SHIFT: 515 flag = &hubs->lineout1p_ena; 516 break; 517 case WM8993_LINEOUT2N_ENA_SHIFT: 518 flag = &hubs->lineout2n_ena; 519 break; 520 case WM8993_LINEOUT2P_ENA_SHIFT: 521 flag = &hubs->lineout2p_ena; 522 break; 523 default: 524 WARN(1, "Unknown line output"); 525 return -EINVAL; 526 } 527 528 *flag = SND_SOC_DAPM_EVENT_ON(event); 529 530 return 0; 531 } 532 533 static const struct snd_kcontrol_new in1l_pga[] = { 534 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0), 535 SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0), 536 }; 537 538 static const struct snd_kcontrol_new in1r_pga[] = { 539 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0), 540 SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0), 541 }; 542 543 static const struct snd_kcontrol_new in2l_pga[] = { 544 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0), 545 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0), 546 }; 547 548 static const struct snd_kcontrol_new in2r_pga[] = { 549 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0), 550 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0), 551 }; 552 553 static const struct snd_kcontrol_new mixinl[] = { 554 SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0), 555 SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0), 556 }; 557 558 static const struct snd_kcontrol_new mixinr[] = { 559 SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0), 560 SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0), 561 }; 562 563 static const struct snd_kcontrol_new left_output_mixer[] = { 564 SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0), 565 SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0), 566 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0), 567 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0), 568 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0), 569 SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0), 570 SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0), 571 SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0), 572 }; 573 574 static const struct snd_kcontrol_new right_output_mixer[] = { 575 SOC_DAPM_SINGLE("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0), 576 SOC_DAPM_SINGLE("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0), 577 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0), 578 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0), 579 SOC_DAPM_SINGLE("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0), 580 SOC_DAPM_SINGLE("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0), 581 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0), 582 SOC_DAPM_SINGLE("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0), 583 }; 584 585 static const struct snd_kcontrol_new earpiece_mixer[] = { 586 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0), 587 SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0), 588 SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0), 589 }; 590 591 static const struct snd_kcontrol_new left_speaker_boost[] = { 592 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0), 593 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0), 594 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0), 595 }; 596 597 static const struct snd_kcontrol_new right_speaker_boost[] = { 598 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0), 599 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0), 600 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0), 601 }; 602 603 static const struct snd_kcontrol_new line1_mix[] = { 604 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0), 605 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0), 606 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 607 }; 608 609 static const struct snd_kcontrol_new line1n_mix[] = { 610 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0), 611 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0), 612 }; 613 614 static const struct snd_kcontrol_new line1p_mix[] = { 615 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 616 }; 617 618 static const struct snd_kcontrol_new line2_mix[] = { 619 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0), 620 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0), 621 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 622 }; 623 624 static const struct snd_kcontrol_new line2n_mix[] = { 625 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0), 626 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0), 627 }; 628 629 static const struct snd_kcontrol_new line2p_mix[] = { 630 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 631 }; 632 633 static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = { 634 SND_SOC_DAPM_INPUT("IN1LN"), 635 SND_SOC_DAPM_INPUT("IN1LP"), 636 SND_SOC_DAPM_INPUT("IN2LN"), 637 SND_SOC_DAPM_INPUT("IN2LP:VXRN"), 638 SND_SOC_DAPM_INPUT("IN1RN"), 639 SND_SOC_DAPM_INPUT("IN1RP"), 640 SND_SOC_DAPM_INPUT("IN2RN"), 641 SND_SOC_DAPM_INPUT("IN2RP:VXRP"), 642 643 SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, NULL, 0), 644 SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, NULL, 0), 645 646 SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0, 647 in1l_pga, ARRAY_SIZE(in1l_pga)), 648 SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0, 649 in1r_pga, ARRAY_SIZE(in1r_pga)), 650 651 SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0, 652 in2l_pga, ARRAY_SIZE(in2l_pga)), 653 SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0, 654 in2r_pga, ARRAY_SIZE(in2r_pga)), 655 656 SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0, 657 mixinl, ARRAY_SIZE(mixinl)), 658 SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0, 659 mixinr, ARRAY_SIZE(mixinr)), 660 661 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0, 662 left_output_mixer, ARRAY_SIZE(left_output_mixer)), 663 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0, 664 right_output_mixer, ARRAY_SIZE(right_output_mixer)), 665 666 SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0), 667 SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0), 668 669 SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event, 670 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 671 SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0, 672 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 673 674 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 675 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)), 676 SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0, 677 NULL, 0, earpiece_event, 678 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 679 680 SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0, 681 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)), 682 SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0, 683 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)), 684 685 SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0), 686 SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0, 687 NULL, 0), 688 SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0, 689 NULL, 0), 690 691 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0, 692 line1_mix, ARRAY_SIZE(line1_mix)), 693 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0, 694 line2_mix, ARRAY_SIZE(line2_mix)), 695 696 SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0, 697 line1n_mix, ARRAY_SIZE(line1n_mix)), 698 SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0, 699 line1p_mix, ARRAY_SIZE(line1p_mix)), 700 SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0, 701 line2n_mix, ARRAY_SIZE(line2n_mix)), 702 SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0, 703 line2p_mix, ARRAY_SIZE(line2p_mix)), 704 705 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0, 706 NULL, 0, lineout_event, 707 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 708 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0, 709 NULL, 0, lineout_event, 710 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 711 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0, 712 NULL, 0, lineout_event, 713 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 714 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0, 715 NULL, 0, lineout_event, 716 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 717 718 SND_SOC_DAPM_OUTPUT("SPKOUTLP"), 719 SND_SOC_DAPM_OUTPUT("SPKOUTLN"), 720 SND_SOC_DAPM_OUTPUT("SPKOUTRP"), 721 SND_SOC_DAPM_OUTPUT("SPKOUTRN"), 722 SND_SOC_DAPM_OUTPUT("HPOUT1L"), 723 SND_SOC_DAPM_OUTPUT("HPOUT1R"), 724 SND_SOC_DAPM_OUTPUT("HPOUT2P"), 725 SND_SOC_DAPM_OUTPUT("HPOUT2N"), 726 SND_SOC_DAPM_OUTPUT("LINEOUT1P"), 727 SND_SOC_DAPM_OUTPUT("LINEOUT1N"), 728 SND_SOC_DAPM_OUTPUT("LINEOUT2P"), 729 SND_SOC_DAPM_OUTPUT("LINEOUT2N"), 730 }; 731 732 static const struct snd_soc_dapm_route analogue_routes[] = { 733 { "MICBIAS1", NULL, "CLK_SYS" }, 734 { "MICBIAS2", NULL, "CLK_SYS" }, 735 736 { "IN1L PGA", "IN1LP Switch", "IN1LP" }, 737 { "IN1L PGA", "IN1LN Switch", "IN1LN" }, 738 739 { "IN1L PGA", NULL, "VMID" }, 740 { "IN1R PGA", NULL, "VMID" }, 741 { "IN2L PGA", NULL, "VMID" }, 742 { "IN2R PGA", NULL, "VMID" }, 743 744 { "IN1R PGA", "IN1RP Switch", "IN1RP" }, 745 { "IN1R PGA", "IN1RN Switch", "IN1RN" }, 746 747 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" }, 748 { "IN2L PGA", "IN2LN Switch", "IN2LN" }, 749 750 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" }, 751 { "IN2R PGA", "IN2RN Switch", "IN2RN" }, 752 753 { "Direct Voice", NULL, "IN2LP:VXRN" }, 754 { "Direct Voice", NULL, "IN2RP:VXRP" }, 755 756 { "MIXINL", "IN1L Switch", "IN1L PGA" }, 757 { "MIXINL", "IN2L Switch", "IN2L PGA" }, 758 { "MIXINL", NULL, "Direct Voice" }, 759 { "MIXINL", NULL, "IN1LP" }, 760 { "MIXINL", NULL, "Left Output Mixer" }, 761 { "MIXINL", NULL, "VMID" }, 762 763 { "MIXINR", "IN1R Switch", "IN1R PGA" }, 764 { "MIXINR", "IN2R Switch", "IN2R PGA" }, 765 { "MIXINR", NULL, "Direct Voice" }, 766 { "MIXINR", NULL, "IN1RP" }, 767 { "MIXINR", NULL, "Right Output Mixer" }, 768 { "MIXINR", NULL, "VMID" }, 769 770 { "ADCL", NULL, "MIXINL" }, 771 { "ADCR", NULL, "MIXINR" }, 772 773 { "Left Output Mixer", "Left Input Switch", "MIXINL" }, 774 { "Left Output Mixer", "Right Input Switch", "MIXINR" }, 775 { "Left Output Mixer", "IN2RN Switch", "IN2RN" }, 776 { "Left Output Mixer", "IN2LN Switch", "IN2LN" }, 777 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" }, 778 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" }, 779 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" }, 780 781 { "Right Output Mixer", "Left Input Switch", "MIXINL" }, 782 { "Right Output Mixer", "Right Input Switch", "MIXINR" }, 783 { "Right Output Mixer", "IN2LN Switch", "IN2LN" }, 784 { "Right Output Mixer", "IN2RN Switch", "IN2RN" }, 785 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" }, 786 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" }, 787 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" }, 788 789 { "Left Output PGA", NULL, "Left Output Mixer" }, 790 { "Left Output PGA", NULL, "TOCLK" }, 791 792 { "Right Output PGA", NULL, "Right Output Mixer" }, 793 { "Right Output PGA", NULL, "TOCLK" }, 794 795 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" }, 796 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" }, 797 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" }, 798 799 { "Earpiece Driver", NULL, "VMID" }, 800 { "Earpiece Driver", NULL, "Earpiece Mixer" }, 801 { "HPOUT2N", NULL, "Earpiece Driver" }, 802 { "HPOUT2P", NULL, "Earpiece Driver" }, 803 804 { "SPKL", "Input Switch", "MIXINL" }, 805 { "SPKL", "IN1LP Switch", "IN1LP" }, 806 { "SPKL", "Output Switch", "Left Output PGA" }, 807 { "SPKL", NULL, "TOCLK" }, 808 809 { "SPKR", "Input Switch", "MIXINR" }, 810 { "SPKR", "IN1RP Switch", "IN1RP" }, 811 { "SPKR", "Output Switch", "Right Output PGA" }, 812 { "SPKR", NULL, "TOCLK" }, 813 814 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" }, 815 { "SPKL Boost", "SPKL Switch", "SPKL" }, 816 { "SPKL Boost", "SPKR Switch", "SPKR" }, 817 818 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" }, 819 { "SPKR Boost", "SPKR Switch", "SPKR" }, 820 { "SPKR Boost", "SPKL Switch", "SPKL" }, 821 822 { "SPKL Driver", NULL, "VMID" }, 823 { "SPKL Driver", NULL, "SPKL Boost" }, 824 { "SPKL Driver", NULL, "CLK_SYS" }, 825 { "SPKL Driver", NULL, "TSHUT" }, 826 827 { "SPKR Driver", NULL, "VMID" }, 828 { "SPKR Driver", NULL, "SPKR Boost" }, 829 { "SPKR Driver", NULL, "CLK_SYS" }, 830 { "SPKR Driver", NULL, "TSHUT" }, 831 832 { "SPKOUTLP", NULL, "SPKL Driver" }, 833 { "SPKOUTLN", NULL, "SPKL Driver" }, 834 { "SPKOUTRP", NULL, "SPKR Driver" }, 835 { "SPKOUTRN", NULL, "SPKR Driver" }, 836 837 { "Left Headphone Mux", "Mixer", "Left Output PGA" }, 838 { "Right Headphone Mux", "Mixer", "Right Output PGA" }, 839 840 { "Headphone PGA", NULL, "Left Headphone Mux" }, 841 { "Headphone PGA", NULL, "Right Headphone Mux" }, 842 { "Headphone PGA", NULL, "VMID" }, 843 { "Headphone PGA", NULL, "CLK_SYS" }, 844 { "Headphone PGA", NULL, "Headphone Supply" }, 845 846 { "HPOUT1L", NULL, "Headphone PGA" }, 847 { "HPOUT1R", NULL, "Headphone PGA" }, 848 849 { "LINEOUT1N Driver", NULL, "VMID" }, 850 { "LINEOUT1P Driver", NULL, "VMID" }, 851 { "LINEOUT2N Driver", NULL, "VMID" }, 852 { "LINEOUT2P Driver", NULL, "VMID" }, 853 854 { "LINEOUT1N", NULL, "LINEOUT1N Driver" }, 855 { "LINEOUT1P", NULL, "LINEOUT1P Driver" }, 856 { "LINEOUT2N", NULL, "LINEOUT2N Driver" }, 857 { "LINEOUT2P", NULL, "LINEOUT2P Driver" }, 858 }; 859 860 static const struct snd_soc_dapm_route lineout1_diff_routes[] = { 861 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" }, 862 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" }, 863 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" }, 864 865 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" }, 866 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" }, 867 }; 868 869 static const struct snd_soc_dapm_route lineout1_se_routes[] = { 870 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" }, 871 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" }, 872 873 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" }, 874 875 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" }, 876 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" }, 877 }; 878 879 static const struct snd_soc_dapm_route lineout2_diff_routes[] = { 880 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" }, 881 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" }, 882 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" }, 883 884 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" }, 885 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" }, 886 }; 887 888 static const struct snd_soc_dapm_route lineout2_se_routes[] = { 889 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" }, 890 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" }, 891 892 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" }, 893 894 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" }, 895 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" }, 896 }; 897 898 int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec) 899 { 900 struct snd_soc_dapm_context *dapm = &codec->dapm; 901 902 /* Latch volume update bits & default ZC on */ 903 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 904 WM8993_IN1_VU, WM8993_IN1_VU); 905 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 906 WM8993_IN1_VU, WM8993_IN1_VU); 907 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 908 WM8993_IN2_VU, WM8993_IN2_VU); 909 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 910 WM8993_IN2_VU, WM8993_IN2_VU); 911 912 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT, 913 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 914 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT, 915 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 916 917 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME, 918 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC, 919 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC); 920 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME, 921 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC, 922 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC); 923 924 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME, 925 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU, 926 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU); 927 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME, 928 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU, 929 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU); 930 931 snd_soc_add_codec_controls(codec, analogue_snd_controls, 932 ARRAY_SIZE(analogue_snd_controls)); 933 934 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets, 935 ARRAY_SIZE(analogue_dapm_widgets)); 936 return 0; 937 } 938 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls); 939 940 int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec, 941 int lineout1_diff, int lineout2_diff) 942 { 943 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 944 struct snd_soc_dapm_context *dapm = &codec->dapm; 945 946 init_completion(&hubs->dcs_done); 947 948 snd_soc_dapm_add_routes(dapm, analogue_routes, 949 ARRAY_SIZE(analogue_routes)); 950 951 if (lineout1_diff) 952 snd_soc_dapm_add_routes(dapm, 953 lineout1_diff_routes, 954 ARRAY_SIZE(lineout1_diff_routes)); 955 else 956 snd_soc_dapm_add_routes(dapm, 957 lineout1_se_routes, 958 ARRAY_SIZE(lineout1_se_routes)); 959 960 if (lineout2_diff) 961 snd_soc_dapm_add_routes(dapm, 962 lineout2_diff_routes, 963 ARRAY_SIZE(lineout2_diff_routes)); 964 else 965 snd_soc_dapm_add_routes(dapm, 966 lineout2_se_routes, 967 ARRAY_SIZE(lineout2_se_routes)); 968 969 return 0; 970 } 971 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes); 972 973 int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec, 974 int lineout1_diff, int lineout2_diff, 975 int lineout1fb, int lineout2fb, 976 int jd_scthr, int jd_thr, int micbias1_lvl, 977 int micbias2_lvl) 978 { 979 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 980 981 hubs->lineout1_se = !lineout1_diff; 982 hubs->lineout2_se = !lineout2_diff; 983 984 if (!lineout1_diff) 985 snd_soc_update_bits(codec, WM8993_LINE_MIXER1, 986 WM8993_LINEOUT1_MODE, 987 WM8993_LINEOUT1_MODE); 988 if (!lineout2_diff) 989 snd_soc_update_bits(codec, WM8993_LINE_MIXER2, 990 WM8993_LINEOUT2_MODE, 991 WM8993_LINEOUT2_MODE); 992 993 if (!lineout1_diff && !lineout2_diff) 994 snd_soc_update_bits(codec, WM8993_ANTIPOP1, 995 WM8993_LINEOUT_VMID_BUF_ENA, 996 WM8993_LINEOUT_VMID_BUF_ENA); 997 998 if (lineout1fb) 999 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1000 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB); 1001 1002 if (lineout2fb) 1003 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1004 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB); 1005 1006 snd_soc_update_bits(codec, WM8993_MICBIAS, 1007 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK | 1008 WM8993_MICB1_LVL | WM8993_MICB2_LVL, 1009 jd_scthr << WM8993_JD_SCTHR_SHIFT | 1010 jd_thr << WM8993_JD_THR_SHIFT | 1011 micbias1_lvl | 1012 micbias2_lvl << WM8993_MICB2_LVL_SHIFT); 1013 1014 return 0; 1015 } 1016 EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata); 1017 1018 void wm_hubs_vmid_ena(struct snd_soc_codec *codec) 1019 { 1020 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1021 int val = 0; 1022 1023 if (hubs->lineout1_se) 1024 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1025 1026 if (hubs->lineout2_se) 1027 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1028 1029 /* Enable the line outputs while we power up */ 1030 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val); 1031 } 1032 EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena); 1033 1034 void wm_hubs_set_bias_level(struct snd_soc_codec *codec, 1035 enum snd_soc_bias_level level) 1036 { 1037 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1038 int mask, val; 1039 1040 switch (level) { 1041 case SND_SOC_BIAS_STANDBY: 1042 /* Clamp the inputs to VMID while we ramp to charge caps */ 1043 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1044 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP); 1045 break; 1046 1047 case SND_SOC_BIAS_ON: 1048 /* Turn off any unneded single ended outputs */ 1049 val = 0; 1050 mask = 0; 1051 1052 if (hubs->lineout1_se) 1053 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1054 1055 if (hubs->lineout2_se) 1056 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1057 1058 if (hubs->lineout1_se && hubs->lineout1n_ena) 1059 val |= WM8993_LINEOUT1N_ENA; 1060 1061 if (hubs->lineout1_se && hubs->lineout1p_ena) 1062 val |= WM8993_LINEOUT1P_ENA; 1063 1064 if (hubs->lineout2_se && hubs->lineout2n_ena) 1065 val |= WM8993_LINEOUT2N_ENA; 1066 1067 if (hubs->lineout2_se && hubs->lineout2p_ena) 1068 val |= WM8993_LINEOUT2P_ENA; 1069 1070 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, 1071 mask, val); 1072 1073 /* Remove the input clamps */ 1074 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1075 WM8993_INPUTS_CLAMP, 0); 1076 break; 1077 1078 default: 1079 break; 1080 } 1081 } 1082 EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level); 1083 1084 MODULE_DESCRIPTION("Shared support for Wolfson hubs products"); 1085 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 1086 MODULE_LICENSE("GPL"); 1087