1 /* 2 * wm_hubs.c -- WM8993/4 common code 3 * 4 * Copyright 2009-12 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/mfd/wm8994/registers.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/soc.h> 25 #include <sound/initval.h> 26 #include <sound/tlv.h> 27 28 #include "wm8993.h" 29 #include "wm_hubs.h" 30 31 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0); 32 EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv); 33 34 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0); 35 static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0); 36 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1); 37 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0); 38 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0); 39 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1); 40 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0); 41 static const unsigned int spkboost_tlv[] = { 42 TLV_DB_RANGE_HEAD(2), 43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), 45 }; 46 static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0); 47 48 static const char *speaker_ref_text[] = { 49 "SPKVDD/2", 50 "VMID", 51 }; 52 53 static const struct soc_enum speaker_ref = 54 SOC_ENUM_SINGLE(WM8993_SPEAKER_MIXER, 8, 2, speaker_ref_text); 55 56 static const char *speaker_mode_text[] = { 57 "Class D", 58 "Class AB", 59 }; 60 61 static const struct soc_enum speaker_mode = 62 SOC_ENUM_SINGLE(WM8993_SPKMIXR_ATTENUATION, 8, 2, speaker_mode_text); 63 64 static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op) 65 { 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 67 unsigned int reg; 68 int count = 0; 69 int timeout; 70 unsigned int val; 71 72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1; 73 74 /* Trigger the command */ 75 snd_soc_write(codec, WM8993_DC_SERVO_0, val); 76 77 dev_dbg(codec->dev, "Waiting for DC servo...\n"); 78 79 if (hubs->dcs_done_irq) 80 timeout = 4; 81 else 82 timeout = 400; 83 84 do { 85 count++; 86 87 if (hubs->dcs_done_irq) 88 wait_for_completion_timeout(&hubs->dcs_done, 89 msecs_to_jiffies(250)); 90 else 91 msleep(1); 92 93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0); 94 dev_dbg(codec->dev, "DC servo: %x\n", reg); 95 } while (reg & op && count < timeout); 96 97 if (reg & op) 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n", 99 op); 100 } 101 102 irqreturn_t wm_hubs_dcs_done(int irq, void *data) 103 { 104 struct wm_hubs_data *hubs = data; 105 106 complete(&hubs->dcs_done); 107 108 return IRQ_HANDLED; 109 } 110 EXPORT_SYMBOL_GPL(wm_hubs_dcs_done); 111 112 static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec) 113 { 114 int reg; 115 116 /* If we're going via the mixer we'll need to do additional checks */ 117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1); 118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) { 119 if (reg & ~WM8993_DACL_TO_MIXOUTL) { 120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n", 121 reg & ~WM8993_DACL_TO_HPOUT1L); 122 return false; 123 } else { 124 dev_vdbg(codec->dev, "HPL connected to mixer\n"); 125 } 126 } else { 127 dev_vdbg(codec->dev, "HPL connected to DAC\n"); 128 } 129 130 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2); 131 if (!(reg & WM8993_DACR_TO_HPOUT1R)) { 132 if (reg & ~WM8993_DACR_TO_MIXOUTR) { 133 dev_vdbg(codec->dev, "Analogue paths connected: %x\n", 134 reg & ~WM8993_DACR_TO_HPOUT1R); 135 return false; 136 } else { 137 dev_vdbg(codec->dev, "HPR connected to mixer\n"); 138 } 139 } else { 140 dev_vdbg(codec->dev, "HPR connected to DAC\n"); 141 } 142 143 return true; 144 } 145 146 struct wm_hubs_dcs_cache { 147 struct list_head list; 148 unsigned int left; 149 unsigned int right; 150 u16 dcs_cfg; 151 }; 152 153 static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec, 154 struct wm_hubs_dcs_cache **entry) 155 { 156 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 157 struct wm_hubs_dcs_cache *cache; 158 unsigned int left, right; 159 160 left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); 161 left &= WM8993_HPOUT1L_VOL_MASK; 162 163 right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME); 164 right &= WM8993_HPOUT1R_VOL_MASK; 165 166 list_for_each_entry(cache, &hubs->dcs_cache, list) { 167 if (cache->left != left || cache->right != right) 168 continue; 169 170 *entry = cache; 171 return true; 172 } 173 174 return false; 175 } 176 177 static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg) 178 { 179 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 180 struct wm_hubs_dcs_cache *cache; 181 182 if (hubs->no_cache_dac_hp_direct) 183 return; 184 185 cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL); 186 if (!cache) { 187 dev_err(codec->dev, "Failed to allocate DCS cache entry\n"); 188 return; 189 } 190 191 cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); 192 cache->left &= WM8993_HPOUT1L_VOL_MASK; 193 194 cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME); 195 cache->right &= WM8993_HPOUT1R_VOL_MASK; 196 197 cache->dcs_cfg = dcs_cfg; 198 199 list_add_tail(&cache->list, &hubs->dcs_cache); 200 } 201 202 static int wm_hubs_read_dc_servo(struct snd_soc_codec *codec, 203 u16 *reg_l, u16 *reg_r) 204 { 205 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 206 u16 dcs_reg, reg; 207 int ret = 0; 208 209 switch (hubs->dcs_readback_mode) { 210 case 2: 211 dcs_reg = WM8994_DC_SERVO_4E; 212 break; 213 case 1: 214 dcs_reg = WM8994_DC_SERVO_READBACK; 215 break; 216 default: 217 dcs_reg = WM8993_DC_SERVO_3; 218 break; 219 } 220 221 /* Different chips in the family support different readback 222 * methods. 223 */ 224 switch (hubs->dcs_readback_mode) { 225 case 0: 226 *reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1) 227 & WM8993_DCS_INTEG_CHAN_0_MASK; 228 *reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2) 229 & WM8993_DCS_INTEG_CHAN_1_MASK; 230 break; 231 case 2: 232 case 1: 233 reg = snd_soc_read(codec, dcs_reg); 234 *reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK) 235 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT; 236 *reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK; 237 break; 238 default: 239 WARN(1, "Unknown DCS readback method\n"); 240 ret = -1; 241 } 242 return ret; 243 } 244 245 /* 246 * Startup calibration of the DC servo 247 */ 248 static void enable_dc_servo(struct snd_soc_codec *codec) 249 { 250 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 251 struct wm_hubs_dcs_cache *cache; 252 s8 offset; 253 u16 reg_l, reg_r, dcs_cfg, dcs_reg; 254 255 switch (hubs->dcs_readback_mode) { 256 case 2: 257 dcs_reg = WM8994_DC_SERVO_4E; 258 break; 259 default: 260 dcs_reg = WM8993_DC_SERVO_3; 261 break; 262 } 263 264 /* If we're using a digital only path and have a previously 265 * callibrated DC servo offset stored then use that. */ 266 if (wm_hubs_dac_hp_direct(codec) && 267 wm_hubs_dcs_cache_get(codec, &cache)) { 268 dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n", 269 cache->dcs_cfg, cache->left, cache->right); 270 snd_soc_write(codec, dcs_reg, cache->dcs_cfg); 271 wait_for_dc_servo(codec, 272 WM8993_DCS_TRIG_DAC_WR_0 | 273 WM8993_DCS_TRIG_DAC_WR_1); 274 return; 275 } 276 277 if (hubs->series_startup) { 278 /* Set for 32 series updates */ 279 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 280 WM8993_DCS_SERIES_NO_01_MASK, 281 32 << WM8993_DCS_SERIES_NO_01_SHIFT); 282 wait_for_dc_servo(codec, 283 WM8993_DCS_TRIG_SERIES_0 | 284 WM8993_DCS_TRIG_SERIES_1); 285 } else { 286 wait_for_dc_servo(codec, 287 WM8993_DCS_TRIG_STARTUP_0 | 288 WM8993_DCS_TRIG_STARTUP_1); 289 } 290 291 if (wm_hubs_read_dc_servo(codec, ®_l, ®_r) < 0) 292 return; 293 294 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r); 295 296 /* Apply correction to DC servo result */ 297 if (hubs->dcs_codes_l || hubs->dcs_codes_r) { 298 dev_dbg(codec->dev, 299 "Applying %d/%d code DC servo correction\n", 300 hubs->dcs_codes_l, hubs->dcs_codes_r); 301 302 /* HPOUT1R */ 303 offset = (s8)reg_r; 304 dev_dbg(codec->dev, "DCS right %d->%d\n", offset, 305 offset + hubs->dcs_codes_r); 306 offset += hubs->dcs_codes_r; 307 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 308 309 /* HPOUT1L */ 310 offset = (s8)reg_l; 311 dev_dbg(codec->dev, "DCS left %d->%d\n", offset, 312 offset + hubs->dcs_codes_l); 313 offset += hubs->dcs_codes_l; 314 dcs_cfg |= (u8)offset; 315 316 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg); 317 318 /* Do it */ 319 snd_soc_write(codec, dcs_reg, dcs_cfg); 320 wait_for_dc_servo(codec, 321 WM8993_DCS_TRIG_DAC_WR_0 | 322 WM8993_DCS_TRIG_DAC_WR_1); 323 } else { 324 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 325 dcs_cfg |= reg_l; 326 } 327 328 /* Save the callibrated offset if we're in class W mode and 329 * therefore don't have any analogue signal mixed in. */ 330 if (wm_hubs_dac_hp_direct(codec)) 331 wm_hubs_dcs_cache_set(codec, dcs_cfg); 332 } 333 334 /* 335 * Update the DC servo calibration on gain changes 336 */ 337 static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, 338 struct snd_ctl_elem_value *ucontrol) 339 { 340 struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 341 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 342 int ret; 343 344 ret = snd_soc_put_volsw(kcontrol, ucontrol); 345 346 /* If we're applying an offset correction then updating the 347 * callibration would be likely to introduce further offsets. */ 348 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update) 349 return ret; 350 351 /* Only need to do this if the outputs are active */ 352 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1) 353 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA)) 354 snd_soc_update_bits(codec, 355 WM8993_DC_SERVO_0, 356 WM8993_DCS_TRIG_SINGLE_0 | 357 WM8993_DCS_TRIG_SINGLE_1, 358 WM8993_DCS_TRIG_SINGLE_0 | 359 WM8993_DCS_TRIG_SINGLE_1); 360 361 return ret; 362 } 363 364 static const struct snd_kcontrol_new analogue_snd_controls[] = { 365 SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 366 inpga_tlv), 367 SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 368 SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 369 370 SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 371 inpga_tlv), 372 SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 373 SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 374 375 376 SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 377 inpga_tlv), 378 SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 379 SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 380 381 SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 382 inpga_tlv), 383 SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 384 SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 385 386 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0, 387 inmix_sw_tlv), 388 SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0, 389 inmix_sw_tlv), 390 SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0, 391 inmix_tlv), 392 SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv), 393 SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0, 394 inmix_tlv), 395 396 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0, 397 inmix_sw_tlv), 398 SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0, 399 inmix_sw_tlv), 400 SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0, 401 inmix_tlv), 402 SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv), 403 SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0, 404 inmix_tlv), 405 406 SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1, 407 outmix_tlv), 408 SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1, 409 outmix_tlv), 410 SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1, 411 outmix_tlv), 412 SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1, 413 outmix_tlv), 414 SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1, 415 outmix_tlv), 416 SOC_SINGLE_TLV("Left Output Mixer Right Input Volume", 417 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv), 418 SOC_SINGLE_TLV("Left Output Mixer Left Input Volume", 419 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv), 420 SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1, 421 outmix_tlv), 422 423 SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume", 424 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 425 SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume", 426 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv), 427 SOC_SINGLE_TLV("Right Output Mixer IN1L Volume", 428 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv), 429 SOC_SINGLE_TLV("Right Output Mixer IN1R Volume", 430 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv), 431 SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume", 432 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv), 433 SOC_SINGLE_TLV("Right Output Mixer Left Input Volume", 434 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv), 435 SOC_SINGLE_TLV("Right Output Mixer Right Input Volume", 436 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 437 SOC_SINGLE_TLV("Right Output Mixer DAC Volume", 438 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv), 439 440 SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME, 441 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv), 442 SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME, 443 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0), 444 SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME, 445 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0), 446 447 SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1), 448 SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv), 449 450 SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION, 451 5, 1, 1, wm_hubs_spkmix_tlv), 452 SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION, 453 4, 1, 1, wm_hubs_spkmix_tlv), 454 SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION, 455 3, 1, 1, wm_hubs_spkmix_tlv), 456 457 SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION, 458 5, 1, 1, wm_hubs_spkmix_tlv), 459 SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION, 460 4, 1, 1, wm_hubs_spkmix_tlv), 461 SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION, 462 3, 1, 1, wm_hubs_spkmix_tlv), 463 464 SOC_DOUBLE_R_TLV("Speaker Mixer Volume", 465 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION, 466 0, 3, 1, spkmixout_tlv), 467 SOC_DOUBLE_R_TLV("Speaker Volume", 468 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 469 0, 63, 0, outpga_tlv), 470 SOC_DOUBLE_R("Speaker Switch", 471 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 472 6, 1, 0), 473 SOC_DOUBLE_R("Speaker ZC Switch", 474 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 475 7, 1, 0), 476 SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0, 477 spkboost_tlv), 478 SOC_ENUM("Speaker Reference", speaker_ref), 479 SOC_ENUM("Speaker Mode", speaker_mode), 480 481 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", 482 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME, 483 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo, 484 outpga_tlv), 485 486 SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME, 487 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0), 488 SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME, 489 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0), 490 491 SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1), 492 SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1), 493 SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1, 494 line_tlv), 495 496 SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1), 497 SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1), 498 SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1, 499 line_tlv), 500 }; 501 502 static int hp_supply_event(struct snd_soc_dapm_widget *w, 503 struct snd_kcontrol *kcontrol, int event) 504 { 505 struct snd_soc_codec *codec = w->codec; 506 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 507 508 switch (event) { 509 case SND_SOC_DAPM_PRE_PMU: 510 switch (hubs->hp_startup_mode) { 511 case 0: 512 break; 513 case 1: 514 /* Enable the headphone amp */ 515 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 516 WM8993_HPOUT1L_ENA | 517 WM8993_HPOUT1R_ENA, 518 WM8993_HPOUT1L_ENA | 519 WM8993_HPOUT1R_ENA); 520 521 /* Enable the second stage */ 522 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 523 WM8993_HPOUT1L_DLY | 524 WM8993_HPOUT1R_DLY, 525 WM8993_HPOUT1L_DLY | 526 WM8993_HPOUT1R_DLY); 527 break; 528 default: 529 dev_err(codec->dev, "Unknown HP startup mode %d\n", 530 hubs->hp_startup_mode); 531 break; 532 } 533 534 case SND_SOC_DAPM_PRE_PMD: 535 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 536 WM8993_CP_ENA, 0); 537 break; 538 } 539 540 return 0; 541 } 542 543 static int hp_event(struct snd_soc_dapm_widget *w, 544 struct snd_kcontrol *kcontrol, int event) 545 { 546 struct snd_soc_codec *codec = w->codec; 547 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0); 548 549 switch (event) { 550 case SND_SOC_DAPM_POST_PMU: 551 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 552 WM8993_CP_ENA, WM8993_CP_ENA); 553 554 msleep(5); 555 556 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 557 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 558 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA); 559 560 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY; 561 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 562 563 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 564 WM8993_DCS_TIMER_PERIOD_01_MASK, 0); 565 566 enable_dc_servo(codec); 567 568 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT | 569 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT; 570 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 571 break; 572 573 case SND_SOC_DAPM_PRE_PMD: 574 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 575 WM8993_HPOUT1L_OUTP | 576 WM8993_HPOUT1R_OUTP | 577 WM8993_HPOUT1L_RMV_SHORT | 578 WM8993_HPOUT1R_RMV_SHORT, 0); 579 580 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 581 WM8993_HPOUT1L_DLY | 582 WM8993_HPOUT1R_DLY, 0); 583 584 snd_soc_write(codec, WM8993_DC_SERVO_0, 0); 585 586 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 587 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 588 0); 589 break; 590 } 591 592 return 0; 593 } 594 595 static int earpiece_event(struct snd_soc_dapm_widget *w, 596 struct snd_kcontrol *control, int event) 597 { 598 struct snd_soc_codec *codec = w->codec; 599 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA; 600 601 switch (event) { 602 case SND_SOC_DAPM_PRE_PMU: 603 reg |= WM8993_HPOUT2_IN_ENA; 604 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 605 udelay(50); 606 break; 607 608 case SND_SOC_DAPM_POST_PMD: 609 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 610 break; 611 612 default: 613 BUG(); 614 break; 615 } 616 617 return 0; 618 } 619 620 static int lineout_event(struct snd_soc_dapm_widget *w, 621 struct snd_kcontrol *control, int event) 622 { 623 struct snd_soc_codec *codec = w->codec; 624 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 625 bool *flag; 626 627 switch (w->shift) { 628 case WM8993_LINEOUT1N_ENA_SHIFT: 629 flag = &hubs->lineout1n_ena; 630 break; 631 case WM8993_LINEOUT1P_ENA_SHIFT: 632 flag = &hubs->lineout1p_ena; 633 break; 634 case WM8993_LINEOUT2N_ENA_SHIFT: 635 flag = &hubs->lineout2n_ena; 636 break; 637 case WM8993_LINEOUT2P_ENA_SHIFT: 638 flag = &hubs->lineout2p_ena; 639 break; 640 default: 641 WARN(1, "Unknown line output"); 642 return -EINVAL; 643 } 644 645 *flag = SND_SOC_DAPM_EVENT_ON(event); 646 647 return 0; 648 } 649 650 static int micbias_event(struct snd_soc_dapm_widget *w, 651 struct snd_kcontrol *kcontrol, int event) 652 { 653 struct snd_soc_codec *codec = w->codec; 654 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 655 656 switch (w->shift) { 657 case WM8993_MICB1_ENA_SHIFT: 658 if (hubs->micb1_delay) 659 msleep(hubs->micb1_delay); 660 break; 661 case WM8993_MICB2_ENA_SHIFT: 662 if (hubs->micb2_delay) 663 msleep(hubs->micb2_delay); 664 break; 665 default: 666 return -EINVAL; 667 } 668 669 return 0; 670 } 671 672 void wm_hubs_update_class_w(struct snd_soc_codec *codec) 673 { 674 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 675 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ; 676 677 if (!wm_hubs_dac_hp_direct(codec)) 678 enable = false; 679 680 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec)) 681 enable = false; 682 683 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled"); 684 685 snd_soc_update_bits(codec, WM8993_CLASS_W_0, 686 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable); 687 688 snd_soc_write(codec, WM8993_LEFT_OUTPUT_VOLUME, 689 snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME)); 690 snd_soc_write(codec, WM8993_RIGHT_OUTPUT_VOLUME, 691 snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME)); 692 } 693 EXPORT_SYMBOL_GPL(wm_hubs_update_class_w); 694 695 #define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \ 696 SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ 697 snd_soc_dapm_get_volsw, class_w_put_volsw) 698 699 static int class_w_put_volsw(struct snd_kcontrol *kcontrol, 700 struct snd_ctl_elem_value *ucontrol) 701 { 702 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 703 int ret; 704 705 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); 706 707 wm_hubs_update_class_w(codec); 708 709 return ret; 710 } 711 712 #define WM_HUBS_ENUM_W(xname, xenum) \ 713 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 714 .info = snd_soc_info_enum_double, \ 715 .get = snd_soc_dapm_get_enum_double, \ 716 .put = class_w_put_double, \ 717 .private_value = (unsigned long)&xenum } 718 719 static int class_w_put_double(struct snd_kcontrol *kcontrol, 720 struct snd_ctl_elem_value *ucontrol) 721 { 722 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 723 int ret; 724 725 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 726 727 wm_hubs_update_class_w(codec); 728 729 return ret; 730 } 731 732 static const char *hp_mux_text[] = { 733 "Mixer", 734 "DAC", 735 }; 736 737 static const struct soc_enum hpl_enum = 738 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER1, 8, 2, hp_mux_text); 739 740 const struct snd_kcontrol_new wm_hubs_hpl_mux = 741 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum); 742 EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux); 743 744 static const struct soc_enum hpr_enum = 745 SOC_ENUM_SINGLE(WM8993_OUTPUT_MIXER2, 8, 2, hp_mux_text); 746 747 const struct snd_kcontrol_new wm_hubs_hpr_mux = 748 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum); 749 EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux); 750 751 static const struct snd_kcontrol_new in1l_pga[] = { 752 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0), 753 SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0), 754 }; 755 756 static const struct snd_kcontrol_new in1r_pga[] = { 757 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0), 758 SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0), 759 }; 760 761 static const struct snd_kcontrol_new in2l_pga[] = { 762 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0), 763 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0), 764 }; 765 766 static const struct snd_kcontrol_new in2r_pga[] = { 767 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0), 768 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0), 769 }; 770 771 static const struct snd_kcontrol_new mixinl[] = { 772 SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0), 773 SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0), 774 }; 775 776 static const struct snd_kcontrol_new mixinr[] = { 777 SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0), 778 SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0), 779 }; 780 781 static const struct snd_kcontrol_new left_output_mixer[] = { 782 WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0), 783 WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0), 784 WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0), 785 WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0), 786 WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0), 787 WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0), 788 WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0), 789 WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0), 790 }; 791 792 static const struct snd_kcontrol_new right_output_mixer[] = { 793 WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0), 794 WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0), 795 WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0), 796 WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0), 797 WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0), 798 WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0), 799 WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0), 800 WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0), 801 }; 802 803 static const struct snd_kcontrol_new earpiece_mixer[] = { 804 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0), 805 SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0), 806 SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0), 807 }; 808 809 static const struct snd_kcontrol_new left_speaker_boost[] = { 810 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0), 811 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0), 812 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0), 813 }; 814 815 static const struct snd_kcontrol_new right_speaker_boost[] = { 816 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0), 817 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0), 818 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0), 819 }; 820 821 static const struct snd_kcontrol_new line1_mix[] = { 822 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0), 823 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0), 824 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 825 }; 826 827 static const struct snd_kcontrol_new line1n_mix[] = { 828 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0), 829 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0), 830 }; 831 832 static const struct snd_kcontrol_new line1p_mix[] = { 833 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 834 }; 835 836 static const struct snd_kcontrol_new line2_mix[] = { 837 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0), 838 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0), 839 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 840 }; 841 842 static const struct snd_kcontrol_new line2n_mix[] = { 843 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0), 844 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0), 845 }; 846 847 static const struct snd_kcontrol_new line2p_mix[] = { 848 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 849 }; 850 851 static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = { 852 SND_SOC_DAPM_INPUT("IN1LN"), 853 SND_SOC_DAPM_INPUT("IN1LP"), 854 SND_SOC_DAPM_INPUT("IN2LN"), 855 SND_SOC_DAPM_INPUT("IN2LP:VXRN"), 856 SND_SOC_DAPM_INPUT("IN1RN"), 857 SND_SOC_DAPM_INPUT("IN1RP"), 858 SND_SOC_DAPM_INPUT("IN2RN"), 859 SND_SOC_DAPM_INPUT("IN2RP:VXRP"), 860 861 SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, 862 micbias_event, SND_SOC_DAPM_POST_PMU), 863 SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, 864 micbias_event, SND_SOC_DAPM_POST_PMU), 865 866 SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0, 867 in1l_pga, ARRAY_SIZE(in1l_pga)), 868 SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0, 869 in1r_pga, ARRAY_SIZE(in1r_pga)), 870 871 SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0, 872 in2l_pga, ARRAY_SIZE(in2l_pga)), 873 SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0, 874 in2r_pga, ARRAY_SIZE(in2r_pga)), 875 876 SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0, 877 mixinl, ARRAY_SIZE(mixinl)), 878 SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0, 879 mixinr, ARRAY_SIZE(mixinr)), 880 881 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0, 882 left_output_mixer, ARRAY_SIZE(left_output_mixer)), 883 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0, 884 right_output_mixer, ARRAY_SIZE(right_output_mixer)), 885 886 SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0), 887 SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0), 888 889 SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event, 890 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 891 SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0, 892 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 893 894 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 895 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)), 896 SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0, 897 NULL, 0, earpiece_event, 898 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 899 900 SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0, 901 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)), 902 SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0, 903 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)), 904 905 SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0), 906 SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0, 907 NULL, 0), 908 SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0, 909 NULL, 0), 910 911 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0, 912 line1_mix, ARRAY_SIZE(line1_mix)), 913 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0, 914 line2_mix, ARRAY_SIZE(line2_mix)), 915 916 SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0, 917 line1n_mix, ARRAY_SIZE(line1n_mix)), 918 SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0, 919 line1p_mix, ARRAY_SIZE(line1p_mix)), 920 SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0, 921 line2n_mix, ARRAY_SIZE(line2n_mix)), 922 SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0, 923 line2p_mix, ARRAY_SIZE(line2p_mix)), 924 925 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0, 926 NULL, 0, lineout_event, 927 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 928 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0, 929 NULL, 0, lineout_event, 930 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 931 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0, 932 NULL, 0, lineout_event, 933 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 934 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0, 935 NULL, 0, lineout_event, 936 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 937 938 SND_SOC_DAPM_OUTPUT("SPKOUTLP"), 939 SND_SOC_DAPM_OUTPUT("SPKOUTLN"), 940 SND_SOC_DAPM_OUTPUT("SPKOUTRP"), 941 SND_SOC_DAPM_OUTPUT("SPKOUTRN"), 942 SND_SOC_DAPM_OUTPUT("HPOUT1L"), 943 SND_SOC_DAPM_OUTPUT("HPOUT1R"), 944 SND_SOC_DAPM_OUTPUT("HPOUT2P"), 945 SND_SOC_DAPM_OUTPUT("HPOUT2N"), 946 SND_SOC_DAPM_OUTPUT("LINEOUT1P"), 947 SND_SOC_DAPM_OUTPUT("LINEOUT1N"), 948 SND_SOC_DAPM_OUTPUT("LINEOUT2P"), 949 SND_SOC_DAPM_OUTPUT("LINEOUT2N"), 950 }; 951 952 static const struct snd_soc_dapm_route analogue_routes[] = { 953 { "MICBIAS1", NULL, "CLK_SYS" }, 954 { "MICBIAS2", NULL, "CLK_SYS" }, 955 956 { "IN1L PGA", "IN1LP Switch", "IN1LP" }, 957 { "IN1L PGA", "IN1LN Switch", "IN1LN" }, 958 959 { "IN1L PGA", NULL, "VMID" }, 960 { "IN1R PGA", NULL, "VMID" }, 961 { "IN2L PGA", NULL, "VMID" }, 962 { "IN2R PGA", NULL, "VMID" }, 963 964 { "IN1R PGA", "IN1RP Switch", "IN1RP" }, 965 { "IN1R PGA", "IN1RN Switch", "IN1RN" }, 966 967 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" }, 968 { "IN2L PGA", "IN2LN Switch", "IN2LN" }, 969 970 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" }, 971 { "IN2R PGA", "IN2RN Switch", "IN2RN" }, 972 973 { "Direct Voice", NULL, "IN2LP:VXRN" }, 974 { "Direct Voice", NULL, "IN2RP:VXRP" }, 975 976 { "MIXINL", "IN1L Switch", "IN1L PGA" }, 977 { "MIXINL", "IN2L Switch", "IN2L PGA" }, 978 { "MIXINL", NULL, "Direct Voice" }, 979 { "MIXINL", NULL, "IN1LP" }, 980 { "MIXINL", NULL, "Left Output Mixer" }, 981 { "MIXINL", NULL, "VMID" }, 982 983 { "MIXINR", "IN1R Switch", "IN1R PGA" }, 984 { "MIXINR", "IN2R Switch", "IN2R PGA" }, 985 { "MIXINR", NULL, "Direct Voice" }, 986 { "MIXINR", NULL, "IN1RP" }, 987 { "MIXINR", NULL, "Right Output Mixer" }, 988 { "MIXINR", NULL, "VMID" }, 989 990 { "ADCL", NULL, "MIXINL" }, 991 { "ADCR", NULL, "MIXINR" }, 992 993 { "Left Output Mixer", "Left Input Switch", "MIXINL" }, 994 { "Left Output Mixer", "Right Input Switch", "MIXINR" }, 995 { "Left Output Mixer", "IN2RN Switch", "IN2RN" }, 996 { "Left Output Mixer", "IN2LN Switch", "IN2LN" }, 997 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" }, 998 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" }, 999 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" }, 1000 1001 { "Right Output Mixer", "Left Input Switch", "MIXINL" }, 1002 { "Right Output Mixer", "Right Input Switch", "MIXINR" }, 1003 { "Right Output Mixer", "IN2LN Switch", "IN2LN" }, 1004 { "Right Output Mixer", "IN2RN Switch", "IN2RN" }, 1005 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" }, 1006 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" }, 1007 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" }, 1008 1009 { "Left Output PGA", NULL, "Left Output Mixer" }, 1010 { "Left Output PGA", NULL, "TOCLK" }, 1011 1012 { "Right Output PGA", NULL, "Right Output Mixer" }, 1013 { "Right Output PGA", NULL, "TOCLK" }, 1014 1015 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" }, 1016 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" }, 1017 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" }, 1018 1019 { "Earpiece Driver", NULL, "VMID" }, 1020 { "Earpiece Driver", NULL, "Earpiece Mixer" }, 1021 { "HPOUT2N", NULL, "Earpiece Driver" }, 1022 { "HPOUT2P", NULL, "Earpiece Driver" }, 1023 1024 { "SPKL", "Input Switch", "MIXINL" }, 1025 { "SPKL", "IN1LP Switch", "IN1LP" }, 1026 { "SPKL", "Output Switch", "Left Output PGA" }, 1027 { "SPKL", NULL, "TOCLK" }, 1028 1029 { "SPKR", "Input Switch", "MIXINR" }, 1030 { "SPKR", "IN1RP Switch", "IN1RP" }, 1031 { "SPKR", "Output Switch", "Right Output PGA" }, 1032 { "SPKR", NULL, "TOCLK" }, 1033 1034 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" }, 1035 { "SPKL Boost", "SPKL Switch", "SPKL" }, 1036 { "SPKL Boost", "SPKR Switch", "SPKR" }, 1037 1038 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" }, 1039 { "SPKR Boost", "SPKR Switch", "SPKR" }, 1040 { "SPKR Boost", "SPKL Switch", "SPKL" }, 1041 1042 { "SPKL Driver", NULL, "VMID" }, 1043 { "SPKL Driver", NULL, "SPKL Boost" }, 1044 { "SPKL Driver", NULL, "CLK_SYS" }, 1045 { "SPKL Driver", NULL, "TSHUT" }, 1046 1047 { "SPKR Driver", NULL, "VMID" }, 1048 { "SPKR Driver", NULL, "SPKR Boost" }, 1049 { "SPKR Driver", NULL, "CLK_SYS" }, 1050 { "SPKR Driver", NULL, "TSHUT" }, 1051 1052 { "SPKOUTLP", NULL, "SPKL Driver" }, 1053 { "SPKOUTLN", NULL, "SPKL Driver" }, 1054 { "SPKOUTRP", NULL, "SPKR Driver" }, 1055 { "SPKOUTRN", NULL, "SPKR Driver" }, 1056 1057 { "Left Headphone Mux", "Mixer", "Left Output PGA" }, 1058 { "Right Headphone Mux", "Mixer", "Right Output PGA" }, 1059 1060 { "Headphone PGA", NULL, "Left Headphone Mux" }, 1061 { "Headphone PGA", NULL, "Right Headphone Mux" }, 1062 { "Headphone PGA", NULL, "VMID" }, 1063 { "Headphone PGA", NULL, "CLK_SYS" }, 1064 { "Headphone PGA", NULL, "Headphone Supply" }, 1065 1066 { "HPOUT1L", NULL, "Headphone PGA" }, 1067 { "HPOUT1R", NULL, "Headphone PGA" }, 1068 1069 { "LINEOUT1N Driver", NULL, "VMID" }, 1070 { "LINEOUT1P Driver", NULL, "VMID" }, 1071 { "LINEOUT2N Driver", NULL, "VMID" }, 1072 { "LINEOUT2P Driver", NULL, "VMID" }, 1073 1074 { "LINEOUT1N", NULL, "LINEOUT1N Driver" }, 1075 { "LINEOUT1P", NULL, "LINEOUT1P Driver" }, 1076 { "LINEOUT2N", NULL, "LINEOUT2N Driver" }, 1077 { "LINEOUT2P", NULL, "LINEOUT2P Driver" }, 1078 }; 1079 1080 static const struct snd_soc_dapm_route lineout1_diff_routes[] = { 1081 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" }, 1082 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" }, 1083 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" }, 1084 1085 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" }, 1086 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" }, 1087 }; 1088 1089 static const struct snd_soc_dapm_route lineout1_se_routes[] = { 1090 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" }, 1091 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" }, 1092 1093 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" }, 1094 1095 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" }, 1096 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" }, 1097 }; 1098 1099 static const struct snd_soc_dapm_route lineout2_diff_routes[] = { 1100 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" }, 1101 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" }, 1102 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" }, 1103 1104 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" }, 1105 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" }, 1106 }; 1107 1108 static const struct snd_soc_dapm_route lineout2_se_routes[] = { 1109 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" }, 1110 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" }, 1111 1112 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" }, 1113 1114 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" }, 1115 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" }, 1116 }; 1117 1118 int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec) 1119 { 1120 struct snd_soc_dapm_context *dapm = &codec->dapm; 1121 1122 /* Latch volume update bits & default ZC on */ 1123 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 1124 WM8993_IN1_VU, WM8993_IN1_VU); 1125 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 1126 WM8993_IN1_VU, WM8993_IN1_VU); 1127 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 1128 WM8993_IN2_VU, WM8993_IN2_VU); 1129 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 1130 WM8993_IN2_VU, WM8993_IN2_VU); 1131 1132 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT, 1133 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 1134 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT, 1135 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 1136 1137 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME, 1138 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC, 1139 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC); 1140 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME, 1141 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC, 1142 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC); 1143 1144 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME, 1145 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU, 1146 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU); 1147 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME, 1148 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU, 1149 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU); 1150 1151 snd_soc_add_codec_controls(codec, analogue_snd_controls, 1152 ARRAY_SIZE(analogue_snd_controls)); 1153 1154 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets, 1155 ARRAY_SIZE(analogue_dapm_widgets)); 1156 return 0; 1157 } 1158 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls); 1159 1160 int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec, 1161 int lineout1_diff, int lineout2_diff) 1162 { 1163 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1164 struct snd_soc_dapm_context *dapm = &codec->dapm; 1165 1166 hubs->codec = codec; 1167 1168 INIT_LIST_HEAD(&hubs->dcs_cache); 1169 init_completion(&hubs->dcs_done); 1170 1171 snd_soc_dapm_add_routes(dapm, analogue_routes, 1172 ARRAY_SIZE(analogue_routes)); 1173 1174 if (lineout1_diff) 1175 snd_soc_dapm_add_routes(dapm, 1176 lineout1_diff_routes, 1177 ARRAY_SIZE(lineout1_diff_routes)); 1178 else 1179 snd_soc_dapm_add_routes(dapm, 1180 lineout1_se_routes, 1181 ARRAY_SIZE(lineout1_se_routes)); 1182 1183 if (lineout2_diff) 1184 snd_soc_dapm_add_routes(dapm, 1185 lineout2_diff_routes, 1186 ARRAY_SIZE(lineout2_diff_routes)); 1187 else 1188 snd_soc_dapm_add_routes(dapm, 1189 lineout2_se_routes, 1190 ARRAY_SIZE(lineout2_se_routes)); 1191 1192 return 0; 1193 } 1194 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes); 1195 1196 int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec, 1197 int lineout1_diff, int lineout2_diff, 1198 int lineout1fb, int lineout2fb, 1199 int jd_scthr, int jd_thr, 1200 int micbias1_delay, int micbias2_delay, 1201 int micbias1_lvl, int micbias2_lvl) 1202 { 1203 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1204 1205 hubs->lineout1_se = !lineout1_diff; 1206 hubs->lineout2_se = !lineout2_diff; 1207 hubs->micb1_delay = micbias1_delay; 1208 hubs->micb2_delay = micbias2_delay; 1209 1210 if (!lineout1_diff) 1211 snd_soc_update_bits(codec, WM8993_LINE_MIXER1, 1212 WM8993_LINEOUT1_MODE, 1213 WM8993_LINEOUT1_MODE); 1214 if (!lineout2_diff) 1215 snd_soc_update_bits(codec, WM8993_LINE_MIXER2, 1216 WM8993_LINEOUT2_MODE, 1217 WM8993_LINEOUT2_MODE); 1218 1219 if (!lineout1_diff && !lineout2_diff) 1220 snd_soc_update_bits(codec, WM8993_ANTIPOP1, 1221 WM8993_LINEOUT_VMID_BUF_ENA, 1222 WM8993_LINEOUT_VMID_BUF_ENA); 1223 1224 if (lineout1fb) 1225 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1226 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB); 1227 1228 if (lineout2fb) 1229 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1230 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB); 1231 1232 snd_soc_update_bits(codec, WM8993_MICBIAS, 1233 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK | 1234 WM8993_MICB1_LVL | WM8993_MICB2_LVL, 1235 jd_scthr << WM8993_JD_SCTHR_SHIFT | 1236 jd_thr << WM8993_JD_THR_SHIFT | 1237 micbias1_lvl | 1238 micbias2_lvl << WM8993_MICB2_LVL_SHIFT); 1239 1240 return 0; 1241 } 1242 EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata); 1243 1244 void wm_hubs_vmid_ena(struct snd_soc_codec *codec) 1245 { 1246 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1247 int val = 0; 1248 1249 if (hubs->lineout1_se) 1250 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1251 1252 if (hubs->lineout2_se) 1253 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1254 1255 /* Enable the line outputs while we power up */ 1256 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val); 1257 } 1258 EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena); 1259 1260 void wm_hubs_set_bias_level(struct snd_soc_codec *codec, 1261 enum snd_soc_bias_level level) 1262 { 1263 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1264 int mask, val; 1265 1266 switch (level) { 1267 case SND_SOC_BIAS_STANDBY: 1268 /* Clamp the inputs to VMID while we ramp to charge caps */ 1269 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1270 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP); 1271 break; 1272 1273 case SND_SOC_BIAS_ON: 1274 /* Turn off any unneded single ended outputs */ 1275 val = 0; 1276 mask = 0; 1277 1278 if (hubs->lineout1_se) 1279 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1280 1281 if (hubs->lineout2_se) 1282 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1283 1284 if (hubs->lineout1_se && hubs->lineout1n_ena) 1285 val |= WM8993_LINEOUT1N_ENA; 1286 1287 if (hubs->lineout1_se && hubs->lineout1p_ena) 1288 val |= WM8993_LINEOUT1P_ENA; 1289 1290 if (hubs->lineout2_se && hubs->lineout2n_ena) 1291 val |= WM8993_LINEOUT2N_ENA; 1292 1293 if (hubs->lineout2_se && hubs->lineout2p_ena) 1294 val |= WM8993_LINEOUT2P_ENA; 1295 1296 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, 1297 mask, val); 1298 1299 /* Remove the input clamps */ 1300 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1301 WM8993_INPUTS_CLAMP, 0); 1302 break; 1303 1304 default: 1305 break; 1306 } 1307 } 1308 EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level); 1309 1310 MODULE_DESCRIPTION("Shared support for Wolfson hubs products"); 1311 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 1312 MODULE_LICENSE("GPL"); 1313