1 /* 2 * wm_hubs.c -- WM8993/4 common code 3 * 4 * Copyright 2009-12 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/mfd/wm8994/registers.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/soc.h> 25 #include <sound/initval.h> 26 #include <sound/tlv.h> 27 28 #include "wm8993.h" 29 #include "wm_hubs.h" 30 31 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0); 32 EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv); 33 34 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0); 35 static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0); 36 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1); 37 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0); 38 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0); 39 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1); 40 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0); 41 static const unsigned int spkboost_tlv[] = { 42 TLV_DB_RANGE_HEAD(2), 43 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 44 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0), 45 }; 46 static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0); 47 48 static const char *speaker_ref_text[] = { 49 "SPKVDD/2", 50 "VMID", 51 }; 52 53 static SOC_ENUM_SINGLE_DECL(speaker_ref, 54 WM8993_SPEAKER_MIXER, 8, speaker_ref_text); 55 56 static const char *speaker_mode_text[] = { 57 "Class D", 58 "Class AB", 59 }; 60 61 static SOC_ENUM_SINGLE_DECL(speaker_mode, 62 WM8993_SPKMIXR_ATTENUATION, 8, speaker_mode_text); 63 64 static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op) 65 { 66 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 67 unsigned int reg; 68 int count = 0; 69 int timeout; 70 unsigned int val; 71 72 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1; 73 74 /* Trigger the command */ 75 snd_soc_write(codec, WM8993_DC_SERVO_0, val); 76 77 dev_dbg(codec->dev, "Waiting for DC servo...\n"); 78 79 if (hubs->dcs_done_irq) 80 timeout = 4; 81 else 82 timeout = 400; 83 84 do { 85 count++; 86 87 if (hubs->dcs_done_irq) 88 wait_for_completion_timeout(&hubs->dcs_done, 89 msecs_to_jiffies(250)); 90 else 91 msleep(1); 92 93 reg = snd_soc_read(codec, WM8993_DC_SERVO_0); 94 dev_dbg(codec->dev, "DC servo: %x\n", reg); 95 } while (reg & op && count < timeout); 96 97 if (reg & op) 98 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n", 99 op); 100 } 101 102 irqreturn_t wm_hubs_dcs_done(int irq, void *data) 103 { 104 struct wm_hubs_data *hubs = data; 105 106 complete(&hubs->dcs_done); 107 108 return IRQ_HANDLED; 109 } 110 EXPORT_SYMBOL_GPL(wm_hubs_dcs_done); 111 112 static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec) 113 { 114 int reg; 115 116 /* If we're going via the mixer we'll need to do additional checks */ 117 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1); 118 if (!(reg & WM8993_DACL_TO_HPOUT1L)) { 119 if (reg & ~WM8993_DACL_TO_MIXOUTL) { 120 dev_vdbg(codec->dev, "Analogue paths connected: %x\n", 121 reg & ~WM8993_DACL_TO_HPOUT1L); 122 return false; 123 } else { 124 dev_vdbg(codec->dev, "HPL connected to mixer\n"); 125 } 126 } else { 127 dev_vdbg(codec->dev, "HPL connected to DAC\n"); 128 } 129 130 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2); 131 if (!(reg & WM8993_DACR_TO_HPOUT1R)) { 132 if (reg & ~WM8993_DACR_TO_MIXOUTR) { 133 dev_vdbg(codec->dev, "Analogue paths connected: %x\n", 134 reg & ~WM8993_DACR_TO_HPOUT1R); 135 return false; 136 } else { 137 dev_vdbg(codec->dev, "HPR connected to mixer\n"); 138 } 139 } else { 140 dev_vdbg(codec->dev, "HPR connected to DAC\n"); 141 } 142 143 return true; 144 } 145 146 struct wm_hubs_dcs_cache { 147 struct list_head list; 148 unsigned int left; 149 unsigned int right; 150 u16 dcs_cfg; 151 }; 152 153 static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec, 154 struct wm_hubs_dcs_cache **entry) 155 { 156 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 157 struct wm_hubs_dcs_cache *cache; 158 unsigned int left, right; 159 160 left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); 161 left &= WM8993_HPOUT1L_VOL_MASK; 162 163 right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME); 164 right &= WM8993_HPOUT1R_VOL_MASK; 165 166 list_for_each_entry(cache, &hubs->dcs_cache, list) { 167 if (cache->left != left || cache->right != right) 168 continue; 169 170 *entry = cache; 171 return true; 172 } 173 174 return false; 175 } 176 177 static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg) 178 { 179 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 180 struct wm_hubs_dcs_cache *cache; 181 182 if (hubs->no_cache_dac_hp_direct) 183 return; 184 185 cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL); 186 if (!cache) 187 return; 188 189 cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); 190 cache->left &= WM8993_HPOUT1L_VOL_MASK; 191 192 cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME); 193 cache->right &= WM8993_HPOUT1R_VOL_MASK; 194 195 cache->dcs_cfg = dcs_cfg; 196 197 list_add_tail(&cache->list, &hubs->dcs_cache); 198 } 199 200 static int wm_hubs_read_dc_servo(struct snd_soc_codec *codec, 201 u16 *reg_l, u16 *reg_r) 202 { 203 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 204 u16 dcs_reg, reg; 205 int ret = 0; 206 207 switch (hubs->dcs_readback_mode) { 208 case 2: 209 dcs_reg = WM8994_DC_SERVO_4E; 210 break; 211 case 1: 212 dcs_reg = WM8994_DC_SERVO_READBACK; 213 break; 214 default: 215 dcs_reg = WM8993_DC_SERVO_3; 216 break; 217 } 218 219 /* Different chips in the family support different readback 220 * methods. 221 */ 222 switch (hubs->dcs_readback_mode) { 223 case 0: 224 *reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1) 225 & WM8993_DCS_INTEG_CHAN_0_MASK; 226 *reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2) 227 & WM8993_DCS_INTEG_CHAN_1_MASK; 228 break; 229 case 2: 230 case 1: 231 reg = snd_soc_read(codec, dcs_reg); 232 *reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK) 233 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT; 234 *reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK; 235 break; 236 default: 237 WARN(1, "Unknown DCS readback method\n"); 238 ret = -1; 239 } 240 return ret; 241 } 242 243 /* 244 * Startup calibration of the DC servo 245 */ 246 static void enable_dc_servo(struct snd_soc_codec *codec) 247 { 248 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 249 struct wm_hubs_dcs_cache *cache; 250 s8 offset; 251 u16 reg_l, reg_r, dcs_cfg, dcs_reg; 252 253 switch (hubs->dcs_readback_mode) { 254 case 2: 255 dcs_reg = WM8994_DC_SERVO_4E; 256 break; 257 default: 258 dcs_reg = WM8993_DC_SERVO_3; 259 break; 260 } 261 262 /* If we're using a digital only path and have a previously 263 * callibrated DC servo offset stored then use that. */ 264 if (wm_hubs_dac_hp_direct(codec) && 265 wm_hubs_dcs_cache_get(codec, &cache)) { 266 dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n", 267 cache->dcs_cfg, cache->left, cache->right); 268 snd_soc_write(codec, dcs_reg, cache->dcs_cfg); 269 wait_for_dc_servo(codec, 270 WM8993_DCS_TRIG_DAC_WR_0 | 271 WM8993_DCS_TRIG_DAC_WR_1); 272 return; 273 } 274 275 if (hubs->series_startup) { 276 /* Set for 32 series updates */ 277 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 278 WM8993_DCS_SERIES_NO_01_MASK, 279 32 << WM8993_DCS_SERIES_NO_01_SHIFT); 280 wait_for_dc_servo(codec, 281 WM8993_DCS_TRIG_SERIES_0 | 282 WM8993_DCS_TRIG_SERIES_1); 283 } else { 284 wait_for_dc_servo(codec, 285 WM8993_DCS_TRIG_STARTUP_0 | 286 WM8993_DCS_TRIG_STARTUP_1); 287 } 288 289 if (wm_hubs_read_dc_servo(codec, ®_l, ®_r) < 0) 290 return; 291 292 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r); 293 294 /* Apply correction to DC servo result */ 295 if (hubs->dcs_codes_l || hubs->dcs_codes_r) { 296 dev_dbg(codec->dev, 297 "Applying %d/%d code DC servo correction\n", 298 hubs->dcs_codes_l, hubs->dcs_codes_r); 299 300 /* HPOUT1R */ 301 offset = (s8)reg_r; 302 dev_dbg(codec->dev, "DCS right %d->%d\n", offset, 303 offset + hubs->dcs_codes_r); 304 offset += hubs->dcs_codes_r; 305 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 306 307 /* HPOUT1L */ 308 offset = (s8)reg_l; 309 dev_dbg(codec->dev, "DCS left %d->%d\n", offset, 310 offset + hubs->dcs_codes_l); 311 offset += hubs->dcs_codes_l; 312 dcs_cfg |= (u8)offset; 313 314 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg); 315 316 /* Do it */ 317 snd_soc_write(codec, dcs_reg, dcs_cfg); 318 wait_for_dc_servo(codec, 319 WM8993_DCS_TRIG_DAC_WR_0 | 320 WM8993_DCS_TRIG_DAC_WR_1); 321 } else { 322 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 323 dcs_cfg |= reg_l; 324 } 325 326 /* Save the callibrated offset if we're in class W mode and 327 * therefore don't have any analogue signal mixed in. */ 328 if (wm_hubs_dac_hp_direct(codec)) 329 wm_hubs_dcs_cache_set(codec, dcs_cfg); 330 } 331 332 /* 333 * Update the DC servo calibration on gain changes 334 */ 335 static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, 336 struct snd_ctl_elem_value *ucontrol) 337 { 338 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 339 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 340 int ret; 341 342 ret = snd_soc_put_volsw(kcontrol, ucontrol); 343 344 /* If we're applying an offset correction then updating the 345 * callibration would be likely to introduce further offsets. */ 346 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update) 347 return ret; 348 349 /* Only need to do this if the outputs are active */ 350 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1) 351 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA)) 352 snd_soc_update_bits(codec, 353 WM8993_DC_SERVO_0, 354 WM8993_DCS_TRIG_SINGLE_0 | 355 WM8993_DCS_TRIG_SINGLE_1, 356 WM8993_DCS_TRIG_SINGLE_0 | 357 WM8993_DCS_TRIG_SINGLE_1); 358 359 return ret; 360 } 361 362 static const struct snd_kcontrol_new analogue_snd_controls[] = { 363 SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 364 inpga_tlv), 365 SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 366 SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 367 368 SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 369 inpga_tlv), 370 SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 371 SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 372 373 374 SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 375 inpga_tlv), 376 SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 377 SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 378 379 SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 380 inpga_tlv), 381 SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 382 SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 383 384 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0, 385 inmix_sw_tlv), 386 SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0, 387 inmix_sw_tlv), 388 SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0, 389 inmix_tlv), 390 SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv), 391 SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0, 392 inmix_tlv), 393 394 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0, 395 inmix_sw_tlv), 396 SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0, 397 inmix_sw_tlv), 398 SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0, 399 inmix_tlv), 400 SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv), 401 SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0, 402 inmix_tlv), 403 404 SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1, 405 outmix_tlv), 406 SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1, 407 outmix_tlv), 408 SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1, 409 outmix_tlv), 410 SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1, 411 outmix_tlv), 412 SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1, 413 outmix_tlv), 414 SOC_SINGLE_TLV("Left Output Mixer Right Input Volume", 415 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv), 416 SOC_SINGLE_TLV("Left Output Mixer Left Input Volume", 417 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv), 418 SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1, 419 outmix_tlv), 420 421 SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume", 422 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 423 SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume", 424 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv), 425 SOC_SINGLE_TLV("Right Output Mixer IN1L Volume", 426 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv), 427 SOC_SINGLE_TLV("Right Output Mixer IN1R Volume", 428 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv), 429 SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume", 430 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv), 431 SOC_SINGLE_TLV("Right Output Mixer Left Input Volume", 432 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv), 433 SOC_SINGLE_TLV("Right Output Mixer Right Input Volume", 434 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 435 SOC_SINGLE_TLV("Right Output Mixer DAC Volume", 436 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv), 437 438 SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME, 439 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv), 440 SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME, 441 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0), 442 SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME, 443 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0), 444 445 SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1), 446 SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv), 447 448 SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION, 449 5, 1, 1, wm_hubs_spkmix_tlv), 450 SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION, 451 4, 1, 1, wm_hubs_spkmix_tlv), 452 SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION, 453 3, 1, 1, wm_hubs_spkmix_tlv), 454 455 SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION, 456 5, 1, 1, wm_hubs_spkmix_tlv), 457 SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION, 458 4, 1, 1, wm_hubs_spkmix_tlv), 459 SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION, 460 3, 1, 1, wm_hubs_spkmix_tlv), 461 462 SOC_DOUBLE_R_TLV("Speaker Mixer Volume", 463 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION, 464 0, 3, 1, spkmixout_tlv), 465 SOC_DOUBLE_R_TLV("Speaker Volume", 466 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 467 0, 63, 0, outpga_tlv), 468 SOC_DOUBLE_R("Speaker Switch", 469 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 470 6, 1, 0), 471 SOC_DOUBLE_R("Speaker ZC Switch", 472 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 473 7, 1, 0), 474 SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0, 475 spkboost_tlv), 476 SOC_ENUM("Speaker Reference", speaker_ref), 477 SOC_ENUM("Speaker Mode", speaker_mode), 478 479 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", 480 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME, 481 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo, 482 outpga_tlv), 483 484 SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME, 485 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0), 486 SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME, 487 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0), 488 489 SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1), 490 SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1), 491 SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1, 492 line_tlv), 493 494 SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1), 495 SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1), 496 SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1, 497 line_tlv), 498 }; 499 500 static int hp_supply_event(struct snd_soc_dapm_widget *w, 501 struct snd_kcontrol *kcontrol, int event) 502 { 503 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 504 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 505 506 switch (event) { 507 case SND_SOC_DAPM_PRE_PMU: 508 switch (hubs->hp_startup_mode) { 509 case 0: 510 break; 511 case 1: 512 /* Enable the headphone amp */ 513 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 514 WM8993_HPOUT1L_ENA | 515 WM8993_HPOUT1R_ENA, 516 WM8993_HPOUT1L_ENA | 517 WM8993_HPOUT1R_ENA); 518 519 /* Enable the second stage */ 520 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 521 WM8993_HPOUT1L_DLY | 522 WM8993_HPOUT1R_DLY, 523 WM8993_HPOUT1L_DLY | 524 WM8993_HPOUT1R_DLY); 525 break; 526 default: 527 dev_err(codec->dev, "Unknown HP startup mode %d\n", 528 hubs->hp_startup_mode); 529 break; 530 } 531 break; 532 533 case SND_SOC_DAPM_PRE_PMD: 534 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 535 WM8993_CP_ENA, 0); 536 break; 537 } 538 539 return 0; 540 } 541 542 static int hp_event(struct snd_soc_dapm_widget *w, 543 struct snd_kcontrol *kcontrol, int event) 544 { 545 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 546 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0); 547 548 switch (event) { 549 case SND_SOC_DAPM_POST_PMU: 550 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 551 WM8993_CP_ENA, WM8993_CP_ENA); 552 553 msleep(5); 554 555 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 556 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 557 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA); 558 559 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY; 560 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 561 562 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 563 WM8993_DCS_TIMER_PERIOD_01_MASK, 0); 564 565 enable_dc_servo(codec); 566 567 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT | 568 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT; 569 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 570 break; 571 572 case SND_SOC_DAPM_PRE_PMD: 573 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 574 WM8993_HPOUT1L_OUTP | 575 WM8993_HPOUT1R_OUTP | 576 WM8993_HPOUT1L_RMV_SHORT | 577 WM8993_HPOUT1R_RMV_SHORT, 0); 578 579 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 580 WM8993_HPOUT1L_DLY | 581 WM8993_HPOUT1R_DLY, 0); 582 583 snd_soc_write(codec, WM8993_DC_SERVO_0, 0); 584 585 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 586 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 587 0); 588 break; 589 } 590 591 return 0; 592 } 593 594 static int earpiece_event(struct snd_soc_dapm_widget *w, 595 struct snd_kcontrol *control, int event) 596 { 597 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 598 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA; 599 600 switch (event) { 601 case SND_SOC_DAPM_PRE_PMU: 602 reg |= WM8993_HPOUT2_IN_ENA; 603 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 604 udelay(50); 605 break; 606 607 case SND_SOC_DAPM_POST_PMD: 608 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 609 break; 610 611 default: 612 WARN(1, "Invalid event %d\n", event); 613 break; 614 } 615 616 return 0; 617 } 618 619 static int lineout_event(struct snd_soc_dapm_widget *w, 620 struct snd_kcontrol *control, int event) 621 { 622 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 623 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 624 bool *flag; 625 626 switch (w->shift) { 627 case WM8993_LINEOUT1N_ENA_SHIFT: 628 flag = &hubs->lineout1n_ena; 629 break; 630 case WM8993_LINEOUT1P_ENA_SHIFT: 631 flag = &hubs->lineout1p_ena; 632 break; 633 case WM8993_LINEOUT2N_ENA_SHIFT: 634 flag = &hubs->lineout2n_ena; 635 break; 636 case WM8993_LINEOUT2P_ENA_SHIFT: 637 flag = &hubs->lineout2p_ena; 638 break; 639 default: 640 WARN(1, "Unknown line output"); 641 return -EINVAL; 642 } 643 644 *flag = SND_SOC_DAPM_EVENT_ON(event); 645 646 return 0; 647 } 648 649 static int micbias_event(struct snd_soc_dapm_widget *w, 650 struct snd_kcontrol *kcontrol, int event) 651 { 652 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 653 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 654 655 switch (w->shift) { 656 case WM8993_MICB1_ENA_SHIFT: 657 if (hubs->micb1_delay) 658 msleep(hubs->micb1_delay); 659 break; 660 case WM8993_MICB2_ENA_SHIFT: 661 if (hubs->micb2_delay) 662 msleep(hubs->micb2_delay); 663 break; 664 default: 665 return -EINVAL; 666 } 667 668 return 0; 669 } 670 671 void wm_hubs_update_class_w(struct snd_soc_codec *codec) 672 { 673 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 674 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ; 675 676 if (!wm_hubs_dac_hp_direct(codec)) 677 enable = false; 678 679 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec)) 680 enable = false; 681 682 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled"); 683 684 snd_soc_update_bits(codec, WM8993_CLASS_W_0, 685 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable); 686 687 snd_soc_write(codec, WM8993_LEFT_OUTPUT_VOLUME, 688 snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME)); 689 snd_soc_write(codec, WM8993_RIGHT_OUTPUT_VOLUME, 690 snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME)); 691 } 692 EXPORT_SYMBOL_GPL(wm_hubs_update_class_w); 693 694 #define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \ 695 SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ 696 snd_soc_dapm_get_volsw, class_w_put_volsw) 697 698 static int class_w_put_volsw(struct snd_kcontrol *kcontrol, 699 struct snd_ctl_elem_value *ucontrol) 700 { 701 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 702 int ret; 703 704 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); 705 706 wm_hubs_update_class_w(codec); 707 708 return ret; 709 } 710 711 #define WM_HUBS_ENUM_W(xname, xenum) \ 712 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 713 .info = snd_soc_info_enum_double, \ 714 .get = snd_soc_dapm_get_enum_double, \ 715 .put = class_w_put_double, \ 716 .private_value = (unsigned long)&xenum } 717 718 static int class_w_put_double(struct snd_kcontrol *kcontrol, 719 struct snd_ctl_elem_value *ucontrol) 720 { 721 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 722 int ret; 723 724 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 725 726 wm_hubs_update_class_w(codec); 727 728 return ret; 729 } 730 731 static const char *hp_mux_text[] = { 732 "Mixer", 733 "DAC", 734 }; 735 736 static SOC_ENUM_SINGLE_DECL(hpl_enum, 737 WM8993_OUTPUT_MIXER1, 8, hp_mux_text); 738 739 const struct snd_kcontrol_new wm_hubs_hpl_mux = 740 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum); 741 EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux); 742 743 static SOC_ENUM_SINGLE_DECL(hpr_enum, 744 WM8993_OUTPUT_MIXER2, 8, hp_mux_text); 745 746 const struct snd_kcontrol_new wm_hubs_hpr_mux = 747 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum); 748 EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux); 749 750 static const struct snd_kcontrol_new in1l_pga[] = { 751 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0), 752 SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0), 753 }; 754 755 static const struct snd_kcontrol_new in1r_pga[] = { 756 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0), 757 SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0), 758 }; 759 760 static const struct snd_kcontrol_new in2l_pga[] = { 761 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0), 762 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0), 763 }; 764 765 static const struct snd_kcontrol_new in2r_pga[] = { 766 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0), 767 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0), 768 }; 769 770 static const struct snd_kcontrol_new mixinl[] = { 771 SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0), 772 SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0), 773 }; 774 775 static const struct snd_kcontrol_new mixinr[] = { 776 SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0), 777 SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0), 778 }; 779 780 static const struct snd_kcontrol_new left_output_mixer[] = { 781 WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0), 782 WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0), 783 WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0), 784 WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0), 785 WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0), 786 WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0), 787 WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0), 788 WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0), 789 }; 790 791 static const struct snd_kcontrol_new right_output_mixer[] = { 792 WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0), 793 WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0), 794 WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0), 795 WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0), 796 WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0), 797 WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0), 798 WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0), 799 WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0), 800 }; 801 802 static const struct snd_kcontrol_new earpiece_mixer[] = { 803 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0), 804 SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0), 805 SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0), 806 }; 807 808 static const struct snd_kcontrol_new left_speaker_boost[] = { 809 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0), 810 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0), 811 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0), 812 }; 813 814 static const struct snd_kcontrol_new right_speaker_boost[] = { 815 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0), 816 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0), 817 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0), 818 }; 819 820 static const struct snd_kcontrol_new line1_mix[] = { 821 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0), 822 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0), 823 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 824 }; 825 826 static const struct snd_kcontrol_new line1n_mix[] = { 827 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0), 828 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0), 829 }; 830 831 static const struct snd_kcontrol_new line1p_mix[] = { 832 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 833 }; 834 835 static const struct snd_kcontrol_new line2_mix[] = { 836 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0), 837 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0), 838 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 839 }; 840 841 static const struct snd_kcontrol_new line2n_mix[] = { 842 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0), 843 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0), 844 }; 845 846 static const struct snd_kcontrol_new line2p_mix[] = { 847 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 848 }; 849 850 static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = { 851 SND_SOC_DAPM_INPUT("IN1LN"), 852 SND_SOC_DAPM_INPUT("IN1LP"), 853 SND_SOC_DAPM_INPUT("IN2LN"), 854 SND_SOC_DAPM_INPUT("IN2LP:VXRN"), 855 SND_SOC_DAPM_INPUT("IN1RN"), 856 SND_SOC_DAPM_INPUT("IN1RP"), 857 SND_SOC_DAPM_INPUT("IN2RN"), 858 SND_SOC_DAPM_INPUT("IN2RP:VXRP"), 859 860 SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, 861 micbias_event, SND_SOC_DAPM_POST_PMU), 862 SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, 863 micbias_event, SND_SOC_DAPM_POST_PMU), 864 865 SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0, 866 in1l_pga, ARRAY_SIZE(in1l_pga)), 867 SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0, 868 in1r_pga, ARRAY_SIZE(in1r_pga)), 869 870 SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0, 871 in2l_pga, ARRAY_SIZE(in2l_pga)), 872 SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0, 873 in2r_pga, ARRAY_SIZE(in2r_pga)), 874 875 SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0, 876 mixinl, ARRAY_SIZE(mixinl)), 877 SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0, 878 mixinr, ARRAY_SIZE(mixinr)), 879 880 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0, 881 left_output_mixer, ARRAY_SIZE(left_output_mixer)), 882 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0, 883 right_output_mixer, ARRAY_SIZE(right_output_mixer)), 884 885 SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0), 886 SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0), 887 888 SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event, 889 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 890 SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0, 891 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 892 893 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 894 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)), 895 SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0, 896 NULL, 0, earpiece_event, 897 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 898 899 SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0, 900 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)), 901 SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0, 902 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)), 903 904 SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0), 905 SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0, 906 NULL, 0), 907 SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0, 908 NULL, 0), 909 910 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0, 911 line1_mix, ARRAY_SIZE(line1_mix)), 912 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0, 913 line2_mix, ARRAY_SIZE(line2_mix)), 914 915 SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0, 916 line1n_mix, ARRAY_SIZE(line1n_mix)), 917 SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0, 918 line1p_mix, ARRAY_SIZE(line1p_mix)), 919 SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0, 920 line2n_mix, ARRAY_SIZE(line2n_mix)), 921 SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0, 922 line2p_mix, ARRAY_SIZE(line2p_mix)), 923 924 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0, 925 NULL, 0, lineout_event, 926 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 927 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0, 928 NULL, 0, lineout_event, 929 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 930 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0, 931 NULL, 0, lineout_event, 932 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 933 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0, 934 NULL, 0, lineout_event, 935 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 936 937 SND_SOC_DAPM_OUTPUT("SPKOUTLP"), 938 SND_SOC_DAPM_OUTPUT("SPKOUTLN"), 939 SND_SOC_DAPM_OUTPUT("SPKOUTRP"), 940 SND_SOC_DAPM_OUTPUT("SPKOUTRN"), 941 SND_SOC_DAPM_OUTPUT("HPOUT1L"), 942 SND_SOC_DAPM_OUTPUT("HPOUT1R"), 943 SND_SOC_DAPM_OUTPUT("HPOUT2P"), 944 SND_SOC_DAPM_OUTPUT("HPOUT2N"), 945 SND_SOC_DAPM_OUTPUT("LINEOUT1P"), 946 SND_SOC_DAPM_OUTPUT("LINEOUT1N"), 947 SND_SOC_DAPM_OUTPUT("LINEOUT2P"), 948 SND_SOC_DAPM_OUTPUT("LINEOUT2N"), 949 }; 950 951 static const struct snd_soc_dapm_route analogue_routes[] = { 952 { "MICBIAS1", NULL, "CLK_SYS" }, 953 { "MICBIAS2", NULL, "CLK_SYS" }, 954 955 { "IN1L PGA", "IN1LP Switch", "IN1LP" }, 956 { "IN1L PGA", "IN1LN Switch", "IN1LN" }, 957 958 { "IN1L PGA", NULL, "VMID" }, 959 { "IN1R PGA", NULL, "VMID" }, 960 { "IN2L PGA", NULL, "VMID" }, 961 { "IN2R PGA", NULL, "VMID" }, 962 963 { "IN1R PGA", "IN1RP Switch", "IN1RP" }, 964 { "IN1R PGA", "IN1RN Switch", "IN1RN" }, 965 966 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" }, 967 { "IN2L PGA", "IN2LN Switch", "IN2LN" }, 968 969 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" }, 970 { "IN2R PGA", "IN2RN Switch", "IN2RN" }, 971 972 { "Direct Voice", NULL, "IN2LP:VXRN" }, 973 { "Direct Voice", NULL, "IN2RP:VXRP" }, 974 975 { "MIXINL", "IN1L Switch", "IN1L PGA" }, 976 { "MIXINL", "IN2L Switch", "IN2L PGA" }, 977 { "MIXINL", NULL, "Direct Voice" }, 978 { "MIXINL", NULL, "IN1LP" }, 979 { "MIXINL", NULL, "Left Output Mixer" }, 980 { "MIXINL", NULL, "VMID" }, 981 982 { "MIXINR", "IN1R Switch", "IN1R PGA" }, 983 { "MIXINR", "IN2R Switch", "IN2R PGA" }, 984 { "MIXINR", NULL, "Direct Voice" }, 985 { "MIXINR", NULL, "IN1RP" }, 986 { "MIXINR", NULL, "Right Output Mixer" }, 987 { "MIXINR", NULL, "VMID" }, 988 989 { "ADCL", NULL, "MIXINL" }, 990 { "ADCR", NULL, "MIXINR" }, 991 992 { "Left Output Mixer", "Left Input Switch", "MIXINL" }, 993 { "Left Output Mixer", "Right Input Switch", "MIXINR" }, 994 { "Left Output Mixer", "IN2RN Switch", "IN2RN" }, 995 { "Left Output Mixer", "IN2LN Switch", "IN2LN" }, 996 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" }, 997 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" }, 998 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" }, 999 1000 { "Right Output Mixer", "Left Input Switch", "MIXINL" }, 1001 { "Right Output Mixer", "Right Input Switch", "MIXINR" }, 1002 { "Right Output Mixer", "IN2LN Switch", "IN2LN" }, 1003 { "Right Output Mixer", "IN2RN Switch", "IN2RN" }, 1004 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" }, 1005 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" }, 1006 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" }, 1007 1008 { "Left Output PGA", NULL, "Left Output Mixer" }, 1009 { "Left Output PGA", NULL, "TOCLK" }, 1010 1011 { "Right Output PGA", NULL, "Right Output Mixer" }, 1012 { "Right Output PGA", NULL, "TOCLK" }, 1013 1014 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" }, 1015 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" }, 1016 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" }, 1017 1018 { "Earpiece Driver", NULL, "VMID" }, 1019 { "Earpiece Driver", NULL, "Earpiece Mixer" }, 1020 { "HPOUT2N", NULL, "Earpiece Driver" }, 1021 { "HPOUT2P", NULL, "Earpiece Driver" }, 1022 1023 { "SPKL", "Input Switch", "MIXINL" }, 1024 { "SPKL", "IN1LP Switch", "IN1LP" }, 1025 { "SPKL", "Output Switch", "Left Output PGA" }, 1026 { "SPKL", NULL, "TOCLK" }, 1027 1028 { "SPKR", "Input Switch", "MIXINR" }, 1029 { "SPKR", "IN1RP Switch", "IN1RP" }, 1030 { "SPKR", "Output Switch", "Right Output PGA" }, 1031 { "SPKR", NULL, "TOCLK" }, 1032 1033 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" }, 1034 { "SPKL Boost", "SPKL Switch", "SPKL" }, 1035 { "SPKL Boost", "SPKR Switch", "SPKR" }, 1036 1037 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" }, 1038 { "SPKR Boost", "SPKR Switch", "SPKR" }, 1039 { "SPKR Boost", "SPKL Switch", "SPKL" }, 1040 1041 { "SPKL Driver", NULL, "VMID" }, 1042 { "SPKL Driver", NULL, "SPKL Boost" }, 1043 { "SPKL Driver", NULL, "CLK_SYS" }, 1044 { "SPKL Driver", NULL, "TSHUT" }, 1045 1046 { "SPKR Driver", NULL, "VMID" }, 1047 { "SPKR Driver", NULL, "SPKR Boost" }, 1048 { "SPKR Driver", NULL, "CLK_SYS" }, 1049 { "SPKR Driver", NULL, "TSHUT" }, 1050 1051 { "SPKOUTLP", NULL, "SPKL Driver" }, 1052 { "SPKOUTLN", NULL, "SPKL Driver" }, 1053 { "SPKOUTRP", NULL, "SPKR Driver" }, 1054 { "SPKOUTRN", NULL, "SPKR Driver" }, 1055 1056 { "Left Headphone Mux", "Mixer", "Left Output PGA" }, 1057 { "Right Headphone Mux", "Mixer", "Right Output PGA" }, 1058 1059 { "Headphone PGA", NULL, "Left Headphone Mux" }, 1060 { "Headphone PGA", NULL, "Right Headphone Mux" }, 1061 { "Headphone PGA", NULL, "VMID" }, 1062 { "Headphone PGA", NULL, "CLK_SYS" }, 1063 { "Headphone PGA", NULL, "Headphone Supply" }, 1064 1065 { "HPOUT1L", NULL, "Headphone PGA" }, 1066 { "HPOUT1R", NULL, "Headphone PGA" }, 1067 1068 { "LINEOUT1N Driver", NULL, "VMID" }, 1069 { "LINEOUT1P Driver", NULL, "VMID" }, 1070 { "LINEOUT2N Driver", NULL, "VMID" }, 1071 { "LINEOUT2P Driver", NULL, "VMID" }, 1072 1073 { "LINEOUT1N", NULL, "LINEOUT1N Driver" }, 1074 { "LINEOUT1P", NULL, "LINEOUT1P Driver" }, 1075 { "LINEOUT2N", NULL, "LINEOUT2N Driver" }, 1076 { "LINEOUT2P", NULL, "LINEOUT2P Driver" }, 1077 }; 1078 1079 static const struct snd_soc_dapm_route lineout1_diff_routes[] = { 1080 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" }, 1081 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" }, 1082 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" }, 1083 1084 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" }, 1085 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" }, 1086 }; 1087 1088 static const struct snd_soc_dapm_route lineout1_se_routes[] = { 1089 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" }, 1090 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" }, 1091 1092 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" }, 1093 1094 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" }, 1095 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" }, 1096 }; 1097 1098 static const struct snd_soc_dapm_route lineout2_diff_routes[] = { 1099 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" }, 1100 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" }, 1101 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" }, 1102 1103 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" }, 1104 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" }, 1105 }; 1106 1107 static const struct snd_soc_dapm_route lineout2_se_routes[] = { 1108 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" }, 1109 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" }, 1110 1111 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" }, 1112 1113 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" }, 1114 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" }, 1115 }; 1116 1117 int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec) 1118 { 1119 struct snd_soc_dapm_context *dapm = &codec->dapm; 1120 1121 /* Latch volume update bits & default ZC on */ 1122 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 1123 WM8993_IN1_VU, WM8993_IN1_VU); 1124 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 1125 WM8993_IN1_VU, WM8993_IN1_VU); 1126 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 1127 WM8993_IN2_VU, WM8993_IN2_VU); 1128 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 1129 WM8993_IN2_VU, WM8993_IN2_VU); 1130 1131 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT, 1132 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 1133 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT, 1134 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 1135 1136 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME, 1137 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC, 1138 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC); 1139 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME, 1140 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC, 1141 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC); 1142 1143 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME, 1144 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU, 1145 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU); 1146 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME, 1147 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU, 1148 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU); 1149 1150 snd_soc_add_codec_controls(codec, analogue_snd_controls, 1151 ARRAY_SIZE(analogue_snd_controls)); 1152 1153 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets, 1154 ARRAY_SIZE(analogue_dapm_widgets)); 1155 return 0; 1156 } 1157 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls); 1158 1159 int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec, 1160 int lineout1_diff, int lineout2_diff) 1161 { 1162 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1163 struct snd_soc_dapm_context *dapm = &codec->dapm; 1164 1165 hubs->codec = codec; 1166 1167 INIT_LIST_HEAD(&hubs->dcs_cache); 1168 init_completion(&hubs->dcs_done); 1169 1170 snd_soc_dapm_add_routes(dapm, analogue_routes, 1171 ARRAY_SIZE(analogue_routes)); 1172 1173 if (lineout1_diff) 1174 snd_soc_dapm_add_routes(dapm, 1175 lineout1_diff_routes, 1176 ARRAY_SIZE(lineout1_diff_routes)); 1177 else 1178 snd_soc_dapm_add_routes(dapm, 1179 lineout1_se_routes, 1180 ARRAY_SIZE(lineout1_se_routes)); 1181 1182 if (lineout2_diff) 1183 snd_soc_dapm_add_routes(dapm, 1184 lineout2_diff_routes, 1185 ARRAY_SIZE(lineout2_diff_routes)); 1186 else 1187 snd_soc_dapm_add_routes(dapm, 1188 lineout2_se_routes, 1189 ARRAY_SIZE(lineout2_se_routes)); 1190 1191 return 0; 1192 } 1193 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes); 1194 1195 int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec, 1196 int lineout1_diff, int lineout2_diff, 1197 int lineout1fb, int lineout2fb, 1198 int jd_scthr, int jd_thr, 1199 int micbias1_delay, int micbias2_delay, 1200 int micbias1_lvl, int micbias2_lvl) 1201 { 1202 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1203 1204 hubs->lineout1_se = !lineout1_diff; 1205 hubs->lineout2_se = !lineout2_diff; 1206 hubs->micb1_delay = micbias1_delay; 1207 hubs->micb2_delay = micbias2_delay; 1208 1209 if (!lineout1_diff) 1210 snd_soc_update_bits(codec, WM8993_LINE_MIXER1, 1211 WM8993_LINEOUT1_MODE, 1212 WM8993_LINEOUT1_MODE); 1213 if (!lineout2_diff) 1214 snd_soc_update_bits(codec, WM8993_LINE_MIXER2, 1215 WM8993_LINEOUT2_MODE, 1216 WM8993_LINEOUT2_MODE); 1217 1218 if (!lineout1_diff && !lineout2_diff) 1219 snd_soc_update_bits(codec, WM8993_ANTIPOP1, 1220 WM8993_LINEOUT_VMID_BUF_ENA, 1221 WM8993_LINEOUT_VMID_BUF_ENA); 1222 1223 if (lineout1fb) 1224 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1225 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB); 1226 1227 if (lineout2fb) 1228 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1229 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB); 1230 1231 snd_soc_update_bits(codec, WM8993_MICBIAS, 1232 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK | 1233 WM8993_MICB1_LVL | WM8993_MICB2_LVL, 1234 jd_scthr << WM8993_JD_SCTHR_SHIFT | 1235 jd_thr << WM8993_JD_THR_SHIFT | 1236 micbias1_lvl | 1237 micbias2_lvl << WM8993_MICB2_LVL_SHIFT); 1238 1239 return 0; 1240 } 1241 EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata); 1242 1243 void wm_hubs_vmid_ena(struct snd_soc_codec *codec) 1244 { 1245 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1246 int val = 0; 1247 1248 if (hubs->lineout1_se) 1249 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1250 1251 if (hubs->lineout2_se) 1252 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1253 1254 /* Enable the line outputs while we power up */ 1255 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val); 1256 } 1257 EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena); 1258 1259 void wm_hubs_set_bias_level(struct snd_soc_codec *codec, 1260 enum snd_soc_bias_level level) 1261 { 1262 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1263 int mask, val; 1264 1265 switch (level) { 1266 case SND_SOC_BIAS_STANDBY: 1267 /* Clamp the inputs to VMID while we ramp to charge caps */ 1268 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1269 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP); 1270 break; 1271 1272 case SND_SOC_BIAS_ON: 1273 /* Turn off any unneded single ended outputs */ 1274 val = 0; 1275 mask = 0; 1276 1277 if (hubs->lineout1_se) 1278 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1279 1280 if (hubs->lineout2_se) 1281 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1282 1283 if (hubs->lineout1_se && hubs->lineout1n_ena) 1284 val |= WM8993_LINEOUT1N_ENA; 1285 1286 if (hubs->lineout1_se && hubs->lineout1p_ena) 1287 val |= WM8993_LINEOUT1P_ENA; 1288 1289 if (hubs->lineout2_se && hubs->lineout2n_ena) 1290 val |= WM8993_LINEOUT2N_ENA; 1291 1292 if (hubs->lineout2_se && hubs->lineout2p_ena) 1293 val |= WM8993_LINEOUT2P_ENA; 1294 1295 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, 1296 mask, val); 1297 1298 /* Remove the input clamps */ 1299 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1300 WM8993_INPUTS_CLAMP, 0); 1301 break; 1302 1303 default: 1304 break; 1305 } 1306 } 1307 EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level); 1308 1309 MODULE_DESCRIPTION("Shared support for Wolfson hubs products"); 1310 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 1311 MODULE_LICENSE("GPL"); 1312