1 /* 2 * wm_hubs.c -- WM8993/4 common code 3 * 4 * Copyright 2009-12 Wolfson Microelectronics plc 5 * 6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 7 * 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/mfd/wm8994/registers.h> 21 #include <sound/core.h> 22 #include <sound/pcm.h> 23 #include <sound/pcm_params.h> 24 #include <sound/soc.h> 25 #include <sound/initval.h> 26 #include <sound/tlv.h> 27 28 #include "wm8993.h" 29 #include "wm_hubs.h" 30 31 const DECLARE_TLV_DB_SCALE(wm_hubs_spkmix_tlv, -300, 300, 0); 32 EXPORT_SYMBOL_GPL(wm_hubs_spkmix_tlv); 33 34 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1650, 150, 0); 35 static const DECLARE_TLV_DB_SCALE(inmix_sw_tlv, 0, 3000, 0); 36 static const DECLARE_TLV_DB_SCALE(inmix_tlv, -1500, 300, 1); 37 static const DECLARE_TLV_DB_SCALE(earpiece_tlv, -600, 600, 0); 38 static const DECLARE_TLV_DB_SCALE(outmix_tlv, -2100, 300, 0); 39 static const DECLARE_TLV_DB_SCALE(spkmixout_tlv, -1800, 600, 1); 40 static const DECLARE_TLV_DB_SCALE(outpga_tlv, -5700, 100, 0); 41 static const DECLARE_TLV_DB_RANGE(spkboost_tlv, 42 0, 6, TLV_DB_SCALE_ITEM(0, 150, 0), 43 7, 7, TLV_DB_SCALE_ITEM(1200, 0, 0) 44 ); 45 static const DECLARE_TLV_DB_SCALE(line_tlv, -600, 600, 0); 46 47 static const char *speaker_ref_text[] = { 48 "SPKVDD/2", 49 "VMID", 50 }; 51 52 static SOC_ENUM_SINGLE_DECL(speaker_ref, 53 WM8993_SPEAKER_MIXER, 8, speaker_ref_text); 54 55 static const char *speaker_mode_text[] = { 56 "Class D", 57 "Class AB", 58 }; 59 60 static SOC_ENUM_SINGLE_DECL(speaker_mode, 61 WM8993_SPKMIXR_ATTENUATION, 8, speaker_mode_text); 62 63 static void wait_for_dc_servo(struct snd_soc_codec *codec, unsigned int op) 64 { 65 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 66 unsigned int reg; 67 int count = 0; 68 int timeout; 69 unsigned int val; 70 71 val = op | WM8993_DCS_ENA_CHAN_0 | WM8993_DCS_ENA_CHAN_1; 72 73 /* Trigger the command */ 74 snd_soc_write(codec, WM8993_DC_SERVO_0, val); 75 76 dev_dbg(codec->dev, "Waiting for DC servo...\n"); 77 78 if (hubs->dcs_done_irq) 79 timeout = 4; 80 else 81 timeout = 400; 82 83 do { 84 count++; 85 86 if (hubs->dcs_done_irq) 87 wait_for_completion_timeout(&hubs->dcs_done, 88 msecs_to_jiffies(250)); 89 else 90 msleep(1); 91 92 reg = snd_soc_read(codec, WM8993_DC_SERVO_0); 93 dev_dbg(codec->dev, "DC servo: %x\n", reg); 94 } while (reg & op && count < timeout); 95 96 if (reg & op) 97 dev_err(codec->dev, "Timed out waiting for DC Servo %x\n", 98 op); 99 } 100 101 irqreturn_t wm_hubs_dcs_done(int irq, void *data) 102 { 103 struct wm_hubs_data *hubs = data; 104 105 complete(&hubs->dcs_done); 106 107 return IRQ_HANDLED; 108 } 109 EXPORT_SYMBOL_GPL(wm_hubs_dcs_done); 110 111 static bool wm_hubs_dac_hp_direct(struct snd_soc_codec *codec) 112 { 113 int reg; 114 115 /* If we're going via the mixer we'll need to do additional checks */ 116 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER1); 117 if (!(reg & WM8993_DACL_TO_HPOUT1L)) { 118 if (reg & ~WM8993_DACL_TO_MIXOUTL) { 119 dev_vdbg(codec->dev, "Analogue paths connected: %x\n", 120 reg & ~WM8993_DACL_TO_HPOUT1L); 121 return false; 122 } else { 123 dev_vdbg(codec->dev, "HPL connected to mixer\n"); 124 } 125 } else { 126 dev_vdbg(codec->dev, "HPL connected to DAC\n"); 127 } 128 129 reg = snd_soc_read(codec, WM8993_OUTPUT_MIXER2); 130 if (!(reg & WM8993_DACR_TO_HPOUT1R)) { 131 if (reg & ~WM8993_DACR_TO_MIXOUTR) { 132 dev_vdbg(codec->dev, "Analogue paths connected: %x\n", 133 reg & ~WM8993_DACR_TO_HPOUT1R); 134 return false; 135 } else { 136 dev_vdbg(codec->dev, "HPR connected to mixer\n"); 137 } 138 } else { 139 dev_vdbg(codec->dev, "HPR connected to DAC\n"); 140 } 141 142 return true; 143 } 144 145 struct wm_hubs_dcs_cache { 146 struct list_head list; 147 unsigned int left; 148 unsigned int right; 149 u16 dcs_cfg; 150 }; 151 152 static bool wm_hubs_dcs_cache_get(struct snd_soc_codec *codec, 153 struct wm_hubs_dcs_cache **entry) 154 { 155 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 156 struct wm_hubs_dcs_cache *cache; 157 unsigned int left, right; 158 159 left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); 160 left &= WM8993_HPOUT1L_VOL_MASK; 161 162 right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME); 163 right &= WM8993_HPOUT1R_VOL_MASK; 164 165 list_for_each_entry(cache, &hubs->dcs_cache, list) { 166 if (cache->left != left || cache->right != right) 167 continue; 168 169 *entry = cache; 170 return true; 171 } 172 173 return false; 174 } 175 176 static void wm_hubs_dcs_cache_set(struct snd_soc_codec *codec, u16 dcs_cfg) 177 { 178 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 179 struct wm_hubs_dcs_cache *cache; 180 181 if (hubs->no_cache_dac_hp_direct) 182 return; 183 184 cache = devm_kzalloc(codec->dev, sizeof(*cache), GFP_KERNEL); 185 if (!cache) 186 return; 187 188 cache->left = snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME); 189 cache->left &= WM8993_HPOUT1L_VOL_MASK; 190 191 cache->right = snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME); 192 cache->right &= WM8993_HPOUT1R_VOL_MASK; 193 194 cache->dcs_cfg = dcs_cfg; 195 196 list_add_tail(&cache->list, &hubs->dcs_cache); 197 } 198 199 static int wm_hubs_read_dc_servo(struct snd_soc_codec *codec, 200 u16 *reg_l, u16 *reg_r) 201 { 202 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 203 u16 dcs_reg, reg; 204 int ret = 0; 205 206 switch (hubs->dcs_readback_mode) { 207 case 2: 208 dcs_reg = WM8994_DC_SERVO_4E; 209 break; 210 case 1: 211 dcs_reg = WM8994_DC_SERVO_READBACK; 212 break; 213 default: 214 dcs_reg = WM8993_DC_SERVO_3; 215 break; 216 } 217 218 /* Different chips in the family support different readback 219 * methods. 220 */ 221 switch (hubs->dcs_readback_mode) { 222 case 0: 223 *reg_l = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_1) 224 & WM8993_DCS_INTEG_CHAN_0_MASK; 225 *reg_r = snd_soc_read(codec, WM8993_DC_SERVO_READBACK_2) 226 & WM8993_DCS_INTEG_CHAN_1_MASK; 227 break; 228 case 2: 229 case 1: 230 reg = snd_soc_read(codec, dcs_reg); 231 *reg_r = (reg & WM8993_DCS_DAC_WR_VAL_1_MASK) 232 >> WM8993_DCS_DAC_WR_VAL_1_SHIFT; 233 *reg_l = reg & WM8993_DCS_DAC_WR_VAL_0_MASK; 234 break; 235 default: 236 WARN(1, "Unknown DCS readback method\n"); 237 ret = -1; 238 } 239 return ret; 240 } 241 242 /* 243 * Startup calibration of the DC servo 244 */ 245 static void enable_dc_servo(struct snd_soc_codec *codec) 246 { 247 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 248 struct wm_hubs_dcs_cache *cache; 249 s8 offset; 250 u16 reg_l, reg_r, dcs_cfg, dcs_reg; 251 252 switch (hubs->dcs_readback_mode) { 253 case 2: 254 dcs_reg = WM8994_DC_SERVO_4E; 255 break; 256 default: 257 dcs_reg = WM8993_DC_SERVO_3; 258 break; 259 } 260 261 /* If we're using a digital only path and have a previously 262 * callibrated DC servo offset stored then use that. */ 263 if (wm_hubs_dac_hp_direct(codec) && 264 wm_hubs_dcs_cache_get(codec, &cache)) { 265 dev_dbg(codec->dev, "Using cached DCS offset %x for %d,%d\n", 266 cache->dcs_cfg, cache->left, cache->right); 267 snd_soc_write(codec, dcs_reg, cache->dcs_cfg); 268 wait_for_dc_servo(codec, 269 WM8993_DCS_TRIG_DAC_WR_0 | 270 WM8993_DCS_TRIG_DAC_WR_1); 271 return; 272 } 273 274 if (hubs->series_startup) { 275 /* Set for 32 series updates */ 276 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 277 WM8993_DCS_SERIES_NO_01_MASK, 278 32 << WM8993_DCS_SERIES_NO_01_SHIFT); 279 wait_for_dc_servo(codec, 280 WM8993_DCS_TRIG_SERIES_0 | 281 WM8993_DCS_TRIG_SERIES_1); 282 } else { 283 wait_for_dc_servo(codec, 284 WM8993_DCS_TRIG_STARTUP_0 | 285 WM8993_DCS_TRIG_STARTUP_1); 286 } 287 288 if (wm_hubs_read_dc_servo(codec, ®_l, ®_r) < 0) 289 return; 290 291 dev_dbg(codec->dev, "DCS input: %x %x\n", reg_l, reg_r); 292 293 /* Apply correction to DC servo result */ 294 if (hubs->dcs_codes_l || hubs->dcs_codes_r) { 295 dev_dbg(codec->dev, 296 "Applying %d/%d code DC servo correction\n", 297 hubs->dcs_codes_l, hubs->dcs_codes_r); 298 299 /* HPOUT1R */ 300 offset = (s8)reg_r; 301 dev_dbg(codec->dev, "DCS right %d->%d\n", offset, 302 offset + hubs->dcs_codes_r); 303 offset += hubs->dcs_codes_r; 304 dcs_cfg = (u8)offset << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 305 306 /* HPOUT1L */ 307 offset = (s8)reg_l; 308 dev_dbg(codec->dev, "DCS left %d->%d\n", offset, 309 offset + hubs->dcs_codes_l); 310 offset += hubs->dcs_codes_l; 311 dcs_cfg |= (u8)offset; 312 313 dev_dbg(codec->dev, "DCS result: %x\n", dcs_cfg); 314 315 /* Do it */ 316 snd_soc_write(codec, dcs_reg, dcs_cfg); 317 wait_for_dc_servo(codec, 318 WM8993_DCS_TRIG_DAC_WR_0 | 319 WM8993_DCS_TRIG_DAC_WR_1); 320 } else { 321 dcs_cfg = reg_r << WM8993_DCS_DAC_WR_VAL_1_SHIFT; 322 dcs_cfg |= reg_l; 323 } 324 325 /* Save the callibrated offset if we're in class W mode and 326 * therefore don't have any analogue signal mixed in. */ 327 if (wm_hubs_dac_hp_direct(codec)) 328 wm_hubs_dcs_cache_set(codec, dcs_cfg); 329 } 330 331 /* 332 * Update the DC servo calibration on gain changes 333 */ 334 static int wm8993_put_dc_servo(struct snd_kcontrol *kcontrol, 335 struct snd_ctl_elem_value *ucontrol) 336 { 337 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 338 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 339 int ret; 340 341 ret = snd_soc_put_volsw(kcontrol, ucontrol); 342 343 /* If we're applying an offset correction then updating the 344 * callibration would be likely to introduce further offsets. */ 345 if (hubs->dcs_codes_l || hubs->dcs_codes_r || hubs->no_series_update) 346 return ret; 347 348 /* Only need to do this if the outputs are active */ 349 if (snd_soc_read(codec, WM8993_POWER_MANAGEMENT_1) 350 & (WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA)) 351 snd_soc_update_bits(codec, 352 WM8993_DC_SERVO_0, 353 WM8993_DCS_TRIG_SINGLE_0 | 354 WM8993_DCS_TRIG_SINGLE_1, 355 WM8993_DCS_TRIG_SINGLE_0 | 356 WM8993_DCS_TRIG_SINGLE_1); 357 358 return ret; 359 } 360 361 static const struct snd_kcontrol_new analogue_snd_controls[] = { 362 SOC_SINGLE_TLV("IN1L Volume", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 363 inpga_tlv), 364 SOC_SINGLE("IN1L Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 365 SOC_SINGLE("IN1L ZC Switch", WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 366 367 SOC_SINGLE_TLV("IN1R Volume", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 0, 31, 0, 368 inpga_tlv), 369 SOC_SINGLE("IN1R Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 7, 1, 1), 370 SOC_SINGLE("IN1R ZC Switch", WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 6, 1, 0), 371 372 373 SOC_SINGLE_TLV("IN2L Volume", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 374 inpga_tlv), 375 SOC_SINGLE("IN2L Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 376 SOC_SINGLE("IN2L ZC Switch", WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 377 378 SOC_SINGLE_TLV("IN2R Volume", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 0, 31, 0, 379 inpga_tlv), 380 SOC_SINGLE("IN2R Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 7, 1, 1), 381 SOC_SINGLE("IN2R ZC Switch", WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 6, 1, 0), 382 383 SOC_SINGLE_TLV("MIXINL IN2L Volume", WM8993_INPUT_MIXER3, 7, 1, 0, 384 inmix_sw_tlv), 385 SOC_SINGLE_TLV("MIXINL IN1L Volume", WM8993_INPUT_MIXER3, 4, 1, 0, 386 inmix_sw_tlv), 387 SOC_SINGLE_TLV("MIXINL Output Record Volume", WM8993_INPUT_MIXER3, 0, 7, 0, 388 inmix_tlv), 389 SOC_SINGLE_TLV("MIXINL IN1LP Volume", WM8993_INPUT_MIXER5, 6, 7, 0, inmix_tlv), 390 SOC_SINGLE_TLV("MIXINL Direct Voice Volume", WM8993_INPUT_MIXER5, 0, 6, 0, 391 inmix_tlv), 392 393 SOC_SINGLE_TLV("MIXINR IN2R Volume", WM8993_INPUT_MIXER4, 7, 1, 0, 394 inmix_sw_tlv), 395 SOC_SINGLE_TLV("MIXINR IN1R Volume", WM8993_INPUT_MIXER4, 4, 1, 0, 396 inmix_sw_tlv), 397 SOC_SINGLE_TLV("MIXINR Output Record Volume", WM8993_INPUT_MIXER4, 0, 7, 0, 398 inmix_tlv), 399 SOC_SINGLE_TLV("MIXINR IN1RP Volume", WM8993_INPUT_MIXER6, 6, 7, 0, inmix_tlv), 400 SOC_SINGLE_TLV("MIXINR Direct Voice Volume", WM8993_INPUT_MIXER6, 0, 6, 0, 401 inmix_tlv), 402 403 SOC_SINGLE_TLV("Left Output Mixer IN2RN Volume", WM8993_OUTPUT_MIXER5, 6, 7, 1, 404 outmix_tlv), 405 SOC_SINGLE_TLV("Left Output Mixer IN2LN Volume", WM8993_OUTPUT_MIXER3, 6, 7, 1, 406 outmix_tlv), 407 SOC_SINGLE_TLV("Left Output Mixer IN2LP Volume", WM8993_OUTPUT_MIXER3, 9, 7, 1, 408 outmix_tlv), 409 SOC_SINGLE_TLV("Left Output Mixer IN1L Volume", WM8993_OUTPUT_MIXER3, 0, 7, 1, 410 outmix_tlv), 411 SOC_SINGLE_TLV("Left Output Mixer IN1R Volume", WM8993_OUTPUT_MIXER3, 3, 7, 1, 412 outmix_tlv), 413 SOC_SINGLE_TLV("Left Output Mixer Right Input Volume", 414 WM8993_OUTPUT_MIXER5, 3, 7, 1, outmix_tlv), 415 SOC_SINGLE_TLV("Left Output Mixer Left Input Volume", 416 WM8993_OUTPUT_MIXER5, 0, 7, 1, outmix_tlv), 417 SOC_SINGLE_TLV("Left Output Mixer DAC Volume", WM8993_OUTPUT_MIXER5, 9, 7, 1, 418 outmix_tlv), 419 420 SOC_SINGLE_TLV("Right Output Mixer IN2LN Volume", 421 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 422 SOC_SINGLE_TLV("Right Output Mixer IN2RN Volume", 423 WM8993_OUTPUT_MIXER4, 6, 7, 1, outmix_tlv), 424 SOC_SINGLE_TLV("Right Output Mixer IN1L Volume", 425 WM8993_OUTPUT_MIXER4, 3, 7, 1, outmix_tlv), 426 SOC_SINGLE_TLV("Right Output Mixer IN1R Volume", 427 WM8993_OUTPUT_MIXER4, 0, 7, 1, outmix_tlv), 428 SOC_SINGLE_TLV("Right Output Mixer IN2RP Volume", 429 WM8993_OUTPUT_MIXER4, 9, 7, 1, outmix_tlv), 430 SOC_SINGLE_TLV("Right Output Mixer Left Input Volume", 431 WM8993_OUTPUT_MIXER6, 3, 7, 1, outmix_tlv), 432 SOC_SINGLE_TLV("Right Output Mixer Right Input Volume", 433 WM8993_OUTPUT_MIXER6, 6, 7, 1, outmix_tlv), 434 SOC_SINGLE_TLV("Right Output Mixer DAC Volume", 435 WM8993_OUTPUT_MIXER6, 9, 7, 1, outmix_tlv), 436 437 SOC_DOUBLE_R_TLV("Output Volume", WM8993_LEFT_OPGA_VOLUME, 438 WM8993_RIGHT_OPGA_VOLUME, 0, 63, 0, outpga_tlv), 439 SOC_DOUBLE_R("Output Switch", WM8993_LEFT_OPGA_VOLUME, 440 WM8993_RIGHT_OPGA_VOLUME, 6, 1, 0), 441 SOC_DOUBLE_R("Output ZC Switch", WM8993_LEFT_OPGA_VOLUME, 442 WM8993_RIGHT_OPGA_VOLUME, 7, 1, 0), 443 444 SOC_SINGLE("Earpiece Switch", WM8993_HPOUT2_VOLUME, 5, 1, 1), 445 SOC_SINGLE_TLV("Earpiece Volume", WM8993_HPOUT2_VOLUME, 4, 1, 1, earpiece_tlv), 446 447 SOC_SINGLE_TLV("SPKL Input Volume", WM8993_SPKMIXL_ATTENUATION, 448 5, 1, 1, wm_hubs_spkmix_tlv), 449 SOC_SINGLE_TLV("SPKL IN1LP Volume", WM8993_SPKMIXL_ATTENUATION, 450 4, 1, 1, wm_hubs_spkmix_tlv), 451 SOC_SINGLE_TLV("SPKL Output Volume", WM8993_SPKMIXL_ATTENUATION, 452 3, 1, 1, wm_hubs_spkmix_tlv), 453 454 SOC_SINGLE_TLV("SPKR Input Volume", WM8993_SPKMIXR_ATTENUATION, 455 5, 1, 1, wm_hubs_spkmix_tlv), 456 SOC_SINGLE_TLV("SPKR IN1RP Volume", WM8993_SPKMIXR_ATTENUATION, 457 4, 1, 1, wm_hubs_spkmix_tlv), 458 SOC_SINGLE_TLV("SPKR Output Volume", WM8993_SPKMIXR_ATTENUATION, 459 3, 1, 1, wm_hubs_spkmix_tlv), 460 461 SOC_DOUBLE_R_TLV("Speaker Mixer Volume", 462 WM8993_SPKMIXL_ATTENUATION, WM8993_SPKMIXR_ATTENUATION, 463 0, 3, 1, spkmixout_tlv), 464 SOC_DOUBLE_R_TLV("Speaker Volume", 465 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 466 0, 63, 0, outpga_tlv), 467 SOC_DOUBLE_R("Speaker Switch", 468 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 469 6, 1, 0), 470 SOC_DOUBLE_R("Speaker ZC Switch", 471 WM8993_SPEAKER_VOLUME_LEFT, WM8993_SPEAKER_VOLUME_RIGHT, 472 7, 1, 0), 473 SOC_DOUBLE_TLV("Speaker Boost Volume", WM8993_SPKOUT_BOOST, 3, 0, 7, 0, 474 spkboost_tlv), 475 SOC_ENUM("Speaker Reference", speaker_ref), 476 SOC_ENUM("Speaker Mode", speaker_mode), 477 478 SOC_DOUBLE_R_EXT_TLV("Headphone Volume", 479 WM8993_LEFT_OUTPUT_VOLUME, WM8993_RIGHT_OUTPUT_VOLUME, 480 0, 63, 0, snd_soc_get_volsw, wm8993_put_dc_servo, 481 outpga_tlv), 482 483 SOC_DOUBLE_R("Headphone Switch", WM8993_LEFT_OUTPUT_VOLUME, 484 WM8993_RIGHT_OUTPUT_VOLUME, 6, 1, 0), 485 SOC_DOUBLE_R("Headphone ZC Switch", WM8993_LEFT_OUTPUT_VOLUME, 486 WM8993_RIGHT_OUTPUT_VOLUME, 7, 1, 0), 487 488 SOC_SINGLE("LINEOUT1N Switch", WM8993_LINE_OUTPUTS_VOLUME, 6, 1, 1), 489 SOC_SINGLE("LINEOUT1P Switch", WM8993_LINE_OUTPUTS_VOLUME, 5, 1, 1), 490 SOC_SINGLE_TLV("LINEOUT1 Volume", WM8993_LINE_OUTPUTS_VOLUME, 4, 1, 1, 491 line_tlv), 492 493 SOC_SINGLE("LINEOUT2N Switch", WM8993_LINE_OUTPUTS_VOLUME, 2, 1, 1), 494 SOC_SINGLE("LINEOUT2P Switch", WM8993_LINE_OUTPUTS_VOLUME, 1, 1, 1), 495 SOC_SINGLE_TLV("LINEOUT2 Volume", WM8993_LINE_OUTPUTS_VOLUME, 0, 1, 1, 496 line_tlv), 497 }; 498 499 static int hp_supply_event(struct snd_soc_dapm_widget *w, 500 struct snd_kcontrol *kcontrol, int event) 501 { 502 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 503 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 504 505 switch (event) { 506 case SND_SOC_DAPM_PRE_PMU: 507 switch (hubs->hp_startup_mode) { 508 case 0: 509 break; 510 case 1: 511 /* Enable the headphone amp */ 512 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 513 WM8993_HPOUT1L_ENA | 514 WM8993_HPOUT1R_ENA, 515 WM8993_HPOUT1L_ENA | 516 WM8993_HPOUT1R_ENA); 517 518 /* Enable the second stage */ 519 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 520 WM8993_HPOUT1L_DLY | 521 WM8993_HPOUT1R_DLY, 522 WM8993_HPOUT1L_DLY | 523 WM8993_HPOUT1R_DLY); 524 break; 525 default: 526 dev_err(codec->dev, "Unknown HP startup mode %d\n", 527 hubs->hp_startup_mode); 528 break; 529 } 530 break; 531 532 case SND_SOC_DAPM_PRE_PMD: 533 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 534 WM8993_CP_ENA, 0); 535 break; 536 } 537 538 return 0; 539 } 540 541 static int hp_event(struct snd_soc_dapm_widget *w, 542 struct snd_kcontrol *kcontrol, int event) 543 { 544 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 545 unsigned int reg = snd_soc_read(codec, WM8993_ANALOGUE_HP_0); 546 547 switch (event) { 548 case SND_SOC_DAPM_POST_PMU: 549 snd_soc_update_bits(codec, WM8993_CHARGE_PUMP_1, 550 WM8993_CP_ENA, WM8993_CP_ENA); 551 552 msleep(5); 553 554 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 555 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 556 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA); 557 558 reg |= WM8993_HPOUT1L_DLY | WM8993_HPOUT1R_DLY; 559 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 560 561 snd_soc_update_bits(codec, WM8993_DC_SERVO_1, 562 WM8993_DCS_TIMER_PERIOD_01_MASK, 0); 563 564 enable_dc_servo(codec); 565 566 reg |= WM8993_HPOUT1R_OUTP | WM8993_HPOUT1R_RMV_SHORT | 567 WM8993_HPOUT1L_OUTP | WM8993_HPOUT1L_RMV_SHORT; 568 snd_soc_write(codec, WM8993_ANALOGUE_HP_0, reg); 569 break; 570 571 case SND_SOC_DAPM_PRE_PMD: 572 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 573 WM8993_HPOUT1L_OUTP | 574 WM8993_HPOUT1R_OUTP | 575 WM8993_HPOUT1L_RMV_SHORT | 576 WM8993_HPOUT1R_RMV_SHORT, 0); 577 578 snd_soc_update_bits(codec, WM8993_ANALOGUE_HP_0, 579 WM8993_HPOUT1L_DLY | 580 WM8993_HPOUT1R_DLY, 0); 581 582 snd_soc_write(codec, WM8993_DC_SERVO_0, 0); 583 584 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_1, 585 WM8993_HPOUT1L_ENA | WM8993_HPOUT1R_ENA, 586 0); 587 break; 588 } 589 590 return 0; 591 } 592 593 static int earpiece_event(struct snd_soc_dapm_widget *w, 594 struct snd_kcontrol *control, int event) 595 { 596 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 597 u16 reg = snd_soc_read(codec, WM8993_ANTIPOP1) & ~WM8993_HPOUT2_IN_ENA; 598 599 switch (event) { 600 case SND_SOC_DAPM_PRE_PMU: 601 reg |= WM8993_HPOUT2_IN_ENA; 602 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 603 udelay(50); 604 break; 605 606 case SND_SOC_DAPM_POST_PMD: 607 snd_soc_write(codec, WM8993_ANTIPOP1, reg); 608 break; 609 610 default: 611 WARN(1, "Invalid event %d\n", event); 612 break; 613 } 614 615 return 0; 616 } 617 618 static int lineout_event(struct snd_soc_dapm_widget *w, 619 struct snd_kcontrol *control, int event) 620 { 621 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 622 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 623 bool *flag; 624 625 switch (w->shift) { 626 case WM8993_LINEOUT1N_ENA_SHIFT: 627 flag = &hubs->lineout1n_ena; 628 break; 629 case WM8993_LINEOUT1P_ENA_SHIFT: 630 flag = &hubs->lineout1p_ena; 631 break; 632 case WM8993_LINEOUT2N_ENA_SHIFT: 633 flag = &hubs->lineout2n_ena; 634 break; 635 case WM8993_LINEOUT2P_ENA_SHIFT: 636 flag = &hubs->lineout2p_ena; 637 break; 638 default: 639 WARN(1, "Unknown line output"); 640 return -EINVAL; 641 } 642 643 *flag = SND_SOC_DAPM_EVENT_ON(event); 644 645 return 0; 646 } 647 648 static int micbias_event(struct snd_soc_dapm_widget *w, 649 struct snd_kcontrol *kcontrol, int event) 650 { 651 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 652 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 653 654 switch (w->shift) { 655 case WM8993_MICB1_ENA_SHIFT: 656 if (hubs->micb1_delay) 657 msleep(hubs->micb1_delay); 658 break; 659 case WM8993_MICB2_ENA_SHIFT: 660 if (hubs->micb2_delay) 661 msleep(hubs->micb2_delay); 662 break; 663 default: 664 return -EINVAL; 665 } 666 667 return 0; 668 } 669 670 void wm_hubs_update_class_w(struct snd_soc_codec *codec) 671 { 672 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 673 int enable = WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ; 674 675 if (!wm_hubs_dac_hp_direct(codec)) 676 enable = false; 677 678 if (hubs->check_class_w_digital && !hubs->check_class_w_digital(codec)) 679 enable = false; 680 681 dev_vdbg(codec->dev, "Class W %s\n", enable ? "enabled" : "disabled"); 682 683 snd_soc_update_bits(codec, WM8993_CLASS_W_0, 684 WM8993_CP_DYN_V | WM8993_CP_DYN_FREQ, enable); 685 686 snd_soc_write(codec, WM8993_LEFT_OUTPUT_VOLUME, 687 snd_soc_read(codec, WM8993_LEFT_OUTPUT_VOLUME)); 688 snd_soc_write(codec, WM8993_RIGHT_OUTPUT_VOLUME, 689 snd_soc_read(codec, WM8993_RIGHT_OUTPUT_VOLUME)); 690 } 691 EXPORT_SYMBOL_GPL(wm_hubs_update_class_w); 692 693 #define WM_HUBS_SINGLE_W(xname, reg, shift, max, invert) \ 694 SOC_SINGLE_EXT(xname, reg, shift, max, invert, \ 695 snd_soc_dapm_get_volsw, class_w_put_volsw) 696 697 static int class_w_put_volsw(struct snd_kcontrol *kcontrol, 698 struct snd_ctl_elem_value *ucontrol) 699 { 700 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 701 int ret; 702 703 ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); 704 705 wm_hubs_update_class_w(codec); 706 707 return ret; 708 } 709 710 #define WM_HUBS_ENUM_W(xname, xenum) \ 711 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ 712 .info = snd_soc_info_enum_double, \ 713 .get = snd_soc_dapm_get_enum_double, \ 714 .put = class_w_put_double, \ 715 .private_value = (unsigned long)&xenum } 716 717 static int class_w_put_double(struct snd_kcontrol *kcontrol, 718 struct snd_ctl_elem_value *ucontrol) 719 { 720 struct snd_soc_codec *codec = snd_soc_dapm_kcontrol_codec(kcontrol); 721 int ret; 722 723 ret = snd_soc_dapm_put_enum_double(kcontrol, ucontrol); 724 725 wm_hubs_update_class_w(codec); 726 727 return ret; 728 } 729 730 static const char *hp_mux_text[] = { 731 "Mixer", 732 "DAC", 733 }; 734 735 static SOC_ENUM_SINGLE_DECL(hpl_enum, 736 WM8993_OUTPUT_MIXER1, 8, hp_mux_text); 737 738 const struct snd_kcontrol_new wm_hubs_hpl_mux = 739 WM_HUBS_ENUM_W("Left Headphone Mux", hpl_enum); 740 EXPORT_SYMBOL_GPL(wm_hubs_hpl_mux); 741 742 static SOC_ENUM_SINGLE_DECL(hpr_enum, 743 WM8993_OUTPUT_MIXER2, 8, hp_mux_text); 744 745 const struct snd_kcontrol_new wm_hubs_hpr_mux = 746 WM_HUBS_ENUM_W("Right Headphone Mux", hpr_enum); 747 EXPORT_SYMBOL_GPL(wm_hubs_hpr_mux); 748 749 static const struct snd_kcontrol_new in1l_pga[] = { 750 SOC_DAPM_SINGLE("IN1LP Switch", WM8993_INPUT_MIXER2, 5, 1, 0), 751 SOC_DAPM_SINGLE("IN1LN Switch", WM8993_INPUT_MIXER2, 4, 1, 0), 752 }; 753 754 static const struct snd_kcontrol_new in1r_pga[] = { 755 SOC_DAPM_SINGLE("IN1RP Switch", WM8993_INPUT_MIXER2, 1, 1, 0), 756 SOC_DAPM_SINGLE("IN1RN Switch", WM8993_INPUT_MIXER2, 0, 1, 0), 757 }; 758 759 static const struct snd_kcontrol_new in2l_pga[] = { 760 SOC_DAPM_SINGLE("IN2LP Switch", WM8993_INPUT_MIXER2, 7, 1, 0), 761 SOC_DAPM_SINGLE("IN2LN Switch", WM8993_INPUT_MIXER2, 6, 1, 0), 762 }; 763 764 static const struct snd_kcontrol_new in2r_pga[] = { 765 SOC_DAPM_SINGLE("IN2RP Switch", WM8993_INPUT_MIXER2, 3, 1, 0), 766 SOC_DAPM_SINGLE("IN2RN Switch", WM8993_INPUT_MIXER2, 2, 1, 0), 767 }; 768 769 static const struct snd_kcontrol_new mixinl[] = { 770 SOC_DAPM_SINGLE("IN2L Switch", WM8993_INPUT_MIXER3, 8, 1, 0), 771 SOC_DAPM_SINGLE("IN1L Switch", WM8993_INPUT_MIXER3, 5, 1, 0), 772 }; 773 774 static const struct snd_kcontrol_new mixinr[] = { 775 SOC_DAPM_SINGLE("IN2R Switch", WM8993_INPUT_MIXER4, 8, 1, 0), 776 SOC_DAPM_SINGLE("IN1R Switch", WM8993_INPUT_MIXER4, 5, 1, 0), 777 }; 778 779 static const struct snd_kcontrol_new left_output_mixer[] = { 780 WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER1, 7, 1, 0), 781 WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER1, 6, 1, 0), 782 WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER1, 5, 1, 0), 783 WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER1, 4, 1, 0), 784 WM_HUBS_SINGLE_W("IN2LP Switch", WM8993_OUTPUT_MIXER1, 1, 1, 0), 785 WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER1, 3, 1, 0), 786 WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER1, 2, 1, 0), 787 WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER1, 0, 1, 0), 788 }; 789 790 static const struct snd_kcontrol_new right_output_mixer[] = { 791 WM_HUBS_SINGLE_W("Left Input Switch", WM8993_OUTPUT_MIXER2, 7, 1, 0), 792 WM_HUBS_SINGLE_W("Right Input Switch", WM8993_OUTPUT_MIXER2, 6, 1, 0), 793 WM_HUBS_SINGLE_W("IN2LN Switch", WM8993_OUTPUT_MIXER2, 5, 1, 0), 794 WM_HUBS_SINGLE_W("IN2RN Switch", WM8993_OUTPUT_MIXER2, 4, 1, 0), 795 WM_HUBS_SINGLE_W("IN1L Switch", WM8993_OUTPUT_MIXER2, 3, 1, 0), 796 WM_HUBS_SINGLE_W("IN1R Switch", WM8993_OUTPUT_MIXER2, 2, 1, 0), 797 WM_HUBS_SINGLE_W("IN2RP Switch", WM8993_OUTPUT_MIXER2, 1, 1, 0), 798 WM_HUBS_SINGLE_W("DAC Switch", WM8993_OUTPUT_MIXER2, 0, 1, 0), 799 }; 800 801 static const struct snd_kcontrol_new earpiece_mixer[] = { 802 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_HPOUT2_MIXER, 5, 1, 0), 803 SOC_DAPM_SINGLE("Left Output Switch", WM8993_HPOUT2_MIXER, 4, 1, 0), 804 SOC_DAPM_SINGLE("Right Output Switch", WM8993_HPOUT2_MIXER, 3, 1, 0), 805 }; 806 807 static const struct snd_kcontrol_new left_speaker_boost[] = { 808 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 5, 1, 0), 809 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 4, 1, 0), 810 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 3, 1, 0), 811 }; 812 813 static const struct snd_kcontrol_new right_speaker_boost[] = { 814 SOC_DAPM_SINGLE("Direct Voice Switch", WM8993_SPKOUT_MIXERS, 2, 1, 0), 815 SOC_DAPM_SINGLE("SPKL Switch", WM8993_SPKOUT_MIXERS, 1, 1, 0), 816 SOC_DAPM_SINGLE("SPKR Switch", WM8993_SPKOUT_MIXERS, 0, 1, 0), 817 }; 818 819 static const struct snd_kcontrol_new line1_mix[] = { 820 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER1, 2, 1, 0), 821 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER1, 1, 1, 0), 822 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 823 }; 824 825 static const struct snd_kcontrol_new line1n_mix[] = { 826 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 6, 1, 0), 827 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER1, 5, 1, 0), 828 }; 829 830 static const struct snd_kcontrol_new line1p_mix[] = { 831 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER1, 0, 1, 0), 832 }; 833 834 static const struct snd_kcontrol_new line2_mix[] = { 835 SOC_DAPM_SINGLE("IN1L Switch", WM8993_LINE_MIXER2, 2, 1, 0), 836 SOC_DAPM_SINGLE("IN1R Switch", WM8993_LINE_MIXER2, 1, 1, 0), 837 SOC_DAPM_SINGLE("Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 838 }; 839 840 static const struct snd_kcontrol_new line2n_mix[] = { 841 SOC_DAPM_SINGLE("Left Output Switch", WM8993_LINE_MIXER2, 5, 1, 0), 842 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 6, 1, 0), 843 }; 844 845 static const struct snd_kcontrol_new line2p_mix[] = { 846 SOC_DAPM_SINGLE("Right Output Switch", WM8993_LINE_MIXER2, 0, 1, 0), 847 }; 848 849 static const struct snd_soc_dapm_widget analogue_dapm_widgets[] = { 850 SND_SOC_DAPM_INPUT("IN1LN"), 851 SND_SOC_DAPM_INPUT("IN1LP"), 852 SND_SOC_DAPM_INPUT("IN2LN"), 853 SND_SOC_DAPM_INPUT("IN2LP:VXRN"), 854 SND_SOC_DAPM_INPUT("IN1RN"), 855 SND_SOC_DAPM_INPUT("IN1RP"), 856 SND_SOC_DAPM_INPUT("IN2RN"), 857 SND_SOC_DAPM_INPUT("IN2RP:VXRP"), 858 859 SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8993_POWER_MANAGEMENT_1, 5, 0, 860 micbias_event, SND_SOC_DAPM_POST_PMU), 861 SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8993_POWER_MANAGEMENT_1, 4, 0, 862 micbias_event, SND_SOC_DAPM_POST_PMU), 863 864 SND_SOC_DAPM_MIXER("IN1L PGA", WM8993_POWER_MANAGEMENT_2, 6, 0, 865 in1l_pga, ARRAY_SIZE(in1l_pga)), 866 SND_SOC_DAPM_MIXER("IN1R PGA", WM8993_POWER_MANAGEMENT_2, 4, 0, 867 in1r_pga, ARRAY_SIZE(in1r_pga)), 868 869 SND_SOC_DAPM_MIXER("IN2L PGA", WM8993_POWER_MANAGEMENT_2, 7, 0, 870 in2l_pga, ARRAY_SIZE(in2l_pga)), 871 SND_SOC_DAPM_MIXER("IN2R PGA", WM8993_POWER_MANAGEMENT_2, 5, 0, 872 in2r_pga, ARRAY_SIZE(in2r_pga)), 873 874 SND_SOC_DAPM_MIXER("MIXINL", WM8993_POWER_MANAGEMENT_2, 9, 0, 875 mixinl, ARRAY_SIZE(mixinl)), 876 SND_SOC_DAPM_MIXER("MIXINR", WM8993_POWER_MANAGEMENT_2, 8, 0, 877 mixinr, ARRAY_SIZE(mixinr)), 878 879 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8993_POWER_MANAGEMENT_3, 5, 0, 880 left_output_mixer, ARRAY_SIZE(left_output_mixer)), 881 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8993_POWER_MANAGEMENT_3, 4, 0, 882 right_output_mixer, ARRAY_SIZE(right_output_mixer)), 883 884 SND_SOC_DAPM_PGA("Left Output PGA", WM8993_POWER_MANAGEMENT_3, 7, 0, NULL, 0), 885 SND_SOC_DAPM_PGA("Right Output PGA", WM8993_POWER_MANAGEMENT_3, 6, 0, NULL, 0), 886 887 SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, hp_supply_event, 888 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 889 SND_SOC_DAPM_OUT_DRV_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0, 890 hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 891 892 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0, 893 earpiece_mixer, ARRAY_SIZE(earpiece_mixer)), 894 SND_SOC_DAPM_PGA_E("Earpiece Driver", WM8993_POWER_MANAGEMENT_1, 11, 0, 895 NULL, 0, earpiece_event, 896 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 897 898 SND_SOC_DAPM_MIXER("SPKL Boost", SND_SOC_NOPM, 0, 0, 899 left_speaker_boost, ARRAY_SIZE(left_speaker_boost)), 900 SND_SOC_DAPM_MIXER("SPKR Boost", SND_SOC_NOPM, 0, 0, 901 right_speaker_boost, ARRAY_SIZE(right_speaker_boost)), 902 903 SND_SOC_DAPM_SUPPLY("TSHUT", WM8993_POWER_MANAGEMENT_2, 14, 0, NULL, 0), 904 SND_SOC_DAPM_OUT_DRV("SPKL Driver", WM8993_POWER_MANAGEMENT_1, 12, 0, 905 NULL, 0), 906 SND_SOC_DAPM_OUT_DRV("SPKR Driver", WM8993_POWER_MANAGEMENT_1, 13, 0, 907 NULL, 0), 908 909 SND_SOC_DAPM_MIXER("LINEOUT1 Mixer", SND_SOC_NOPM, 0, 0, 910 line1_mix, ARRAY_SIZE(line1_mix)), 911 SND_SOC_DAPM_MIXER("LINEOUT2 Mixer", SND_SOC_NOPM, 0, 0, 912 line2_mix, ARRAY_SIZE(line2_mix)), 913 914 SND_SOC_DAPM_MIXER("LINEOUT1N Mixer", SND_SOC_NOPM, 0, 0, 915 line1n_mix, ARRAY_SIZE(line1n_mix)), 916 SND_SOC_DAPM_MIXER("LINEOUT1P Mixer", SND_SOC_NOPM, 0, 0, 917 line1p_mix, ARRAY_SIZE(line1p_mix)), 918 SND_SOC_DAPM_MIXER("LINEOUT2N Mixer", SND_SOC_NOPM, 0, 0, 919 line2n_mix, ARRAY_SIZE(line2n_mix)), 920 SND_SOC_DAPM_MIXER("LINEOUT2P Mixer", SND_SOC_NOPM, 0, 0, 921 line2p_mix, ARRAY_SIZE(line2p_mix)), 922 923 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1N Driver", WM8993_POWER_MANAGEMENT_3, 13, 0, 924 NULL, 0, lineout_event, 925 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 926 SND_SOC_DAPM_OUT_DRV_E("LINEOUT1P Driver", WM8993_POWER_MANAGEMENT_3, 12, 0, 927 NULL, 0, lineout_event, 928 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 929 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2N Driver", WM8993_POWER_MANAGEMENT_3, 11, 0, 930 NULL, 0, lineout_event, 931 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 932 SND_SOC_DAPM_OUT_DRV_E("LINEOUT2P Driver", WM8993_POWER_MANAGEMENT_3, 10, 0, 933 NULL, 0, lineout_event, 934 SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 935 936 SND_SOC_DAPM_OUTPUT("SPKOUTLP"), 937 SND_SOC_DAPM_OUTPUT("SPKOUTLN"), 938 SND_SOC_DAPM_OUTPUT("SPKOUTRP"), 939 SND_SOC_DAPM_OUTPUT("SPKOUTRN"), 940 SND_SOC_DAPM_OUTPUT("HPOUT1L"), 941 SND_SOC_DAPM_OUTPUT("HPOUT1R"), 942 SND_SOC_DAPM_OUTPUT("HPOUT2P"), 943 SND_SOC_DAPM_OUTPUT("HPOUT2N"), 944 SND_SOC_DAPM_OUTPUT("LINEOUT1P"), 945 SND_SOC_DAPM_OUTPUT("LINEOUT1N"), 946 SND_SOC_DAPM_OUTPUT("LINEOUT2P"), 947 SND_SOC_DAPM_OUTPUT("LINEOUT2N"), 948 }; 949 950 static const struct snd_soc_dapm_route analogue_routes[] = { 951 { "MICBIAS1", NULL, "CLK_SYS" }, 952 { "MICBIAS2", NULL, "CLK_SYS" }, 953 954 { "IN1L PGA", "IN1LP Switch", "IN1LP" }, 955 { "IN1L PGA", "IN1LN Switch", "IN1LN" }, 956 957 { "IN1L PGA", NULL, "VMID" }, 958 { "IN1R PGA", NULL, "VMID" }, 959 { "IN2L PGA", NULL, "VMID" }, 960 { "IN2R PGA", NULL, "VMID" }, 961 962 { "IN1R PGA", "IN1RP Switch", "IN1RP" }, 963 { "IN1R PGA", "IN1RN Switch", "IN1RN" }, 964 965 { "IN2L PGA", "IN2LP Switch", "IN2LP:VXRN" }, 966 { "IN2L PGA", "IN2LN Switch", "IN2LN" }, 967 968 { "IN2R PGA", "IN2RP Switch", "IN2RP:VXRP" }, 969 { "IN2R PGA", "IN2RN Switch", "IN2RN" }, 970 971 { "Direct Voice", NULL, "IN2LP:VXRN" }, 972 { "Direct Voice", NULL, "IN2RP:VXRP" }, 973 974 { "MIXINL", "IN1L Switch", "IN1L PGA" }, 975 { "MIXINL", "IN2L Switch", "IN2L PGA" }, 976 { "MIXINL", NULL, "Direct Voice" }, 977 { "MIXINL", NULL, "IN1LP" }, 978 { "MIXINL", NULL, "Left Output Mixer" }, 979 { "MIXINL", NULL, "VMID" }, 980 981 { "MIXINR", "IN1R Switch", "IN1R PGA" }, 982 { "MIXINR", "IN2R Switch", "IN2R PGA" }, 983 { "MIXINR", NULL, "Direct Voice" }, 984 { "MIXINR", NULL, "IN1RP" }, 985 { "MIXINR", NULL, "Right Output Mixer" }, 986 { "MIXINR", NULL, "VMID" }, 987 988 { "ADCL", NULL, "MIXINL" }, 989 { "ADCR", NULL, "MIXINR" }, 990 991 { "Left Output Mixer", "Left Input Switch", "MIXINL" }, 992 { "Left Output Mixer", "Right Input Switch", "MIXINR" }, 993 { "Left Output Mixer", "IN2RN Switch", "IN2RN" }, 994 { "Left Output Mixer", "IN2LN Switch", "IN2LN" }, 995 { "Left Output Mixer", "IN2LP Switch", "IN2LP:VXRN" }, 996 { "Left Output Mixer", "IN1L Switch", "IN1L PGA" }, 997 { "Left Output Mixer", "IN1R Switch", "IN1R PGA" }, 998 999 { "Right Output Mixer", "Left Input Switch", "MIXINL" }, 1000 { "Right Output Mixer", "Right Input Switch", "MIXINR" }, 1001 { "Right Output Mixer", "IN2LN Switch", "IN2LN" }, 1002 { "Right Output Mixer", "IN2RN Switch", "IN2RN" }, 1003 { "Right Output Mixer", "IN2RP Switch", "IN2RP:VXRP" }, 1004 { "Right Output Mixer", "IN1L Switch", "IN1L PGA" }, 1005 { "Right Output Mixer", "IN1R Switch", "IN1R PGA" }, 1006 1007 { "Left Output PGA", NULL, "Left Output Mixer" }, 1008 { "Left Output PGA", NULL, "TOCLK" }, 1009 1010 { "Right Output PGA", NULL, "Right Output Mixer" }, 1011 { "Right Output PGA", NULL, "TOCLK" }, 1012 1013 { "Earpiece Mixer", "Direct Voice Switch", "Direct Voice" }, 1014 { "Earpiece Mixer", "Left Output Switch", "Left Output PGA" }, 1015 { "Earpiece Mixer", "Right Output Switch", "Right Output PGA" }, 1016 1017 { "Earpiece Driver", NULL, "VMID" }, 1018 { "Earpiece Driver", NULL, "Earpiece Mixer" }, 1019 { "HPOUT2N", NULL, "Earpiece Driver" }, 1020 { "HPOUT2P", NULL, "Earpiece Driver" }, 1021 1022 { "SPKL", "Input Switch", "MIXINL" }, 1023 { "SPKL", "IN1LP Switch", "IN1LP" }, 1024 { "SPKL", "Output Switch", "Left Output PGA" }, 1025 { "SPKL", NULL, "TOCLK" }, 1026 1027 { "SPKR", "Input Switch", "MIXINR" }, 1028 { "SPKR", "IN1RP Switch", "IN1RP" }, 1029 { "SPKR", "Output Switch", "Right Output PGA" }, 1030 { "SPKR", NULL, "TOCLK" }, 1031 1032 { "SPKL Boost", "Direct Voice Switch", "Direct Voice" }, 1033 { "SPKL Boost", "SPKL Switch", "SPKL" }, 1034 { "SPKL Boost", "SPKR Switch", "SPKR" }, 1035 1036 { "SPKR Boost", "Direct Voice Switch", "Direct Voice" }, 1037 { "SPKR Boost", "SPKR Switch", "SPKR" }, 1038 { "SPKR Boost", "SPKL Switch", "SPKL" }, 1039 1040 { "SPKL Driver", NULL, "VMID" }, 1041 { "SPKL Driver", NULL, "SPKL Boost" }, 1042 { "SPKL Driver", NULL, "CLK_SYS" }, 1043 { "SPKL Driver", NULL, "TSHUT" }, 1044 1045 { "SPKR Driver", NULL, "VMID" }, 1046 { "SPKR Driver", NULL, "SPKR Boost" }, 1047 { "SPKR Driver", NULL, "CLK_SYS" }, 1048 { "SPKR Driver", NULL, "TSHUT" }, 1049 1050 { "SPKOUTLP", NULL, "SPKL Driver" }, 1051 { "SPKOUTLN", NULL, "SPKL Driver" }, 1052 { "SPKOUTRP", NULL, "SPKR Driver" }, 1053 { "SPKOUTRN", NULL, "SPKR Driver" }, 1054 1055 { "Left Headphone Mux", "Mixer", "Left Output PGA" }, 1056 { "Right Headphone Mux", "Mixer", "Right Output PGA" }, 1057 1058 { "Headphone PGA", NULL, "Left Headphone Mux" }, 1059 { "Headphone PGA", NULL, "Right Headphone Mux" }, 1060 { "Headphone PGA", NULL, "VMID" }, 1061 { "Headphone PGA", NULL, "CLK_SYS" }, 1062 { "Headphone PGA", NULL, "Headphone Supply" }, 1063 1064 { "HPOUT1L", NULL, "Headphone PGA" }, 1065 { "HPOUT1R", NULL, "Headphone PGA" }, 1066 1067 { "LINEOUT1N Driver", NULL, "VMID" }, 1068 { "LINEOUT1P Driver", NULL, "VMID" }, 1069 { "LINEOUT2N Driver", NULL, "VMID" }, 1070 { "LINEOUT2P Driver", NULL, "VMID" }, 1071 1072 { "LINEOUT1N", NULL, "LINEOUT1N Driver" }, 1073 { "LINEOUT1P", NULL, "LINEOUT1P Driver" }, 1074 { "LINEOUT2N", NULL, "LINEOUT2N Driver" }, 1075 { "LINEOUT2P", NULL, "LINEOUT2P Driver" }, 1076 }; 1077 1078 static const struct snd_soc_dapm_route lineout1_diff_routes[] = { 1079 { "LINEOUT1 Mixer", "IN1L Switch", "IN1L PGA" }, 1080 { "LINEOUT1 Mixer", "IN1R Switch", "IN1R PGA" }, 1081 { "LINEOUT1 Mixer", "Output Switch", "Left Output PGA" }, 1082 1083 { "LINEOUT1N Driver", NULL, "LINEOUT1 Mixer" }, 1084 { "LINEOUT1P Driver", NULL, "LINEOUT1 Mixer" }, 1085 }; 1086 1087 static const struct snd_soc_dapm_route lineout1_se_routes[] = { 1088 { "LINEOUT1N Mixer", "Left Output Switch", "Left Output PGA" }, 1089 { "LINEOUT1N Mixer", "Right Output Switch", "Right Output PGA" }, 1090 1091 { "LINEOUT1P Mixer", "Left Output Switch", "Left Output PGA" }, 1092 1093 { "LINEOUT1N Driver", NULL, "LINEOUT1N Mixer" }, 1094 { "LINEOUT1P Driver", NULL, "LINEOUT1P Mixer" }, 1095 }; 1096 1097 static const struct snd_soc_dapm_route lineout2_diff_routes[] = { 1098 { "LINEOUT2 Mixer", "IN1L Switch", "IN1L PGA" }, 1099 { "LINEOUT2 Mixer", "IN1R Switch", "IN1R PGA" }, 1100 { "LINEOUT2 Mixer", "Output Switch", "Right Output PGA" }, 1101 1102 { "LINEOUT2N Driver", NULL, "LINEOUT2 Mixer" }, 1103 { "LINEOUT2P Driver", NULL, "LINEOUT2 Mixer" }, 1104 }; 1105 1106 static const struct snd_soc_dapm_route lineout2_se_routes[] = { 1107 { "LINEOUT2N Mixer", "Left Output Switch", "Left Output PGA" }, 1108 { "LINEOUT2N Mixer", "Right Output Switch", "Right Output PGA" }, 1109 1110 { "LINEOUT2P Mixer", "Right Output Switch", "Right Output PGA" }, 1111 1112 { "LINEOUT2N Driver", NULL, "LINEOUT2N Mixer" }, 1113 { "LINEOUT2P Driver", NULL, "LINEOUT2P Mixer" }, 1114 }; 1115 1116 int wm_hubs_add_analogue_controls(struct snd_soc_codec *codec) 1117 { 1118 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 1119 1120 /* Latch volume update bits & default ZC on */ 1121 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_1_2_VOLUME, 1122 WM8993_IN1_VU, WM8993_IN1_VU); 1123 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_1_2_VOLUME, 1124 WM8993_IN1_VU, WM8993_IN1_VU); 1125 snd_soc_update_bits(codec, WM8993_LEFT_LINE_INPUT_3_4_VOLUME, 1126 WM8993_IN2_VU, WM8993_IN2_VU); 1127 snd_soc_update_bits(codec, WM8993_RIGHT_LINE_INPUT_3_4_VOLUME, 1128 WM8993_IN2_VU, WM8993_IN2_VU); 1129 1130 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_LEFT, 1131 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 1132 snd_soc_update_bits(codec, WM8993_SPEAKER_VOLUME_RIGHT, 1133 WM8993_SPKOUT_VU, WM8993_SPKOUT_VU); 1134 1135 snd_soc_update_bits(codec, WM8993_LEFT_OUTPUT_VOLUME, 1136 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC, 1137 WM8993_HPOUT1_VU | WM8993_HPOUT1L_ZC); 1138 snd_soc_update_bits(codec, WM8993_RIGHT_OUTPUT_VOLUME, 1139 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC, 1140 WM8993_HPOUT1_VU | WM8993_HPOUT1R_ZC); 1141 1142 snd_soc_update_bits(codec, WM8993_LEFT_OPGA_VOLUME, 1143 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU, 1144 WM8993_MIXOUTL_ZC | WM8993_MIXOUT_VU); 1145 snd_soc_update_bits(codec, WM8993_RIGHT_OPGA_VOLUME, 1146 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU, 1147 WM8993_MIXOUTR_ZC | WM8993_MIXOUT_VU); 1148 1149 snd_soc_add_codec_controls(codec, analogue_snd_controls, 1150 ARRAY_SIZE(analogue_snd_controls)); 1151 1152 snd_soc_dapm_new_controls(dapm, analogue_dapm_widgets, 1153 ARRAY_SIZE(analogue_dapm_widgets)); 1154 return 0; 1155 } 1156 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_controls); 1157 1158 int wm_hubs_add_analogue_routes(struct snd_soc_codec *codec, 1159 int lineout1_diff, int lineout2_diff) 1160 { 1161 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1162 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec); 1163 1164 hubs->codec = codec; 1165 1166 INIT_LIST_HEAD(&hubs->dcs_cache); 1167 init_completion(&hubs->dcs_done); 1168 1169 snd_soc_dapm_add_routes(dapm, analogue_routes, 1170 ARRAY_SIZE(analogue_routes)); 1171 1172 if (lineout1_diff) 1173 snd_soc_dapm_add_routes(dapm, 1174 lineout1_diff_routes, 1175 ARRAY_SIZE(lineout1_diff_routes)); 1176 else 1177 snd_soc_dapm_add_routes(dapm, 1178 lineout1_se_routes, 1179 ARRAY_SIZE(lineout1_se_routes)); 1180 1181 if (lineout2_diff) 1182 snd_soc_dapm_add_routes(dapm, 1183 lineout2_diff_routes, 1184 ARRAY_SIZE(lineout2_diff_routes)); 1185 else 1186 snd_soc_dapm_add_routes(dapm, 1187 lineout2_se_routes, 1188 ARRAY_SIZE(lineout2_se_routes)); 1189 1190 return 0; 1191 } 1192 EXPORT_SYMBOL_GPL(wm_hubs_add_analogue_routes); 1193 1194 int wm_hubs_handle_analogue_pdata(struct snd_soc_codec *codec, 1195 int lineout1_diff, int lineout2_diff, 1196 int lineout1fb, int lineout2fb, 1197 int jd_scthr, int jd_thr, 1198 int micbias1_delay, int micbias2_delay, 1199 int micbias1_lvl, int micbias2_lvl) 1200 { 1201 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1202 1203 hubs->lineout1_se = !lineout1_diff; 1204 hubs->lineout2_se = !lineout2_diff; 1205 hubs->micb1_delay = micbias1_delay; 1206 hubs->micb2_delay = micbias2_delay; 1207 1208 if (!lineout1_diff) 1209 snd_soc_update_bits(codec, WM8993_LINE_MIXER1, 1210 WM8993_LINEOUT1_MODE, 1211 WM8993_LINEOUT1_MODE); 1212 if (!lineout2_diff) 1213 snd_soc_update_bits(codec, WM8993_LINE_MIXER2, 1214 WM8993_LINEOUT2_MODE, 1215 WM8993_LINEOUT2_MODE); 1216 1217 if (!lineout1_diff && !lineout2_diff) 1218 snd_soc_update_bits(codec, WM8993_ANTIPOP1, 1219 WM8993_LINEOUT_VMID_BUF_ENA, 1220 WM8993_LINEOUT_VMID_BUF_ENA); 1221 1222 if (lineout1fb) 1223 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1224 WM8993_LINEOUT1_FB, WM8993_LINEOUT1_FB); 1225 1226 if (lineout2fb) 1227 snd_soc_update_bits(codec, WM8993_ADDITIONAL_CONTROL, 1228 WM8993_LINEOUT2_FB, WM8993_LINEOUT2_FB); 1229 1230 snd_soc_update_bits(codec, WM8993_MICBIAS, 1231 WM8993_JD_SCTHR_MASK | WM8993_JD_THR_MASK | 1232 WM8993_MICB1_LVL | WM8993_MICB2_LVL, 1233 jd_scthr << WM8993_JD_SCTHR_SHIFT | 1234 jd_thr << WM8993_JD_THR_SHIFT | 1235 micbias1_lvl | 1236 micbias2_lvl << WM8993_MICB2_LVL_SHIFT); 1237 1238 return 0; 1239 } 1240 EXPORT_SYMBOL_GPL(wm_hubs_handle_analogue_pdata); 1241 1242 void wm_hubs_vmid_ena(struct snd_soc_codec *codec) 1243 { 1244 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1245 int val = 0; 1246 1247 if (hubs->lineout1_se) 1248 val |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1249 1250 if (hubs->lineout2_se) 1251 val |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1252 1253 /* Enable the line outputs while we power up */ 1254 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, val, val); 1255 } 1256 EXPORT_SYMBOL_GPL(wm_hubs_vmid_ena); 1257 1258 void wm_hubs_set_bias_level(struct snd_soc_codec *codec, 1259 enum snd_soc_bias_level level) 1260 { 1261 struct wm_hubs_data *hubs = snd_soc_codec_get_drvdata(codec); 1262 int mask, val; 1263 1264 switch (level) { 1265 case SND_SOC_BIAS_STANDBY: 1266 /* Clamp the inputs to VMID while we ramp to charge caps */ 1267 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1268 WM8993_INPUTS_CLAMP, WM8993_INPUTS_CLAMP); 1269 break; 1270 1271 case SND_SOC_BIAS_ON: 1272 /* Turn off any unneeded single ended outputs */ 1273 val = 0; 1274 mask = 0; 1275 1276 if (hubs->lineout1_se) 1277 mask |= WM8993_LINEOUT1N_ENA | WM8993_LINEOUT1P_ENA; 1278 1279 if (hubs->lineout2_se) 1280 mask |= WM8993_LINEOUT2N_ENA | WM8993_LINEOUT2P_ENA; 1281 1282 if (hubs->lineout1_se && hubs->lineout1n_ena) 1283 val |= WM8993_LINEOUT1N_ENA; 1284 1285 if (hubs->lineout1_se && hubs->lineout1p_ena) 1286 val |= WM8993_LINEOUT1P_ENA; 1287 1288 if (hubs->lineout2_se && hubs->lineout2n_ena) 1289 val |= WM8993_LINEOUT2N_ENA; 1290 1291 if (hubs->lineout2_se && hubs->lineout2p_ena) 1292 val |= WM8993_LINEOUT2P_ENA; 1293 1294 snd_soc_update_bits(codec, WM8993_POWER_MANAGEMENT_3, 1295 mask, val); 1296 1297 /* Remove the input clamps */ 1298 snd_soc_update_bits(codec, WM8993_INPUTS_CLAMP_REG, 1299 WM8993_INPUTS_CLAMP, 0); 1300 break; 1301 1302 default: 1303 break; 1304 } 1305 } 1306 EXPORT_SYMBOL_GPL(wm_hubs_set_bias_level); 1307 1308 MODULE_DESCRIPTION("Shared support for Wolfson hubs products"); 1309 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 1310 MODULE_LICENSE("GPL"); 1311