12159ad93SMark Brown /* 22159ad93SMark Brown * wm_adsp.c -- Wolfson ADSP support 32159ad93SMark Brown * 42159ad93SMark Brown * Copyright 2012 Wolfson Microelectronics plc 52159ad93SMark Brown * 62159ad93SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 72159ad93SMark Brown * 82159ad93SMark Brown * This program is free software; you can redistribute it and/or modify 92159ad93SMark Brown * it under the terms of the GNU General Public License version 2 as 102159ad93SMark Brown * published by the Free Software Foundation. 112159ad93SMark Brown */ 122159ad93SMark Brown 132159ad93SMark Brown #include <linux/module.h> 142159ad93SMark Brown #include <linux/moduleparam.h> 152159ad93SMark Brown #include <linux/init.h> 162159ad93SMark Brown #include <linux/delay.h> 172159ad93SMark Brown #include <linux/firmware.h> 18cf17c83cSMark Brown #include <linux/list.h> 192159ad93SMark Brown #include <linux/pm.h> 202159ad93SMark Brown #include <linux/pm_runtime.h> 212159ad93SMark Brown #include <linux/regmap.h> 22973838a0SMark Brown #include <linux/regulator/consumer.h> 232159ad93SMark Brown #include <linux/slab.h> 242159ad93SMark Brown #include <sound/core.h> 252159ad93SMark Brown #include <sound/pcm.h> 262159ad93SMark Brown #include <sound/pcm_params.h> 272159ad93SMark Brown #include <sound/soc.h> 282159ad93SMark Brown #include <sound/jack.h> 292159ad93SMark Brown #include <sound/initval.h> 302159ad93SMark Brown #include <sound/tlv.h> 312159ad93SMark Brown 322159ad93SMark Brown #include <linux/mfd/arizona/registers.h> 332159ad93SMark Brown 34dc91428aSMark Brown #include "arizona.h" 352159ad93SMark Brown #include "wm_adsp.h" 362159ad93SMark Brown 372159ad93SMark Brown #define adsp_crit(_dsp, fmt, ...) \ 382159ad93SMark Brown dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 392159ad93SMark Brown #define adsp_err(_dsp, fmt, ...) \ 402159ad93SMark Brown dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 412159ad93SMark Brown #define adsp_warn(_dsp, fmt, ...) \ 422159ad93SMark Brown dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 432159ad93SMark Brown #define adsp_info(_dsp, fmt, ...) \ 442159ad93SMark Brown dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 452159ad93SMark Brown #define adsp_dbg(_dsp, fmt, ...) \ 462159ad93SMark Brown dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 472159ad93SMark Brown 482159ad93SMark Brown #define ADSP1_CONTROL_1 0x00 492159ad93SMark Brown #define ADSP1_CONTROL_2 0x02 502159ad93SMark Brown #define ADSP1_CONTROL_3 0x03 512159ad93SMark Brown #define ADSP1_CONTROL_4 0x04 522159ad93SMark Brown #define ADSP1_CONTROL_5 0x06 532159ad93SMark Brown #define ADSP1_CONTROL_6 0x07 542159ad93SMark Brown #define ADSP1_CONTROL_7 0x08 552159ad93SMark Brown #define ADSP1_CONTROL_8 0x09 562159ad93SMark Brown #define ADSP1_CONTROL_9 0x0A 572159ad93SMark Brown #define ADSP1_CONTROL_10 0x0B 582159ad93SMark Brown #define ADSP1_CONTROL_11 0x0C 592159ad93SMark Brown #define ADSP1_CONTROL_12 0x0D 602159ad93SMark Brown #define ADSP1_CONTROL_13 0x0F 612159ad93SMark Brown #define ADSP1_CONTROL_14 0x10 622159ad93SMark Brown #define ADSP1_CONTROL_15 0x11 632159ad93SMark Brown #define ADSP1_CONTROL_16 0x12 642159ad93SMark Brown #define ADSP1_CONTROL_17 0x13 652159ad93SMark Brown #define ADSP1_CONTROL_18 0x14 662159ad93SMark Brown #define ADSP1_CONTROL_19 0x16 672159ad93SMark Brown #define ADSP1_CONTROL_20 0x17 682159ad93SMark Brown #define ADSP1_CONTROL_21 0x18 692159ad93SMark Brown #define ADSP1_CONTROL_22 0x1A 702159ad93SMark Brown #define ADSP1_CONTROL_23 0x1B 712159ad93SMark Brown #define ADSP1_CONTROL_24 0x1C 722159ad93SMark Brown #define ADSP1_CONTROL_25 0x1E 732159ad93SMark Brown #define ADSP1_CONTROL_26 0x20 742159ad93SMark Brown #define ADSP1_CONTROL_27 0x21 752159ad93SMark Brown #define ADSP1_CONTROL_28 0x22 762159ad93SMark Brown #define ADSP1_CONTROL_29 0x23 772159ad93SMark Brown #define ADSP1_CONTROL_30 0x24 782159ad93SMark Brown #define ADSP1_CONTROL_31 0x26 792159ad93SMark Brown 802159ad93SMark Brown /* 812159ad93SMark Brown * ADSP1 Control 19 822159ad93SMark Brown */ 832159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 842159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 852159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 862159ad93SMark Brown 872159ad93SMark Brown 882159ad93SMark Brown /* 892159ad93SMark Brown * ADSP1 Control 30 902159ad93SMark Brown */ 912159ad93SMark Brown #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */ 922159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */ 932159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */ 942159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */ 952159ad93SMark Brown #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ 962159ad93SMark Brown #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ 972159ad93SMark Brown #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ 982159ad93SMark Brown #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ 992159ad93SMark Brown #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ 1002159ad93SMark Brown #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ 1012159ad93SMark Brown #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ 1022159ad93SMark Brown #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ 1032159ad93SMark Brown #define ADSP1_START 0x0001 /* DSP1_START */ 1042159ad93SMark Brown #define ADSP1_START_MASK 0x0001 /* DSP1_START */ 1052159ad93SMark Brown #define ADSP1_START_SHIFT 0 /* DSP1_START */ 1062159ad93SMark Brown #define ADSP1_START_WIDTH 1 /* DSP1_START */ 1072159ad93SMark Brown 10894e205bfSChris Rattray /* 10994e205bfSChris Rattray * ADSP1 Control 31 11094e205bfSChris Rattray */ 11194e205bfSChris Rattray #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ 11294e205bfSChris Rattray #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ 11394e205bfSChris Rattray #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ 11494e205bfSChris Rattray 1152d30b575SMark Brown #define ADSP2_CONTROL 0x0 1162d30b575SMark Brown #define ADSP2_CLOCKING 0x1 1172d30b575SMark Brown #define ADSP2_STATUS1 0x4 1182d30b575SMark Brown #define ADSP2_WDMA_CONFIG_1 0x30 1192d30b575SMark Brown #define ADSP2_WDMA_CONFIG_2 0x31 1202d30b575SMark Brown #define ADSP2_RDMA_CONFIG_1 0x34 1212159ad93SMark Brown 1222159ad93SMark Brown /* 1232159ad93SMark Brown * ADSP2 Control 1242159ad93SMark Brown */ 1252159ad93SMark Brown 1262159ad93SMark Brown #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */ 1272159ad93SMark Brown #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */ 1282159ad93SMark Brown #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */ 1292159ad93SMark Brown #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */ 1302159ad93SMark Brown #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ 1312159ad93SMark Brown #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ 1322159ad93SMark Brown #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ 1332159ad93SMark Brown #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ 1342159ad93SMark Brown #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ 1352159ad93SMark Brown #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ 1362159ad93SMark Brown #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ 1372159ad93SMark Brown #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ 1382159ad93SMark Brown #define ADSP2_START 0x0001 /* DSP1_START */ 1392159ad93SMark Brown #define ADSP2_START_MASK 0x0001 /* DSP1_START */ 1402159ad93SMark Brown #define ADSP2_START_SHIFT 0 /* DSP1_START */ 1412159ad93SMark Brown #define ADSP2_START_WIDTH 1 /* DSP1_START */ 1422159ad93SMark Brown 1432159ad93SMark Brown /* 144973838a0SMark Brown * ADSP2 clocking 145973838a0SMark Brown */ 146973838a0SMark Brown #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ 147973838a0SMark Brown #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ 148973838a0SMark Brown #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ 149973838a0SMark Brown 150973838a0SMark Brown /* 1512159ad93SMark Brown * ADSP2 Status 1 1522159ad93SMark Brown */ 1532159ad93SMark Brown #define ADSP2_RAM_RDY 0x0001 1542159ad93SMark Brown #define ADSP2_RAM_RDY_MASK 0x0001 1552159ad93SMark Brown #define ADSP2_RAM_RDY_SHIFT 0 1562159ad93SMark Brown #define ADSP2_RAM_RDY_WIDTH 1 1572159ad93SMark Brown 158cf17c83cSMark Brown struct wm_adsp_buf { 159cf17c83cSMark Brown struct list_head list; 160cf17c83cSMark Brown void *buf; 161cf17c83cSMark Brown }; 162cf17c83cSMark Brown 163cf17c83cSMark Brown static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len, 164cf17c83cSMark Brown struct list_head *list) 165cf17c83cSMark Brown { 166cf17c83cSMark Brown struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL); 167cf17c83cSMark Brown 168cf17c83cSMark Brown if (buf == NULL) 169cf17c83cSMark Brown return NULL; 170cf17c83cSMark Brown 171cf17c83cSMark Brown buf->buf = kmemdup(src, len, GFP_KERNEL | GFP_DMA); 172cf17c83cSMark Brown if (!buf->buf) { 173cf17c83cSMark Brown kfree(buf); 174cf17c83cSMark Brown return NULL; 175cf17c83cSMark Brown } 176cf17c83cSMark Brown 177cf17c83cSMark Brown if (list) 178cf17c83cSMark Brown list_add_tail(&buf->list, list); 179cf17c83cSMark Brown 180cf17c83cSMark Brown return buf; 181cf17c83cSMark Brown } 182cf17c83cSMark Brown 183cf17c83cSMark Brown static void wm_adsp_buf_free(struct list_head *list) 184cf17c83cSMark Brown { 185cf17c83cSMark Brown while (!list_empty(list)) { 186cf17c83cSMark Brown struct wm_adsp_buf *buf = list_first_entry(list, 187cf17c83cSMark Brown struct wm_adsp_buf, 188cf17c83cSMark Brown list); 189cf17c83cSMark Brown list_del(&buf->list); 190cf17c83cSMark Brown kfree(buf->buf); 191cf17c83cSMark Brown kfree(buf); 192cf17c83cSMark Brown } 193cf17c83cSMark Brown } 194cf17c83cSMark Brown 19536e8fe99SMark Brown #define WM_ADSP_NUM_FW 4 1961023dbd9SMark Brown 1971023dbd9SMark Brown static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { 19836e8fe99SMark Brown "MBC/VSS", "Tx", "Tx Speaker", "Rx ANC" 1991023dbd9SMark Brown }; 2001023dbd9SMark Brown 2011023dbd9SMark Brown static struct { 2021023dbd9SMark Brown const char *file; 2031023dbd9SMark Brown } wm_adsp_fw[WM_ADSP_NUM_FW] = { 2041023dbd9SMark Brown { .file = "mbc-vss" }, 2051023dbd9SMark Brown { .file = "tx" }, 20636e8fe99SMark Brown { .file = "tx-spk" }, 2071023dbd9SMark Brown { .file = "rx-anc" }, 2081023dbd9SMark Brown }; 2091023dbd9SMark Brown 2101023dbd9SMark Brown static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, 2111023dbd9SMark Brown struct snd_ctl_elem_value *ucontrol) 2121023dbd9SMark Brown { 2131023dbd9SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2141023dbd9SMark Brown struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 2151023dbd9SMark Brown struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); 2161023dbd9SMark Brown 2171023dbd9SMark Brown ucontrol->value.integer.value[0] = adsp[e->shift_l].fw; 2181023dbd9SMark Brown 2191023dbd9SMark Brown return 0; 2201023dbd9SMark Brown } 2211023dbd9SMark Brown 2221023dbd9SMark Brown static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, 2231023dbd9SMark Brown struct snd_ctl_elem_value *ucontrol) 2241023dbd9SMark Brown { 2251023dbd9SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2261023dbd9SMark Brown struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 2271023dbd9SMark Brown struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); 2281023dbd9SMark Brown 2291023dbd9SMark Brown if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw) 2301023dbd9SMark Brown return 0; 2311023dbd9SMark Brown 2321023dbd9SMark Brown if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW) 2331023dbd9SMark Brown return -EINVAL; 2341023dbd9SMark Brown 2351023dbd9SMark Brown if (adsp[e->shift_l].running) 2361023dbd9SMark Brown return -EBUSY; 2371023dbd9SMark Brown 23831522764SMark Brown adsp[e->shift_l].fw = ucontrol->value.integer.value[0]; 2391023dbd9SMark Brown 2401023dbd9SMark Brown return 0; 2411023dbd9SMark Brown } 2421023dbd9SMark Brown 2431023dbd9SMark Brown static const struct soc_enum wm_adsp_fw_enum[] = { 2441023dbd9SMark Brown SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2451023dbd9SMark Brown SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2461023dbd9SMark Brown SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2471023dbd9SMark Brown SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2481023dbd9SMark Brown }; 2491023dbd9SMark Brown 250dc91428aSMark Brown static const struct soc_enum wm_adsp_rate_enum[] = { 251dc91428aSMark Brown SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1, 252dc91428aSMark Brown ARIZONA_DSP1_RATE_SHIFT, 0xf, 253dc91428aSMark Brown ARIZONA_RATE_ENUM_SIZE, 254dc91428aSMark Brown arizona_rate_text, arizona_rate_val), 255dc91428aSMark Brown SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1, 256dc91428aSMark Brown ARIZONA_DSP1_RATE_SHIFT, 0xf, 257dc91428aSMark Brown ARIZONA_RATE_ENUM_SIZE, 258dc91428aSMark Brown arizona_rate_text, arizona_rate_val), 259dc91428aSMark Brown SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1, 260dc91428aSMark Brown ARIZONA_DSP1_RATE_SHIFT, 0xf, 261dc91428aSMark Brown ARIZONA_RATE_ENUM_SIZE, 262dc91428aSMark Brown arizona_rate_text, arizona_rate_val), 263dc91428aSMark Brown SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1, 264dc91428aSMark Brown ARIZONA_DSP1_RATE_SHIFT, 0xf, 265dc91428aSMark Brown ARIZONA_RATE_ENUM_SIZE, 266dc91428aSMark Brown arizona_rate_text, arizona_rate_val), 267dc91428aSMark Brown }; 268dc91428aSMark Brown 2691023dbd9SMark Brown const struct snd_kcontrol_new wm_adsp_fw_controls[] = { 2701023dbd9SMark Brown SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], 2711023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 272dc91428aSMark Brown SOC_ENUM("DSP1 Rate", wm_adsp_rate_enum[0]), 2731023dbd9SMark Brown SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], 2741023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 275dc91428aSMark Brown SOC_ENUM("DSP2 Rate", wm_adsp_rate_enum[1]), 2761023dbd9SMark Brown SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], 2771023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 278dc91428aSMark Brown SOC_ENUM("DSP3 Rate", wm_adsp_rate_enum[2]), 2791023dbd9SMark Brown SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], 2801023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 281dc91428aSMark Brown SOC_ENUM("DSP4 Rate", wm_adsp_rate_enum[3]), 2821023dbd9SMark Brown }; 2831023dbd9SMark Brown EXPORT_SYMBOL_GPL(wm_adsp_fw_controls); 2842159ad93SMark Brown 2852159ad93SMark Brown static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, 2862159ad93SMark Brown int type) 2872159ad93SMark Brown { 2882159ad93SMark Brown int i; 2892159ad93SMark Brown 2902159ad93SMark Brown for (i = 0; i < dsp->num_mems; i++) 2912159ad93SMark Brown if (dsp->mem[i].type == type) 2922159ad93SMark Brown return &dsp->mem[i]; 2932159ad93SMark Brown 2942159ad93SMark Brown return NULL; 2952159ad93SMark Brown } 2962159ad93SMark Brown 29745b9ee72SMark Brown static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region, 29845b9ee72SMark Brown unsigned int offset) 29945b9ee72SMark Brown { 30045b9ee72SMark Brown switch (region->type) { 30145b9ee72SMark Brown case WMFW_ADSP1_PM: 30245b9ee72SMark Brown return region->base + (offset * 3); 30345b9ee72SMark Brown case WMFW_ADSP1_DM: 30445b9ee72SMark Brown return region->base + (offset * 2); 30545b9ee72SMark Brown case WMFW_ADSP2_XM: 30645b9ee72SMark Brown return region->base + (offset * 2); 30745b9ee72SMark Brown case WMFW_ADSP2_YM: 30845b9ee72SMark Brown return region->base + (offset * 2); 30945b9ee72SMark Brown case WMFW_ADSP1_ZM: 31045b9ee72SMark Brown return region->base + (offset * 2); 31145b9ee72SMark Brown default: 31245b9ee72SMark Brown WARN_ON(NULL != "Unknown memory region type"); 31345b9ee72SMark Brown return offset; 31445b9ee72SMark Brown } 31545b9ee72SMark Brown } 31645b9ee72SMark Brown 3172159ad93SMark Brown static int wm_adsp_load(struct wm_adsp *dsp) 3182159ad93SMark Brown { 319cf17c83cSMark Brown LIST_HEAD(buf_list); 3202159ad93SMark Brown const struct firmware *firmware; 3212159ad93SMark Brown struct regmap *regmap = dsp->regmap; 3222159ad93SMark Brown unsigned int pos = 0; 3232159ad93SMark Brown const struct wmfw_header *header; 3242159ad93SMark Brown const struct wmfw_adsp1_sizes *adsp1_sizes; 3252159ad93SMark Brown const struct wmfw_adsp2_sizes *adsp2_sizes; 3262159ad93SMark Brown const struct wmfw_footer *footer; 3272159ad93SMark Brown const struct wmfw_region *region; 3282159ad93SMark Brown const struct wm_adsp_region *mem; 3292159ad93SMark Brown const char *region_name; 3302159ad93SMark Brown char *file, *text; 331cf17c83cSMark Brown struct wm_adsp_buf *buf; 3322159ad93SMark Brown unsigned int reg; 3332159ad93SMark Brown int regions = 0; 3342159ad93SMark Brown int ret, offset, type, sizes; 3352159ad93SMark Brown 3362159ad93SMark Brown file = kzalloc(PAGE_SIZE, GFP_KERNEL); 3372159ad93SMark Brown if (file == NULL) 3382159ad93SMark Brown return -ENOMEM; 3392159ad93SMark Brown 3401023dbd9SMark Brown snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num, 3411023dbd9SMark Brown wm_adsp_fw[dsp->fw].file); 3422159ad93SMark Brown file[PAGE_SIZE - 1] = '\0'; 3432159ad93SMark Brown 3442159ad93SMark Brown ret = request_firmware(&firmware, file, dsp->dev); 3452159ad93SMark Brown if (ret != 0) { 3462159ad93SMark Brown adsp_err(dsp, "Failed to request '%s'\n", file); 3472159ad93SMark Brown goto out; 3482159ad93SMark Brown } 3492159ad93SMark Brown ret = -EINVAL; 3502159ad93SMark Brown 3512159ad93SMark Brown pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); 3522159ad93SMark Brown if (pos >= firmware->size) { 3532159ad93SMark Brown adsp_err(dsp, "%s: file too short, %zu bytes\n", 3542159ad93SMark Brown file, firmware->size); 3552159ad93SMark Brown goto out_fw; 3562159ad93SMark Brown } 3572159ad93SMark Brown 3582159ad93SMark Brown header = (void*)&firmware->data[0]; 3592159ad93SMark Brown 3602159ad93SMark Brown if (memcmp(&header->magic[0], "WMFW", 4) != 0) { 3612159ad93SMark Brown adsp_err(dsp, "%s: invalid magic\n", file); 3622159ad93SMark Brown goto out_fw; 3632159ad93SMark Brown } 3642159ad93SMark Brown 3652159ad93SMark Brown if (header->ver != 0) { 3662159ad93SMark Brown adsp_err(dsp, "%s: unknown file format %d\n", 3672159ad93SMark Brown file, header->ver); 3682159ad93SMark Brown goto out_fw; 3692159ad93SMark Brown } 3702159ad93SMark Brown 3712159ad93SMark Brown if (header->core != dsp->type) { 3722159ad93SMark Brown adsp_err(dsp, "%s: invalid core %d != %d\n", 3732159ad93SMark Brown file, header->core, dsp->type); 3742159ad93SMark Brown goto out_fw; 3752159ad93SMark Brown } 3762159ad93SMark Brown 3772159ad93SMark Brown switch (dsp->type) { 3782159ad93SMark Brown case WMFW_ADSP1: 3792159ad93SMark Brown pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); 3802159ad93SMark Brown adsp1_sizes = (void *)&(header[1]); 3812159ad93SMark Brown footer = (void *)&(adsp1_sizes[1]); 3822159ad93SMark Brown sizes = sizeof(*adsp1_sizes); 3832159ad93SMark Brown 3842159ad93SMark Brown adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", 3852159ad93SMark Brown file, le32_to_cpu(adsp1_sizes->dm), 3862159ad93SMark Brown le32_to_cpu(adsp1_sizes->pm), 3872159ad93SMark Brown le32_to_cpu(adsp1_sizes->zm)); 3882159ad93SMark Brown break; 3892159ad93SMark Brown 3902159ad93SMark Brown case WMFW_ADSP2: 3912159ad93SMark Brown pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer); 3922159ad93SMark Brown adsp2_sizes = (void *)&(header[1]); 3932159ad93SMark Brown footer = (void *)&(adsp2_sizes[1]); 3942159ad93SMark Brown sizes = sizeof(*adsp2_sizes); 3952159ad93SMark Brown 3962159ad93SMark Brown adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", 3972159ad93SMark Brown file, le32_to_cpu(adsp2_sizes->xm), 3982159ad93SMark Brown le32_to_cpu(adsp2_sizes->ym), 3992159ad93SMark Brown le32_to_cpu(adsp2_sizes->pm), 4002159ad93SMark Brown le32_to_cpu(adsp2_sizes->zm)); 4012159ad93SMark Brown break; 4022159ad93SMark Brown 4032159ad93SMark Brown default: 4042159ad93SMark Brown BUG_ON(NULL == "Unknown DSP type"); 4052159ad93SMark Brown goto out_fw; 4062159ad93SMark Brown } 4072159ad93SMark Brown 4082159ad93SMark Brown if (le32_to_cpu(header->len) != sizeof(*header) + 4092159ad93SMark Brown sizes + sizeof(*footer)) { 4102159ad93SMark Brown adsp_err(dsp, "%s: unexpected header length %d\n", 4112159ad93SMark Brown file, le32_to_cpu(header->len)); 4122159ad93SMark Brown goto out_fw; 4132159ad93SMark Brown } 4142159ad93SMark Brown 4152159ad93SMark Brown adsp_dbg(dsp, "%s: timestamp %llu\n", file, 4162159ad93SMark Brown le64_to_cpu(footer->timestamp)); 4172159ad93SMark Brown 4182159ad93SMark Brown while (pos < firmware->size && 4192159ad93SMark Brown pos - firmware->size > sizeof(*region)) { 4202159ad93SMark Brown region = (void *)&(firmware->data[pos]); 4212159ad93SMark Brown region_name = "Unknown"; 4222159ad93SMark Brown reg = 0; 4232159ad93SMark Brown text = NULL; 4242159ad93SMark Brown offset = le32_to_cpu(region->offset) & 0xffffff; 4252159ad93SMark Brown type = be32_to_cpu(region->type) & 0xff; 4262159ad93SMark Brown mem = wm_adsp_find_region(dsp, type); 4272159ad93SMark Brown 4282159ad93SMark Brown switch (type) { 4292159ad93SMark Brown case WMFW_NAME_TEXT: 4302159ad93SMark Brown region_name = "Firmware name"; 4312159ad93SMark Brown text = kzalloc(le32_to_cpu(region->len) + 1, 4322159ad93SMark Brown GFP_KERNEL); 4332159ad93SMark Brown break; 4342159ad93SMark Brown case WMFW_INFO_TEXT: 4352159ad93SMark Brown region_name = "Information"; 4362159ad93SMark Brown text = kzalloc(le32_to_cpu(region->len) + 1, 4372159ad93SMark Brown GFP_KERNEL); 4382159ad93SMark Brown break; 4392159ad93SMark Brown case WMFW_ABSOLUTE: 4402159ad93SMark Brown region_name = "Absolute"; 4412159ad93SMark Brown reg = offset; 4422159ad93SMark Brown break; 4432159ad93SMark Brown case WMFW_ADSP1_PM: 4442159ad93SMark Brown BUG_ON(!mem); 4452159ad93SMark Brown region_name = "PM"; 44645b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4472159ad93SMark Brown break; 4482159ad93SMark Brown case WMFW_ADSP1_DM: 4492159ad93SMark Brown BUG_ON(!mem); 4502159ad93SMark Brown region_name = "DM"; 45145b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4522159ad93SMark Brown break; 4532159ad93SMark Brown case WMFW_ADSP2_XM: 4542159ad93SMark Brown BUG_ON(!mem); 4552159ad93SMark Brown region_name = "XM"; 45645b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4572159ad93SMark Brown break; 4582159ad93SMark Brown case WMFW_ADSP2_YM: 4592159ad93SMark Brown BUG_ON(!mem); 4602159ad93SMark Brown region_name = "YM"; 46145b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4622159ad93SMark Brown break; 4632159ad93SMark Brown case WMFW_ADSP1_ZM: 4642159ad93SMark Brown BUG_ON(!mem); 4652159ad93SMark Brown region_name = "ZM"; 46645b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4672159ad93SMark Brown break; 4682159ad93SMark Brown default: 4692159ad93SMark Brown adsp_warn(dsp, 4702159ad93SMark Brown "%s.%d: Unknown region type %x at %d(%x)\n", 4712159ad93SMark Brown file, regions, type, pos, pos); 4722159ad93SMark Brown break; 4732159ad93SMark Brown } 4742159ad93SMark Brown 4752159ad93SMark Brown adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, 4762159ad93SMark Brown regions, le32_to_cpu(region->len), offset, 4772159ad93SMark Brown region_name); 4782159ad93SMark Brown 4792159ad93SMark Brown if (text) { 4802159ad93SMark Brown memcpy(text, region->data, le32_to_cpu(region->len)); 4812159ad93SMark Brown adsp_info(dsp, "%s: %s\n", file, text); 4822159ad93SMark Brown kfree(text); 4832159ad93SMark Brown } 4842159ad93SMark Brown 4852159ad93SMark Brown if (reg) { 486cf17c83cSMark Brown buf = wm_adsp_buf_alloc(region->data, 487cf17c83cSMark Brown le32_to_cpu(region->len), 488cf17c83cSMark Brown &buf_list); 489a76fefabSMark Brown if (!buf) { 490a76fefabSMark Brown adsp_err(dsp, "Out of memory\n"); 491a76fefabSMark Brown return -ENOMEM; 492a76fefabSMark Brown } 493a76fefabSMark Brown 494cf17c83cSMark Brown ret = regmap_raw_write_async(regmap, reg, buf->buf, 4952159ad93SMark Brown le32_to_cpu(region->len)); 4962159ad93SMark Brown if (ret != 0) { 4972159ad93SMark Brown adsp_err(dsp, 4982159ad93SMark Brown "%s.%d: Failed to write %d bytes at %d in %s: %d\n", 4992159ad93SMark Brown file, regions, 5002159ad93SMark Brown le32_to_cpu(region->len), offset, 5012159ad93SMark Brown region_name, ret); 5022159ad93SMark Brown goto out_fw; 5032159ad93SMark Brown } 5042159ad93SMark Brown } 5052159ad93SMark Brown 5062159ad93SMark Brown pos += le32_to_cpu(region->len) + sizeof(*region); 5072159ad93SMark Brown regions++; 5082159ad93SMark Brown } 5092159ad93SMark Brown 510cf17c83cSMark Brown ret = regmap_async_complete(regmap); 511cf17c83cSMark Brown if (ret != 0) { 512cf17c83cSMark Brown adsp_err(dsp, "Failed to complete async write: %d\n", ret); 513cf17c83cSMark Brown goto out_fw; 514cf17c83cSMark Brown } 515cf17c83cSMark Brown 5162159ad93SMark Brown if (pos > firmware->size) 5172159ad93SMark Brown adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", 5182159ad93SMark Brown file, regions, pos - firmware->size); 5192159ad93SMark Brown 5202159ad93SMark Brown out_fw: 521cf17c83cSMark Brown regmap_async_complete(regmap); 522cf17c83cSMark Brown wm_adsp_buf_free(&buf_list); 5232159ad93SMark Brown release_firmware(firmware); 5242159ad93SMark Brown out: 5252159ad93SMark Brown kfree(file); 5262159ad93SMark Brown 5272159ad93SMark Brown return ret; 5282159ad93SMark Brown } 5292159ad93SMark Brown 530db40517cSMark Brown static int wm_adsp_setup_algs(struct wm_adsp *dsp) 531db40517cSMark Brown { 532db40517cSMark Brown struct regmap *regmap = dsp->regmap; 533db40517cSMark Brown struct wmfw_adsp1_id_hdr adsp1_id; 534db40517cSMark Brown struct wmfw_adsp2_id_hdr adsp2_id; 535db40517cSMark Brown struct wmfw_adsp1_alg_hdr *adsp1_alg; 536db40517cSMark Brown struct wmfw_adsp2_alg_hdr *adsp2_alg; 537d62f4bc6SMark Brown void *alg, *buf; 538471f4885SMark Brown struct wm_adsp_alg_region *region; 539db40517cSMark Brown const struct wm_adsp_region *mem; 540db40517cSMark Brown unsigned int pos, term; 541d62f4bc6SMark Brown size_t algs, buf_size; 542db40517cSMark Brown __be32 val; 543db40517cSMark Brown int i, ret; 544db40517cSMark Brown 545db40517cSMark Brown switch (dsp->type) { 546db40517cSMark Brown case WMFW_ADSP1: 547db40517cSMark Brown mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); 548db40517cSMark Brown break; 549db40517cSMark Brown case WMFW_ADSP2: 550db40517cSMark Brown mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); 551db40517cSMark Brown break; 552db40517cSMark Brown default: 553db40517cSMark Brown mem = NULL; 554db40517cSMark Brown break; 555db40517cSMark Brown } 556db40517cSMark Brown 557db40517cSMark Brown if (mem == NULL) { 558db40517cSMark Brown BUG_ON(mem != NULL); 559db40517cSMark Brown return -EINVAL; 560db40517cSMark Brown } 561db40517cSMark Brown 562db40517cSMark Brown switch (dsp->type) { 563db40517cSMark Brown case WMFW_ADSP1: 564db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base, &adsp1_id, 565db40517cSMark Brown sizeof(adsp1_id)); 566db40517cSMark Brown if (ret != 0) { 567db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm info: %d\n", 568db40517cSMark Brown ret); 569db40517cSMark Brown return ret; 570db40517cSMark Brown } 571db40517cSMark Brown 572d62f4bc6SMark Brown buf = &adsp1_id; 573d62f4bc6SMark Brown buf_size = sizeof(adsp1_id); 574d62f4bc6SMark Brown 575db40517cSMark Brown algs = be32_to_cpu(adsp1_id.algs); 576db40517cSMark Brown adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", 577db40517cSMark Brown be32_to_cpu(adsp1_id.fw.id), 578db40517cSMark Brown (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, 579db40517cSMark Brown (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, 580db40517cSMark Brown be32_to_cpu(adsp1_id.fw.ver) & 0xff, 581db40517cSMark Brown algs); 582db40517cSMark Brown 583db40517cSMark Brown pos = sizeof(adsp1_id) / 2; 584db40517cSMark Brown term = pos + ((sizeof(*adsp1_alg) * algs) / 2); 585db40517cSMark Brown break; 586db40517cSMark Brown 587db40517cSMark Brown case WMFW_ADSP2: 588db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base, &adsp2_id, 589db40517cSMark Brown sizeof(adsp2_id)); 590db40517cSMark Brown if (ret != 0) { 591db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm info: %d\n", 592db40517cSMark Brown ret); 593db40517cSMark Brown return ret; 594db40517cSMark Brown } 595db40517cSMark Brown 596d62f4bc6SMark Brown buf = &adsp2_id; 597d62f4bc6SMark Brown buf_size = sizeof(adsp2_id); 598d62f4bc6SMark Brown 599db40517cSMark Brown algs = be32_to_cpu(adsp2_id.algs); 600db40517cSMark Brown adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", 601db40517cSMark Brown be32_to_cpu(adsp2_id.fw.id), 602db40517cSMark Brown (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, 603db40517cSMark Brown (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, 604db40517cSMark Brown be32_to_cpu(adsp2_id.fw.ver) & 0xff, 605db40517cSMark Brown algs); 606db40517cSMark Brown 607db40517cSMark Brown pos = sizeof(adsp2_id) / 2; 608db40517cSMark Brown term = pos + ((sizeof(*adsp2_alg) * algs) / 2); 609db40517cSMark Brown break; 610db40517cSMark Brown 611db40517cSMark Brown default: 612db40517cSMark Brown BUG_ON(NULL == "Unknown DSP type"); 613db40517cSMark Brown return -EINVAL; 614db40517cSMark Brown } 615db40517cSMark Brown 616db40517cSMark Brown if (algs == 0) { 617db40517cSMark Brown adsp_err(dsp, "No algorithms\n"); 618db40517cSMark Brown return -EINVAL; 619db40517cSMark Brown } 620db40517cSMark Brown 621d62f4bc6SMark Brown if (algs > 1024) { 622d62f4bc6SMark Brown adsp_err(dsp, "Algorithm count %zx excessive\n", algs); 623d62f4bc6SMark Brown print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET, 624d62f4bc6SMark Brown buf, buf_size); 625d62f4bc6SMark Brown return -EINVAL; 626d62f4bc6SMark Brown } 627d62f4bc6SMark Brown 628db40517cSMark Brown /* Read the terminator first to validate the length */ 629db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val)); 630db40517cSMark Brown if (ret != 0) { 631db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm list end: %d\n", 632db40517cSMark Brown ret); 633db40517cSMark Brown return ret; 634db40517cSMark Brown } 635db40517cSMark Brown 636db40517cSMark Brown if (be32_to_cpu(val) != 0xbedead) 637db40517cSMark Brown adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n", 638db40517cSMark Brown term, be32_to_cpu(val)); 639db40517cSMark Brown 640f2a93e2aSMark Brown alg = kzalloc((term - pos) * 2, GFP_KERNEL | GFP_DMA); 641db40517cSMark Brown if (!alg) 642db40517cSMark Brown return -ENOMEM; 643db40517cSMark Brown 644db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2); 645db40517cSMark Brown if (ret != 0) { 646db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm list: %d\n", 647db40517cSMark Brown ret); 648db40517cSMark Brown goto out; 649db40517cSMark Brown } 650db40517cSMark Brown 651db40517cSMark Brown adsp1_alg = alg; 652db40517cSMark Brown adsp2_alg = alg; 653db40517cSMark Brown 654db40517cSMark Brown for (i = 0; i < algs; i++) { 655db40517cSMark Brown switch (dsp->type) { 656db40517cSMark Brown case WMFW_ADSP1: 657471f4885SMark Brown adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", 658db40517cSMark Brown i, be32_to_cpu(adsp1_alg[i].alg.id), 659db40517cSMark Brown (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, 660db40517cSMark Brown (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8, 661471f4885SMark Brown be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff, 662471f4885SMark Brown be32_to_cpu(adsp1_alg[i].dm), 663471f4885SMark Brown be32_to_cpu(adsp1_alg[i].zm)); 664471f4885SMark Brown 665471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 666471f4885SMark Brown if (!region) 667471f4885SMark Brown return -ENOMEM; 668471f4885SMark Brown region->type = WMFW_ADSP1_DM; 669471f4885SMark Brown region->alg = be32_to_cpu(adsp1_alg[i].alg.id); 670471f4885SMark Brown region->base = be32_to_cpu(adsp1_alg[i].dm); 6717480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 672471f4885SMark Brown 673471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 674471f4885SMark Brown if (!region) 675471f4885SMark Brown return -ENOMEM; 676471f4885SMark Brown region->type = WMFW_ADSP1_ZM; 677471f4885SMark Brown region->alg = be32_to_cpu(adsp1_alg[i].alg.id); 678471f4885SMark Brown region->base = be32_to_cpu(adsp1_alg[i].zm); 6797480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 680db40517cSMark Brown break; 681db40517cSMark Brown 682db40517cSMark Brown case WMFW_ADSP2: 683471f4885SMark Brown adsp_info(dsp, 684471f4885SMark Brown "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", 685db40517cSMark Brown i, be32_to_cpu(adsp2_alg[i].alg.id), 686db40517cSMark Brown (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16, 687db40517cSMark Brown (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8, 688471f4885SMark Brown be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff, 689471f4885SMark Brown be32_to_cpu(adsp2_alg[i].xm), 690471f4885SMark Brown be32_to_cpu(adsp2_alg[i].ym), 691471f4885SMark Brown be32_to_cpu(adsp2_alg[i].zm)); 692471f4885SMark Brown 693471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 694471f4885SMark Brown if (!region) 695471f4885SMark Brown return -ENOMEM; 696471f4885SMark Brown region->type = WMFW_ADSP2_XM; 697471f4885SMark Brown region->alg = be32_to_cpu(adsp2_alg[i].alg.id); 698471f4885SMark Brown region->base = be32_to_cpu(adsp2_alg[i].xm); 6997480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 700471f4885SMark Brown 701471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 702471f4885SMark Brown if (!region) 703471f4885SMark Brown return -ENOMEM; 704471f4885SMark Brown region->type = WMFW_ADSP2_YM; 705471f4885SMark Brown region->alg = be32_to_cpu(adsp2_alg[i].alg.id); 706471f4885SMark Brown region->base = be32_to_cpu(adsp2_alg[i].ym); 7077480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 708471f4885SMark Brown 709471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 710471f4885SMark Brown if (!region) 711471f4885SMark Brown return -ENOMEM; 712471f4885SMark Brown region->type = WMFW_ADSP2_ZM; 713471f4885SMark Brown region->alg = be32_to_cpu(adsp2_alg[i].alg.id); 714471f4885SMark Brown region->base = be32_to_cpu(adsp2_alg[i].zm); 7157480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 716db40517cSMark Brown break; 717db40517cSMark Brown } 718db40517cSMark Brown } 719db40517cSMark Brown 720db40517cSMark Brown out: 721db40517cSMark Brown kfree(alg); 722db40517cSMark Brown return ret; 723db40517cSMark Brown } 724db40517cSMark Brown 7252159ad93SMark Brown static int wm_adsp_load_coeff(struct wm_adsp *dsp) 7262159ad93SMark Brown { 727cf17c83cSMark Brown LIST_HEAD(buf_list); 7282159ad93SMark Brown struct regmap *regmap = dsp->regmap; 7292159ad93SMark Brown struct wmfw_coeff_hdr *hdr; 7302159ad93SMark Brown struct wmfw_coeff_item *blk; 7312159ad93SMark Brown const struct firmware *firmware; 732471f4885SMark Brown const struct wm_adsp_region *mem; 733471f4885SMark Brown struct wm_adsp_alg_region *alg_region; 7342159ad93SMark Brown const char *region_name; 7352159ad93SMark Brown int ret, pos, blocks, type, offset, reg; 7362159ad93SMark Brown char *file; 737cf17c83cSMark Brown struct wm_adsp_buf *buf; 738bdaacea3SChris Rattray int tmp; 7392159ad93SMark Brown 7402159ad93SMark Brown file = kzalloc(PAGE_SIZE, GFP_KERNEL); 7412159ad93SMark Brown if (file == NULL) 7422159ad93SMark Brown return -ENOMEM; 7432159ad93SMark Brown 7441023dbd9SMark Brown snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num, 7451023dbd9SMark Brown wm_adsp_fw[dsp->fw].file); 7462159ad93SMark Brown file[PAGE_SIZE - 1] = '\0'; 7472159ad93SMark Brown 7482159ad93SMark Brown ret = request_firmware(&firmware, file, dsp->dev); 7492159ad93SMark Brown if (ret != 0) { 7502159ad93SMark Brown adsp_warn(dsp, "Failed to request '%s'\n", file); 7512159ad93SMark Brown ret = 0; 7522159ad93SMark Brown goto out; 7532159ad93SMark Brown } 7542159ad93SMark Brown ret = -EINVAL; 7552159ad93SMark Brown 7562159ad93SMark Brown if (sizeof(*hdr) >= firmware->size) { 7572159ad93SMark Brown adsp_err(dsp, "%s: file too short, %zu bytes\n", 7582159ad93SMark Brown file, firmware->size); 7592159ad93SMark Brown goto out_fw; 7602159ad93SMark Brown } 7612159ad93SMark Brown 7622159ad93SMark Brown hdr = (void*)&firmware->data[0]; 7632159ad93SMark Brown if (memcmp(hdr->magic, "WMDR", 4) != 0) { 7642159ad93SMark Brown adsp_err(dsp, "%s: invalid magic\n", file); 765a4cdbec7SCharles Keepax goto out_fw; 7662159ad93SMark Brown } 7672159ad93SMark Brown 768c712326dSMark Brown switch (be32_to_cpu(hdr->rev) & 0xff) { 769c712326dSMark Brown case 1: 770c712326dSMark Brown break; 771c712326dSMark Brown default: 772c712326dSMark Brown adsp_err(dsp, "%s: Unsupported coefficient file format %d\n", 773c712326dSMark Brown file, be32_to_cpu(hdr->rev) & 0xff); 774c712326dSMark Brown ret = -EINVAL; 775c712326dSMark Brown goto out_fw; 776c712326dSMark Brown } 777c712326dSMark Brown 7782159ad93SMark Brown adsp_dbg(dsp, "%s: v%d.%d.%d\n", file, 7792159ad93SMark Brown (le32_to_cpu(hdr->ver) >> 16) & 0xff, 7802159ad93SMark Brown (le32_to_cpu(hdr->ver) >> 8) & 0xff, 7812159ad93SMark Brown le32_to_cpu(hdr->ver) & 0xff); 7822159ad93SMark Brown 7832159ad93SMark Brown pos = le32_to_cpu(hdr->len); 7842159ad93SMark Brown 7852159ad93SMark Brown blocks = 0; 7862159ad93SMark Brown while (pos < firmware->size && 7872159ad93SMark Brown pos - firmware->size > sizeof(*blk)) { 7882159ad93SMark Brown blk = (void*)(&firmware->data[pos]); 7892159ad93SMark Brown 790c712326dSMark Brown type = le16_to_cpu(blk->type); 791c712326dSMark Brown offset = le16_to_cpu(blk->offset); 7922159ad93SMark Brown 7932159ad93SMark Brown adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", 7942159ad93SMark Brown file, blocks, le32_to_cpu(blk->id), 7952159ad93SMark Brown (le32_to_cpu(blk->ver) >> 16) & 0xff, 7962159ad93SMark Brown (le32_to_cpu(blk->ver) >> 8) & 0xff, 7972159ad93SMark Brown le32_to_cpu(blk->ver) & 0xff); 7982159ad93SMark Brown adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", 7992159ad93SMark Brown file, blocks, le32_to_cpu(blk->len), offset, type); 8002159ad93SMark Brown 8012159ad93SMark Brown reg = 0; 8022159ad93SMark Brown region_name = "Unknown"; 8032159ad93SMark Brown switch (type) { 804c712326dSMark Brown case (WMFW_NAME_TEXT << 8): 805c712326dSMark Brown case (WMFW_INFO_TEXT << 8): 8062159ad93SMark Brown break; 807c712326dSMark Brown case (WMFW_ABSOLUTE << 8): 8082159ad93SMark Brown region_name = "register"; 8092159ad93SMark Brown reg = offset; 8102159ad93SMark Brown break; 811471f4885SMark Brown 812471f4885SMark Brown case WMFW_ADSP1_DM: 813471f4885SMark Brown case WMFW_ADSP1_ZM: 814471f4885SMark Brown case WMFW_ADSP2_XM: 815471f4885SMark Brown case WMFW_ADSP2_YM: 816471f4885SMark Brown adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", 817471f4885SMark Brown file, blocks, le32_to_cpu(blk->len), 818471f4885SMark Brown type, le32_to_cpu(blk->id)); 819471f4885SMark Brown 820471f4885SMark Brown mem = wm_adsp_find_region(dsp, type); 821471f4885SMark Brown if (!mem) { 822471f4885SMark Brown adsp_err(dsp, "No base for region %x\n", type); 823471f4885SMark Brown break; 824471f4885SMark Brown } 825471f4885SMark Brown 826471f4885SMark Brown reg = 0; 827471f4885SMark Brown list_for_each_entry(alg_region, 828471f4885SMark Brown &dsp->alg_regions, list) { 829471f4885SMark Brown if (le32_to_cpu(blk->id) == alg_region->alg && 830471f4885SMark Brown type == alg_region->type) { 831338c5188SMark Brown reg = alg_region->base; 832471f4885SMark Brown reg = wm_adsp_region_to_reg(mem, 833471f4885SMark Brown reg); 834338c5188SMark Brown reg += offset; 835471f4885SMark Brown } 836471f4885SMark Brown } 837471f4885SMark Brown 838471f4885SMark Brown if (reg == 0) 839471f4885SMark Brown adsp_err(dsp, "No %x for algorithm %x\n", 840471f4885SMark Brown type, le32_to_cpu(blk->id)); 841471f4885SMark Brown break; 842471f4885SMark Brown 8432159ad93SMark Brown default: 84425c62f7eSMark Brown adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", 84525c62f7eSMark Brown file, blocks, type, pos); 8462159ad93SMark Brown break; 8472159ad93SMark Brown } 8482159ad93SMark Brown 8492159ad93SMark Brown if (reg) { 850cf17c83cSMark Brown buf = wm_adsp_buf_alloc(blk->data, 851cf17c83cSMark Brown le32_to_cpu(blk->len), 852cf17c83cSMark Brown &buf_list); 853a76fefabSMark Brown if (!buf) { 854a76fefabSMark Brown adsp_err(dsp, "Out of memory\n"); 855a76fefabSMark Brown return -ENOMEM; 856a76fefabSMark Brown } 857a76fefabSMark Brown 85820da6d5aSMark Brown adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", 85920da6d5aSMark Brown file, blocks, le32_to_cpu(blk->len), 86020da6d5aSMark Brown reg); 861cf17c83cSMark Brown ret = regmap_raw_write_async(regmap, reg, buf->buf, 8622159ad93SMark Brown le32_to_cpu(blk->len)); 8632159ad93SMark Brown if (ret != 0) { 8642159ad93SMark Brown adsp_err(dsp, 8652159ad93SMark Brown "%s.%d: Failed to write to %x in %s\n", 8662159ad93SMark Brown file, blocks, reg, region_name); 8672159ad93SMark Brown } 8682159ad93SMark Brown } 8692159ad93SMark Brown 870bdaacea3SChris Rattray tmp = le32_to_cpu(blk->len) % 4; 871bdaacea3SChris Rattray if (tmp) 872bdaacea3SChris Rattray pos += le32_to_cpu(blk->len) + (4 - tmp) + sizeof(*blk); 873bdaacea3SChris Rattray else 8742159ad93SMark Brown pos += le32_to_cpu(blk->len) + sizeof(*blk); 875bdaacea3SChris Rattray 8762159ad93SMark Brown blocks++; 8772159ad93SMark Brown } 8782159ad93SMark Brown 879cf17c83cSMark Brown ret = regmap_async_complete(regmap); 880cf17c83cSMark Brown if (ret != 0) 881cf17c83cSMark Brown adsp_err(dsp, "Failed to complete async write: %d\n", ret); 882cf17c83cSMark Brown 8832159ad93SMark Brown if (pos > firmware->size) 8842159ad93SMark Brown adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", 8852159ad93SMark Brown file, blocks, pos - firmware->size); 8862159ad93SMark Brown 8872159ad93SMark Brown out_fw: 8882159ad93SMark Brown release_firmware(firmware); 889cf17c83cSMark Brown wm_adsp_buf_free(&buf_list); 8902159ad93SMark Brown out: 8912159ad93SMark Brown kfree(file); 8922159ad93SMark Brown return 0; 8932159ad93SMark Brown } 8942159ad93SMark Brown 8955e7a7a22SMark Brown int wm_adsp1_init(struct wm_adsp *adsp) 8965e7a7a22SMark Brown { 8975e7a7a22SMark Brown INIT_LIST_HEAD(&adsp->alg_regions); 8985e7a7a22SMark Brown 8995e7a7a22SMark Brown return 0; 9005e7a7a22SMark Brown } 9015e7a7a22SMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_init); 9025e7a7a22SMark Brown 9032159ad93SMark Brown int wm_adsp1_event(struct snd_soc_dapm_widget *w, 9042159ad93SMark Brown struct snd_kcontrol *kcontrol, 9052159ad93SMark Brown int event) 9062159ad93SMark Brown { 9072159ad93SMark Brown struct snd_soc_codec *codec = w->codec; 9082159ad93SMark Brown struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); 9092159ad93SMark Brown struct wm_adsp *dsp = &dsps[w->shift]; 9102159ad93SMark Brown int ret; 91194e205bfSChris Rattray int val; 9122159ad93SMark Brown 9132159ad93SMark Brown switch (event) { 9142159ad93SMark Brown case SND_SOC_DAPM_POST_PMU: 9152159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9162159ad93SMark Brown ADSP1_SYS_ENA, ADSP1_SYS_ENA); 9172159ad93SMark Brown 91894e205bfSChris Rattray /* 91994e205bfSChris Rattray * For simplicity set the DSP clock rate to be the 92094e205bfSChris Rattray * SYSCLK rate rather than making it configurable. 92194e205bfSChris Rattray */ 92294e205bfSChris Rattray if(dsp->sysclk_reg) { 92394e205bfSChris Rattray ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); 92494e205bfSChris Rattray if (ret != 0) { 92594e205bfSChris Rattray adsp_err(dsp, "Failed to read SYSCLK state: %d\n", 92694e205bfSChris Rattray ret); 92794e205bfSChris Rattray return ret; 92894e205bfSChris Rattray } 92994e205bfSChris Rattray 93094e205bfSChris Rattray val = (val & dsp->sysclk_mask) 93194e205bfSChris Rattray >> dsp->sysclk_shift; 93294e205bfSChris Rattray 93394e205bfSChris Rattray ret = regmap_update_bits(dsp->regmap, 93494e205bfSChris Rattray dsp->base + ADSP1_CONTROL_31, 93594e205bfSChris Rattray ADSP1_CLK_SEL_MASK, val); 93694e205bfSChris Rattray if (ret != 0) { 93794e205bfSChris Rattray adsp_err(dsp, "Failed to set clock rate: %d\n", 93894e205bfSChris Rattray ret); 93994e205bfSChris Rattray return ret; 94094e205bfSChris Rattray } 94194e205bfSChris Rattray } 94294e205bfSChris Rattray 9432159ad93SMark Brown ret = wm_adsp_load(dsp); 9442159ad93SMark Brown if (ret != 0) 9452159ad93SMark Brown goto err; 9462159ad93SMark Brown 947db40517cSMark Brown ret = wm_adsp_setup_algs(dsp); 948db40517cSMark Brown if (ret != 0) 949db40517cSMark Brown goto err; 950db40517cSMark Brown 9512159ad93SMark Brown ret = wm_adsp_load_coeff(dsp); 9522159ad93SMark Brown if (ret != 0) 9532159ad93SMark Brown goto err; 9542159ad93SMark Brown 9552159ad93SMark Brown /* Start the core running */ 9562159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9572159ad93SMark Brown ADSP1_CORE_ENA | ADSP1_START, 9582159ad93SMark Brown ADSP1_CORE_ENA | ADSP1_START); 9592159ad93SMark Brown break; 9602159ad93SMark Brown 9612159ad93SMark Brown case SND_SOC_DAPM_PRE_PMD: 9622159ad93SMark Brown /* Halt the core */ 9632159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9642159ad93SMark Brown ADSP1_CORE_ENA | ADSP1_START, 0); 9652159ad93SMark Brown 9662159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, 9672159ad93SMark Brown ADSP1_WDMA_BUFFER_LENGTH_MASK, 0); 9682159ad93SMark Brown 9692159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9702159ad93SMark Brown ADSP1_SYS_ENA, 0); 9712159ad93SMark Brown break; 9722159ad93SMark Brown 9732159ad93SMark Brown default: 9742159ad93SMark Brown break; 9752159ad93SMark Brown } 9762159ad93SMark Brown 9772159ad93SMark Brown return 0; 9782159ad93SMark Brown 9792159ad93SMark Brown err: 9802159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9812159ad93SMark Brown ADSP1_SYS_ENA, 0); 9822159ad93SMark Brown return ret; 9832159ad93SMark Brown } 9842159ad93SMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_event); 9852159ad93SMark Brown 9862159ad93SMark Brown static int wm_adsp2_ena(struct wm_adsp *dsp) 9872159ad93SMark Brown { 9882159ad93SMark Brown unsigned int val; 9892159ad93SMark Brown int ret, count; 9902159ad93SMark Brown 9912159ad93SMark Brown ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, 9922159ad93SMark Brown ADSP2_SYS_ENA, ADSP2_SYS_ENA); 9932159ad93SMark Brown if (ret != 0) 9942159ad93SMark Brown return ret; 9952159ad93SMark Brown 9962159ad93SMark Brown /* Wait for the RAM to start, should be near instantaneous */ 9972159ad93SMark Brown count = 0; 9982159ad93SMark Brown do { 9992159ad93SMark Brown ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, 10002159ad93SMark Brown &val); 10012159ad93SMark Brown if (ret != 0) 10022159ad93SMark Brown return ret; 10032159ad93SMark Brown } while (!(val & ADSP2_RAM_RDY) && ++count < 10); 10042159ad93SMark Brown 10052159ad93SMark Brown if (!(val & ADSP2_RAM_RDY)) { 10062159ad93SMark Brown adsp_err(dsp, "Failed to start DSP RAM\n"); 10072159ad93SMark Brown return -EBUSY; 10082159ad93SMark Brown } 10092159ad93SMark Brown 10102159ad93SMark Brown adsp_dbg(dsp, "RAM ready after %d polls\n", count); 10112159ad93SMark Brown adsp_info(dsp, "RAM ready after %d polls\n", count); 10122159ad93SMark Brown 10132159ad93SMark Brown return 0; 10142159ad93SMark Brown } 10152159ad93SMark Brown 10162159ad93SMark Brown int wm_adsp2_event(struct snd_soc_dapm_widget *w, 10172159ad93SMark Brown struct snd_kcontrol *kcontrol, int event) 10182159ad93SMark Brown { 10192159ad93SMark Brown struct snd_soc_codec *codec = w->codec; 10202159ad93SMark Brown struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); 10212159ad93SMark Brown struct wm_adsp *dsp = &dsps[w->shift]; 1022471f4885SMark Brown struct wm_adsp_alg_region *alg_region; 1023973838a0SMark Brown unsigned int val; 10242159ad93SMark Brown int ret; 10252159ad93SMark Brown 10262159ad93SMark Brown switch (event) { 10272159ad93SMark Brown case SND_SOC_DAPM_POST_PMU: 1028dd49e2c8SMark Brown /* 1029dd49e2c8SMark Brown * For simplicity set the DSP clock rate to be the 1030dd49e2c8SMark Brown * SYSCLK rate rather than making it configurable. 1031dd49e2c8SMark Brown */ 1032dd49e2c8SMark Brown ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); 1033dd49e2c8SMark Brown if (ret != 0) { 1034dd49e2c8SMark Brown adsp_err(dsp, "Failed to read SYSCLK state: %d\n", 1035dd49e2c8SMark Brown ret); 1036dd49e2c8SMark Brown return ret; 1037dd49e2c8SMark Brown } 1038dd49e2c8SMark Brown val = (val & ARIZONA_SYSCLK_FREQ_MASK) 1039dd49e2c8SMark Brown >> ARIZONA_SYSCLK_FREQ_SHIFT; 1040dd49e2c8SMark Brown 1041dd49e2c8SMark Brown ret = regmap_update_bits(dsp->regmap, 1042dd49e2c8SMark Brown dsp->base + ADSP2_CLOCKING, 1043dd49e2c8SMark Brown ADSP2_CLK_SEL_MASK, val); 1044dd49e2c8SMark Brown if (ret != 0) { 1045dd49e2c8SMark Brown adsp_err(dsp, "Failed to set clock rate: %d\n", 1046dd49e2c8SMark Brown ret); 1047dd49e2c8SMark Brown return ret; 1048dd49e2c8SMark Brown } 1049dd49e2c8SMark Brown 1050973838a0SMark Brown if (dsp->dvfs) { 1051973838a0SMark Brown ret = regmap_read(dsp->regmap, 1052973838a0SMark Brown dsp->base + ADSP2_CLOCKING, &val); 1053973838a0SMark Brown if (ret != 0) { 1054973838a0SMark Brown dev_err(dsp->dev, 1055973838a0SMark Brown "Failed to read clocking: %d\n", ret); 1056973838a0SMark Brown return ret; 1057973838a0SMark Brown } 1058973838a0SMark Brown 105925c6fdb0SMark Brown if ((val & ADSP2_CLK_SEL_MASK) >= 3) { 1060973838a0SMark Brown ret = regulator_enable(dsp->dvfs); 1061973838a0SMark Brown if (ret != 0) { 1062973838a0SMark Brown dev_err(dsp->dev, 1063973838a0SMark Brown "Failed to enable supply: %d\n", 1064973838a0SMark Brown ret); 1065973838a0SMark Brown return ret; 1066973838a0SMark Brown } 1067973838a0SMark Brown 1068973838a0SMark Brown ret = regulator_set_voltage(dsp->dvfs, 1069973838a0SMark Brown 1800000, 1070973838a0SMark Brown 1800000); 1071973838a0SMark Brown if (ret != 0) { 1072973838a0SMark Brown dev_err(dsp->dev, 1073973838a0SMark Brown "Failed to raise supply: %d\n", 1074973838a0SMark Brown ret); 1075973838a0SMark Brown return ret; 1076973838a0SMark Brown } 1077973838a0SMark Brown } 1078973838a0SMark Brown } 1079973838a0SMark Brown 10802159ad93SMark Brown ret = wm_adsp2_ena(dsp); 10812159ad93SMark Brown if (ret != 0) 10822159ad93SMark Brown return ret; 10832159ad93SMark Brown 10842159ad93SMark Brown ret = wm_adsp_load(dsp); 10852159ad93SMark Brown if (ret != 0) 10862159ad93SMark Brown goto err; 10872159ad93SMark Brown 1088db40517cSMark Brown ret = wm_adsp_setup_algs(dsp); 1089db40517cSMark Brown if (ret != 0) 1090db40517cSMark Brown goto err; 1091db40517cSMark Brown 10922159ad93SMark Brown ret = wm_adsp_load_coeff(dsp); 10932159ad93SMark Brown if (ret != 0) 10942159ad93SMark Brown goto err; 10952159ad93SMark Brown 10962159ad93SMark Brown ret = regmap_update_bits(dsp->regmap, 10972159ad93SMark Brown dsp->base + ADSP2_CONTROL, 1098a7f9be7eSMark Brown ADSP2_CORE_ENA | ADSP2_START, 1099a7f9be7eSMark Brown ADSP2_CORE_ENA | ADSP2_START); 11002159ad93SMark Brown if (ret != 0) 11012159ad93SMark Brown goto err; 11021023dbd9SMark Brown 11031023dbd9SMark Brown dsp->running = true; 11042159ad93SMark Brown break; 11052159ad93SMark Brown 11062159ad93SMark Brown case SND_SOC_DAPM_PRE_PMD: 11071023dbd9SMark Brown dsp->running = false; 11081023dbd9SMark Brown 11092159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, 1110a7f9be7eSMark Brown ADSP2_SYS_ENA | ADSP2_CORE_ENA | 1111a7f9be7eSMark Brown ADSP2_START, 0); 1112973838a0SMark Brown 11132d30b575SMark Brown /* Make sure DMAs are quiesced */ 11142d30b575SMark Brown regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); 11152d30b575SMark Brown regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); 11162d30b575SMark Brown regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); 11172d30b575SMark Brown 1118973838a0SMark Brown if (dsp->dvfs) { 1119973838a0SMark Brown ret = regulator_set_voltage(dsp->dvfs, 1200000, 1120973838a0SMark Brown 1800000); 1121973838a0SMark Brown if (ret != 0) 1122973838a0SMark Brown dev_warn(dsp->dev, 1123973838a0SMark Brown "Failed to lower supply: %d\n", 1124973838a0SMark Brown ret); 1125973838a0SMark Brown 1126973838a0SMark Brown ret = regulator_disable(dsp->dvfs); 1127973838a0SMark Brown if (ret != 0) 1128973838a0SMark Brown dev_err(dsp->dev, 1129973838a0SMark Brown "Failed to enable supply: %d\n", 1130973838a0SMark Brown ret); 1131973838a0SMark Brown } 1132471f4885SMark Brown 1133471f4885SMark Brown while (!list_empty(&dsp->alg_regions)) { 1134471f4885SMark Brown alg_region = list_first_entry(&dsp->alg_regions, 1135471f4885SMark Brown struct wm_adsp_alg_region, 1136471f4885SMark Brown list); 1137471f4885SMark Brown list_del(&alg_region->list); 1138471f4885SMark Brown kfree(alg_region); 1139471f4885SMark Brown } 11402159ad93SMark Brown break; 11412159ad93SMark Brown 11422159ad93SMark Brown default: 11432159ad93SMark Brown break; 11442159ad93SMark Brown } 11452159ad93SMark Brown 11462159ad93SMark Brown return 0; 11472159ad93SMark Brown err: 11482159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, 1149a7f9be7eSMark Brown ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); 11502159ad93SMark Brown return ret; 11512159ad93SMark Brown } 11522159ad93SMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_event); 1153973838a0SMark Brown 1154973838a0SMark Brown int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) 1155973838a0SMark Brown { 1156973838a0SMark Brown int ret; 1157973838a0SMark Brown 115810a2b662SMark Brown /* 115910a2b662SMark Brown * Disable the DSP memory by default when in reset for a small 116010a2b662SMark Brown * power saving. 116110a2b662SMark Brown */ 116210a2b662SMark Brown ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL, 116310a2b662SMark Brown ADSP2_MEM_ENA, 0); 116410a2b662SMark Brown if (ret != 0) { 116510a2b662SMark Brown adsp_err(adsp, "Failed to clear memory retention: %d\n", ret); 116610a2b662SMark Brown return ret; 116710a2b662SMark Brown } 116810a2b662SMark Brown 1169471f4885SMark Brown INIT_LIST_HEAD(&adsp->alg_regions); 1170471f4885SMark Brown 1171973838a0SMark Brown if (dvfs) { 1172973838a0SMark Brown adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); 1173973838a0SMark Brown if (IS_ERR(adsp->dvfs)) { 1174973838a0SMark Brown ret = PTR_ERR(adsp->dvfs); 1175973838a0SMark Brown dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret); 1176973838a0SMark Brown return ret; 1177973838a0SMark Brown } 1178973838a0SMark Brown 1179973838a0SMark Brown ret = regulator_enable(adsp->dvfs); 1180973838a0SMark Brown if (ret != 0) { 1181973838a0SMark Brown dev_err(adsp->dev, "Failed to enable DCVDD: %d\n", 1182973838a0SMark Brown ret); 1183973838a0SMark Brown return ret; 1184973838a0SMark Brown } 1185973838a0SMark Brown 1186973838a0SMark Brown ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); 1187973838a0SMark Brown if (ret != 0) { 1188973838a0SMark Brown dev_err(adsp->dev, "Failed to initialise DVFS: %d\n", 1189973838a0SMark Brown ret); 1190973838a0SMark Brown return ret; 1191973838a0SMark Brown } 1192973838a0SMark Brown 1193973838a0SMark Brown ret = regulator_disable(adsp->dvfs); 1194973838a0SMark Brown if (ret != 0) { 1195973838a0SMark Brown dev_err(adsp->dev, "Failed to disable DCVDD: %d\n", 1196973838a0SMark Brown ret); 1197973838a0SMark Brown return ret; 1198973838a0SMark Brown } 1199973838a0SMark Brown } 1200973838a0SMark Brown 1201973838a0SMark Brown return 0; 1202973838a0SMark Brown } 1203973838a0SMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_init); 1204