12159ad93SMark Brown /* 22159ad93SMark Brown * wm_adsp.c -- Wolfson ADSP support 32159ad93SMark Brown * 42159ad93SMark Brown * Copyright 2012 Wolfson Microelectronics plc 52159ad93SMark Brown * 62159ad93SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 72159ad93SMark Brown * 82159ad93SMark Brown * This program is free software; you can redistribute it and/or modify 92159ad93SMark Brown * it under the terms of the GNU General Public License version 2 as 102159ad93SMark Brown * published by the Free Software Foundation. 112159ad93SMark Brown */ 122159ad93SMark Brown 132159ad93SMark Brown #include <linux/module.h> 142159ad93SMark Brown #include <linux/moduleparam.h> 152159ad93SMark Brown #include <linux/init.h> 162159ad93SMark Brown #include <linux/delay.h> 172159ad93SMark Brown #include <linux/firmware.h> 18cf17c83cSMark Brown #include <linux/list.h> 192159ad93SMark Brown #include <linux/pm.h> 202159ad93SMark Brown #include <linux/pm_runtime.h> 212159ad93SMark Brown #include <linux/regmap.h> 22973838a0SMark Brown #include <linux/regulator/consumer.h> 232159ad93SMark Brown #include <linux/slab.h> 242159ad93SMark Brown #include <sound/core.h> 252159ad93SMark Brown #include <sound/pcm.h> 262159ad93SMark Brown #include <sound/pcm_params.h> 272159ad93SMark Brown #include <sound/soc.h> 282159ad93SMark Brown #include <sound/jack.h> 292159ad93SMark Brown #include <sound/initval.h> 302159ad93SMark Brown #include <sound/tlv.h> 312159ad93SMark Brown 322159ad93SMark Brown #include <linux/mfd/arizona/registers.h> 332159ad93SMark Brown 342159ad93SMark Brown #include "wm_adsp.h" 352159ad93SMark Brown 362159ad93SMark Brown #define adsp_crit(_dsp, fmt, ...) \ 372159ad93SMark Brown dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 382159ad93SMark Brown #define adsp_err(_dsp, fmt, ...) \ 392159ad93SMark Brown dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 402159ad93SMark Brown #define adsp_warn(_dsp, fmt, ...) \ 412159ad93SMark Brown dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 422159ad93SMark Brown #define adsp_info(_dsp, fmt, ...) \ 432159ad93SMark Brown dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 442159ad93SMark Brown #define adsp_dbg(_dsp, fmt, ...) \ 452159ad93SMark Brown dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__) 462159ad93SMark Brown 472159ad93SMark Brown #define ADSP1_CONTROL_1 0x00 482159ad93SMark Brown #define ADSP1_CONTROL_2 0x02 492159ad93SMark Brown #define ADSP1_CONTROL_3 0x03 502159ad93SMark Brown #define ADSP1_CONTROL_4 0x04 512159ad93SMark Brown #define ADSP1_CONTROL_5 0x06 522159ad93SMark Brown #define ADSP1_CONTROL_6 0x07 532159ad93SMark Brown #define ADSP1_CONTROL_7 0x08 542159ad93SMark Brown #define ADSP1_CONTROL_8 0x09 552159ad93SMark Brown #define ADSP1_CONTROL_9 0x0A 562159ad93SMark Brown #define ADSP1_CONTROL_10 0x0B 572159ad93SMark Brown #define ADSP1_CONTROL_11 0x0C 582159ad93SMark Brown #define ADSP1_CONTROL_12 0x0D 592159ad93SMark Brown #define ADSP1_CONTROL_13 0x0F 602159ad93SMark Brown #define ADSP1_CONTROL_14 0x10 612159ad93SMark Brown #define ADSP1_CONTROL_15 0x11 622159ad93SMark Brown #define ADSP1_CONTROL_16 0x12 632159ad93SMark Brown #define ADSP1_CONTROL_17 0x13 642159ad93SMark Brown #define ADSP1_CONTROL_18 0x14 652159ad93SMark Brown #define ADSP1_CONTROL_19 0x16 662159ad93SMark Brown #define ADSP1_CONTROL_20 0x17 672159ad93SMark Brown #define ADSP1_CONTROL_21 0x18 682159ad93SMark Brown #define ADSP1_CONTROL_22 0x1A 692159ad93SMark Brown #define ADSP1_CONTROL_23 0x1B 702159ad93SMark Brown #define ADSP1_CONTROL_24 0x1C 712159ad93SMark Brown #define ADSP1_CONTROL_25 0x1E 722159ad93SMark Brown #define ADSP1_CONTROL_26 0x20 732159ad93SMark Brown #define ADSP1_CONTROL_27 0x21 742159ad93SMark Brown #define ADSP1_CONTROL_28 0x22 752159ad93SMark Brown #define ADSP1_CONTROL_29 0x23 762159ad93SMark Brown #define ADSP1_CONTROL_30 0x24 772159ad93SMark Brown #define ADSP1_CONTROL_31 0x26 782159ad93SMark Brown 792159ad93SMark Brown /* 802159ad93SMark Brown * ADSP1 Control 19 812159ad93SMark Brown */ 822159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_MASK 0x00FF /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 832159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT 0 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 842159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH 8 /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */ 852159ad93SMark Brown 862159ad93SMark Brown 872159ad93SMark Brown /* 882159ad93SMark Brown * ADSP1 Control 30 892159ad93SMark Brown */ 902159ad93SMark Brown #define ADSP1_DBG_CLK_ENA 0x0008 /* DSP1_DBG_CLK_ENA */ 912159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_MASK 0x0008 /* DSP1_DBG_CLK_ENA */ 922159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_SHIFT 3 /* DSP1_DBG_CLK_ENA */ 932159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_WIDTH 1 /* DSP1_DBG_CLK_ENA */ 942159ad93SMark Brown #define ADSP1_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ 952159ad93SMark Brown #define ADSP1_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ 962159ad93SMark Brown #define ADSP1_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ 972159ad93SMark Brown #define ADSP1_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ 982159ad93SMark Brown #define ADSP1_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ 992159ad93SMark Brown #define ADSP1_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ 1002159ad93SMark Brown #define ADSP1_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ 1012159ad93SMark Brown #define ADSP1_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ 1022159ad93SMark Brown #define ADSP1_START 0x0001 /* DSP1_START */ 1032159ad93SMark Brown #define ADSP1_START_MASK 0x0001 /* DSP1_START */ 1042159ad93SMark Brown #define ADSP1_START_SHIFT 0 /* DSP1_START */ 1052159ad93SMark Brown #define ADSP1_START_WIDTH 1 /* DSP1_START */ 1062159ad93SMark Brown 10794e205bfSChris Rattray /* 10894e205bfSChris Rattray * ADSP1 Control 31 10994e205bfSChris Rattray */ 11094e205bfSChris Rattray #define ADSP1_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ 11194e205bfSChris Rattray #define ADSP1_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ 11294e205bfSChris Rattray #define ADSP1_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ 11394e205bfSChris Rattray 1142d30b575SMark Brown #define ADSP2_CONTROL 0x0 1152d30b575SMark Brown #define ADSP2_CLOCKING 0x1 1162d30b575SMark Brown #define ADSP2_STATUS1 0x4 1172d30b575SMark Brown #define ADSP2_WDMA_CONFIG_1 0x30 1182d30b575SMark Brown #define ADSP2_WDMA_CONFIG_2 0x31 1192d30b575SMark Brown #define ADSP2_RDMA_CONFIG_1 0x34 1202159ad93SMark Brown 1212159ad93SMark Brown /* 1222159ad93SMark Brown * ADSP2 Control 1232159ad93SMark Brown */ 1242159ad93SMark Brown 1252159ad93SMark Brown #define ADSP2_MEM_ENA 0x0010 /* DSP1_MEM_ENA */ 1262159ad93SMark Brown #define ADSP2_MEM_ENA_MASK 0x0010 /* DSP1_MEM_ENA */ 1272159ad93SMark Brown #define ADSP2_MEM_ENA_SHIFT 4 /* DSP1_MEM_ENA */ 1282159ad93SMark Brown #define ADSP2_MEM_ENA_WIDTH 1 /* DSP1_MEM_ENA */ 1292159ad93SMark Brown #define ADSP2_SYS_ENA 0x0004 /* DSP1_SYS_ENA */ 1302159ad93SMark Brown #define ADSP2_SYS_ENA_MASK 0x0004 /* DSP1_SYS_ENA */ 1312159ad93SMark Brown #define ADSP2_SYS_ENA_SHIFT 2 /* DSP1_SYS_ENA */ 1322159ad93SMark Brown #define ADSP2_SYS_ENA_WIDTH 1 /* DSP1_SYS_ENA */ 1332159ad93SMark Brown #define ADSP2_CORE_ENA 0x0002 /* DSP1_CORE_ENA */ 1342159ad93SMark Brown #define ADSP2_CORE_ENA_MASK 0x0002 /* DSP1_CORE_ENA */ 1352159ad93SMark Brown #define ADSP2_CORE_ENA_SHIFT 1 /* DSP1_CORE_ENA */ 1362159ad93SMark Brown #define ADSP2_CORE_ENA_WIDTH 1 /* DSP1_CORE_ENA */ 1372159ad93SMark Brown #define ADSP2_START 0x0001 /* DSP1_START */ 1382159ad93SMark Brown #define ADSP2_START_MASK 0x0001 /* DSP1_START */ 1392159ad93SMark Brown #define ADSP2_START_SHIFT 0 /* DSP1_START */ 1402159ad93SMark Brown #define ADSP2_START_WIDTH 1 /* DSP1_START */ 1412159ad93SMark Brown 1422159ad93SMark Brown /* 143973838a0SMark Brown * ADSP2 clocking 144973838a0SMark Brown */ 145973838a0SMark Brown #define ADSP2_CLK_SEL_MASK 0x0007 /* CLK_SEL_ENA */ 146973838a0SMark Brown #define ADSP2_CLK_SEL_SHIFT 0 /* CLK_SEL_ENA */ 147973838a0SMark Brown #define ADSP2_CLK_SEL_WIDTH 3 /* CLK_SEL_ENA */ 148973838a0SMark Brown 149973838a0SMark Brown /* 1502159ad93SMark Brown * ADSP2 Status 1 1512159ad93SMark Brown */ 1522159ad93SMark Brown #define ADSP2_RAM_RDY 0x0001 1532159ad93SMark Brown #define ADSP2_RAM_RDY_MASK 0x0001 1542159ad93SMark Brown #define ADSP2_RAM_RDY_SHIFT 0 1552159ad93SMark Brown #define ADSP2_RAM_RDY_WIDTH 1 1562159ad93SMark Brown 157cf17c83cSMark Brown struct wm_adsp_buf { 158cf17c83cSMark Brown struct list_head list; 159cf17c83cSMark Brown void *buf; 160cf17c83cSMark Brown }; 161cf17c83cSMark Brown 162cf17c83cSMark Brown static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len, 163cf17c83cSMark Brown struct list_head *list) 164cf17c83cSMark Brown { 165cf17c83cSMark Brown struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL); 166cf17c83cSMark Brown 167cf17c83cSMark Brown if (buf == NULL) 168cf17c83cSMark Brown return NULL; 169cf17c83cSMark Brown 170cf17c83cSMark Brown buf->buf = kmemdup(src, len, GFP_KERNEL | GFP_DMA); 171cf17c83cSMark Brown if (!buf->buf) { 172cf17c83cSMark Brown kfree(buf); 173cf17c83cSMark Brown return NULL; 174cf17c83cSMark Brown } 175cf17c83cSMark Brown 176cf17c83cSMark Brown if (list) 177cf17c83cSMark Brown list_add_tail(&buf->list, list); 178cf17c83cSMark Brown 179cf17c83cSMark Brown return buf; 180cf17c83cSMark Brown } 181cf17c83cSMark Brown 182cf17c83cSMark Brown static void wm_adsp_buf_free(struct list_head *list) 183cf17c83cSMark Brown { 184cf17c83cSMark Brown while (!list_empty(list)) { 185cf17c83cSMark Brown struct wm_adsp_buf *buf = list_first_entry(list, 186cf17c83cSMark Brown struct wm_adsp_buf, 187cf17c83cSMark Brown list); 188cf17c83cSMark Brown list_del(&buf->list); 189cf17c83cSMark Brown kfree(buf->buf); 190cf17c83cSMark Brown kfree(buf); 191cf17c83cSMark Brown } 192cf17c83cSMark Brown } 193cf17c83cSMark Brown 19436e8fe99SMark Brown #define WM_ADSP_NUM_FW 4 1951023dbd9SMark Brown 1961023dbd9SMark Brown static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = { 19736e8fe99SMark Brown "MBC/VSS", "Tx", "Tx Speaker", "Rx ANC" 1981023dbd9SMark Brown }; 1991023dbd9SMark Brown 2001023dbd9SMark Brown static struct { 2011023dbd9SMark Brown const char *file; 2021023dbd9SMark Brown } wm_adsp_fw[WM_ADSP_NUM_FW] = { 2031023dbd9SMark Brown { .file = "mbc-vss" }, 2041023dbd9SMark Brown { .file = "tx" }, 20536e8fe99SMark Brown { .file = "tx-spk" }, 2061023dbd9SMark Brown { .file = "rx-anc" }, 2071023dbd9SMark Brown }; 2081023dbd9SMark Brown 2091023dbd9SMark Brown static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol, 2101023dbd9SMark Brown struct snd_ctl_elem_value *ucontrol) 2111023dbd9SMark Brown { 2121023dbd9SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2131023dbd9SMark Brown struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 2141023dbd9SMark Brown struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); 2151023dbd9SMark Brown 2161023dbd9SMark Brown ucontrol->value.integer.value[0] = adsp[e->shift_l].fw; 2171023dbd9SMark Brown 2181023dbd9SMark Brown return 0; 2191023dbd9SMark Brown } 2201023dbd9SMark Brown 2211023dbd9SMark Brown static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol, 2221023dbd9SMark Brown struct snd_ctl_elem_value *ucontrol) 2231023dbd9SMark Brown { 2241023dbd9SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 2251023dbd9SMark Brown struct soc_enum *e = (struct soc_enum *)kcontrol->private_value; 2261023dbd9SMark Brown struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec); 2271023dbd9SMark Brown 2281023dbd9SMark Brown if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw) 2291023dbd9SMark Brown return 0; 2301023dbd9SMark Brown 2311023dbd9SMark Brown if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW) 2321023dbd9SMark Brown return -EINVAL; 2331023dbd9SMark Brown 2341023dbd9SMark Brown if (adsp[e->shift_l].running) 2351023dbd9SMark Brown return -EBUSY; 2361023dbd9SMark Brown 23731522764SMark Brown adsp[e->shift_l].fw = ucontrol->value.integer.value[0]; 2381023dbd9SMark Brown 2391023dbd9SMark Brown return 0; 2401023dbd9SMark Brown } 2411023dbd9SMark Brown 2421023dbd9SMark Brown static const struct soc_enum wm_adsp_fw_enum[] = { 2431023dbd9SMark Brown SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2441023dbd9SMark Brown SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2451023dbd9SMark Brown SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2461023dbd9SMark Brown SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text), 2471023dbd9SMark Brown }; 2481023dbd9SMark Brown 2491023dbd9SMark Brown const struct snd_kcontrol_new wm_adsp_fw_controls[] = { 2501023dbd9SMark Brown SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0], 2511023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 2521023dbd9SMark Brown SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1], 2531023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 2541023dbd9SMark Brown SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2], 2551023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 2561023dbd9SMark Brown SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3], 2571023dbd9SMark Brown wm_adsp_fw_get, wm_adsp_fw_put), 2581023dbd9SMark Brown }; 2591023dbd9SMark Brown EXPORT_SYMBOL_GPL(wm_adsp_fw_controls); 2602159ad93SMark Brown 2612159ad93SMark Brown static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp, 2622159ad93SMark Brown int type) 2632159ad93SMark Brown { 2642159ad93SMark Brown int i; 2652159ad93SMark Brown 2662159ad93SMark Brown for (i = 0; i < dsp->num_mems; i++) 2672159ad93SMark Brown if (dsp->mem[i].type == type) 2682159ad93SMark Brown return &dsp->mem[i]; 2692159ad93SMark Brown 2702159ad93SMark Brown return NULL; 2712159ad93SMark Brown } 2722159ad93SMark Brown 27345b9ee72SMark Brown static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region, 27445b9ee72SMark Brown unsigned int offset) 27545b9ee72SMark Brown { 27645b9ee72SMark Brown switch (region->type) { 27745b9ee72SMark Brown case WMFW_ADSP1_PM: 27845b9ee72SMark Brown return region->base + (offset * 3); 27945b9ee72SMark Brown case WMFW_ADSP1_DM: 28045b9ee72SMark Brown return region->base + (offset * 2); 28145b9ee72SMark Brown case WMFW_ADSP2_XM: 28245b9ee72SMark Brown return region->base + (offset * 2); 28345b9ee72SMark Brown case WMFW_ADSP2_YM: 28445b9ee72SMark Brown return region->base + (offset * 2); 28545b9ee72SMark Brown case WMFW_ADSP1_ZM: 28645b9ee72SMark Brown return region->base + (offset * 2); 28745b9ee72SMark Brown default: 28845b9ee72SMark Brown WARN_ON(NULL != "Unknown memory region type"); 28945b9ee72SMark Brown return offset; 29045b9ee72SMark Brown } 29145b9ee72SMark Brown } 29245b9ee72SMark Brown 2932159ad93SMark Brown static int wm_adsp_load(struct wm_adsp *dsp) 2942159ad93SMark Brown { 295cf17c83cSMark Brown LIST_HEAD(buf_list); 2962159ad93SMark Brown const struct firmware *firmware; 2972159ad93SMark Brown struct regmap *regmap = dsp->regmap; 2982159ad93SMark Brown unsigned int pos = 0; 2992159ad93SMark Brown const struct wmfw_header *header; 3002159ad93SMark Brown const struct wmfw_adsp1_sizes *adsp1_sizes; 3012159ad93SMark Brown const struct wmfw_adsp2_sizes *adsp2_sizes; 3022159ad93SMark Brown const struct wmfw_footer *footer; 3032159ad93SMark Brown const struct wmfw_region *region; 3042159ad93SMark Brown const struct wm_adsp_region *mem; 3052159ad93SMark Brown const char *region_name; 3062159ad93SMark Brown char *file, *text; 307cf17c83cSMark Brown struct wm_adsp_buf *buf; 3082159ad93SMark Brown unsigned int reg; 3092159ad93SMark Brown int regions = 0; 3102159ad93SMark Brown int ret, offset, type, sizes; 3112159ad93SMark Brown 3122159ad93SMark Brown file = kzalloc(PAGE_SIZE, GFP_KERNEL); 3132159ad93SMark Brown if (file == NULL) 3142159ad93SMark Brown return -ENOMEM; 3152159ad93SMark Brown 3161023dbd9SMark Brown snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num, 3171023dbd9SMark Brown wm_adsp_fw[dsp->fw].file); 3182159ad93SMark Brown file[PAGE_SIZE - 1] = '\0'; 3192159ad93SMark Brown 3202159ad93SMark Brown ret = request_firmware(&firmware, file, dsp->dev); 3212159ad93SMark Brown if (ret != 0) { 3222159ad93SMark Brown adsp_err(dsp, "Failed to request '%s'\n", file); 3232159ad93SMark Brown goto out; 3242159ad93SMark Brown } 3252159ad93SMark Brown ret = -EINVAL; 3262159ad93SMark Brown 3272159ad93SMark Brown pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); 3282159ad93SMark Brown if (pos >= firmware->size) { 3292159ad93SMark Brown adsp_err(dsp, "%s: file too short, %zu bytes\n", 3302159ad93SMark Brown file, firmware->size); 3312159ad93SMark Brown goto out_fw; 3322159ad93SMark Brown } 3332159ad93SMark Brown 3342159ad93SMark Brown header = (void*)&firmware->data[0]; 3352159ad93SMark Brown 3362159ad93SMark Brown if (memcmp(&header->magic[0], "WMFW", 4) != 0) { 3372159ad93SMark Brown adsp_err(dsp, "%s: invalid magic\n", file); 3382159ad93SMark Brown goto out_fw; 3392159ad93SMark Brown } 3402159ad93SMark Brown 3412159ad93SMark Brown if (header->ver != 0) { 3422159ad93SMark Brown adsp_err(dsp, "%s: unknown file format %d\n", 3432159ad93SMark Brown file, header->ver); 3442159ad93SMark Brown goto out_fw; 3452159ad93SMark Brown } 3462159ad93SMark Brown 3472159ad93SMark Brown if (header->core != dsp->type) { 3482159ad93SMark Brown adsp_err(dsp, "%s: invalid core %d != %d\n", 3492159ad93SMark Brown file, header->core, dsp->type); 3502159ad93SMark Brown goto out_fw; 3512159ad93SMark Brown } 3522159ad93SMark Brown 3532159ad93SMark Brown switch (dsp->type) { 3542159ad93SMark Brown case WMFW_ADSP1: 3552159ad93SMark Brown pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer); 3562159ad93SMark Brown adsp1_sizes = (void *)&(header[1]); 3572159ad93SMark Brown footer = (void *)&(adsp1_sizes[1]); 3582159ad93SMark Brown sizes = sizeof(*adsp1_sizes); 3592159ad93SMark Brown 3602159ad93SMark Brown adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n", 3612159ad93SMark Brown file, le32_to_cpu(adsp1_sizes->dm), 3622159ad93SMark Brown le32_to_cpu(adsp1_sizes->pm), 3632159ad93SMark Brown le32_to_cpu(adsp1_sizes->zm)); 3642159ad93SMark Brown break; 3652159ad93SMark Brown 3662159ad93SMark Brown case WMFW_ADSP2: 3672159ad93SMark Brown pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer); 3682159ad93SMark Brown adsp2_sizes = (void *)&(header[1]); 3692159ad93SMark Brown footer = (void *)&(adsp2_sizes[1]); 3702159ad93SMark Brown sizes = sizeof(*adsp2_sizes); 3712159ad93SMark Brown 3722159ad93SMark Brown adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n", 3732159ad93SMark Brown file, le32_to_cpu(adsp2_sizes->xm), 3742159ad93SMark Brown le32_to_cpu(adsp2_sizes->ym), 3752159ad93SMark Brown le32_to_cpu(adsp2_sizes->pm), 3762159ad93SMark Brown le32_to_cpu(adsp2_sizes->zm)); 3772159ad93SMark Brown break; 3782159ad93SMark Brown 3792159ad93SMark Brown default: 3802159ad93SMark Brown BUG_ON(NULL == "Unknown DSP type"); 3812159ad93SMark Brown goto out_fw; 3822159ad93SMark Brown } 3832159ad93SMark Brown 3842159ad93SMark Brown if (le32_to_cpu(header->len) != sizeof(*header) + 3852159ad93SMark Brown sizes + sizeof(*footer)) { 3862159ad93SMark Brown adsp_err(dsp, "%s: unexpected header length %d\n", 3872159ad93SMark Brown file, le32_to_cpu(header->len)); 3882159ad93SMark Brown goto out_fw; 3892159ad93SMark Brown } 3902159ad93SMark Brown 3912159ad93SMark Brown adsp_dbg(dsp, "%s: timestamp %llu\n", file, 3922159ad93SMark Brown le64_to_cpu(footer->timestamp)); 3932159ad93SMark Brown 3942159ad93SMark Brown while (pos < firmware->size && 3952159ad93SMark Brown pos - firmware->size > sizeof(*region)) { 3962159ad93SMark Brown region = (void *)&(firmware->data[pos]); 3972159ad93SMark Brown region_name = "Unknown"; 3982159ad93SMark Brown reg = 0; 3992159ad93SMark Brown text = NULL; 4002159ad93SMark Brown offset = le32_to_cpu(region->offset) & 0xffffff; 4012159ad93SMark Brown type = be32_to_cpu(region->type) & 0xff; 4022159ad93SMark Brown mem = wm_adsp_find_region(dsp, type); 4032159ad93SMark Brown 4042159ad93SMark Brown switch (type) { 4052159ad93SMark Brown case WMFW_NAME_TEXT: 4062159ad93SMark Brown region_name = "Firmware name"; 4072159ad93SMark Brown text = kzalloc(le32_to_cpu(region->len) + 1, 4082159ad93SMark Brown GFP_KERNEL); 4092159ad93SMark Brown break; 4102159ad93SMark Brown case WMFW_INFO_TEXT: 4112159ad93SMark Brown region_name = "Information"; 4122159ad93SMark Brown text = kzalloc(le32_to_cpu(region->len) + 1, 4132159ad93SMark Brown GFP_KERNEL); 4142159ad93SMark Brown break; 4152159ad93SMark Brown case WMFW_ABSOLUTE: 4162159ad93SMark Brown region_name = "Absolute"; 4172159ad93SMark Brown reg = offset; 4182159ad93SMark Brown break; 4192159ad93SMark Brown case WMFW_ADSP1_PM: 4202159ad93SMark Brown BUG_ON(!mem); 4212159ad93SMark Brown region_name = "PM"; 42245b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4232159ad93SMark Brown break; 4242159ad93SMark Brown case WMFW_ADSP1_DM: 4252159ad93SMark Brown BUG_ON(!mem); 4262159ad93SMark Brown region_name = "DM"; 42745b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4282159ad93SMark Brown break; 4292159ad93SMark Brown case WMFW_ADSP2_XM: 4302159ad93SMark Brown BUG_ON(!mem); 4312159ad93SMark Brown region_name = "XM"; 43245b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4332159ad93SMark Brown break; 4342159ad93SMark Brown case WMFW_ADSP2_YM: 4352159ad93SMark Brown BUG_ON(!mem); 4362159ad93SMark Brown region_name = "YM"; 43745b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4382159ad93SMark Brown break; 4392159ad93SMark Brown case WMFW_ADSP1_ZM: 4402159ad93SMark Brown BUG_ON(!mem); 4412159ad93SMark Brown region_name = "ZM"; 44245b9ee72SMark Brown reg = wm_adsp_region_to_reg(mem, offset); 4432159ad93SMark Brown break; 4442159ad93SMark Brown default: 4452159ad93SMark Brown adsp_warn(dsp, 4462159ad93SMark Brown "%s.%d: Unknown region type %x at %d(%x)\n", 4472159ad93SMark Brown file, regions, type, pos, pos); 4482159ad93SMark Brown break; 4492159ad93SMark Brown } 4502159ad93SMark Brown 4512159ad93SMark Brown adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file, 4522159ad93SMark Brown regions, le32_to_cpu(region->len), offset, 4532159ad93SMark Brown region_name); 4542159ad93SMark Brown 4552159ad93SMark Brown if (text) { 4562159ad93SMark Brown memcpy(text, region->data, le32_to_cpu(region->len)); 4572159ad93SMark Brown adsp_info(dsp, "%s: %s\n", file, text); 4582159ad93SMark Brown kfree(text); 4592159ad93SMark Brown } 4602159ad93SMark Brown 4612159ad93SMark Brown if (reg) { 462cf17c83cSMark Brown buf = wm_adsp_buf_alloc(region->data, 463cf17c83cSMark Brown le32_to_cpu(region->len), 464cf17c83cSMark Brown &buf_list); 465a76fefabSMark Brown if (!buf) { 466a76fefabSMark Brown adsp_err(dsp, "Out of memory\n"); 467a76fefabSMark Brown return -ENOMEM; 468a76fefabSMark Brown } 469a76fefabSMark Brown 470cf17c83cSMark Brown ret = regmap_raw_write_async(regmap, reg, buf->buf, 4712159ad93SMark Brown le32_to_cpu(region->len)); 4722159ad93SMark Brown if (ret != 0) { 4732159ad93SMark Brown adsp_err(dsp, 4742159ad93SMark Brown "%s.%d: Failed to write %d bytes at %d in %s: %d\n", 4752159ad93SMark Brown file, regions, 4762159ad93SMark Brown le32_to_cpu(region->len), offset, 4772159ad93SMark Brown region_name, ret); 4782159ad93SMark Brown goto out_fw; 4792159ad93SMark Brown } 4802159ad93SMark Brown } 4812159ad93SMark Brown 4822159ad93SMark Brown pos += le32_to_cpu(region->len) + sizeof(*region); 4832159ad93SMark Brown regions++; 4842159ad93SMark Brown } 4852159ad93SMark Brown 486cf17c83cSMark Brown ret = regmap_async_complete(regmap); 487cf17c83cSMark Brown if (ret != 0) { 488cf17c83cSMark Brown adsp_err(dsp, "Failed to complete async write: %d\n", ret); 489cf17c83cSMark Brown goto out_fw; 490cf17c83cSMark Brown } 491cf17c83cSMark Brown 4922159ad93SMark Brown if (pos > firmware->size) 4932159ad93SMark Brown adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", 4942159ad93SMark Brown file, regions, pos - firmware->size); 4952159ad93SMark Brown 4962159ad93SMark Brown out_fw: 497cf17c83cSMark Brown regmap_async_complete(regmap); 498cf17c83cSMark Brown wm_adsp_buf_free(&buf_list); 4992159ad93SMark Brown release_firmware(firmware); 5002159ad93SMark Brown out: 5012159ad93SMark Brown kfree(file); 5022159ad93SMark Brown 5032159ad93SMark Brown return ret; 5042159ad93SMark Brown } 5052159ad93SMark Brown 506db40517cSMark Brown static int wm_adsp_setup_algs(struct wm_adsp *dsp) 507db40517cSMark Brown { 508db40517cSMark Brown struct regmap *regmap = dsp->regmap; 509db40517cSMark Brown struct wmfw_adsp1_id_hdr adsp1_id; 510db40517cSMark Brown struct wmfw_adsp2_id_hdr adsp2_id; 511db40517cSMark Brown struct wmfw_adsp1_alg_hdr *adsp1_alg; 512db40517cSMark Brown struct wmfw_adsp2_alg_hdr *adsp2_alg; 513d62f4bc6SMark Brown void *alg, *buf; 514471f4885SMark Brown struct wm_adsp_alg_region *region; 515db40517cSMark Brown const struct wm_adsp_region *mem; 516db40517cSMark Brown unsigned int pos, term; 517d62f4bc6SMark Brown size_t algs, buf_size; 518db40517cSMark Brown __be32 val; 519db40517cSMark Brown int i, ret; 520db40517cSMark Brown 521db40517cSMark Brown switch (dsp->type) { 522db40517cSMark Brown case WMFW_ADSP1: 523db40517cSMark Brown mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM); 524db40517cSMark Brown break; 525db40517cSMark Brown case WMFW_ADSP2: 526db40517cSMark Brown mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM); 527db40517cSMark Brown break; 528db40517cSMark Brown default: 529db40517cSMark Brown mem = NULL; 530db40517cSMark Brown break; 531db40517cSMark Brown } 532db40517cSMark Brown 533db40517cSMark Brown if (mem == NULL) { 534db40517cSMark Brown BUG_ON(mem != NULL); 535db40517cSMark Brown return -EINVAL; 536db40517cSMark Brown } 537db40517cSMark Brown 538db40517cSMark Brown switch (dsp->type) { 539db40517cSMark Brown case WMFW_ADSP1: 540db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base, &adsp1_id, 541db40517cSMark Brown sizeof(adsp1_id)); 542db40517cSMark Brown if (ret != 0) { 543db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm info: %d\n", 544db40517cSMark Brown ret); 545db40517cSMark Brown return ret; 546db40517cSMark Brown } 547db40517cSMark Brown 548d62f4bc6SMark Brown buf = &adsp1_id; 549d62f4bc6SMark Brown buf_size = sizeof(adsp1_id); 550d62f4bc6SMark Brown 551db40517cSMark Brown algs = be32_to_cpu(adsp1_id.algs); 552db40517cSMark Brown adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", 553db40517cSMark Brown be32_to_cpu(adsp1_id.fw.id), 554db40517cSMark Brown (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16, 555db40517cSMark Brown (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8, 556db40517cSMark Brown be32_to_cpu(adsp1_id.fw.ver) & 0xff, 557db40517cSMark Brown algs); 558db40517cSMark Brown 559db40517cSMark Brown pos = sizeof(adsp1_id) / 2; 560db40517cSMark Brown term = pos + ((sizeof(*adsp1_alg) * algs) / 2); 561db40517cSMark Brown break; 562db40517cSMark Brown 563db40517cSMark Brown case WMFW_ADSP2: 564db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base, &adsp2_id, 565db40517cSMark Brown sizeof(adsp2_id)); 566db40517cSMark Brown if (ret != 0) { 567db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm info: %d\n", 568db40517cSMark Brown ret); 569db40517cSMark Brown return ret; 570db40517cSMark Brown } 571db40517cSMark Brown 572d62f4bc6SMark Brown buf = &adsp2_id; 573d62f4bc6SMark Brown buf_size = sizeof(adsp2_id); 574d62f4bc6SMark Brown 575db40517cSMark Brown algs = be32_to_cpu(adsp2_id.algs); 576db40517cSMark Brown adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n", 577db40517cSMark Brown be32_to_cpu(adsp2_id.fw.id), 578db40517cSMark Brown (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16, 579db40517cSMark Brown (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8, 580db40517cSMark Brown be32_to_cpu(adsp2_id.fw.ver) & 0xff, 581db40517cSMark Brown algs); 582db40517cSMark Brown 583db40517cSMark Brown pos = sizeof(adsp2_id) / 2; 584db40517cSMark Brown term = pos + ((sizeof(*adsp2_alg) * algs) / 2); 585db40517cSMark Brown break; 586db40517cSMark Brown 587db40517cSMark Brown default: 588db40517cSMark Brown BUG_ON(NULL == "Unknown DSP type"); 589db40517cSMark Brown return -EINVAL; 590db40517cSMark Brown } 591db40517cSMark Brown 592db40517cSMark Brown if (algs == 0) { 593db40517cSMark Brown adsp_err(dsp, "No algorithms\n"); 594db40517cSMark Brown return -EINVAL; 595db40517cSMark Brown } 596db40517cSMark Brown 597d62f4bc6SMark Brown if (algs > 1024) { 598d62f4bc6SMark Brown adsp_err(dsp, "Algorithm count %zx excessive\n", algs); 599d62f4bc6SMark Brown print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET, 600d62f4bc6SMark Brown buf, buf_size); 601d62f4bc6SMark Brown return -EINVAL; 602d62f4bc6SMark Brown } 603d62f4bc6SMark Brown 604db40517cSMark Brown /* Read the terminator first to validate the length */ 605db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val)); 606db40517cSMark Brown if (ret != 0) { 607db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm list end: %d\n", 608db40517cSMark Brown ret); 609db40517cSMark Brown return ret; 610db40517cSMark Brown } 611db40517cSMark Brown 612db40517cSMark Brown if (be32_to_cpu(val) != 0xbedead) 613db40517cSMark Brown adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n", 614db40517cSMark Brown term, be32_to_cpu(val)); 615db40517cSMark Brown 616f2a93e2aSMark Brown alg = kzalloc((term - pos) * 2, GFP_KERNEL | GFP_DMA); 617db40517cSMark Brown if (!alg) 618db40517cSMark Brown return -ENOMEM; 619db40517cSMark Brown 620db40517cSMark Brown ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2); 621db40517cSMark Brown if (ret != 0) { 622db40517cSMark Brown adsp_err(dsp, "Failed to read algorithm list: %d\n", 623db40517cSMark Brown ret); 624db40517cSMark Brown goto out; 625db40517cSMark Brown } 626db40517cSMark Brown 627db40517cSMark Brown adsp1_alg = alg; 628db40517cSMark Brown adsp2_alg = alg; 629db40517cSMark Brown 630db40517cSMark Brown for (i = 0; i < algs; i++) { 631db40517cSMark Brown switch (dsp->type) { 632db40517cSMark Brown case WMFW_ADSP1: 633471f4885SMark Brown adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n", 634db40517cSMark Brown i, be32_to_cpu(adsp1_alg[i].alg.id), 635db40517cSMark Brown (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16, 636db40517cSMark Brown (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8, 637471f4885SMark Brown be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff, 638471f4885SMark Brown be32_to_cpu(adsp1_alg[i].dm), 639471f4885SMark Brown be32_to_cpu(adsp1_alg[i].zm)); 640471f4885SMark Brown 641471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 642471f4885SMark Brown if (!region) 643471f4885SMark Brown return -ENOMEM; 644471f4885SMark Brown region->type = WMFW_ADSP1_DM; 645471f4885SMark Brown region->alg = be32_to_cpu(adsp1_alg[i].alg.id); 646471f4885SMark Brown region->base = be32_to_cpu(adsp1_alg[i].dm); 6477480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 648471f4885SMark Brown 649471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 650471f4885SMark Brown if (!region) 651471f4885SMark Brown return -ENOMEM; 652471f4885SMark Brown region->type = WMFW_ADSP1_ZM; 653471f4885SMark Brown region->alg = be32_to_cpu(adsp1_alg[i].alg.id); 654471f4885SMark Brown region->base = be32_to_cpu(adsp1_alg[i].zm); 6557480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 656db40517cSMark Brown break; 657db40517cSMark Brown 658db40517cSMark Brown case WMFW_ADSP2: 659471f4885SMark Brown adsp_info(dsp, 660471f4885SMark Brown "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n", 661db40517cSMark Brown i, be32_to_cpu(adsp2_alg[i].alg.id), 662db40517cSMark Brown (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16, 663db40517cSMark Brown (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8, 664471f4885SMark Brown be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff, 665471f4885SMark Brown be32_to_cpu(adsp2_alg[i].xm), 666471f4885SMark Brown be32_to_cpu(adsp2_alg[i].ym), 667471f4885SMark Brown be32_to_cpu(adsp2_alg[i].zm)); 668471f4885SMark Brown 669471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 670471f4885SMark Brown if (!region) 671471f4885SMark Brown return -ENOMEM; 672471f4885SMark Brown region->type = WMFW_ADSP2_XM; 673471f4885SMark Brown region->alg = be32_to_cpu(adsp2_alg[i].alg.id); 674471f4885SMark Brown region->base = be32_to_cpu(adsp2_alg[i].xm); 6757480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 676471f4885SMark Brown 677471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 678471f4885SMark Brown if (!region) 679471f4885SMark Brown return -ENOMEM; 680471f4885SMark Brown region->type = WMFW_ADSP2_YM; 681471f4885SMark Brown region->alg = be32_to_cpu(adsp2_alg[i].alg.id); 682471f4885SMark Brown region->base = be32_to_cpu(adsp2_alg[i].ym); 6837480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 684471f4885SMark Brown 685471f4885SMark Brown region = kzalloc(sizeof(*region), GFP_KERNEL); 686471f4885SMark Brown if (!region) 687471f4885SMark Brown return -ENOMEM; 688471f4885SMark Brown region->type = WMFW_ADSP2_ZM; 689471f4885SMark Brown region->alg = be32_to_cpu(adsp2_alg[i].alg.id); 690471f4885SMark Brown region->base = be32_to_cpu(adsp2_alg[i].zm); 6917480800eSMark Brown list_add_tail(®ion->list, &dsp->alg_regions); 692db40517cSMark Brown break; 693db40517cSMark Brown } 694db40517cSMark Brown } 695db40517cSMark Brown 696db40517cSMark Brown out: 697db40517cSMark Brown kfree(alg); 698db40517cSMark Brown return ret; 699db40517cSMark Brown } 700db40517cSMark Brown 7012159ad93SMark Brown static int wm_adsp_load_coeff(struct wm_adsp *dsp) 7022159ad93SMark Brown { 703cf17c83cSMark Brown LIST_HEAD(buf_list); 7042159ad93SMark Brown struct regmap *regmap = dsp->regmap; 7052159ad93SMark Brown struct wmfw_coeff_hdr *hdr; 7062159ad93SMark Brown struct wmfw_coeff_item *blk; 7072159ad93SMark Brown const struct firmware *firmware; 708471f4885SMark Brown const struct wm_adsp_region *mem; 709471f4885SMark Brown struct wm_adsp_alg_region *alg_region; 7102159ad93SMark Brown const char *region_name; 7112159ad93SMark Brown int ret, pos, blocks, type, offset, reg; 7122159ad93SMark Brown char *file; 713cf17c83cSMark Brown struct wm_adsp_buf *buf; 714bdaacea3SChris Rattray int tmp; 7152159ad93SMark Brown 7162159ad93SMark Brown file = kzalloc(PAGE_SIZE, GFP_KERNEL); 7172159ad93SMark Brown if (file == NULL) 7182159ad93SMark Brown return -ENOMEM; 7192159ad93SMark Brown 7201023dbd9SMark Brown snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num, 7211023dbd9SMark Brown wm_adsp_fw[dsp->fw].file); 7222159ad93SMark Brown file[PAGE_SIZE - 1] = '\0'; 7232159ad93SMark Brown 7242159ad93SMark Brown ret = request_firmware(&firmware, file, dsp->dev); 7252159ad93SMark Brown if (ret != 0) { 7262159ad93SMark Brown adsp_warn(dsp, "Failed to request '%s'\n", file); 7272159ad93SMark Brown ret = 0; 7282159ad93SMark Brown goto out; 7292159ad93SMark Brown } 7302159ad93SMark Brown ret = -EINVAL; 7312159ad93SMark Brown 7322159ad93SMark Brown if (sizeof(*hdr) >= firmware->size) { 7332159ad93SMark Brown adsp_err(dsp, "%s: file too short, %zu bytes\n", 7342159ad93SMark Brown file, firmware->size); 7352159ad93SMark Brown goto out_fw; 7362159ad93SMark Brown } 7372159ad93SMark Brown 7382159ad93SMark Brown hdr = (void*)&firmware->data[0]; 7392159ad93SMark Brown if (memcmp(hdr->magic, "WMDR", 4) != 0) { 7402159ad93SMark Brown adsp_err(dsp, "%s: invalid magic\n", file); 741a4cdbec7SCharles Keepax goto out_fw; 7422159ad93SMark Brown } 7432159ad93SMark Brown 744c712326dSMark Brown switch (be32_to_cpu(hdr->rev) & 0xff) { 745c712326dSMark Brown case 1: 746c712326dSMark Brown break; 747c712326dSMark Brown default: 748c712326dSMark Brown adsp_err(dsp, "%s: Unsupported coefficient file format %d\n", 749c712326dSMark Brown file, be32_to_cpu(hdr->rev) & 0xff); 750c712326dSMark Brown ret = -EINVAL; 751c712326dSMark Brown goto out_fw; 752c712326dSMark Brown } 753c712326dSMark Brown 7542159ad93SMark Brown adsp_dbg(dsp, "%s: v%d.%d.%d\n", file, 7552159ad93SMark Brown (le32_to_cpu(hdr->ver) >> 16) & 0xff, 7562159ad93SMark Brown (le32_to_cpu(hdr->ver) >> 8) & 0xff, 7572159ad93SMark Brown le32_to_cpu(hdr->ver) & 0xff); 7582159ad93SMark Brown 7592159ad93SMark Brown pos = le32_to_cpu(hdr->len); 7602159ad93SMark Brown 7612159ad93SMark Brown blocks = 0; 7622159ad93SMark Brown while (pos < firmware->size && 7632159ad93SMark Brown pos - firmware->size > sizeof(*blk)) { 7642159ad93SMark Brown blk = (void*)(&firmware->data[pos]); 7652159ad93SMark Brown 766c712326dSMark Brown type = le16_to_cpu(blk->type); 767c712326dSMark Brown offset = le16_to_cpu(blk->offset); 7682159ad93SMark Brown 7692159ad93SMark Brown adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n", 7702159ad93SMark Brown file, blocks, le32_to_cpu(blk->id), 7712159ad93SMark Brown (le32_to_cpu(blk->ver) >> 16) & 0xff, 7722159ad93SMark Brown (le32_to_cpu(blk->ver) >> 8) & 0xff, 7732159ad93SMark Brown le32_to_cpu(blk->ver) & 0xff); 7742159ad93SMark Brown adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n", 7752159ad93SMark Brown file, blocks, le32_to_cpu(blk->len), offset, type); 7762159ad93SMark Brown 7772159ad93SMark Brown reg = 0; 7782159ad93SMark Brown region_name = "Unknown"; 7792159ad93SMark Brown switch (type) { 780c712326dSMark Brown case (WMFW_NAME_TEXT << 8): 781c712326dSMark Brown case (WMFW_INFO_TEXT << 8): 7822159ad93SMark Brown break; 783c712326dSMark Brown case (WMFW_ABSOLUTE << 8): 7842159ad93SMark Brown region_name = "register"; 7852159ad93SMark Brown reg = offset; 7862159ad93SMark Brown break; 787471f4885SMark Brown 788471f4885SMark Brown case WMFW_ADSP1_DM: 789471f4885SMark Brown case WMFW_ADSP1_ZM: 790471f4885SMark Brown case WMFW_ADSP2_XM: 791471f4885SMark Brown case WMFW_ADSP2_YM: 792471f4885SMark Brown adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n", 793471f4885SMark Brown file, blocks, le32_to_cpu(blk->len), 794471f4885SMark Brown type, le32_to_cpu(blk->id)); 795471f4885SMark Brown 796471f4885SMark Brown mem = wm_adsp_find_region(dsp, type); 797471f4885SMark Brown if (!mem) { 798471f4885SMark Brown adsp_err(dsp, "No base for region %x\n", type); 799471f4885SMark Brown break; 800471f4885SMark Brown } 801471f4885SMark Brown 802471f4885SMark Brown reg = 0; 803471f4885SMark Brown list_for_each_entry(alg_region, 804471f4885SMark Brown &dsp->alg_regions, list) { 805471f4885SMark Brown if (le32_to_cpu(blk->id) == alg_region->alg && 806471f4885SMark Brown type == alg_region->type) { 807338c5188SMark Brown reg = alg_region->base; 808471f4885SMark Brown reg = wm_adsp_region_to_reg(mem, 809471f4885SMark Brown reg); 810338c5188SMark Brown reg += offset; 811471f4885SMark Brown } 812471f4885SMark Brown } 813471f4885SMark Brown 814471f4885SMark Brown if (reg == 0) 815471f4885SMark Brown adsp_err(dsp, "No %x for algorithm %x\n", 816471f4885SMark Brown type, le32_to_cpu(blk->id)); 817471f4885SMark Brown break; 818471f4885SMark Brown 8192159ad93SMark Brown default: 82025c62f7eSMark Brown adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n", 82125c62f7eSMark Brown file, blocks, type, pos); 8222159ad93SMark Brown break; 8232159ad93SMark Brown } 8242159ad93SMark Brown 8252159ad93SMark Brown if (reg) { 826cf17c83cSMark Brown buf = wm_adsp_buf_alloc(blk->data, 827cf17c83cSMark Brown le32_to_cpu(blk->len), 828cf17c83cSMark Brown &buf_list); 829a76fefabSMark Brown if (!buf) { 830a76fefabSMark Brown adsp_err(dsp, "Out of memory\n"); 831a76fefabSMark Brown return -ENOMEM; 832a76fefabSMark Brown } 833a76fefabSMark Brown 83420da6d5aSMark Brown adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n", 83520da6d5aSMark Brown file, blocks, le32_to_cpu(blk->len), 83620da6d5aSMark Brown reg); 837cf17c83cSMark Brown ret = regmap_raw_write_async(regmap, reg, buf->buf, 8382159ad93SMark Brown le32_to_cpu(blk->len)); 8392159ad93SMark Brown if (ret != 0) { 8402159ad93SMark Brown adsp_err(dsp, 8412159ad93SMark Brown "%s.%d: Failed to write to %x in %s\n", 8422159ad93SMark Brown file, blocks, reg, region_name); 8432159ad93SMark Brown } 8442159ad93SMark Brown } 8452159ad93SMark Brown 846bdaacea3SChris Rattray tmp = le32_to_cpu(blk->len) % 4; 847bdaacea3SChris Rattray if (tmp) 848bdaacea3SChris Rattray pos += le32_to_cpu(blk->len) + (4 - tmp) + sizeof(*blk); 849bdaacea3SChris Rattray else 8502159ad93SMark Brown pos += le32_to_cpu(blk->len) + sizeof(*blk); 851bdaacea3SChris Rattray 8522159ad93SMark Brown blocks++; 8532159ad93SMark Brown } 8542159ad93SMark Brown 855cf17c83cSMark Brown ret = regmap_async_complete(regmap); 856cf17c83cSMark Brown if (ret != 0) 857cf17c83cSMark Brown adsp_err(dsp, "Failed to complete async write: %d\n", ret); 858cf17c83cSMark Brown 8592159ad93SMark Brown if (pos > firmware->size) 8602159ad93SMark Brown adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n", 8612159ad93SMark Brown file, blocks, pos - firmware->size); 8622159ad93SMark Brown 8632159ad93SMark Brown out_fw: 8642159ad93SMark Brown release_firmware(firmware); 865cf17c83cSMark Brown wm_adsp_buf_free(&buf_list); 8662159ad93SMark Brown out: 8672159ad93SMark Brown kfree(file); 8682159ad93SMark Brown return 0; 8692159ad93SMark Brown } 8702159ad93SMark Brown 8715e7a7a22SMark Brown int wm_adsp1_init(struct wm_adsp *adsp) 8725e7a7a22SMark Brown { 8735e7a7a22SMark Brown INIT_LIST_HEAD(&adsp->alg_regions); 8745e7a7a22SMark Brown 8755e7a7a22SMark Brown return 0; 8765e7a7a22SMark Brown } 8775e7a7a22SMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_init); 8785e7a7a22SMark Brown 8792159ad93SMark Brown int wm_adsp1_event(struct snd_soc_dapm_widget *w, 8802159ad93SMark Brown struct snd_kcontrol *kcontrol, 8812159ad93SMark Brown int event) 8822159ad93SMark Brown { 8832159ad93SMark Brown struct snd_soc_codec *codec = w->codec; 8842159ad93SMark Brown struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); 8852159ad93SMark Brown struct wm_adsp *dsp = &dsps[w->shift]; 8862159ad93SMark Brown int ret; 88794e205bfSChris Rattray int val; 8882159ad93SMark Brown 8892159ad93SMark Brown switch (event) { 8902159ad93SMark Brown case SND_SOC_DAPM_POST_PMU: 8912159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 8922159ad93SMark Brown ADSP1_SYS_ENA, ADSP1_SYS_ENA); 8932159ad93SMark Brown 89494e205bfSChris Rattray /* 89594e205bfSChris Rattray * For simplicity set the DSP clock rate to be the 89694e205bfSChris Rattray * SYSCLK rate rather than making it configurable. 89794e205bfSChris Rattray */ 89894e205bfSChris Rattray if(dsp->sysclk_reg) { 89994e205bfSChris Rattray ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val); 90094e205bfSChris Rattray if (ret != 0) { 90194e205bfSChris Rattray adsp_err(dsp, "Failed to read SYSCLK state: %d\n", 90294e205bfSChris Rattray ret); 90394e205bfSChris Rattray return ret; 90494e205bfSChris Rattray } 90594e205bfSChris Rattray 90694e205bfSChris Rattray val = (val & dsp->sysclk_mask) 90794e205bfSChris Rattray >> dsp->sysclk_shift; 90894e205bfSChris Rattray 90994e205bfSChris Rattray ret = regmap_update_bits(dsp->regmap, 91094e205bfSChris Rattray dsp->base + ADSP1_CONTROL_31, 91194e205bfSChris Rattray ADSP1_CLK_SEL_MASK, val); 91294e205bfSChris Rattray if (ret != 0) { 91394e205bfSChris Rattray adsp_err(dsp, "Failed to set clock rate: %d\n", 91494e205bfSChris Rattray ret); 91594e205bfSChris Rattray return ret; 91694e205bfSChris Rattray } 91794e205bfSChris Rattray } 91894e205bfSChris Rattray 9192159ad93SMark Brown ret = wm_adsp_load(dsp); 9202159ad93SMark Brown if (ret != 0) 9212159ad93SMark Brown goto err; 9222159ad93SMark Brown 923db40517cSMark Brown ret = wm_adsp_setup_algs(dsp); 924db40517cSMark Brown if (ret != 0) 925db40517cSMark Brown goto err; 926db40517cSMark Brown 9272159ad93SMark Brown ret = wm_adsp_load_coeff(dsp); 9282159ad93SMark Brown if (ret != 0) 9292159ad93SMark Brown goto err; 9302159ad93SMark Brown 9312159ad93SMark Brown /* Start the core running */ 9322159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9332159ad93SMark Brown ADSP1_CORE_ENA | ADSP1_START, 9342159ad93SMark Brown ADSP1_CORE_ENA | ADSP1_START); 9352159ad93SMark Brown break; 9362159ad93SMark Brown 9372159ad93SMark Brown case SND_SOC_DAPM_PRE_PMD: 9382159ad93SMark Brown /* Halt the core */ 9392159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9402159ad93SMark Brown ADSP1_CORE_ENA | ADSP1_START, 0); 9412159ad93SMark Brown 9422159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19, 9432159ad93SMark Brown ADSP1_WDMA_BUFFER_LENGTH_MASK, 0); 9442159ad93SMark Brown 9452159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9462159ad93SMark Brown ADSP1_SYS_ENA, 0); 9472159ad93SMark Brown break; 9482159ad93SMark Brown 9492159ad93SMark Brown default: 9502159ad93SMark Brown break; 9512159ad93SMark Brown } 9522159ad93SMark Brown 9532159ad93SMark Brown return 0; 9542159ad93SMark Brown 9552159ad93SMark Brown err: 9562159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30, 9572159ad93SMark Brown ADSP1_SYS_ENA, 0); 9582159ad93SMark Brown return ret; 9592159ad93SMark Brown } 9602159ad93SMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_event); 9612159ad93SMark Brown 9622159ad93SMark Brown static int wm_adsp2_ena(struct wm_adsp *dsp) 9632159ad93SMark Brown { 9642159ad93SMark Brown unsigned int val; 9652159ad93SMark Brown int ret, count; 9662159ad93SMark Brown 9672159ad93SMark Brown ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, 9682159ad93SMark Brown ADSP2_SYS_ENA, ADSP2_SYS_ENA); 9692159ad93SMark Brown if (ret != 0) 9702159ad93SMark Brown return ret; 9712159ad93SMark Brown 9722159ad93SMark Brown /* Wait for the RAM to start, should be near instantaneous */ 9732159ad93SMark Brown count = 0; 9742159ad93SMark Brown do { 9752159ad93SMark Brown ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1, 9762159ad93SMark Brown &val); 9772159ad93SMark Brown if (ret != 0) 9782159ad93SMark Brown return ret; 9792159ad93SMark Brown } while (!(val & ADSP2_RAM_RDY) && ++count < 10); 9802159ad93SMark Brown 9812159ad93SMark Brown if (!(val & ADSP2_RAM_RDY)) { 9822159ad93SMark Brown adsp_err(dsp, "Failed to start DSP RAM\n"); 9832159ad93SMark Brown return -EBUSY; 9842159ad93SMark Brown } 9852159ad93SMark Brown 9862159ad93SMark Brown adsp_dbg(dsp, "RAM ready after %d polls\n", count); 9872159ad93SMark Brown adsp_info(dsp, "RAM ready after %d polls\n", count); 9882159ad93SMark Brown 9892159ad93SMark Brown return 0; 9902159ad93SMark Brown } 9912159ad93SMark Brown 9922159ad93SMark Brown int wm_adsp2_event(struct snd_soc_dapm_widget *w, 9932159ad93SMark Brown struct snd_kcontrol *kcontrol, int event) 9942159ad93SMark Brown { 9952159ad93SMark Brown struct snd_soc_codec *codec = w->codec; 9962159ad93SMark Brown struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec); 9972159ad93SMark Brown struct wm_adsp *dsp = &dsps[w->shift]; 998471f4885SMark Brown struct wm_adsp_alg_region *alg_region; 999973838a0SMark Brown unsigned int val; 10002159ad93SMark Brown int ret; 10012159ad93SMark Brown 10022159ad93SMark Brown switch (event) { 10032159ad93SMark Brown case SND_SOC_DAPM_POST_PMU: 1004dd49e2c8SMark Brown /* 1005dd49e2c8SMark Brown * For simplicity set the DSP clock rate to be the 1006dd49e2c8SMark Brown * SYSCLK rate rather than making it configurable. 1007dd49e2c8SMark Brown */ 1008dd49e2c8SMark Brown ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val); 1009dd49e2c8SMark Brown if (ret != 0) { 1010dd49e2c8SMark Brown adsp_err(dsp, "Failed to read SYSCLK state: %d\n", 1011dd49e2c8SMark Brown ret); 1012dd49e2c8SMark Brown return ret; 1013dd49e2c8SMark Brown } 1014dd49e2c8SMark Brown val = (val & ARIZONA_SYSCLK_FREQ_MASK) 1015dd49e2c8SMark Brown >> ARIZONA_SYSCLK_FREQ_SHIFT; 1016dd49e2c8SMark Brown 1017dd49e2c8SMark Brown ret = regmap_update_bits(dsp->regmap, 1018dd49e2c8SMark Brown dsp->base + ADSP2_CLOCKING, 1019dd49e2c8SMark Brown ADSP2_CLK_SEL_MASK, val); 1020dd49e2c8SMark Brown if (ret != 0) { 1021dd49e2c8SMark Brown adsp_err(dsp, "Failed to set clock rate: %d\n", 1022dd49e2c8SMark Brown ret); 1023dd49e2c8SMark Brown return ret; 1024dd49e2c8SMark Brown } 1025dd49e2c8SMark Brown 1026973838a0SMark Brown if (dsp->dvfs) { 1027973838a0SMark Brown ret = regmap_read(dsp->regmap, 1028973838a0SMark Brown dsp->base + ADSP2_CLOCKING, &val); 1029973838a0SMark Brown if (ret != 0) { 1030973838a0SMark Brown dev_err(dsp->dev, 1031973838a0SMark Brown "Failed to read clocking: %d\n", ret); 1032973838a0SMark Brown return ret; 1033973838a0SMark Brown } 1034973838a0SMark Brown 103525c6fdb0SMark Brown if ((val & ADSP2_CLK_SEL_MASK) >= 3) { 1036973838a0SMark Brown ret = regulator_enable(dsp->dvfs); 1037973838a0SMark Brown if (ret != 0) { 1038973838a0SMark Brown dev_err(dsp->dev, 1039973838a0SMark Brown "Failed to enable supply: %d\n", 1040973838a0SMark Brown ret); 1041973838a0SMark Brown return ret; 1042973838a0SMark Brown } 1043973838a0SMark Brown 1044973838a0SMark Brown ret = regulator_set_voltage(dsp->dvfs, 1045973838a0SMark Brown 1800000, 1046973838a0SMark Brown 1800000); 1047973838a0SMark Brown if (ret != 0) { 1048973838a0SMark Brown dev_err(dsp->dev, 1049973838a0SMark Brown "Failed to raise supply: %d\n", 1050973838a0SMark Brown ret); 1051973838a0SMark Brown return ret; 1052973838a0SMark Brown } 1053973838a0SMark Brown } 1054973838a0SMark Brown } 1055973838a0SMark Brown 10562159ad93SMark Brown ret = wm_adsp2_ena(dsp); 10572159ad93SMark Brown if (ret != 0) 10582159ad93SMark Brown return ret; 10592159ad93SMark Brown 10602159ad93SMark Brown ret = wm_adsp_load(dsp); 10612159ad93SMark Brown if (ret != 0) 10622159ad93SMark Brown goto err; 10632159ad93SMark Brown 1064db40517cSMark Brown ret = wm_adsp_setup_algs(dsp); 1065db40517cSMark Brown if (ret != 0) 1066db40517cSMark Brown goto err; 1067db40517cSMark Brown 10682159ad93SMark Brown ret = wm_adsp_load_coeff(dsp); 10692159ad93SMark Brown if (ret != 0) 10702159ad93SMark Brown goto err; 10712159ad93SMark Brown 10722159ad93SMark Brown ret = regmap_update_bits(dsp->regmap, 10732159ad93SMark Brown dsp->base + ADSP2_CONTROL, 1074a7f9be7eSMark Brown ADSP2_CORE_ENA | ADSP2_START, 1075a7f9be7eSMark Brown ADSP2_CORE_ENA | ADSP2_START); 10762159ad93SMark Brown if (ret != 0) 10772159ad93SMark Brown goto err; 10781023dbd9SMark Brown 10791023dbd9SMark Brown dsp->running = true; 10802159ad93SMark Brown break; 10812159ad93SMark Brown 10822159ad93SMark Brown case SND_SOC_DAPM_PRE_PMD: 10831023dbd9SMark Brown dsp->running = false; 10841023dbd9SMark Brown 10852159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, 1086a7f9be7eSMark Brown ADSP2_SYS_ENA | ADSP2_CORE_ENA | 1087a7f9be7eSMark Brown ADSP2_START, 0); 1088973838a0SMark Brown 10892d30b575SMark Brown /* Make sure DMAs are quiesced */ 10902d30b575SMark Brown regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0); 10912d30b575SMark Brown regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0); 10922d30b575SMark Brown regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0); 10932d30b575SMark Brown 1094973838a0SMark Brown if (dsp->dvfs) { 1095973838a0SMark Brown ret = regulator_set_voltage(dsp->dvfs, 1200000, 1096973838a0SMark Brown 1800000); 1097973838a0SMark Brown if (ret != 0) 1098973838a0SMark Brown dev_warn(dsp->dev, 1099973838a0SMark Brown "Failed to lower supply: %d\n", 1100973838a0SMark Brown ret); 1101973838a0SMark Brown 1102973838a0SMark Brown ret = regulator_disable(dsp->dvfs); 1103973838a0SMark Brown if (ret != 0) 1104973838a0SMark Brown dev_err(dsp->dev, 1105973838a0SMark Brown "Failed to enable supply: %d\n", 1106973838a0SMark Brown ret); 1107973838a0SMark Brown } 1108471f4885SMark Brown 1109471f4885SMark Brown while (!list_empty(&dsp->alg_regions)) { 1110471f4885SMark Brown alg_region = list_first_entry(&dsp->alg_regions, 1111471f4885SMark Brown struct wm_adsp_alg_region, 1112471f4885SMark Brown list); 1113471f4885SMark Brown list_del(&alg_region->list); 1114471f4885SMark Brown kfree(alg_region); 1115471f4885SMark Brown } 11162159ad93SMark Brown break; 11172159ad93SMark Brown 11182159ad93SMark Brown default: 11192159ad93SMark Brown break; 11202159ad93SMark Brown } 11212159ad93SMark Brown 11222159ad93SMark Brown return 0; 11232159ad93SMark Brown err: 11242159ad93SMark Brown regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL, 1125a7f9be7eSMark Brown ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0); 11262159ad93SMark Brown return ret; 11272159ad93SMark Brown } 11282159ad93SMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_event); 1129973838a0SMark Brown 1130973838a0SMark Brown int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs) 1131973838a0SMark Brown { 1132973838a0SMark Brown int ret; 1133973838a0SMark Brown 113410a2b662SMark Brown /* 113510a2b662SMark Brown * Disable the DSP memory by default when in reset for a small 113610a2b662SMark Brown * power saving. 113710a2b662SMark Brown */ 113810a2b662SMark Brown ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL, 113910a2b662SMark Brown ADSP2_MEM_ENA, 0); 114010a2b662SMark Brown if (ret != 0) { 114110a2b662SMark Brown adsp_err(adsp, "Failed to clear memory retention: %d\n", ret); 114210a2b662SMark Brown return ret; 114310a2b662SMark Brown } 114410a2b662SMark Brown 1145471f4885SMark Brown INIT_LIST_HEAD(&adsp->alg_regions); 1146471f4885SMark Brown 1147973838a0SMark Brown if (dvfs) { 1148973838a0SMark Brown adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD"); 1149973838a0SMark Brown if (IS_ERR(adsp->dvfs)) { 1150973838a0SMark Brown ret = PTR_ERR(adsp->dvfs); 1151973838a0SMark Brown dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret); 1152973838a0SMark Brown return ret; 1153973838a0SMark Brown } 1154973838a0SMark Brown 1155973838a0SMark Brown ret = regulator_enable(adsp->dvfs); 1156973838a0SMark Brown if (ret != 0) { 1157973838a0SMark Brown dev_err(adsp->dev, "Failed to enable DCVDD: %d\n", 1158973838a0SMark Brown ret); 1159973838a0SMark Brown return ret; 1160973838a0SMark Brown } 1161973838a0SMark Brown 1162973838a0SMark Brown ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000); 1163973838a0SMark Brown if (ret != 0) { 1164973838a0SMark Brown dev_err(adsp->dev, "Failed to initialise DVFS: %d\n", 1165973838a0SMark Brown ret); 1166973838a0SMark Brown return ret; 1167973838a0SMark Brown } 1168973838a0SMark Brown 1169973838a0SMark Brown ret = regulator_disable(adsp->dvfs); 1170973838a0SMark Brown if (ret != 0) { 1171973838a0SMark Brown dev_err(adsp->dev, "Failed to disable DCVDD: %d\n", 1172973838a0SMark Brown ret); 1173973838a0SMark Brown return ret; 1174973838a0SMark Brown } 1175973838a0SMark Brown } 1176973838a0SMark Brown 1177973838a0SMark Brown return 0; 1178973838a0SMark Brown } 1179973838a0SMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_init); 1180