xref: /openbmc/linux/sound/soc/codecs/wm_adsp.c (revision b6ed61cf)
12159ad93SMark Brown /*
22159ad93SMark Brown  * wm_adsp.c  --  Wolfson ADSP support
32159ad93SMark Brown  *
42159ad93SMark Brown  * Copyright 2012 Wolfson Microelectronics plc
52159ad93SMark Brown  *
62159ad93SMark Brown  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
72159ad93SMark Brown  *
82159ad93SMark Brown  * This program is free software; you can redistribute it and/or modify
92159ad93SMark Brown  * it under the terms of the GNU General Public License version 2 as
102159ad93SMark Brown  * published by the Free Software Foundation.
112159ad93SMark Brown  */
122159ad93SMark Brown 
132159ad93SMark Brown #include <linux/module.h>
142159ad93SMark Brown #include <linux/moduleparam.h>
152159ad93SMark Brown #include <linux/init.h>
162159ad93SMark Brown #include <linux/delay.h>
172159ad93SMark Brown #include <linux/firmware.h>
18cf17c83cSMark Brown #include <linux/list.h>
192159ad93SMark Brown #include <linux/pm.h>
202159ad93SMark Brown #include <linux/pm_runtime.h>
212159ad93SMark Brown #include <linux/regmap.h>
22973838a0SMark Brown #include <linux/regulator/consumer.h>
232159ad93SMark Brown #include <linux/slab.h>
242159ad93SMark Brown #include <sound/core.h>
252159ad93SMark Brown #include <sound/pcm.h>
262159ad93SMark Brown #include <sound/pcm_params.h>
272159ad93SMark Brown #include <sound/soc.h>
282159ad93SMark Brown #include <sound/jack.h>
292159ad93SMark Brown #include <sound/initval.h>
302159ad93SMark Brown #include <sound/tlv.h>
312159ad93SMark Brown 
322159ad93SMark Brown #include <linux/mfd/arizona/registers.h>
332159ad93SMark Brown 
34dc91428aSMark Brown #include "arizona.h"
352159ad93SMark Brown #include "wm_adsp.h"
362159ad93SMark Brown 
372159ad93SMark Brown #define adsp_crit(_dsp, fmt, ...) \
382159ad93SMark Brown 	dev_crit(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
392159ad93SMark Brown #define adsp_err(_dsp, fmt, ...) \
402159ad93SMark Brown 	dev_err(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
412159ad93SMark Brown #define adsp_warn(_dsp, fmt, ...) \
422159ad93SMark Brown 	dev_warn(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
432159ad93SMark Brown #define adsp_info(_dsp, fmt, ...) \
442159ad93SMark Brown 	dev_info(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
452159ad93SMark Brown #define adsp_dbg(_dsp, fmt, ...) \
462159ad93SMark Brown 	dev_dbg(_dsp->dev, "DSP%d: " fmt, _dsp->num, ##__VA_ARGS__)
472159ad93SMark Brown 
482159ad93SMark Brown #define ADSP1_CONTROL_1                   0x00
492159ad93SMark Brown #define ADSP1_CONTROL_2                   0x02
502159ad93SMark Brown #define ADSP1_CONTROL_3                   0x03
512159ad93SMark Brown #define ADSP1_CONTROL_4                   0x04
522159ad93SMark Brown #define ADSP1_CONTROL_5                   0x06
532159ad93SMark Brown #define ADSP1_CONTROL_6                   0x07
542159ad93SMark Brown #define ADSP1_CONTROL_7                   0x08
552159ad93SMark Brown #define ADSP1_CONTROL_8                   0x09
562159ad93SMark Brown #define ADSP1_CONTROL_9                   0x0A
572159ad93SMark Brown #define ADSP1_CONTROL_10                  0x0B
582159ad93SMark Brown #define ADSP1_CONTROL_11                  0x0C
592159ad93SMark Brown #define ADSP1_CONTROL_12                  0x0D
602159ad93SMark Brown #define ADSP1_CONTROL_13                  0x0F
612159ad93SMark Brown #define ADSP1_CONTROL_14                  0x10
622159ad93SMark Brown #define ADSP1_CONTROL_15                  0x11
632159ad93SMark Brown #define ADSP1_CONTROL_16                  0x12
642159ad93SMark Brown #define ADSP1_CONTROL_17                  0x13
652159ad93SMark Brown #define ADSP1_CONTROL_18                  0x14
662159ad93SMark Brown #define ADSP1_CONTROL_19                  0x16
672159ad93SMark Brown #define ADSP1_CONTROL_20                  0x17
682159ad93SMark Brown #define ADSP1_CONTROL_21                  0x18
692159ad93SMark Brown #define ADSP1_CONTROL_22                  0x1A
702159ad93SMark Brown #define ADSP1_CONTROL_23                  0x1B
712159ad93SMark Brown #define ADSP1_CONTROL_24                  0x1C
722159ad93SMark Brown #define ADSP1_CONTROL_25                  0x1E
732159ad93SMark Brown #define ADSP1_CONTROL_26                  0x20
742159ad93SMark Brown #define ADSP1_CONTROL_27                  0x21
752159ad93SMark Brown #define ADSP1_CONTROL_28                  0x22
762159ad93SMark Brown #define ADSP1_CONTROL_29                  0x23
772159ad93SMark Brown #define ADSP1_CONTROL_30                  0x24
782159ad93SMark Brown #define ADSP1_CONTROL_31                  0x26
792159ad93SMark Brown 
802159ad93SMark Brown /*
812159ad93SMark Brown  * ADSP1 Control 19
822159ad93SMark Brown  */
832159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_MASK     0x00FF  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
842159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_SHIFT         0  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
852159ad93SMark Brown #define ADSP1_WDMA_BUFFER_LENGTH_WIDTH         8  /* DSP1_WDMA_BUFFER_LENGTH - [7:0] */
862159ad93SMark Brown 
872159ad93SMark Brown 
882159ad93SMark Brown /*
892159ad93SMark Brown  * ADSP1 Control 30
902159ad93SMark Brown  */
912159ad93SMark Brown #define ADSP1_DBG_CLK_ENA                 0x0008  /* DSP1_DBG_CLK_ENA */
922159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_MASK            0x0008  /* DSP1_DBG_CLK_ENA */
932159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_SHIFT                3  /* DSP1_DBG_CLK_ENA */
942159ad93SMark Brown #define ADSP1_DBG_CLK_ENA_WIDTH                1  /* DSP1_DBG_CLK_ENA */
952159ad93SMark Brown #define ADSP1_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
962159ad93SMark Brown #define ADSP1_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
972159ad93SMark Brown #define ADSP1_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
982159ad93SMark Brown #define ADSP1_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
992159ad93SMark Brown #define ADSP1_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
1002159ad93SMark Brown #define ADSP1_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
1012159ad93SMark Brown #define ADSP1_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
1022159ad93SMark Brown #define ADSP1_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
1032159ad93SMark Brown #define ADSP1_START                       0x0001  /* DSP1_START */
1042159ad93SMark Brown #define ADSP1_START_MASK                  0x0001  /* DSP1_START */
1052159ad93SMark Brown #define ADSP1_START_SHIFT                      0  /* DSP1_START */
1062159ad93SMark Brown #define ADSP1_START_WIDTH                      1  /* DSP1_START */
1072159ad93SMark Brown 
10894e205bfSChris Rattray /*
10994e205bfSChris Rattray  * ADSP1 Control 31
11094e205bfSChris Rattray  */
11194e205bfSChris Rattray #define ADSP1_CLK_SEL_MASK                0x0007  /* CLK_SEL_ENA */
11294e205bfSChris Rattray #define ADSP1_CLK_SEL_SHIFT                    0  /* CLK_SEL_ENA */
11394e205bfSChris Rattray #define ADSP1_CLK_SEL_WIDTH                    3  /* CLK_SEL_ENA */
11494e205bfSChris Rattray 
1152d30b575SMark Brown #define ADSP2_CONTROL        0x0
1162d30b575SMark Brown #define ADSP2_CLOCKING       0x1
1172d30b575SMark Brown #define ADSP2_STATUS1        0x4
1182d30b575SMark Brown #define ADSP2_WDMA_CONFIG_1 0x30
1192d30b575SMark Brown #define ADSP2_WDMA_CONFIG_2 0x31
1202d30b575SMark Brown #define ADSP2_RDMA_CONFIG_1 0x34
1212159ad93SMark Brown 
1222159ad93SMark Brown /*
1232159ad93SMark Brown  * ADSP2 Control
1242159ad93SMark Brown  */
1252159ad93SMark Brown 
1262159ad93SMark Brown #define ADSP2_MEM_ENA                     0x0010  /* DSP1_MEM_ENA */
1272159ad93SMark Brown #define ADSP2_MEM_ENA_MASK                0x0010  /* DSP1_MEM_ENA */
1282159ad93SMark Brown #define ADSP2_MEM_ENA_SHIFT                    4  /* DSP1_MEM_ENA */
1292159ad93SMark Brown #define ADSP2_MEM_ENA_WIDTH                    1  /* DSP1_MEM_ENA */
1302159ad93SMark Brown #define ADSP2_SYS_ENA                     0x0004  /* DSP1_SYS_ENA */
1312159ad93SMark Brown #define ADSP2_SYS_ENA_MASK                0x0004  /* DSP1_SYS_ENA */
1322159ad93SMark Brown #define ADSP2_SYS_ENA_SHIFT                    2  /* DSP1_SYS_ENA */
1332159ad93SMark Brown #define ADSP2_SYS_ENA_WIDTH                    1  /* DSP1_SYS_ENA */
1342159ad93SMark Brown #define ADSP2_CORE_ENA                    0x0002  /* DSP1_CORE_ENA */
1352159ad93SMark Brown #define ADSP2_CORE_ENA_MASK               0x0002  /* DSP1_CORE_ENA */
1362159ad93SMark Brown #define ADSP2_CORE_ENA_SHIFT                   1  /* DSP1_CORE_ENA */
1372159ad93SMark Brown #define ADSP2_CORE_ENA_WIDTH                   1  /* DSP1_CORE_ENA */
1382159ad93SMark Brown #define ADSP2_START                       0x0001  /* DSP1_START */
1392159ad93SMark Brown #define ADSP2_START_MASK                  0x0001  /* DSP1_START */
1402159ad93SMark Brown #define ADSP2_START_SHIFT                      0  /* DSP1_START */
1412159ad93SMark Brown #define ADSP2_START_WIDTH                      1  /* DSP1_START */
1422159ad93SMark Brown 
1432159ad93SMark Brown /*
144973838a0SMark Brown  * ADSP2 clocking
145973838a0SMark Brown  */
146973838a0SMark Brown #define ADSP2_CLK_SEL_MASK                0x0007  /* CLK_SEL_ENA */
147973838a0SMark Brown #define ADSP2_CLK_SEL_SHIFT                    0  /* CLK_SEL_ENA */
148973838a0SMark Brown #define ADSP2_CLK_SEL_WIDTH                    3  /* CLK_SEL_ENA */
149973838a0SMark Brown 
150973838a0SMark Brown /*
1512159ad93SMark Brown  * ADSP2 Status 1
1522159ad93SMark Brown  */
1532159ad93SMark Brown #define ADSP2_RAM_RDY                     0x0001
1542159ad93SMark Brown #define ADSP2_RAM_RDY_MASK                0x0001
1552159ad93SMark Brown #define ADSP2_RAM_RDY_SHIFT                    0
1562159ad93SMark Brown #define ADSP2_RAM_RDY_WIDTH                    1
1572159ad93SMark Brown 
158cf17c83cSMark Brown struct wm_adsp_buf {
159cf17c83cSMark Brown 	struct list_head list;
160cf17c83cSMark Brown 	void *buf;
161cf17c83cSMark Brown };
162cf17c83cSMark Brown 
163cf17c83cSMark Brown static struct wm_adsp_buf *wm_adsp_buf_alloc(const void *src, size_t len,
164cf17c83cSMark Brown 					     struct list_head *list)
165cf17c83cSMark Brown {
166cf17c83cSMark Brown 	struct wm_adsp_buf *buf = kzalloc(sizeof(*buf), GFP_KERNEL);
167cf17c83cSMark Brown 
168cf17c83cSMark Brown 	if (buf == NULL)
169cf17c83cSMark Brown 		return NULL;
170cf17c83cSMark Brown 
171cf17c83cSMark Brown 	buf->buf = kmemdup(src, len, GFP_KERNEL | GFP_DMA);
172cf17c83cSMark Brown 	if (!buf->buf) {
173cf17c83cSMark Brown 		kfree(buf);
174cf17c83cSMark Brown 		return NULL;
175cf17c83cSMark Brown 	}
176cf17c83cSMark Brown 
177cf17c83cSMark Brown 	if (list)
178cf17c83cSMark Brown 		list_add_tail(&buf->list, list);
179cf17c83cSMark Brown 
180cf17c83cSMark Brown 	return buf;
181cf17c83cSMark Brown }
182cf17c83cSMark Brown 
183cf17c83cSMark Brown static void wm_adsp_buf_free(struct list_head *list)
184cf17c83cSMark Brown {
185cf17c83cSMark Brown 	while (!list_empty(list)) {
186cf17c83cSMark Brown 		struct wm_adsp_buf *buf = list_first_entry(list,
187cf17c83cSMark Brown 							   struct wm_adsp_buf,
188cf17c83cSMark Brown 							   list);
189cf17c83cSMark Brown 		list_del(&buf->list);
190cf17c83cSMark Brown 		kfree(buf->buf);
191cf17c83cSMark Brown 		kfree(buf);
192cf17c83cSMark Brown 	}
193cf17c83cSMark Brown }
194cf17c83cSMark Brown 
19536e8fe99SMark Brown #define WM_ADSP_NUM_FW 4
1961023dbd9SMark Brown 
1971023dbd9SMark Brown static const char *wm_adsp_fw_text[WM_ADSP_NUM_FW] = {
19836e8fe99SMark Brown 	"MBC/VSS", "Tx", "Tx Speaker", "Rx ANC"
1991023dbd9SMark Brown };
2001023dbd9SMark Brown 
2011023dbd9SMark Brown static struct {
2021023dbd9SMark Brown 	const char *file;
2031023dbd9SMark Brown } wm_adsp_fw[WM_ADSP_NUM_FW] = {
2041023dbd9SMark Brown 	{ .file = "mbc-vss" },
2051023dbd9SMark Brown 	{ .file = "tx" },
20636e8fe99SMark Brown 	{ .file = "tx-spk" },
2071023dbd9SMark Brown 	{ .file = "rx-anc" },
2081023dbd9SMark Brown };
2091023dbd9SMark Brown 
2101023dbd9SMark Brown static int wm_adsp_fw_get(struct snd_kcontrol *kcontrol,
2111023dbd9SMark Brown 			  struct snd_ctl_elem_value *ucontrol)
2121023dbd9SMark Brown {
2131023dbd9SMark Brown 	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2141023dbd9SMark Brown 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
2151023dbd9SMark Brown 	struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
2161023dbd9SMark Brown 
2171023dbd9SMark Brown 	ucontrol->value.integer.value[0] = adsp[e->shift_l].fw;
2181023dbd9SMark Brown 
2191023dbd9SMark Brown 	return 0;
2201023dbd9SMark Brown }
2211023dbd9SMark Brown 
2221023dbd9SMark Brown static int wm_adsp_fw_put(struct snd_kcontrol *kcontrol,
2231023dbd9SMark Brown 			  struct snd_ctl_elem_value *ucontrol)
2241023dbd9SMark Brown {
2251023dbd9SMark Brown 	struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
2261023dbd9SMark Brown 	struct soc_enum *e = (struct soc_enum *)kcontrol->private_value;
2271023dbd9SMark Brown 	struct wm_adsp *adsp = snd_soc_codec_get_drvdata(codec);
2281023dbd9SMark Brown 
2291023dbd9SMark Brown 	if (ucontrol->value.integer.value[0] == adsp[e->shift_l].fw)
2301023dbd9SMark Brown 		return 0;
2311023dbd9SMark Brown 
2321023dbd9SMark Brown 	if (ucontrol->value.integer.value[0] >= WM_ADSP_NUM_FW)
2331023dbd9SMark Brown 		return -EINVAL;
2341023dbd9SMark Brown 
2351023dbd9SMark Brown 	if (adsp[e->shift_l].running)
2361023dbd9SMark Brown 		return -EBUSY;
2371023dbd9SMark Brown 
23831522764SMark Brown 	adsp[e->shift_l].fw = ucontrol->value.integer.value[0];
2391023dbd9SMark Brown 
2401023dbd9SMark Brown 	return 0;
2411023dbd9SMark Brown }
2421023dbd9SMark Brown 
2431023dbd9SMark Brown static const struct soc_enum wm_adsp_fw_enum[] = {
2441023dbd9SMark Brown 	SOC_ENUM_SINGLE(0, 0, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
2451023dbd9SMark Brown 	SOC_ENUM_SINGLE(0, 1, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
2461023dbd9SMark Brown 	SOC_ENUM_SINGLE(0, 2, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
2471023dbd9SMark Brown 	SOC_ENUM_SINGLE(0, 3, ARRAY_SIZE(wm_adsp_fw_text), wm_adsp_fw_text),
2481023dbd9SMark Brown };
2491023dbd9SMark Brown 
250b6ed61cfSMark Brown const struct snd_kcontrol_new wm_adsp1_fw_controls[] = {
251b6ed61cfSMark Brown 	SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
252b6ed61cfSMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
253b6ed61cfSMark Brown 	SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
254b6ed61cfSMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
255b6ed61cfSMark Brown 	SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
256b6ed61cfSMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
257b6ed61cfSMark Brown };
258b6ed61cfSMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_fw_controls);
259b6ed61cfSMark Brown 
260b6ed61cfSMark Brown #if IS_ENABLED(CONFIG_SND_SOC_ARIZONA)
261b6ed61cfSMark Brown static const struct soc_enum wm_adsp2_rate_enum[] = {
262dc91428aSMark Brown 	SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1,
263dc91428aSMark Brown 			      ARIZONA_DSP1_RATE_SHIFT, 0xf,
264dc91428aSMark Brown 			      ARIZONA_RATE_ENUM_SIZE,
265dc91428aSMark Brown 			      arizona_rate_text, arizona_rate_val),
266dc91428aSMark Brown 	SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1,
267dc91428aSMark Brown 			      ARIZONA_DSP1_RATE_SHIFT, 0xf,
268dc91428aSMark Brown 			      ARIZONA_RATE_ENUM_SIZE,
269dc91428aSMark Brown 			      arizona_rate_text, arizona_rate_val),
270dc91428aSMark Brown 	SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
271dc91428aSMark Brown 			      ARIZONA_DSP1_RATE_SHIFT, 0xf,
272dc91428aSMark Brown 			      ARIZONA_RATE_ENUM_SIZE,
273dc91428aSMark Brown 			      arizona_rate_text, arizona_rate_val),
274dc91428aSMark Brown 	SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
275dc91428aSMark Brown 			      ARIZONA_DSP1_RATE_SHIFT, 0xf,
276dc91428aSMark Brown 			      ARIZONA_RATE_ENUM_SIZE,
277dc91428aSMark Brown 			      arizona_rate_text, arizona_rate_val),
278dc91428aSMark Brown };
279dc91428aSMark Brown 
280b6ed61cfSMark Brown const struct snd_kcontrol_new wm_adsp2_fw_controls[] = {
2811023dbd9SMark Brown 	SOC_ENUM_EXT("DSP1 Firmware", wm_adsp_fw_enum[0],
2821023dbd9SMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
283b6ed61cfSMark Brown 	SOC_ENUM("DSP1 Rate", wm_adsp2_rate_enum[0]),
2841023dbd9SMark Brown 	SOC_ENUM_EXT("DSP2 Firmware", wm_adsp_fw_enum[1],
2851023dbd9SMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
286b6ed61cfSMark Brown 	SOC_ENUM("DSP2 Rate", wm_adsp2_rate_enum[1]),
2871023dbd9SMark Brown 	SOC_ENUM_EXT("DSP3 Firmware", wm_adsp_fw_enum[2],
2881023dbd9SMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
289b6ed61cfSMark Brown 	SOC_ENUM("DSP3 Rate", wm_adsp2_rate_enum[2]),
2901023dbd9SMark Brown 	SOC_ENUM_EXT("DSP4 Firmware", wm_adsp_fw_enum[3],
2911023dbd9SMark Brown 		     wm_adsp_fw_get, wm_adsp_fw_put),
292b6ed61cfSMark Brown 	SOC_ENUM("DSP4 Rate", wm_adsp2_rate_enum[3]),
2931023dbd9SMark Brown };
294b6ed61cfSMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_fw_controls);
295b6ed61cfSMark Brown #endif
2962159ad93SMark Brown 
2972159ad93SMark Brown static struct wm_adsp_region const *wm_adsp_find_region(struct wm_adsp *dsp,
2982159ad93SMark Brown 							int type)
2992159ad93SMark Brown {
3002159ad93SMark Brown 	int i;
3012159ad93SMark Brown 
3022159ad93SMark Brown 	for (i = 0; i < dsp->num_mems; i++)
3032159ad93SMark Brown 		if (dsp->mem[i].type == type)
3042159ad93SMark Brown 			return &dsp->mem[i];
3052159ad93SMark Brown 
3062159ad93SMark Brown 	return NULL;
3072159ad93SMark Brown }
3082159ad93SMark Brown 
30945b9ee72SMark Brown static unsigned int wm_adsp_region_to_reg(struct wm_adsp_region const *region,
31045b9ee72SMark Brown 					  unsigned int offset)
31145b9ee72SMark Brown {
31245b9ee72SMark Brown 	switch (region->type) {
31345b9ee72SMark Brown 	case WMFW_ADSP1_PM:
31445b9ee72SMark Brown 		return region->base + (offset * 3);
31545b9ee72SMark Brown 	case WMFW_ADSP1_DM:
31645b9ee72SMark Brown 		return region->base + (offset * 2);
31745b9ee72SMark Brown 	case WMFW_ADSP2_XM:
31845b9ee72SMark Brown 		return region->base + (offset * 2);
31945b9ee72SMark Brown 	case WMFW_ADSP2_YM:
32045b9ee72SMark Brown 		return region->base + (offset * 2);
32145b9ee72SMark Brown 	case WMFW_ADSP1_ZM:
32245b9ee72SMark Brown 		return region->base + (offset * 2);
32345b9ee72SMark Brown 	default:
32445b9ee72SMark Brown 		WARN_ON(NULL != "Unknown memory region type");
32545b9ee72SMark Brown 		return offset;
32645b9ee72SMark Brown 	}
32745b9ee72SMark Brown }
32845b9ee72SMark Brown 
3292159ad93SMark Brown static int wm_adsp_load(struct wm_adsp *dsp)
3302159ad93SMark Brown {
331cf17c83cSMark Brown 	LIST_HEAD(buf_list);
3322159ad93SMark Brown 	const struct firmware *firmware;
3332159ad93SMark Brown 	struct regmap *regmap = dsp->regmap;
3342159ad93SMark Brown 	unsigned int pos = 0;
3352159ad93SMark Brown 	const struct wmfw_header *header;
3362159ad93SMark Brown 	const struct wmfw_adsp1_sizes *adsp1_sizes;
3372159ad93SMark Brown 	const struct wmfw_adsp2_sizes *adsp2_sizes;
3382159ad93SMark Brown 	const struct wmfw_footer *footer;
3392159ad93SMark Brown 	const struct wmfw_region *region;
3402159ad93SMark Brown 	const struct wm_adsp_region *mem;
3412159ad93SMark Brown 	const char *region_name;
3422159ad93SMark Brown 	char *file, *text;
343cf17c83cSMark Brown 	struct wm_adsp_buf *buf;
3442159ad93SMark Brown 	unsigned int reg;
3452159ad93SMark Brown 	int regions = 0;
3462159ad93SMark Brown 	int ret, offset, type, sizes;
3472159ad93SMark Brown 
3482159ad93SMark Brown 	file = kzalloc(PAGE_SIZE, GFP_KERNEL);
3492159ad93SMark Brown 	if (file == NULL)
3502159ad93SMark Brown 		return -ENOMEM;
3512159ad93SMark Brown 
3521023dbd9SMark Brown 	snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.wmfw", dsp->part, dsp->num,
3531023dbd9SMark Brown 		 wm_adsp_fw[dsp->fw].file);
3542159ad93SMark Brown 	file[PAGE_SIZE - 1] = '\0';
3552159ad93SMark Brown 
3562159ad93SMark Brown 	ret = request_firmware(&firmware, file, dsp->dev);
3572159ad93SMark Brown 	if (ret != 0) {
3582159ad93SMark Brown 		adsp_err(dsp, "Failed to request '%s'\n", file);
3592159ad93SMark Brown 		goto out;
3602159ad93SMark Brown 	}
3612159ad93SMark Brown 	ret = -EINVAL;
3622159ad93SMark Brown 
3632159ad93SMark Brown 	pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
3642159ad93SMark Brown 	if (pos >= firmware->size) {
3652159ad93SMark Brown 		adsp_err(dsp, "%s: file too short, %zu bytes\n",
3662159ad93SMark Brown 			 file, firmware->size);
3672159ad93SMark Brown 		goto out_fw;
3682159ad93SMark Brown 	}
3692159ad93SMark Brown 
3702159ad93SMark Brown 	header = (void*)&firmware->data[0];
3712159ad93SMark Brown 
3722159ad93SMark Brown 	if (memcmp(&header->magic[0], "WMFW", 4) != 0) {
3732159ad93SMark Brown 		adsp_err(dsp, "%s: invalid magic\n", file);
3742159ad93SMark Brown 		goto out_fw;
3752159ad93SMark Brown 	}
3762159ad93SMark Brown 
3772159ad93SMark Brown 	if (header->ver != 0) {
3782159ad93SMark Brown 		adsp_err(dsp, "%s: unknown file format %d\n",
3792159ad93SMark Brown 			 file, header->ver);
3802159ad93SMark Brown 		goto out_fw;
3812159ad93SMark Brown 	}
3822159ad93SMark Brown 
3832159ad93SMark Brown 	if (header->core != dsp->type) {
3842159ad93SMark Brown 		adsp_err(dsp, "%s: invalid core %d != %d\n",
3852159ad93SMark Brown 			 file, header->core, dsp->type);
3862159ad93SMark Brown 		goto out_fw;
3872159ad93SMark Brown 	}
3882159ad93SMark Brown 
3892159ad93SMark Brown 	switch (dsp->type) {
3902159ad93SMark Brown 	case WMFW_ADSP1:
3912159ad93SMark Brown 		pos = sizeof(*header) + sizeof(*adsp1_sizes) + sizeof(*footer);
3922159ad93SMark Brown 		adsp1_sizes = (void *)&(header[1]);
3932159ad93SMark Brown 		footer = (void *)&(adsp1_sizes[1]);
3942159ad93SMark Brown 		sizes = sizeof(*adsp1_sizes);
3952159ad93SMark Brown 
3962159ad93SMark Brown 		adsp_dbg(dsp, "%s: %d DM, %d PM, %d ZM\n",
3972159ad93SMark Brown 			 file, le32_to_cpu(adsp1_sizes->dm),
3982159ad93SMark Brown 			 le32_to_cpu(adsp1_sizes->pm),
3992159ad93SMark Brown 			 le32_to_cpu(adsp1_sizes->zm));
4002159ad93SMark Brown 		break;
4012159ad93SMark Brown 
4022159ad93SMark Brown 	case WMFW_ADSP2:
4032159ad93SMark Brown 		pos = sizeof(*header) + sizeof(*adsp2_sizes) + sizeof(*footer);
4042159ad93SMark Brown 		adsp2_sizes = (void *)&(header[1]);
4052159ad93SMark Brown 		footer = (void *)&(adsp2_sizes[1]);
4062159ad93SMark Brown 		sizes = sizeof(*adsp2_sizes);
4072159ad93SMark Brown 
4082159ad93SMark Brown 		adsp_dbg(dsp, "%s: %d XM, %d YM %d PM, %d ZM\n",
4092159ad93SMark Brown 			 file, le32_to_cpu(adsp2_sizes->xm),
4102159ad93SMark Brown 			 le32_to_cpu(adsp2_sizes->ym),
4112159ad93SMark Brown 			 le32_to_cpu(adsp2_sizes->pm),
4122159ad93SMark Brown 			 le32_to_cpu(adsp2_sizes->zm));
4132159ad93SMark Brown 		break;
4142159ad93SMark Brown 
4152159ad93SMark Brown 	default:
4162159ad93SMark Brown 		BUG_ON(NULL == "Unknown DSP type");
4172159ad93SMark Brown 		goto out_fw;
4182159ad93SMark Brown 	}
4192159ad93SMark Brown 
4202159ad93SMark Brown 	if (le32_to_cpu(header->len) != sizeof(*header) +
4212159ad93SMark Brown 	    sizes + sizeof(*footer)) {
4222159ad93SMark Brown 		adsp_err(dsp, "%s: unexpected header length %d\n",
4232159ad93SMark Brown 			 file, le32_to_cpu(header->len));
4242159ad93SMark Brown 		goto out_fw;
4252159ad93SMark Brown 	}
4262159ad93SMark Brown 
4272159ad93SMark Brown 	adsp_dbg(dsp, "%s: timestamp %llu\n", file,
4282159ad93SMark Brown 		 le64_to_cpu(footer->timestamp));
4292159ad93SMark Brown 
4302159ad93SMark Brown 	while (pos < firmware->size &&
4312159ad93SMark Brown 	       pos - firmware->size > sizeof(*region)) {
4322159ad93SMark Brown 		region = (void *)&(firmware->data[pos]);
4332159ad93SMark Brown 		region_name = "Unknown";
4342159ad93SMark Brown 		reg = 0;
4352159ad93SMark Brown 		text = NULL;
4362159ad93SMark Brown 		offset = le32_to_cpu(region->offset) & 0xffffff;
4372159ad93SMark Brown 		type = be32_to_cpu(region->type) & 0xff;
4382159ad93SMark Brown 		mem = wm_adsp_find_region(dsp, type);
4392159ad93SMark Brown 
4402159ad93SMark Brown 		switch (type) {
4412159ad93SMark Brown 		case WMFW_NAME_TEXT:
4422159ad93SMark Brown 			region_name = "Firmware name";
4432159ad93SMark Brown 			text = kzalloc(le32_to_cpu(region->len) + 1,
4442159ad93SMark Brown 				       GFP_KERNEL);
4452159ad93SMark Brown 			break;
4462159ad93SMark Brown 		case WMFW_INFO_TEXT:
4472159ad93SMark Brown 			region_name = "Information";
4482159ad93SMark Brown 			text = kzalloc(le32_to_cpu(region->len) + 1,
4492159ad93SMark Brown 				       GFP_KERNEL);
4502159ad93SMark Brown 			break;
4512159ad93SMark Brown 		case WMFW_ABSOLUTE:
4522159ad93SMark Brown 			region_name = "Absolute";
4532159ad93SMark Brown 			reg = offset;
4542159ad93SMark Brown 			break;
4552159ad93SMark Brown 		case WMFW_ADSP1_PM:
4562159ad93SMark Brown 			BUG_ON(!mem);
4572159ad93SMark Brown 			region_name = "PM";
45845b9ee72SMark Brown 			reg = wm_adsp_region_to_reg(mem, offset);
4592159ad93SMark Brown 			break;
4602159ad93SMark Brown 		case WMFW_ADSP1_DM:
4612159ad93SMark Brown 			BUG_ON(!mem);
4622159ad93SMark Brown 			region_name = "DM";
46345b9ee72SMark Brown 			reg = wm_adsp_region_to_reg(mem, offset);
4642159ad93SMark Brown 			break;
4652159ad93SMark Brown 		case WMFW_ADSP2_XM:
4662159ad93SMark Brown 			BUG_ON(!mem);
4672159ad93SMark Brown 			region_name = "XM";
46845b9ee72SMark Brown 			reg = wm_adsp_region_to_reg(mem, offset);
4692159ad93SMark Brown 			break;
4702159ad93SMark Brown 		case WMFW_ADSP2_YM:
4712159ad93SMark Brown 			BUG_ON(!mem);
4722159ad93SMark Brown 			region_name = "YM";
47345b9ee72SMark Brown 			reg = wm_adsp_region_to_reg(mem, offset);
4742159ad93SMark Brown 			break;
4752159ad93SMark Brown 		case WMFW_ADSP1_ZM:
4762159ad93SMark Brown 			BUG_ON(!mem);
4772159ad93SMark Brown 			region_name = "ZM";
47845b9ee72SMark Brown 			reg = wm_adsp_region_to_reg(mem, offset);
4792159ad93SMark Brown 			break;
4802159ad93SMark Brown 		default:
4812159ad93SMark Brown 			adsp_warn(dsp,
4822159ad93SMark Brown 				  "%s.%d: Unknown region type %x at %d(%x)\n",
4832159ad93SMark Brown 				  file, regions, type, pos, pos);
4842159ad93SMark Brown 			break;
4852159ad93SMark Brown 		}
4862159ad93SMark Brown 
4872159ad93SMark Brown 		adsp_dbg(dsp, "%s.%d: %d bytes at %d in %s\n", file,
4882159ad93SMark Brown 			 regions, le32_to_cpu(region->len), offset,
4892159ad93SMark Brown 			 region_name);
4902159ad93SMark Brown 
4912159ad93SMark Brown 		if (text) {
4922159ad93SMark Brown 			memcpy(text, region->data, le32_to_cpu(region->len));
4932159ad93SMark Brown 			adsp_info(dsp, "%s: %s\n", file, text);
4942159ad93SMark Brown 			kfree(text);
4952159ad93SMark Brown 		}
4962159ad93SMark Brown 
4972159ad93SMark Brown 		if (reg) {
498cf17c83cSMark Brown 			buf = wm_adsp_buf_alloc(region->data,
499cf17c83cSMark Brown 						le32_to_cpu(region->len),
500cf17c83cSMark Brown 						&buf_list);
501a76fefabSMark Brown 			if (!buf) {
502a76fefabSMark Brown 				adsp_err(dsp, "Out of memory\n");
503a76fefabSMark Brown 				return -ENOMEM;
504a76fefabSMark Brown 			}
505a76fefabSMark Brown 
506cf17c83cSMark Brown 			ret = regmap_raw_write_async(regmap, reg, buf->buf,
5072159ad93SMark Brown 						     le32_to_cpu(region->len));
5082159ad93SMark Brown 			if (ret != 0) {
5092159ad93SMark Brown 				adsp_err(dsp,
5102159ad93SMark Brown 					"%s.%d: Failed to write %d bytes at %d in %s: %d\n",
5112159ad93SMark Brown 					file, regions,
5122159ad93SMark Brown 					le32_to_cpu(region->len), offset,
5132159ad93SMark Brown 					region_name, ret);
5142159ad93SMark Brown 				goto out_fw;
5152159ad93SMark Brown 			}
5162159ad93SMark Brown 		}
5172159ad93SMark Brown 
5182159ad93SMark Brown 		pos += le32_to_cpu(region->len) + sizeof(*region);
5192159ad93SMark Brown 		regions++;
5202159ad93SMark Brown 	}
5212159ad93SMark Brown 
522cf17c83cSMark Brown 	ret = regmap_async_complete(regmap);
523cf17c83cSMark Brown 	if (ret != 0) {
524cf17c83cSMark Brown 		adsp_err(dsp, "Failed to complete async write: %d\n", ret);
525cf17c83cSMark Brown 		goto out_fw;
526cf17c83cSMark Brown 	}
527cf17c83cSMark Brown 
5282159ad93SMark Brown 	if (pos > firmware->size)
5292159ad93SMark Brown 		adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
5302159ad93SMark Brown 			  file, regions, pos - firmware->size);
5312159ad93SMark Brown 
5322159ad93SMark Brown out_fw:
533cf17c83cSMark Brown 	regmap_async_complete(regmap);
534cf17c83cSMark Brown 	wm_adsp_buf_free(&buf_list);
5352159ad93SMark Brown 	release_firmware(firmware);
5362159ad93SMark Brown out:
5372159ad93SMark Brown 	kfree(file);
5382159ad93SMark Brown 
5392159ad93SMark Brown 	return ret;
5402159ad93SMark Brown }
5412159ad93SMark Brown 
542db40517cSMark Brown static int wm_adsp_setup_algs(struct wm_adsp *dsp)
543db40517cSMark Brown {
544db40517cSMark Brown 	struct regmap *regmap = dsp->regmap;
545db40517cSMark Brown 	struct wmfw_adsp1_id_hdr adsp1_id;
546db40517cSMark Brown 	struct wmfw_adsp2_id_hdr adsp2_id;
547db40517cSMark Brown 	struct wmfw_adsp1_alg_hdr *adsp1_alg;
548db40517cSMark Brown 	struct wmfw_adsp2_alg_hdr *adsp2_alg;
549d62f4bc6SMark Brown 	void *alg, *buf;
550471f4885SMark Brown 	struct wm_adsp_alg_region *region;
551db40517cSMark Brown 	const struct wm_adsp_region *mem;
552db40517cSMark Brown 	unsigned int pos, term;
553d62f4bc6SMark Brown 	size_t algs, buf_size;
554db40517cSMark Brown 	__be32 val;
555db40517cSMark Brown 	int i, ret;
556db40517cSMark Brown 
557db40517cSMark Brown 	switch (dsp->type) {
558db40517cSMark Brown 	case WMFW_ADSP1:
559db40517cSMark Brown 		mem = wm_adsp_find_region(dsp, WMFW_ADSP1_DM);
560db40517cSMark Brown 		break;
561db40517cSMark Brown 	case WMFW_ADSP2:
562db40517cSMark Brown 		mem = wm_adsp_find_region(dsp, WMFW_ADSP2_XM);
563db40517cSMark Brown 		break;
564db40517cSMark Brown 	default:
565db40517cSMark Brown 		mem = NULL;
566db40517cSMark Brown 		break;
567db40517cSMark Brown 	}
568db40517cSMark Brown 
569db40517cSMark Brown 	if (mem == NULL) {
570db40517cSMark Brown 		BUG_ON(mem != NULL);
571db40517cSMark Brown 		return -EINVAL;
572db40517cSMark Brown 	}
573db40517cSMark Brown 
574db40517cSMark Brown 	switch (dsp->type) {
575db40517cSMark Brown 	case WMFW_ADSP1:
576db40517cSMark Brown 		ret = regmap_raw_read(regmap, mem->base, &adsp1_id,
577db40517cSMark Brown 				      sizeof(adsp1_id));
578db40517cSMark Brown 		if (ret != 0) {
579db40517cSMark Brown 			adsp_err(dsp, "Failed to read algorithm info: %d\n",
580db40517cSMark Brown 				 ret);
581db40517cSMark Brown 			return ret;
582db40517cSMark Brown 		}
583db40517cSMark Brown 
584d62f4bc6SMark Brown 		buf = &adsp1_id;
585d62f4bc6SMark Brown 		buf_size = sizeof(adsp1_id);
586d62f4bc6SMark Brown 
587db40517cSMark Brown 		algs = be32_to_cpu(adsp1_id.algs);
588db40517cSMark Brown 		adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
589db40517cSMark Brown 			  be32_to_cpu(adsp1_id.fw.id),
590db40517cSMark Brown 			  (be32_to_cpu(adsp1_id.fw.ver) & 0xff0000) >> 16,
591db40517cSMark Brown 			  (be32_to_cpu(adsp1_id.fw.ver) & 0xff00) >> 8,
592db40517cSMark Brown 			  be32_to_cpu(adsp1_id.fw.ver) & 0xff,
593db40517cSMark Brown 			  algs);
594db40517cSMark Brown 
595db40517cSMark Brown 		pos = sizeof(adsp1_id) / 2;
596db40517cSMark Brown 		term = pos + ((sizeof(*adsp1_alg) * algs) / 2);
597db40517cSMark Brown 		break;
598db40517cSMark Brown 
599db40517cSMark Brown 	case WMFW_ADSP2:
600db40517cSMark Brown 		ret = regmap_raw_read(regmap, mem->base, &adsp2_id,
601db40517cSMark Brown 				      sizeof(adsp2_id));
602db40517cSMark Brown 		if (ret != 0) {
603db40517cSMark Brown 			adsp_err(dsp, "Failed to read algorithm info: %d\n",
604db40517cSMark Brown 				 ret);
605db40517cSMark Brown 			return ret;
606db40517cSMark Brown 		}
607db40517cSMark Brown 
608d62f4bc6SMark Brown 		buf = &adsp2_id;
609d62f4bc6SMark Brown 		buf_size = sizeof(adsp2_id);
610d62f4bc6SMark Brown 
611db40517cSMark Brown 		algs = be32_to_cpu(adsp2_id.algs);
612db40517cSMark Brown 		adsp_info(dsp, "Firmware: %x v%d.%d.%d, %zu algorithms\n",
613db40517cSMark Brown 			  be32_to_cpu(adsp2_id.fw.id),
614db40517cSMark Brown 			  (be32_to_cpu(adsp2_id.fw.ver) & 0xff0000) >> 16,
615db40517cSMark Brown 			  (be32_to_cpu(adsp2_id.fw.ver) & 0xff00) >> 8,
616db40517cSMark Brown 			  be32_to_cpu(adsp2_id.fw.ver) & 0xff,
617db40517cSMark Brown 			  algs);
618db40517cSMark Brown 
619db40517cSMark Brown 		pos = sizeof(adsp2_id) / 2;
620db40517cSMark Brown 		term = pos + ((sizeof(*adsp2_alg) * algs) / 2);
621db40517cSMark Brown 		break;
622db40517cSMark Brown 
623db40517cSMark Brown 	default:
624db40517cSMark Brown 		BUG_ON(NULL == "Unknown DSP type");
625db40517cSMark Brown 		return -EINVAL;
626db40517cSMark Brown 	}
627db40517cSMark Brown 
628db40517cSMark Brown 	if (algs == 0) {
629db40517cSMark Brown 		adsp_err(dsp, "No algorithms\n");
630db40517cSMark Brown 		return -EINVAL;
631db40517cSMark Brown 	}
632db40517cSMark Brown 
633d62f4bc6SMark Brown 	if (algs > 1024) {
634d62f4bc6SMark Brown 		adsp_err(dsp, "Algorithm count %zx excessive\n", algs);
635d62f4bc6SMark Brown 		print_hex_dump_bytes(dev_name(dsp->dev), DUMP_PREFIX_OFFSET,
636d62f4bc6SMark Brown 				     buf, buf_size);
637d62f4bc6SMark Brown 		return -EINVAL;
638d62f4bc6SMark Brown 	}
639d62f4bc6SMark Brown 
640db40517cSMark Brown 	/* Read the terminator first to validate the length */
641db40517cSMark Brown 	ret = regmap_raw_read(regmap, mem->base + term, &val, sizeof(val));
642db40517cSMark Brown 	if (ret != 0) {
643db40517cSMark Brown 		adsp_err(dsp, "Failed to read algorithm list end: %d\n",
644db40517cSMark Brown 			ret);
645db40517cSMark Brown 		return ret;
646db40517cSMark Brown 	}
647db40517cSMark Brown 
648db40517cSMark Brown 	if (be32_to_cpu(val) != 0xbedead)
649db40517cSMark Brown 		adsp_warn(dsp, "Algorithm list end %x 0x%x != 0xbeadead\n",
650db40517cSMark Brown 			  term, be32_to_cpu(val));
651db40517cSMark Brown 
652f2a93e2aSMark Brown 	alg = kzalloc((term - pos) * 2, GFP_KERNEL | GFP_DMA);
653db40517cSMark Brown 	if (!alg)
654db40517cSMark Brown 		return -ENOMEM;
655db40517cSMark Brown 
656db40517cSMark Brown 	ret = regmap_raw_read(regmap, mem->base + pos, alg, (term - pos) * 2);
657db40517cSMark Brown 	if (ret != 0) {
658db40517cSMark Brown 		adsp_err(dsp, "Failed to read algorithm list: %d\n",
659db40517cSMark Brown 			ret);
660db40517cSMark Brown 		goto out;
661db40517cSMark Brown 	}
662db40517cSMark Brown 
663db40517cSMark Brown 	adsp1_alg = alg;
664db40517cSMark Brown 	adsp2_alg = alg;
665db40517cSMark Brown 
666db40517cSMark Brown 	for (i = 0; i < algs; i++) {
667db40517cSMark Brown 		switch (dsp->type) {
668db40517cSMark Brown 		case WMFW_ADSP1:
669471f4885SMark Brown 			adsp_info(dsp, "%d: ID %x v%d.%d.%d DM@%x ZM@%x\n",
670db40517cSMark Brown 				  i, be32_to_cpu(adsp1_alg[i].alg.id),
671db40517cSMark Brown 				  (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff0000) >> 16,
672db40517cSMark Brown 				  (be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff00) >> 8,
673471f4885SMark Brown 				  be32_to_cpu(adsp1_alg[i].alg.ver) & 0xff,
674471f4885SMark Brown 				  be32_to_cpu(adsp1_alg[i].dm),
675471f4885SMark Brown 				  be32_to_cpu(adsp1_alg[i].zm));
676471f4885SMark Brown 
677471f4885SMark Brown 			region = kzalloc(sizeof(*region), GFP_KERNEL);
678471f4885SMark Brown 			if (!region)
679471f4885SMark Brown 				return -ENOMEM;
680471f4885SMark Brown 			region->type = WMFW_ADSP1_DM;
681471f4885SMark Brown 			region->alg = be32_to_cpu(adsp1_alg[i].alg.id);
682471f4885SMark Brown 			region->base = be32_to_cpu(adsp1_alg[i].dm);
6837480800eSMark Brown 			list_add_tail(&region->list, &dsp->alg_regions);
684471f4885SMark Brown 
685471f4885SMark Brown 			region = kzalloc(sizeof(*region), GFP_KERNEL);
686471f4885SMark Brown 			if (!region)
687471f4885SMark Brown 				return -ENOMEM;
688471f4885SMark Brown 			region->type = WMFW_ADSP1_ZM;
689471f4885SMark Brown 			region->alg = be32_to_cpu(adsp1_alg[i].alg.id);
690471f4885SMark Brown 			region->base = be32_to_cpu(adsp1_alg[i].zm);
6917480800eSMark Brown 			list_add_tail(&region->list, &dsp->alg_regions);
692db40517cSMark Brown 			break;
693db40517cSMark Brown 
694db40517cSMark Brown 		case WMFW_ADSP2:
695471f4885SMark Brown 			adsp_info(dsp,
696471f4885SMark Brown 				  "%d: ID %x v%d.%d.%d XM@%x YM@%x ZM@%x\n",
697db40517cSMark Brown 				  i, be32_to_cpu(adsp2_alg[i].alg.id),
698db40517cSMark Brown 				  (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff0000) >> 16,
699db40517cSMark Brown 				  (be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff00) >> 8,
700471f4885SMark Brown 				  be32_to_cpu(adsp2_alg[i].alg.ver) & 0xff,
701471f4885SMark Brown 				  be32_to_cpu(adsp2_alg[i].xm),
702471f4885SMark Brown 				  be32_to_cpu(adsp2_alg[i].ym),
703471f4885SMark Brown 				  be32_to_cpu(adsp2_alg[i].zm));
704471f4885SMark Brown 
705471f4885SMark Brown 			region = kzalloc(sizeof(*region), GFP_KERNEL);
706471f4885SMark Brown 			if (!region)
707471f4885SMark Brown 				return -ENOMEM;
708471f4885SMark Brown 			region->type = WMFW_ADSP2_XM;
709471f4885SMark Brown 			region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
710471f4885SMark Brown 			region->base = be32_to_cpu(adsp2_alg[i].xm);
7117480800eSMark Brown 			list_add_tail(&region->list, &dsp->alg_regions);
712471f4885SMark Brown 
713471f4885SMark Brown 			region = kzalloc(sizeof(*region), GFP_KERNEL);
714471f4885SMark Brown 			if (!region)
715471f4885SMark Brown 				return -ENOMEM;
716471f4885SMark Brown 			region->type = WMFW_ADSP2_YM;
717471f4885SMark Brown 			region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
718471f4885SMark Brown 			region->base = be32_to_cpu(adsp2_alg[i].ym);
7197480800eSMark Brown 			list_add_tail(&region->list, &dsp->alg_regions);
720471f4885SMark Brown 
721471f4885SMark Brown 			region = kzalloc(sizeof(*region), GFP_KERNEL);
722471f4885SMark Brown 			if (!region)
723471f4885SMark Brown 				return -ENOMEM;
724471f4885SMark Brown 			region->type = WMFW_ADSP2_ZM;
725471f4885SMark Brown 			region->alg = be32_to_cpu(adsp2_alg[i].alg.id);
726471f4885SMark Brown 			region->base = be32_to_cpu(adsp2_alg[i].zm);
7277480800eSMark Brown 			list_add_tail(&region->list, &dsp->alg_regions);
728db40517cSMark Brown 			break;
729db40517cSMark Brown 		}
730db40517cSMark Brown 	}
731db40517cSMark Brown 
732db40517cSMark Brown out:
733db40517cSMark Brown 	kfree(alg);
734db40517cSMark Brown 	return ret;
735db40517cSMark Brown }
736db40517cSMark Brown 
7372159ad93SMark Brown static int wm_adsp_load_coeff(struct wm_adsp *dsp)
7382159ad93SMark Brown {
739cf17c83cSMark Brown 	LIST_HEAD(buf_list);
7402159ad93SMark Brown 	struct regmap *regmap = dsp->regmap;
7412159ad93SMark Brown 	struct wmfw_coeff_hdr *hdr;
7422159ad93SMark Brown 	struct wmfw_coeff_item *blk;
7432159ad93SMark Brown 	const struct firmware *firmware;
744471f4885SMark Brown 	const struct wm_adsp_region *mem;
745471f4885SMark Brown 	struct wm_adsp_alg_region *alg_region;
7462159ad93SMark Brown 	const char *region_name;
7472159ad93SMark Brown 	int ret, pos, blocks, type, offset, reg;
7482159ad93SMark Brown 	char *file;
749cf17c83cSMark Brown 	struct wm_adsp_buf *buf;
750bdaacea3SChris Rattray 	int tmp;
7512159ad93SMark Brown 
7522159ad93SMark Brown 	file = kzalloc(PAGE_SIZE, GFP_KERNEL);
7532159ad93SMark Brown 	if (file == NULL)
7542159ad93SMark Brown 		return -ENOMEM;
7552159ad93SMark Brown 
7561023dbd9SMark Brown 	snprintf(file, PAGE_SIZE, "%s-dsp%d-%s.bin", dsp->part, dsp->num,
7571023dbd9SMark Brown 		 wm_adsp_fw[dsp->fw].file);
7582159ad93SMark Brown 	file[PAGE_SIZE - 1] = '\0';
7592159ad93SMark Brown 
7602159ad93SMark Brown 	ret = request_firmware(&firmware, file, dsp->dev);
7612159ad93SMark Brown 	if (ret != 0) {
7622159ad93SMark Brown 		adsp_warn(dsp, "Failed to request '%s'\n", file);
7632159ad93SMark Brown 		ret = 0;
7642159ad93SMark Brown 		goto out;
7652159ad93SMark Brown 	}
7662159ad93SMark Brown 	ret = -EINVAL;
7672159ad93SMark Brown 
7682159ad93SMark Brown 	if (sizeof(*hdr) >= firmware->size) {
7692159ad93SMark Brown 		adsp_err(dsp, "%s: file too short, %zu bytes\n",
7702159ad93SMark Brown 			file, firmware->size);
7712159ad93SMark Brown 		goto out_fw;
7722159ad93SMark Brown 	}
7732159ad93SMark Brown 
7742159ad93SMark Brown 	hdr = (void*)&firmware->data[0];
7752159ad93SMark Brown 	if (memcmp(hdr->magic, "WMDR", 4) != 0) {
7762159ad93SMark Brown 		adsp_err(dsp, "%s: invalid magic\n", file);
777a4cdbec7SCharles Keepax 		goto out_fw;
7782159ad93SMark Brown 	}
7792159ad93SMark Brown 
780c712326dSMark Brown 	switch (be32_to_cpu(hdr->rev) & 0xff) {
781c712326dSMark Brown 	case 1:
782c712326dSMark Brown 		break;
783c712326dSMark Brown 	default:
784c712326dSMark Brown 		adsp_err(dsp, "%s: Unsupported coefficient file format %d\n",
785c712326dSMark Brown 			 file, be32_to_cpu(hdr->rev) & 0xff);
786c712326dSMark Brown 		ret = -EINVAL;
787c712326dSMark Brown 		goto out_fw;
788c712326dSMark Brown 	}
789c712326dSMark Brown 
7902159ad93SMark Brown 	adsp_dbg(dsp, "%s: v%d.%d.%d\n", file,
7912159ad93SMark Brown 		(le32_to_cpu(hdr->ver) >> 16) & 0xff,
7922159ad93SMark Brown 		(le32_to_cpu(hdr->ver) >>  8) & 0xff,
7932159ad93SMark Brown 		le32_to_cpu(hdr->ver) & 0xff);
7942159ad93SMark Brown 
7952159ad93SMark Brown 	pos = le32_to_cpu(hdr->len);
7962159ad93SMark Brown 
7972159ad93SMark Brown 	blocks = 0;
7982159ad93SMark Brown 	while (pos < firmware->size &&
7992159ad93SMark Brown 	       pos - firmware->size > sizeof(*blk)) {
8002159ad93SMark Brown 		blk = (void*)(&firmware->data[pos]);
8012159ad93SMark Brown 
802c712326dSMark Brown 		type = le16_to_cpu(blk->type);
803c712326dSMark Brown 		offset = le16_to_cpu(blk->offset);
8042159ad93SMark Brown 
8052159ad93SMark Brown 		adsp_dbg(dsp, "%s.%d: %x v%d.%d.%d\n",
8062159ad93SMark Brown 			 file, blocks, le32_to_cpu(blk->id),
8072159ad93SMark Brown 			 (le32_to_cpu(blk->ver) >> 16) & 0xff,
8082159ad93SMark Brown 			 (le32_to_cpu(blk->ver) >>  8) & 0xff,
8092159ad93SMark Brown 			 le32_to_cpu(blk->ver) & 0xff);
8102159ad93SMark Brown 		adsp_dbg(dsp, "%s.%d: %d bytes at 0x%x in %x\n",
8112159ad93SMark Brown 			 file, blocks, le32_to_cpu(blk->len), offset, type);
8122159ad93SMark Brown 
8132159ad93SMark Brown 		reg = 0;
8142159ad93SMark Brown 		region_name = "Unknown";
8152159ad93SMark Brown 		switch (type) {
816c712326dSMark Brown 		case (WMFW_NAME_TEXT << 8):
817c712326dSMark Brown 		case (WMFW_INFO_TEXT << 8):
8182159ad93SMark Brown 			break;
819c712326dSMark Brown 		case (WMFW_ABSOLUTE << 8):
8202159ad93SMark Brown 			region_name = "register";
8212159ad93SMark Brown 			reg = offset;
8222159ad93SMark Brown 			break;
823471f4885SMark Brown 
824471f4885SMark Brown 		case WMFW_ADSP1_DM:
825471f4885SMark Brown 		case WMFW_ADSP1_ZM:
826471f4885SMark Brown 		case WMFW_ADSP2_XM:
827471f4885SMark Brown 		case WMFW_ADSP2_YM:
828471f4885SMark Brown 			adsp_dbg(dsp, "%s.%d: %d bytes in %x for %x\n",
829471f4885SMark Brown 				 file, blocks, le32_to_cpu(blk->len),
830471f4885SMark Brown 				 type, le32_to_cpu(blk->id));
831471f4885SMark Brown 
832471f4885SMark Brown 			mem = wm_adsp_find_region(dsp, type);
833471f4885SMark Brown 			if (!mem) {
834471f4885SMark Brown 				adsp_err(dsp, "No base for region %x\n", type);
835471f4885SMark Brown 				break;
836471f4885SMark Brown 			}
837471f4885SMark Brown 
838471f4885SMark Brown 			reg = 0;
839471f4885SMark Brown 			list_for_each_entry(alg_region,
840471f4885SMark Brown 					    &dsp->alg_regions, list) {
841471f4885SMark Brown 				if (le32_to_cpu(blk->id) == alg_region->alg &&
842471f4885SMark Brown 				    type == alg_region->type) {
843338c5188SMark Brown 					reg = alg_region->base;
844471f4885SMark Brown 					reg = wm_adsp_region_to_reg(mem,
845471f4885SMark Brown 								    reg);
846338c5188SMark Brown 					reg += offset;
847471f4885SMark Brown 				}
848471f4885SMark Brown 			}
849471f4885SMark Brown 
850471f4885SMark Brown 			if (reg == 0)
851471f4885SMark Brown 				adsp_err(dsp, "No %x for algorithm %x\n",
852471f4885SMark Brown 					 type, le32_to_cpu(blk->id));
853471f4885SMark Brown 			break;
854471f4885SMark Brown 
8552159ad93SMark Brown 		default:
85625c62f7eSMark Brown 			adsp_err(dsp, "%s.%d: Unknown region type %x at %d\n",
85725c62f7eSMark Brown 				 file, blocks, type, pos);
8582159ad93SMark Brown 			break;
8592159ad93SMark Brown 		}
8602159ad93SMark Brown 
8612159ad93SMark Brown 		if (reg) {
862cf17c83cSMark Brown 			buf = wm_adsp_buf_alloc(blk->data,
863cf17c83cSMark Brown 						le32_to_cpu(blk->len),
864cf17c83cSMark Brown 						&buf_list);
865a76fefabSMark Brown 			if (!buf) {
866a76fefabSMark Brown 				adsp_err(dsp, "Out of memory\n");
867a76fefabSMark Brown 				return -ENOMEM;
868a76fefabSMark Brown 			}
869a76fefabSMark Brown 
87020da6d5aSMark Brown 			adsp_dbg(dsp, "%s.%d: Writing %d bytes at %x\n",
87120da6d5aSMark Brown 				 file, blocks, le32_to_cpu(blk->len),
87220da6d5aSMark Brown 				 reg);
873cf17c83cSMark Brown 			ret = regmap_raw_write_async(regmap, reg, buf->buf,
8742159ad93SMark Brown 						     le32_to_cpu(blk->len));
8752159ad93SMark Brown 			if (ret != 0) {
8762159ad93SMark Brown 				adsp_err(dsp,
8772159ad93SMark Brown 					"%s.%d: Failed to write to %x in %s\n",
8782159ad93SMark Brown 					file, blocks, reg, region_name);
8792159ad93SMark Brown 			}
8802159ad93SMark Brown 		}
8812159ad93SMark Brown 
882bdaacea3SChris Rattray 		tmp = le32_to_cpu(blk->len) % 4;
883bdaacea3SChris Rattray 		if (tmp)
884bdaacea3SChris Rattray 			pos += le32_to_cpu(blk->len) + (4 - tmp) + sizeof(*blk);
885bdaacea3SChris Rattray 		else
8862159ad93SMark Brown 			pos += le32_to_cpu(blk->len) + sizeof(*blk);
887bdaacea3SChris Rattray 
8882159ad93SMark Brown 		blocks++;
8892159ad93SMark Brown 	}
8902159ad93SMark Brown 
891cf17c83cSMark Brown 	ret = regmap_async_complete(regmap);
892cf17c83cSMark Brown 	if (ret != 0)
893cf17c83cSMark Brown 		adsp_err(dsp, "Failed to complete async write: %d\n", ret);
894cf17c83cSMark Brown 
8952159ad93SMark Brown 	if (pos > firmware->size)
8962159ad93SMark Brown 		adsp_warn(dsp, "%s.%d: %zu bytes at end of file\n",
8972159ad93SMark Brown 			  file, blocks, pos - firmware->size);
8982159ad93SMark Brown 
8992159ad93SMark Brown out_fw:
9002159ad93SMark Brown 	release_firmware(firmware);
901cf17c83cSMark Brown 	wm_adsp_buf_free(&buf_list);
9022159ad93SMark Brown out:
9032159ad93SMark Brown 	kfree(file);
9042159ad93SMark Brown 	return 0;
9052159ad93SMark Brown }
9062159ad93SMark Brown 
9075e7a7a22SMark Brown int wm_adsp1_init(struct wm_adsp *adsp)
9085e7a7a22SMark Brown {
9095e7a7a22SMark Brown 	INIT_LIST_HEAD(&adsp->alg_regions);
9105e7a7a22SMark Brown 
9115e7a7a22SMark Brown 	return 0;
9125e7a7a22SMark Brown }
9135e7a7a22SMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_init);
9145e7a7a22SMark Brown 
9152159ad93SMark Brown int wm_adsp1_event(struct snd_soc_dapm_widget *w,
9162159ad93SMark Brown 		   struct snd_kcontrol *kcontrol,
9172159ad93SMark Brown 		   int event)
9182159ad93SMark Brown {
9192159ad93SMark Brown 	struct snd_soc_codec *codec = w->codec;
9202159ad93SMark Brown 	struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
9212159ad93SMark Brown 	struct wm_adsp *dsp = &dsps[w->shift];
9222159ad93SMark Brown 	int ret;
92394e205bfSChris Rattray 	int val;
9242159ad93SMark Brown 
9252159ad93SMark Brown 	switch (event) {
9262159ad93SMark Brown 	case SND_SOC_DAPM_POST_PMU:
9272159ad93SMark Brown 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
9282159ad93SMark Brown 				   ADSP1_SYS_ENA, ADSP1_SYS_ENA);
9292159ad93SMark Brown 
93094e205bfSChris Rattray 		/*
93194e205bfSChris Rattray 		 * For simplicity set the DSP clock rate to be the
93294e205bfSChris Rattray 		 * SYSCLK rate rather than making it configurable.
93394e205bfSChris Rattray 		 */
93494e205bfSChris Rattray 		if(dsp->sysclk_reg) {
93594e205bfSChris Rattray 			ret = regmap_read(dsp->regmap, dsp->sysclk_reg, &val);
93694e205bfSChris Rattray 			if (ret != 0) {
93794e205bfSChris Rattray 				adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
93894e205bfSChris Rattray 				ret);
93994e205bfSChris Rattray 				return ret;
94094e205bfSChris Rattray 			}
94194e205bfSChris Rattray 
94294e205bfSChris Rattray 			val = (val & dsp->sysclk_mask)
94394e205bfSChris Rattray 				>> dsp->sysclk_shift;
94494e205bfSChris Rattray 
94594e205bfSChris Rattray 			ret = regmap_update_bits(dsp->regmap,
94694e205bfSChris Rattray 						 dsp->base + ADSP1_CONTROL_31,
94794e205bfSChris Rattray 						 ADSP1_CLK_SEL_MASK, val);
94894e205bfSChris Rattray 			if (ret != 0) {
94994e205bfSChris Rattray 				adsp_err(dsp, "Failed to set clock rate: %d\n",
95094e205bfSChris Rattray 					 ret);
95194e205bfSChris Rattray 				return ret;
95294e205bfSChris Rattray 			}
95394e205bfSChris Rattray 		}
95494e205bfSChris Rattray 
9552159ad93SMark Brown 		ret = wm_adsp_load(dsp);
9562159ad93SMark Brown 		if (ret != 0)
9572159ad93SMark Brown 			goto err;
9582159ad93SMark Brown 
959db40517cSMark Brown 		ret = wm_adsp_setup_algs(dsp);
960db40517cSMark Brown 		if (ret != 0)
961db40517cSMark Brown 			goto err;
962db40517cSMark Brown 
9632159ad93SMark Brown 		ret = wm_adsp_load_coeff(dsp);
9642159ad93SMark Brown 		if (ret != 0)
9652159ad93SMark Brown 			goto err;
9662159ad93SMark Brown 
9672159ad93SMark Brown 		/* Start the core running */
9682159ad93SMark Brown 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
9692159ad93SMark Brown 				   ADSP1_CORE_ENA | ADSP1_START,
9702159ad93SMark Brown 				   ADSP1_CORE_ENA | ADSP1_START);
9712159ad93SMark Brown 		break;
9722159ad93SMark Brown 
9732159ad93SMark Brown 	case SND_SOC_DAPM_PRE_PMD:
9742159ad93SMark Brown 		/* Halt the core */
9752159ad93SMark Brown 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
9762159ad93SMark Brown 				   ADSP1_CORE_ENA | ADSP1_START, 0);
9772159ad93SMark Brown 
9782159ad93SMark Brown 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_19,
9792159ad93SMark Brown 				   ADSP1_WDMA_BUFFER_LENGTH_MASK, 0);
9802159ad93SMark Brown 
9812159ad93SMark Brown 		regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
9822159ad93SMark Brown 				   ADSP1_SYS_ENA, 0);
9832159ad93SMark Brown 		break;
9842159ad93SMark Brown 
9852159ad93SMark Brown 	default:
9862159ad93SMark Brown 		break;
9872159ad93SMark Brown 	}
9882159ad93SMark Brown 
9892159ad93SMark Brown 	return 0;
9902159ad93SMark Brown 
9912159ad93SMark Brown err:
9922159ad93SMark Brown 	regmap_update_bits(dsp->regmap, dsp->base + ADSP1_CONTROL_30,
9932159ad93SMark Brown 			   ADSP1_SYS_ENA, 0);
9942159ad93SMark Brown 	return ret;
9952159ad93SMark Brown }
9962159ad93SMark Brown EXPORT_SYMBOL_GPL(wm_adsp1_event);
9972159ad93SMark Brown 
9982159ad93SMark Brown static int wm_adsp2_ena(struct wm_adsp *dsp)
9992159ad93SMark Brown {
10002159ad93SMark Brown 	unsigned int val;
10012159ad93SMark Brown 	int ret, count;
10022159ad93SMark Brown 
10032159ad93SMark Brown 	ret = regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
10042159ad93SMark Brown 				 ADSP2_SYS_ENA, ADSP2_SYS_ENA);
10052159ad93SMark Brown 	if (ret != 0)
10062159ad93SMark Brown 		return ret;
10072159ad93SMark Brown 
10082159ad93SMark Brown 	/* Wait for the RAM to start, should be near instantaneous */
10092159ad93SMark Brown 	count = 0;
10102159ad93SMark Brown 	do {
10112159ad93SMark Brown 		ret = regmap_read(dsp->regmap, dsp->base + ADSP2_STATUS1,
10122159ad93SMark Brown 				  &val);
10132159ad93SMark Brown 		if (ret != 0)
10142159ad93SMark Brown 			return ret;
10152159ad93SMark Brown 	} while (!(val & ADSP2_RAM_RDY) && ++count < 10);
10162159ad93SMark Brown 
10172159ad93SMark Brown 	if (!(val & ADSP2_RAM_RDY)) {
10182159ad93SMark Brown 		adsp_err(dsp, "Failed to start DSP RAM\n");
10192159ad93SMark Brown 		return -EBUSY;
10202159ad93SMark Brown 	}
10212159ad93SMark Brown 
10222159ad93SMark Brown 	adsp_dbg(dsp, "RAM ready after %d polls\n", count);
10232159ad93SMark Brown 	adsp_info(dsp, "RAM ready after %d polls\n", count);
10242159ad93SMark Brown 
10252159ad93SMark Brown 	return 0;
10262159ad93SMark Brown }
10272159ad93SMark Brown 
10282159ad93SMark Brown int wm_adsp2_event(struct snd_soc_dapm_widget *w,
10292159ad93SMark Brown 		   struct snd_kcontrol *kcontrol, int event)
10302159ad93SMark Brown {
10312159ad93SMark Brown 	struct snd_soc_codec *codec = w->codec;
10322159ad93SMark Brown 	struct wm_adsp *dsps = snd_soc_codec_get_drvdata(codec);
10332159ad93SMark Brown 	struct wm_adsp *dsp = &dsps[w->shift];
1034471f4885SMark Brown 	struct wm_adsp_alg_region *alg_region;
1035973838a0SMark Brown 	unsigned int val;
10362159ad93SMark Brown 	int ret;
10372159ad93SMark Brown 
10382159ad93SMark Brown 	switch (event) {
10392159ad93SMark Brown 	case SND_SOC_DAPM_POST_PMU:
1040dd49e2c8SMark Brown 		/*
1041dd49e2c8SMark Brown 		 * For simplicity set the DSP clock rate to be the
1042dd49e2c8SMark Brown 		 * SYSCLK rate rather than making it configurable.
1043dd49e2c8SMark Brown 		 */
1044dd49e2c8SMark Brown 		ret = regmap_read(dsp->regmap, ARIZONA_SYSTEM_CLOCK_1, &val);
1045dd49e2c8SMark Brown 		if (ret != 0) {
1046dd49e2c8SMark Brown 			adsp_err(dsp, "Failed to read SYSCLK state: %d\n",
1047dd49e2c8SMark Brown 				 ret);
1048dd49e2c8SMark Brown 			return ret;
1049dd49e2c8SMark Brown 		}
1050dd49e2c8SMark Brown 		val = (val & ARIZONA_SYSCLK_FREQ_MASK)
1051dd49e2c8SMark Brown 			>> ARIZONA_SYSCLK_FREQ_SHIFT;
1052dd49e2c8SMark Brown 
1053dd49e2c8SMark Brown 		ret = regmap_update_bits(dsp->regmap,
1054dd49e2c8SMark Brown 					 dsp->base + ADSP2_CLOCKING,
1055dd49e2c8SMark Brown 					 ADSP2_CLK_SEL_MASK, val);
1056dd49e2c8SMark Brown 		if (ret != 0) {
1057dd49e2c8SMark Brown 			adsp_err(dsp, "Failed to set clock rate: %d\n",
1058dd49e2c8SMark Brown 				 ret);
1059dd49e2c8SMark Brown 			return ret;
1060dd49e2c8SMark Brown 		}
1061dd49e2c8SMark Brown 
1062973838a0SMark Brown 		if (dsp->dvfs) {
1063973838a0SMark Brown 			ret = regmap_read(dsp->regmap,
1064973838a0SMark Brown 					  dsp->base + ADSP2_CLOCKING, &val);
1065973838a0SMark Brown 			if (ret != 0) {
1066973838a0SMark Brown 				dev_err(dsp->dev,
1067973838a0SMark Brown 					"Failed to read clocking: %d\n", ret);
1068973838a0SMark Brown 				return ret;
1069973838a0SMark Brown 			}
1070973838a0SMark Brown 
107125c6fdb0SMark Brown 			if ((val & ADSP2_CLK_SEL_MASK) >= 3) {
1072973838a0SMark Brown 				ret = regulator_enable(dsp->dvfs);
1073973838a0SMark Brown 				if (ret != 0) {
1074973838a0SMark Brown 					dev_err(dsp->dev,
1075973838a0SMark Brown 						"Failed to enable supply: %d\n",
1076973838a0SMark Brown 						ret);
1077973838a0SMark Brown 					return ret;
1078973838a0SMark Brown 				}
1079973838a0SMark Brown 
1080973838a0SMark Brown 				ret = regulator_set_voltage(dsp->dvfs,
1081973838a0SMark Brown 							    1800000,
1082973838a0SMark Brown 							    1800000);
1083973838a0SMark Brown 				if (ret != 0) {
1084973838a0SMark Brown 					dev_err(dsp->dev,
1085973838a0SMark Brown 						"Failed to raise supply: %d\n",
1086973838a0SMark Brown 						ret);
1087973838a0SMark Brown 					return ret;
1088973838a0SMark Brown 				}
1089973838a0SMark Brown 			}
1090973838a0SMark Brown 		}
1091973838a0SMark Brown 
10922159ad93SMark Brown 		ret = wm_adsp2_ena(dsp);
10932159ad93SMark Brown 		if (ret != 0)
10942159ad93SMark Brown 			return ret;
10952159ad93SMark Brown 
10962159ad93SMark Brown 		ret = wm_adsp_load(dsp);
10972159ad93SMark Brown 		if (ret != 0)
10982159ad93SMark Brown 			goto err;
10992159ad93SMark Brown 
1100db40517cSMark Brown 		ret = wm_adsp_setup_algs(dsp);
1101db40517cSMark Brown 		if (ret != 0)
1102db40517cSMark Brown 			goto err;
1103db40517cSMark Brown 
11042159ad93SMark Brown 		ret = wm_adsp_load_coeff(dsp);
11052159ad93SMark Brown 		if (ret != 0)
11062159ad93SMark Brown 			goto err;
11072159ad93SMark Brown 
11082159ad93SMark Brown 		ret = regmap_update_bits(dsp->regmap,
11092159ad93SMark Brown 					 dsp->base + ADSP2_CONTROL,
1110a7f9be7eSMark Brown 					 ADSP2_CORE_ENA | ADSP2_START,
1111a7f9be7eSMark Brown 					 ADSP2_CORE_ENA | ADSP2_START);
11122159ad93SMark Brown 		if (ret != 0)
11132159ad93SMark Brown 			goto err;
11141023dbd9SMark Brown 
11151023dbd9SMark Brown 		dsp->running = true;
11162159ad93SMark Brown 		break;
11172159ad93SMark Brown 
11182159ad93SMark Brown 	case SND_SOC_DAPM_PRE_PMD:
11191023dbd9SMark Brown 		dsp->running = false;
11201023dbd9SMark Brown 
11212159ad93SMark Brown 		regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1122a7f9be7eSMark Brown 				   ADSP2_SYS_ENA | ADSP2_CORE_ENA |
1123a7f9be7eSMark Brown 				   ADSP2_START, 0);
1124973838a0SMark Brown 
11252d30b575SMark Brown 		/* Make sure DMAs are quiesced */
11262d30b575SMark Brown 		regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_1, 0);
11272d30b575SMark Brown 		regmap_write(dsp->regmap, dsp->base + ADSP2_WDMA_CONFIG_2, 0);
11282d30b575SMark Brown 		regmap_write(dsp->regmap, dsp->base + ADSP2_RDMA_CONFIG_1, 0);
11292d30b575SMark Brown 
1130973838a0SMark Brown 		if (dsp->dvfs) {
1131973838a0SMark Brown 			ret = regulator_set_voltage(dsp->dvfs, 1200000,
1132973838a0SMark Brown 						    1800000);
1133973838a0SMark Brown 			if (ret != 0)
1134973838a0SMark Brown 				dev_warn(dsp->dev,
1135973838a0SMark Brown 					 "Failed to lower supply: %d\n",
1136973838a0SMark Brown 					 ret);
1137973838a0SMark Brown 
1138973838a0SMark Brown 			ret = regulator_disable(dsp->dvfs);
1139973838a0SMark Brown 			if (ret != 0)
1140973838a0SMark Brown 				dev_err(dsp->dev,
1141973838a0SMark Brown 					"Failed to enable supply: %d\n",
1142973838a0SMark Brown 					ret);
1143973838a0SMark Brown 		}
1144471f4885SMark Brown 
1145471f4885SMark Brown 		while (!list_empty(&dsp->alg_regions)) {
1146471f4885SMark Brown 			alg_region = list_first_entry(&dsp->alg_regions,
1147471f4885SMark Brown 						      struct wm_adsp_alg_region,
1148471f4885SMark Brown 						      list);
1149471f4885SMark Brown 			list_del(&alg_region->list);
1150471f4885SMark Brown 			kfree(alg_region);
1151471f4885SMark Brown 		}
11522159ad93SMark Brown 		break;
11532159ad93SMark Brown 
11542159ad93SMark Brown 	default:
11552159ad93SMark Brown 		break;
11562159ad93SMark Brown 	}
11572159ad93SMark Brown 
11582159ad93SMark Brown 	return 0;
11592159ad93SMark Brown err:
11602159ad93SMark Brown 	regmap_update_bits(dsp->regmap, dsp->base + ADSP2_CONTROL,
1161a7f9be7eSMark Brown 			   ADSP2_SYS_ENA | ADSP2_CORE_ENA | ADSP2_START, 0);
11622159ad93SMark Brown 	return ret;
11632159ad93SMark Brown }
11642159ad93SMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_event);
1165973838a0SMark Brown 
1166973838a0SMark Brown int wm_adsp2_init(struct wm_adsp *adsp, bool dvfs)
1167973838a0SMark Brown {
1168973838a0SMark Brown 	int ret;
1169973838a0SMark Brown 
117010a2b662SMark Brown 	/*
117110a2b662SMark Brown 	 * Disable the DSP memory by default when in reset for a small
117210a2b662SMark Brown 	 * power saving.
117310a2b662SMark Brown 	 */
117410a2b662SMark Brown 	ret = regmap_update_bits(adsp->regmap, adsp->base + ADSP2_CONTROL,
117510a2b662SMark Brown 				 ADSP2_MEM_ENA, 0);
117610a2b662SMark Brown 	if (ret != 0) {
117710a2b662SMark Brown 		adsp_err(adsp, "Failed to clear memory retention: %d\n", ret);
117810a2b662SMark Brown 		return ret;
117910a2b662SMark Brown 	}
118010a2b662SMark Brown 
1181471f4885SMark Brown 	INIT_LIST_HEAD(&adsp->alg_regions);
1182471f4885SMark Brown 
1183973838a0SMark Brown 	if (dvfs) {
1184973838a0SMark Brown 		adsp->dvfs = devm_regulator_get(adsp->dev, "DCVDD");
1185973838a0SMark Brown 		if (IS_ERR(adsp->dvfs)) {
1186973838a0SMark Brown 			ret = PTR_ERR(adsp->dvfs);
1187973838a0SMark Brown 			dev_err(adsp->dev, "Failed to get DCVDD: %d\n", ret);
1188973838a0SMark Brown 			return ret;
1189973838a0SMark Brown 		}
1190973838a0SMark Brown 
1191973838a0SMark Brown 		ret = regulator_enable(adsp->dvfs);
1192973838a0SMark Brown 		if (ret != 0) {
1193973838a0SMark Brown 			dev_err(adsp->dev, "Failed to enable DCVDD: %d\n",
1194973838a0SMark Brown 				ret);
1195973838a0SMark Brown 			return ret;
1196973838a0SMark Brown 		}
1197973838a0SMark Brown 
1198973838a0SMark Brown 		ret = regulator_set_voltage(adsp->dvfs, 1200000, 1800000);
1199973838a0SMark Brown 		if (ret != 0) {
1200973838a0SMark Brown 			dev_err(adsp->dev, "Failed to initialise DVFS: %d\n",
1201973838a0SMark Brown 				ret);
1202973838a0SMark Brown 			return ret;
1203973838a0SMark Brown 		}
1204973838a0SMark Brown 
1205973838a0SMark Brown 		ret = regulator_disable(adsp->dvfs);
1206973838a0SMark Brown 		if (ret != 0) {
1207973838a0SMark Brown 			dev_err(adsp->dev, "Failed to disable DCVDD: %d\n",
1208973838a0SMark Brown 				ret);
1209973838a0SMark Brown 			return ret;
1210973838a0SMark Brown 		}
1211973838a0SMark Brown 	}
1212973838a0SMark Brown 
1213973838a0SMark Brown 	return 0;
1214973838a0SMark Brown }
1215973838a0SMark Brown EXPORT_SYMBOL_GPL(wm_adsp2_init);
1216