186ed3669SMark Brown #ifndef WM9081_H 286ed3669SMark Brown #define WM9081_H 386ed3669SMark Brown 486ed3669SMark Brown /* 586ed3669SMark Brown * wm9081.c -- WM9081 ALSA SoC Audio driver 686ed3669SMark Brown * 786ed3669SMark Brown * Author: Mark Brown 886ed3669SMark Brown * 986ed3669SMark Brown * Copyright 2009 Wolfson Microelectronics plc 1086ed3669SMark Brown * 1186ed3669SMark Brown * This program is free software; you can redistribute it and/or modify 1286ed3669SMark Brown * it under the terms of the GNU General Public License version 2 as 1386ed3669SMark Brown * published by the Free Software Foundation. 1486ed3669SMark Brown */ 1586ed3669SMark Brown 1686ed3669SMark Brown #include <sound/soc.h> 1786ed3669SMark Brown 1886ed3669SMark Brown extern struct snd_soc_dai wm9081_dai; 1986ed3669SMark Brown extern struct snd_soc_codec_device soc_codec_dev_wm9081; 2086ed3669SMark Brown 2186ed3669SMark Brown /* 2286ed3669SMark Brown * SYSCLK sources 2386ed3669SMark Brown */ 2486ed3669SMark Brown #define WM9081_SYSCLK_MCLK 1 /* Use MCLK without FLL */ 2586ed3669SMark Brown #define WM9081_SYSCLK_FLL_MCLK 2 /* Use MCLK, enabling FLL if required */ 2686ed3669SMark Brown 2786ed3669SMark Brown /* 2886ed3669SMark Brown * Register values. 2986ed3669SMark Brown */ 3086ed3669SMark Brown #define WM9081_SOFTWARE_RESET 0x00 3186ed3669SMark Brown #define WM9081_ANALOGUE_LINEOUT 0x02 3286ed3669SMark Brown #define WM9081_ANALOGUE_SPEAKER_PGA 0x03 3386ed3669SMark Brown #define WM9081_VMID_CONTROL 0x04 3486ed3669SMark Brown #define WM9081_BIAS_CONTROL_1 0x05 3586ed3669SMark Brown #define WM9081_ANALOGUE_MIXER 0x07 3686ed3669SMark Brown #define WM9081_ANTI_POP_CONTROL 0x08 3786ed3669SMark Brown #define WM9081_ANALOGUE_SPEAKER_1 0x09 3886ed3669SMark Brown #define WM9081_ANALOGUE_SPEAKER_2 0x0A 3986ed3669SMark Brown #define WM9081_POWER_MANAGEMENT 0x0B 4086ed3669SMark Brown #define WM9081_CLOCK_CONTROL_1 0x0C 4186ed3669SMark Brown #define WM9081_CLOCK_CONTROL_2 0x0D 4286ed3669SMark Brown #define WM9081_CLOCK_CONTROL_3 0x0E 4386ed3669SMark Brown #define WM9081_FLL_CONTROL_1 0x10 4486ed3669SMark Brown #define WM9081_FLL_CONTROL_2 0x11 4586ed3669SMark Brown #define WM9081_FLL_CONTROL_3 0x12 4686ed3669SMark Brown #define WM9081_FLL_CONTROL_4 0x13 4786ed3669SMark Brown #define WM9081_FLL_CONTROL_5 0x14 4886ed3669SMark Brown #define WM9081_AUDIO_INTERFACE_1 0x16 4986ed3669SMark Brown #define WM9081_AUDIO_INTERFACE_2 0x17 5086ed3669SMark Brown #define WM9081_AUDIO_INTERFACE_3 0x18 5186ed3669SMark Brown #define WM9081_AUDIO_INTERFACE_4 0x19 5286ed3669SMark Brown #define WM9081_INTERRUPT_STATUS 0x1A 5386ed3669SMark Brown #define WM9081_INTERRUPT_STATUS_MASK 0x1B 5486ed3669SMark Brown #define WM9081_INTERRUPT_POLARITY 0x1C 5586ed3669SMark Brown #define WM9081_INTERRUPT_CONTROL 0x1D 5686ed3669SMark Brown #define WM9081_DAC_DIGITAL_1 0x1E 5786ed3669SMark Brown #define WM9081_DAC_DIGITAL_2 0x1F 5886ed3669SMark Brown #define WM9081_DRC_1 0x20 5986ed3669SMark Brown #define WM9081_DRC_2 0x21 6086ed3669SMark Brown #define WM9081_DRC_3 0x22 6186ed3669SMark Brown #define WM9081_DRC_4 0x23 6286ed3669SMark Brown #define WM9081_WRITE_SEQUENCER_1 0x26 6386ed3669SMark Brown #define WM9081_WRITE_SEQUENCER_2 0x27 6486ed3669SMark Brown #define WM9081_MW_SLAVE_1 0x28 6586ed3669SMark Brown #define WM9081_EQ_1 0x2A 6686ed3669SMark Brown #define WM9081_EQ_2 0x2B 6786ed3669SMark Brown #define WM9081_EQ_3 0x2C 6886ed3669SMark Brown #define WM9081_EQ_4 0x2D 6986ed3669SMark Brown #define WM9081_EQ_5 0x2E 7086ed3669SMark Brown #define WM9081_EQ_6 0x2F 7186ed3669SMark Brown #define WM9081_EQ_7 0x30 7286ed3669SMark Brown #define WM9081_EQ_8 0x31 7386ed3669SMark Brown #define WM9081_EQ_9 0x32 7486ed3669SMark Brown #define WM9081_EQ_10 0x33 7586ed3669SMark Brown #define WM9081_EQ_11 0x34 7686ed3669SMark Brown #define WM9081_EQ_12 0x35 7786ed3669SMark Brown #define WM9081_EQ_13 0x36 7886ed3669SMark Brown #define WM9081_EQ_14 0x37 7986ed3669SMark Brown #define WM9081_EQ_15 0x38 8086ed3669SMark Brown #define WM9081_EQ_16 0x39 8186ed3669SMark Brown #define WM9081_EQ_17 0x3A 8286ed3669SMark Brown #define WM9081_EQ_18 0x3B 8386ed3669SMark Brown #define WM9081_EQ_19 0x3C 8486ed3669SMark Brown #define WM9081_EQ_20 0x3D 8586ed3669SMark Brown 8686ed3669SMark Brown #define WM9081_REGISTER_COUNT 55 8786ed3669SMark Brown #define WM9081_MAX_REGISTER 0x3D 8886ed3669SMark Brown 8986ed3669SMark Brown /* 9086ed3669SMark Brown * Field Definitions. 9186ed3669SMark Brown */ 9286ed3669SMark Brown 9386ed3669SMark Brown /* 9486ed3669SMark Brown * R0 (0x00) - Software Reset 9586ed3669SMark Brown */ 9686ed3669SMark Brown #define WM9081_SW_RST_DEV_ID1_MASK 0xFFFF /* SW_RST_DEV_ID1 - [15:0] */ 9786ed3669SMark Brown #define WM9081_SW_RST_DEV_ID1_SHIFT 0 /* SW_RST_DEV_ID1 - [15:0] */ 9886ed3669SMark Brown #define WM9081_SW_RST_DEV_ID1_WIDTH 16 /* SW_RST_DEV_ID1 - [15:0] */ 9986ed3669SMark Brown 10086ed3669SMark Brown /* 10186ed3669SMark Brown * R2 (0x02) - Analogue Lineout 10286ed3669SMark Brown */ 10386ed3669SMark Brown #define WM9081_LINEOUT_MUTE 0x0080 /* LINEOUT_MUTE */ 10486ed3669SMark Brown #define WM9081_LINEOUT_MUTE_MASK 0x0080 /* LINEOUT_MUTE */ 10586ed3669SMark Brown #define WM9081_LINEOUT_MUTE_SHIFT 7 /* LINEOUT_MUTE */ 10686ed3669SMark Brown #define WM9081_LINEOUT_MUTE_WIDTH 1 /* LINEOUT_MUTE */ 10786ed3669SMark Brown #define WM9081_LINEOUTZC 0x0040 /* LINEOUTZC */ 10886ed3669SMark Brown #define WM9081_LINEOUTZC_MASK 0x0040 /* LINEOUTZC */ 10986ed3669SMark Brown #define WM9081_LINEOUTZC_SHIFT 6 /* LINEOUTZC */ 11086ed3669SMark Brown #define WM9081_LINEOUTZC_WIDTH 1 /* LINEOUTZC */ 11186ed3669SMark Brown #define WM9081_LINEOUT_VOL_MASK 0x003F /* LINEOUT_VOL - [5:0] */ 11286ed3669SMark Brown #define WM9081_LINEOUT_VOL_SHIFT 0 /* LINEOUT_VOL - [5:0] */ 11386ed3669SMark Brown #define WM9081_LINEOUT_VOL_WIDTH 6 /* LINEOUT_VOL - [5:0] */ 11486ed3669SMark Brown 11586ed3669SMark Brown /* 11686ed3669SMark Brown * R3 (0x03) - Analogue Speaker PGA 11786ed3669SMark Brown */ 11886ed3669SMark Brown #define WM9081_SPKPGA_MUTE 0x0080 /* SPKPGA_MUTE */ 11986ed3669SMark Brown #define WM9081_SPKPGA_MUTE_MASK 0x0080 /* SPKPGA_MUTE */ 12086ed3669SMark Brown #define WM9081_SPKPGA_MUTE_SHIFT 7 /* SPKPGA_MUTE */ 12186ed3669SMark Brown #define WM9081_SPKPGA_MUTE_WIDTH 1 /* SPKPGA_MUTE */ 12286ed3669SMark Brown #define WM9081_SPKPGAZC 0x0040 /* SPKPGAZC */ 12386ed3669SMark Brown #define WM9081_SPKPGAZC_MASK 0x0040 /* SPKPGAZC */ 12486ed3669SMark Brown #define WM9081_SPKPGAZC_SHIFT 6 /* SPKPGAZC */ 12586ed3669SMark Brown #define WM9081_SPKPGAZC_WIDTH 1 /* SPKPGAZC */ 12686ed3669SMark Brown #define WM9081_SPKPGA_VOL_MASK 0x003F /* SPKPGA_VOL - [5:0] */ 12786ed3669SMark Brown #define WM9081_SPKPGA_VOL_SHIFT 0 /* SPKPGA_VOL - [5:0] */ 12886ed3669SMark Brown #define WM9081_SPKPGA_VOL_WIDTH 6 /* SPKPGA_VOL - [5:0] */ 12986ed3669SMark Brown 13086ed3669SMark Brown /* 13186ed3669SMark Brown * R4 (0x04) - VMID Control 13286ed3669SMark Brown */ 13386ed3669SMark Brown #define WM9081_VMID_BUF_ENA 0x0020 /* VMID_BUF_ENA */ 13486ed3669SMark Brown #define WM9081_VMID_BUF_ENA_MASK 0x0020 /* VMID_BUF_ENA */ 13586ed3669SMark Brown #define WM9081_VMID_BUF_ENA_SHIFT 5 /* VMID_BUF_ENA */ 13686ed3669SMark Brown #define WM9081_VMID_BUF_ENA_WIDTH 1 /* VMID_BUF_ENA */ 13786ed3669SMark Brown #define WM9081_VMID_RAMP 0x0008 /* VMID_RAMP */ 13886ed3669SMark Brown #define WM9081_VMID_RAMP_MASK 0x0008 /* VMID_RAMP */ 13986ed3669SMark Brown #define WM9081_VMID_RAMP_SHIFT 3 /* VMID_RAMP */ 14086ed3669SMark Brown #define WM9081_VMID_RAMP_WIDTH 1 /* VMID_RAMP */ 14186ed3669SMark Brown #define WM9081_VMID_SEL_MASK 0x0006 /* VMID_SEL - [2:1] */ 14286ed3669SMark Brown #define WM9081_VMID_SEL_SHIFT 1 /* VMID_SEL - [2:1] */ 14386ed3669SMark Brown #define WM9081_VMID_SEL_WIDTH 2 /* VMID_SEL - [2:1] */ 14486ed3669SMark Brown #define WM9081_VMID_FAST_ST 0x0001 /* VMID_FAST_ST */ 14586ed3669SMark Brown #define WM9081_VMID_FAST_ST_MASK 0x0001 /* VMID_FAST_ST */ 14686ed3669SMark Brown #define WM9081_VMID_FAST_ST_SHIFT 0 /* VMID_FAST_ST */ 14786ed3669SMark Brown #define WM9081_VMID_FAST_ST_WIDTH 1 /* VMID_FAST_ST */ 14886ed3669SMark Brown 14986ed3669SMark Brown /* 15086ed3669SMark Brown * R5 (0x05) - Bias Control 1 15186ed3669SMark Brown */ 15286ed3669SMark Brown #define WM9081_BIAS_SRC 0x0040 /* BIAS_SRC */ 15386ed3669SMark Brown #define WM9081_BIAS_SRC_MASK 0x0040 /* BIAS_SRC */ 15486ed3669SMark Brown #define WM9081_BIAS_SRC_SHIFT 6 /* BIAS_SRC */ 15586ed3669SMark Brown #define WM9081_BIAS_SRC_WIDTH 1 /* BIAS_SRC */ 15686ed3669SMark Brown #define WM9081_STBY_BIAS_LVL 0x0020 /* STBY_BIAS_LVL */ 15786ed3669SMark Brown #define WM9081_STBY_BIAS_LVL_MASK 0x0020 /* STBY_BIAS_LVL */ 15886ed3669SMark Brown #define WM9081_STBY_BIAS_LVL_SHIFT 5 /* STBY_BIAS_LVL */ 15986ed3669SMark Brown #define WM9081_STBY_BIAS_LVL_WIDTH 1 /* STBY_BIAS_LVL */ 16086ed3669SMark Brown #define WM9081_STBY_BIAS_ENA 0x0010 /* STBY_BIAS_ENA */ 16186ed3669SMark Brown #define WM9081_STBY_BIAS_ENA_MASK 0x0010 /* STBY_BIAS_ENA */ 16286ed3669SMark Brown #define WM9081_STBY_BIAS_ENA_SHIFT 4 /* STBY_BIAS_ENA */ 16386ed3669SMark Brown #define WM9081_STBY_BIAS_ENA_WIDTH 1 /* STBY_BIAS_ENA */ 16486ed3669SMark Brown #define WM9081_BIAS_LVL_MASK 0x000C /* BIAS_LVL - [3:2] */ 16586ed3669SMark Brown #define WM9081_BIAS_LVL_SHIFT 2 /* BIAS_LVL - [3:2] */ 16686ed3669SMark Brown #define WM9081_BIAS_LVL_WIDTH 2 /* BIAS_LVL - [3:2] */ 16786ed3669SMark Brown #define WM9081_BIAS_ENA 0x0002 /* BIAS_ENA */ 16886ed3669SMark Brown #define WM9081_BIAS_ENA_MASK 0x0002 /* BIAS_ENA */ 16986ed3669SMark Brown #define WM9081_BIAS_ENA_SHIFT 1 /* BIAS_ENA */ 17086ed3669SMark Brown #define WM9081_BIAS_ENA_WIDTH 1 /* BIAS_ENA */ 17186ed3669SMark Brown #define WM9081_STARTUP_BIAS_ENA 0x0001 /* STARTUP_BIAS_ENA */ 17286ed3669SMark Brown #define WM9081_STARTUP_BIAS_ENA_MASK 0x0001 /* STARTUP_BIAS_ENA */ 17386ed3669SMark Brown #define WM9081_STARTUP_BIAS_ENA_SHIFT 0 /* STARTUP_BIAS_ENA */ 17486ed3669SMark Brown #define WM9081_STARTUP_BIAS_ENA_WIDTH 1 /* STARTUP_BIAS_ENA */ 17586ed3669SMark Brown 17686ed3669SMark Brown /* 17786ed3669SMark Brown * R7 (0x07) - Analogue Mixer 17886ed3669SMark Brown */ 17986ed3669SMark Brown #define WM9081_DAC_SEL 0x0010 /* DAC_SEL */ 18086ed3669SMark Brown #define WM9081_DAC_SEL_MASK 0x0010 /* DAC_SEL */ 18186ed3669SMark Brown #define WM9081_DAC_SEL_SHIFT 4 /* DAC_SEL */ 18286ed3669SMark Brown #define WM9081_DAC_SEL_WIDTH 1 /* DAC_SEL */ 18386ed3669SMark Brown #define WM9081_IN2_VOL 0x0008 /* IN2_VOL */ 18486ed3669SMark Brown #define WM9081_IN2_VOL_MASK 0x0008 /* IN2_VOL */ 18586ed3669SMark Brown #define WM9081_IN2_VOL_SHIFT 3 /* IN2_VOL */ 18686ed3669SMark Brown #define WM9081_IN2_VOL_WIDTH 1 /* IN2_VOL */ 18786ed3669SMark Brown #define WM9081_IN2_ENA 0x0004 /* IN2_ENA */ 18886ed3669SMark Brown #define WM9081_IN2_ENA_MASK 0x0004 /* IN2_ENA */ 18986ed3669SMark Brown #define WM9081_IN2_ENA_SHIFT 2 /* IN2_ENA */ 19086ed3669SMark Brown #define WM9081_IN2_ENA_WIDTH 1 /* IN2_ENA */ 19186ed3669SMark Brown #define WM9081_IN1_VOL 0x0002 /* IN1_VOL */ 19286ed3669SMark Brown #define WM9081_IN1_VOL_MASK 0x0002 /* IN1_VOL */ 19386ed3669SMark Brown #define WM9081_IN1_VOL_SHIFT 1 /* IN1_VOL */ 19486ed3669SMark Brown #define WM9081_IN1_VOL_WIDTH 1 /* IN1_VOL */ 19586ed3669SMark Brown #define WM9081_IN1_ENA 0x0001 /* IN1_ENA */ 19686ed3669SMark Brown #define WM9081_IN1_ENA_MASK 0x0001 /* IN1_ENA */ 19786ed3669SMark Brown #define WM9081_IN1_ENA_SHIFT 0 /* IN1_ENA */ 19886ed3669SMark Brown #define WM9081_IN1_ENA_WIDTH 1 /* IN1_ENA */ 19986ed3669SMark Brown 20086ed3669SMark Brown /* 20186ed3669SMark Brown * R8 (0x08) - Anti Pop Control 20286ed3669SMark Brown */ 20386ed3669SMark Brown #define WM9081_LINEOUT_DISCH 0x0004 /* LINEOUT_DISCH */ 20486ed3669SMark Brown #define WM9081_LINEOUT_DISCH_MASK 0x0004 /* LINEOUT_DISCH */ 20586ed3669SMark Brown #define WM9081_LINEOUT_DISCH_SHIFT 2 /* LINEOUT_DISCH */ 20686ed3669SMark Brown #define WM9081_LINEOUT_DISCH_WIDTH 1 /* LINEOUT_DISCH */ 20786ed3669SMark Brown #define WM9081_LINEOUT_VROI 0x0002 /* LINEOUT_VROI */ 20886ed3669SMark Brown #define WM9081_LINEOUT_VROI_MASK 0x0002 /* LINEOUT_VROI */ 20986ed3669SMark Brown #define WM9081_LINEOUT_VROI_SHIFT 1 /* LINEOUT_VROI */ 21086ed3669SMark Brown #define WM9081_LINEOUT_VROI_WIDTH 1 /* LINEOUT_VROI */ 21186ed3669SMark Brown #define WM9081_LINEOUT_CLAMP 0x0001 /* LINEOUT_CLAMP */ 21286ed3669SMark Brown #define WM9081_LINEOUT_CLAMP_MASK 0x0001 /* LINEOUT_CLAMP */ 21386ed3669SMark Brown #define WM9081_LINEOUT_CLAMP_SHIFT 0 /* LINEOUT_CLAMP */ 21486ed3669SMark Brown #define WM9081_LINEOUT_CLAMP_WIDTH 1 /* LINEOUT_CLAMP */ 21586ed3669SMark Brown 21686ed3669SMark Brown /* 21786ed3669SMark Brown * R9 (0x09) - Analogue Speaker 1 21886ed3669SMark Brown */ 21986ed3669SMark Brown #define WM9081_SPK_DCGAIN_MASK 0x0038 /* SPK_DCGAIN - [5:3] */ 22086ed3669SMark Brown #define WM9081_SPK_DCGAIN_SHIFT 3 /* SPK_DCGAIN - [5:3] */ 22186ed3669SMark Brown #define WM9081_SPK_DCGAIN_WIDTH 3 /* SPK_DCGAIN - [5:3] */ 22286ed3669SMark Brown #define WM9081_SPK_ACGAIN_MASK 0x0007 /* SPK_ACGAIN - [2:0] */ 22386ed3669SMark Brown #define WM9081_SPK_ACGAIN_SHIFT 0 /* SPK_ACGAIN - [2:0] */ 22486ed3669SMark Brown #define WM9081_SPK_ACGAIN_WIDTH 3 /* SPK_ACGAIN - [2:0] */ 22586ed3669SMark Brown 22686ed3669SMark Brown /* 22786ed3669SMark Brown * R10 (0x0A) - Analogue Speaker 2 22886ed3669SMark Brown */ 22986ed3669SMark Brown #define WM9081_SPK_MODE 0x0040 /* SPK_MODE */ 23086ed3669SMark Brown #define WM9081_SPK_MODE_MASK 0x0040 /* SPK_MODE */ 23186ed3669SMark Brown #define WM9081_SPK_MODE_SHIFT 6 /* SPK_MODE */ 23286ed3669SMark Brown #define WM9081_SPK_MODE_WIDTH 1 /* SPK_MODE */ 23386ed3669SMark Brown #define WM9081_SPK_INV_MUTE 0x0010 /* SPK_INV_MUTE */ 23486ed3669SMark Brown #define WM9081_SPK_INV_MUTE_MASK 0x0010 /* SPK_INV_MUTE */ 23586ed3669SMark Brown #define WM9081_SPK_INV_MUTE_SHIFT 4 /* SPK_INV_MUTE */ 23686ed3669SMark Brown #define WM9081_SPK_INV_MUTE_WIDTH 1 /* SPK_INV_MUTE */ 23786ed3669SMark Brown #define WM9081_OUT_SPK_CTRL 0x0008 /* OUT_SPK_CTRL */ 23886ed3669SMark Brown #define WM9081_OUT_SPK_CTRL_MASK 0x0008 /* OUT_SPK_CTRL */ 23986ed3669SMark Brown #define WM9081_OUT_SPK_CTRL_SHIFT 3 /* OUT_SPK_CTRL */ 24086ed3669SMark Brown #define WM9081_OUT_SPK_CTRL_WIDTH 1 /* OUT_SPK_CTRL */ 24186ed3669SMark Brown 24286ed3669SMark Brown /* 24386ed3669SMark Brown * R11 (0x0B) - Power Management 24486ed3669SMark Brown */ 24586ed3669SMark Brown #define WM9081_TSHUT_ENA 0x0100 /* TSHUT_ENA */ 24686ed3669SMark Brown #define WM9081_TSHUT_ENA_MASK 0x0100 /* TSHUT_ENA */ 24786ed3669SMark Brown #define WM9081_TSHUT_ENA_SHIFT 8 /* TSHUT_ENA */ 24886ed3669SMark Brown #define WM9081_TSHUT_ENA_WIDTH 1 /* TSHUT_ENA */ 24986ed3669SMark Brown #define WM9081_TSENSE_ENA 0x0080 /* TSENSE_ENA */ 25086ed3669SMark Brown #define WM9081_TSENSE_ENA_MASK 0x0080 /* TSENSE_ENA */ 25186ed3669SMark Brown #define WM9081_TSENSE_ENA_SHIFT 7 /* TSENSE_ENA */ 25286ed3669SMark Brown #define WM9081_TSENSE_ENA_WIDTH 1 /* TSENSE_ENA */ 25386ed3669SMark Brown #define WM9081_TEMP_SHUT 0x0040 /* TEMP_SHUT */ 25486ed3669SMark Brown #define WM9081_TEMP_SHUT_MASK 0x0040 /* TEMP_SHUT */ 25586ed3669SMark Brown #define WM9081_TEMP_SHUT_SHIFT 6 /* TEMP_SHUT */ 25686ed3669SMark Brown #define WM9081_TEMP_SHUT_WIDTH 1 /* TEMP_SHUT */ 25786ed3669SMark Brown #define WM9081_LINEOUT_ENA 0x0010 /* LINEOUT_ENA */ 25886ed3669SMark Brown #define WM9081_LINEOUT_ENA_MASK 0x0010 /* LINEOUT_ENA */ 25986ed3669SMark Brown #define WM9081_LINEOUT_ENA_SHIFT 4 /* LINEOUT_ENA */ 26086ed3669SMark Brown #define WM9081_LINEOUT_ENA_WIDTH 1 /* LINEOUT_ENA */ 26186ed3669SMark Brown #define WM9081_SPKPGA_ENA 0x0004 /* SPKPGA_ENA */ 26286ed3669SMark Brown #define WM9081_SPKPGA_ENA_MASK 0x0004 /* SPKPGA_ENA */ 26386ed3669SMark Brown #define WM9081_SPKPGA_ENA_SHIFT 2 /* SPKPGA_ENA */ 26486ed3669SMark Brown #define WM9081_SPKPGA_ENA_WIDTH 1 /* SPKPGA_ENA */ 26586ed3669SMark Brown #define WM9081_SPK_ENA 0x0002 /* SPK_ENA */ 26686ed3669SMark Brown #define WM9081_SPK_ENA_MASK 0x0002 /* SPK_ENA */ 26786ed3669SMark Brown #define WM9081_SPK_ENA_SHIFT 1 /* SPK_ENA */ 26886ed3669SMark Brown #define WM9081_SPK_ENA_WIDTH 1 /* SPK_ENA */ 26986ed3669SMark Brown #define WM9081_DAC_ENA 0x0001 /* DAC_ENA */ 27086ed3669SMark Brown #define WM9081_DAC_ENA_MASK 0x0001 /* DAC_ENA */ 27186ed3669SMark Brown #define WM9081_DAC_ENA_SHIFT 0 /* DAC_ENA */ 27286ed3669SMark Brown #define WM9081_DAC_ENA_WIDTH 1 /* DAC_ENA */ 27386ed3669SMark Brown 27486ed3669SMark Brown /* 27586ed3669SMark Brown * R12 (0x0C) - Clock Control 1 27686ed3669SMark Brown */ 27786ed3669SMark Brown #define WM9081_CLK_OP_DIV_MASK 0x1C00 /* CLK_OP_DIV - [12:10] */ 27886ed3669SMark Brown #define WM9081_CLK_OP_DIV_SHIFT 10 /* CLK_OP_DIV - [12:10] */ 27986ed3669SMark Brown #define WM9081_CLK_OP_DIV_WIDTH 3 /* CLK_OP_DIV - [12:10] */ 28086ed3669SMark Brown #define WM9081_CLK_TO_DIV_MASK 0x0300 /* CLK_TO_DIV - [9:8] */ 28186ed3669SMark Brown #define WM9081_CLK_TO_DIV_SHIFT 8 /* CLK_TO_DIV - [9:8] */ 28286ed3669SMark Brown #define WM9081_CLK_TO_DIV_WIDTH 2 /* CLK_TO_DIV - [9:8] */ 28386ed3669SMark Brown #define WM9081_MCLKDIV2 0x0080 /* MCLKDIV2 */ 28486ed3669SMark Brown #define WM9081_MCLKDIV2_MASK 0x0080 /* MCLKDIV2 */ 28586ed3669SMark Brown #define WM9081_MCLKDIV2_SHIFT 7 /* MCLKDIV2 */ 28686ed3669SMark Brown #define WM9081_MCLKDIV2_WIDTH 1 /* MCLKDIV2 */ 28786ed3669SMark Brown 28886ed3669SMark Brown /* 28986ed3669SMark Brown * R13 (0x0D) - Clock Control 2 29086ed3669SMark Brown */ 29186ed3669SMark Brown #define WM9081_CLK_SYS_RATE_MASK 0x00F0 /* CLK_SYS_RATE - [7:4] */ 29286ed3669SMark Brown #define WM9081_CLK_SYS_RATE_SHIFT 4 /* CLK_SYS_RATE - [7:4] */ 29386ed3669SMark Brown #define WM9081_CLK_SYS_RATE_WIDTH 4 /* CLK_SYS_RATE - [7:4] */ 29486ed3669SMark Brown #define WM9081_SAMPLE_RATE_MASK 0x000F /* SAMPLE_RATE - [3:0] */ 29586ed3669SMark Brown #define WM9081_SAMPLE_RATE_SHIFT 0 /* SAMPLE_RATE - [3:0] */ 29686ed3669SMark Brown #define WM9081_SAMPLE_RATE_WIDTH 4 /* SAMPLE_RATE - [3:0] */ 29786ed3669SMark Brown 29886ed3669SMark Brown /* 29986ed3669SMark Brown * R14 (0x0E) - Clock Control 3 30086ed3669SMark Brown */ 30186ed3669SMark Brown #define WM9081_CLK_SRC_SEL 0x2000 /* CLK_SRC_SEL */ 30286ed3669SMark Brown #define WM9081_CLK_SRC_SEL_MASK 0x2000 /* CLK_SRC_SEL */ 30386ed3669SMark Brown #define WM9081_CLK_SRC_SEL_SHIFT 13 /* CLK_SRC_SEL */ 30486ed3669SMark Brown #define WM9081_CLK_SRC_SEL_WIDTH 1 /* CLK_SRC_SEL */ 30586ed3669SMark Brown #define WM9081_CLK_OP_ENA 0x0020 /* CLK_OP_ENA */ 30686ed3669SMark Brown #define WM9081_CLK_OP_ENA_MASK 0x0020 /* CLK_OP_ENA */ 30786ed3669SMark Brown #define WM9081_CLK_OP_ENA_SHIFT 5 /* CLK_OP_ENA */ 30886ed3669SMark Brown #define WM9081_CLK_OP_ENA_WIDTH 1 /* CLK_OP_ENA */ 30986ed3669SMark Brown #define WM9081_CLK_TO_ENA 0x0004 /* CLK_TO_ENA */ 31086ed3669SMark Brown #define WM9081_CLK_TO_ENA_MASK 0x0004 /* CLK_TO_ENA */ 31186ed3669SMark Brown #define WM9081_CLK_TO_ENA_SHIFT 2 /* CLK_TO_ENA */ 31286ed3669SMark Brown #define WM9081_CLK_TO_ENA_WIDTH 1 /* CLK_TO_ENA */ 31386ed3669SMark Brown #define WM9081_CLK_DSP_ENA 0x0002 /* CLK_DSP_ENA */ 31486ed3669SMark Brown #define WM9081_CLK_DSP_ENA_MASK 0x0002 /* CLK_DSP_ENA */ 31586ed3669SMark Brown #define WM9081_CLK_DSP_ENA_SHIFT 1 /* CLK_DSP_ENA */ 31686ed3669SMark Brown #define WM9081_CLK_DSP_ENA_WIDTH 1 /* CLK_DSP_ENA */ 31786ed3669SMark Brown #define WM9081_CLK_SYS_ENA 0x0001 /* CLK_SYS_ENA */ 31886ed3669SMark Brown #define WM9081_CLK_SYS_ENA_MASK 0x0001 /* CLK_SYS_ENA */ 31986ed3669SMark Brown #define WM9081_CLK_SYS_ENA_SHIFT 0 /* CLK_SYS_ENA */ 32086ed3669SMark Brown #define WM9081_CLK_SYS_ENA_WIDTH 1 /* CLK_SYS_ENA */ 32186ed3669SMark Brown 32286ed3669SMark Brown /* 32386ed3669SMark Brown * R16 (0x10) - FLL Control 1 32486ed3669SMark Brown */ 32586ed3669SMark Brown #define WM9081_FLL_HOLD 0x0008 /* FLL_HOLD */ 32686ed3669SMark Brown #define WM9081_FLL_HOLD_MASK 0x0008 /* FLL_HOLD */ 32786ed3669SMark Brown #define WM9081_FLL_HOLD_SHIFT 3 /* FLL_HOLD */ 32886ed3669SMark Brown #define WM9081_FLL_HOLD_WIDTH 1 /* FLL_HOLD */ 32986ed3669SMark Brown #define WM9081_FLL_FRAC 0x0004 /* FLL_FRAC */ 33086ed3669SMark Brown #define WM9081_FLL_FRAC_MASK 0x0004 /* FLL_FRAC */ 33186ed3669SMark Brown #define WM9081_FLL_FRAC_SHIFT 2 /* FLL_FRAC */ 33286ed3669SMark Brown #define WM9081_FLL_FRAC_WIDTH 1 /* FLL_FRAC */ 33386ed3669SMark Brown #define WM9081_FLL_ENA 0x0001 /* FLL_ENA */ 33486ed3669SMark Brown #define WM9081_FLL_ENA_MASK 0x0001 /* FLL_ENA */ 33586ed3669SMark Brown #define WM9081_FLL_ENA_SHIFT 0 /* FLL_ENA */ 33686ed3669SMark Brown #define WM9081_FLL_ENA_WIDTH 1 /* FLL_ENA */ 33786ed3669SMark Brown 33886ed3669SMark Brown /* 33986ed3669SMark Brown * R17 (0x11) - FLL Control 2 34086ed3669SMark Brown */ 34186ed3669SMark Brown #define WM9081_FLL_OUTDIV_MASK 0x0700 /* FLL_OUTDIV - [10:8] */ 34286ed3669SMark Brown #define WM9081_FLL_OUTDIV_SHIFT 8 /* FLL_OUTDIV - [10:8] */ 34386ed3669SMark Brown #define WM9081_FLL_OUTDIV_WIDTH 3 /* FLL_OUTDIV - [10:8] */ 34486ed3669SMark Brown #define WM9081_FLL_CTRL_RATE_MASK 0x0070 /* FLL_CTRL_RATE - [6:4] */ 34586ed3669SMark Brown #define WM9081_FLL_CTRL_RATE_SHIFT 4 /* FLL_CTRL_RATE - [6:4] */ 34686ed3669SMark Brown #define WM9081_FLL_CTRL_RATE_WIDTH 3 /* FLL_CTRL_RATE - [6:4] */ 34786ed3669SMark Brown #define WM9081_FLL_FRATIO_MASK 0x0007 /* FLL_FRATIO - [2:0] */ 34886ed3669SMark Brown #define WM9081_FLL_FRATIO_SHIFT 0 /* FLL_FRATIO - [2:0] */ 34986ed3669SMark Brown #define WM9081_FLL_FRATIO_WIDTH 3 /* FLL_FRATIO - [2:0] */ 35086ed3669SMark Brown 35186ed3669SMark Brown /* 35286ed3669SMark Brown * R18 (0x12) - FLL Control 3 35386ed3669SMark Brown */ 35486ed3669SMark Brown #define WM9081_FLL_K_MASK 0xFFFF /* FLL_K - [15:0] */ 35586ed3669SMark Brown #define WM9081_FLL_K_SHIFT 0 /* FLL_K - [15:0] */ 35686ed3669SMark Brown #define WM9081_FLL_K_WIDTH 16 /* FLL_K - [15:0] */ 35786ed3669SMark Brown 35886ed3669SMark Brown /* 35986ed3669SMark Brown * R19 (0x13) - FLL Control 4 36086ed3669SMark Brown */ 36186ed3669SMark Brown #define WM9081_FLL_N_MASK 0x7FE0 /* FLL_N - [14:5] */ 36286ed3669SMark Brown #define WM9081_FLL_N_SHIFT 5 /* FLL_N - [14:5] */ 36386ed3669SMark Brown #define WM9081_FLL_N_WIDTH 10 /* FLL_N - [14:5] */ 36486ed3669SMark Brown #define WM9081_FLL_GAIN_MASK 0x000F /* FLL_GAIN - [3:0] */ 36586ed3669SMark Brown #define WM9081_FLL_GAIN_SHIFT 0 /* FLL_GAIN - [3:0] */ 36686ed3669SMark Brown #define WM9081_FLL_GAIN_WIDTH 4 /* FLL_GAIN - [3:0] */ 36786ed3669SMark Brown 36886ed3669SMark Brown /* 36986ed3669SMark Brown * R20 (0x14) - FLL Control 5 37086ed3669SMark Brown */ 37186ed3669SMark Brown #define WM9081_FLL_CLK_REF_DIV_MASK 0x0018 /* FLL_CLK_REF_DIV - [4:3] */ 37286ed3669SMark Brown #define WM9081_FLL_CLK_REF_DIV_SHIFT 3 /* FLL_CLK_REF_DIV - [4:3] */ 37386ed3669SMark Brown #define WM9081_FLL_CLK_REF_DIV_WIDTH 2 /* FLL_CLK_REF_DIV - [4:3] */ 37486ed3669SMark Brown #define WM9081_FLL_CLK_SRC_MASK 0x0003 /* FLL_CLK_SRC - [1:0] */ 37586ed3669SMark Brown #define WM9081_FLL_CLK_SRC_SHIFT 0 /* FLL_CLK_SRC - [1:0] */ 37686ed3669SMark Brown #define WM9081_FLL_CLK_SRC_WIDTH 2 /* FLL_CLK_SRC - [1:0] */ 37786ed3669SMark Brown 37886ed3669SMark Brown /* 37986ed3669SMark Brown * R22 (0x16) - Audio Interface 1 38086ed3669SMark Brown */ 38186ed3669SMark Brown #define WM9081_AIFDAC_CHAN 0x0040 /* AIFDAC_CHAN */ 38286ed3669SMark Brown #define WM9081_AIFDAC_CHAN_MASK 0x0040 /* AIFDAC_CHAN */ 38386ed3669SMark Brown #define WM9081_AIFDAC_CHAN_SHIFT 6 /* AIFDAC_CHAN */ 38486ed3669SMark Brown #define WM9081_AIFDAC_CHAN_WIDTH 1 /* AIFDAC_CHAN */ 38586ed3669SMark Brown #define WM9081_AIFDAC_TDM_SLOT_MASK 0x0030 /* AIFDAC_TDM_SLOT - [5:4] */ 38686ed3669SMark Brown #define WM9081_AIFDAC_TDM_SLOT_SHIFT 4 /* AIFDAC_TDM_SLOT - [5:4] */ 38786ed3669SMark Brown #define WM9081_AIFDAC_TDM_SLOT_WIDTH 2 /* AIFDAC_TDM_SLOT - [5:4] */ 38886ed3669SMark Brown #define WM9081_AIFDAC_TDM_MODE_MASK 0x000C /* AIFDAC_TDM_MODE - [3:2] */ 38986ed3669SMark Brown #define WM9081_AIFDAC_TDM_MODE_SHIFT 2 /* AIFDAC_TDM_MODE - [3:2] */ 39086ed3669SMark Brown #define WM9081_AIFDAC_TDM_MODE_WIDTH 2 /* AIFDAC_TDM_MODE - [3:2] */ 39186ed3669SMark Brown #define WM9081_DAC_COMP 0x0002 /* DAC_COMP */ 39286ed3669SMark Brown #define WM9081_DAC_COMP_MASK 0x0002 /* DAC_COMP */ 39386ed3669SMark Brown #define WM9081_DAC_COMP_SHIFT 1 /* DAC_COMP */ 39486ed3669SMark Brown #define WM9081_DAC_COMP_WIDTH 1 /* DAC_COMP */ 39586ed3669SMark Brown #define WM9081_DAC_COMPMODE 0x0001 /* DAC_COMPMODE */ 39686ed3669SMark Brown #define WM9081_DAC_COMPMODE_MASK 0x0001 /* DAC_COMPMODE */ 39786ed3669SMark Brown #define WM9081_DAC_COMPMODE_SHIFT 0 /* DAC_COMPMODE */ 39886ed3669SMark Brown #define WM9081_DAC_COMPMODE_WIDTH 1 /* DAC_COMPMODE */ 39986ed3669SMark Brown 40086ed3669SMark Brown /* 40186ed3669SMark Brown * R23 (0x17) - Audio Interface 2 40286ed3669SMark Brown */ 40386ed3669SMark Brown #define WM9081_AIF_TRIS 0x0200 /* AIF_TRIS */ 40486ed3669SMark Brown #define WM9081_AIF_TRIS_MASK 0x0200 /* AIF_TRIS */ 40586ed3669SMark Brown #define WM9081_AIF_TRIS_SHIFT 9 /* AIF_TRIS */ 40686ed3669SMark Brown #define WM9081_AIF_TRIS_WIDTH 1 /* AIF_TRIS */ 40786ed3669SMark Brown #define WM9081_DAC_DAT_INV 0x0100 /* DAC_DAT_INV */ 40886ed3669SMark Brown #define WM9081_DAC_DAT_INV_MASK 0x0100 /* DAC_DAT_INV */ 40986ed3669SMark Brown #define WM9081_DAC_DAT_INV_SHIFT 8 /* DAC_DAT_INV */ 41086ed3669SMark Brown #define WM9081_DAC_DAT_INV_WIDTH 1 /* DAC_DAT_INV */ 41186ed3669SMark Brown #define WM9081_AIF_BCLK_INV 0x0080 /* AIF_BCLK_INV */ 41286ed3669SMark Brown #define WM9081_AIF_BCLK_INV_MASK 0x0080 /* AIF_BCLK_INV */ 41386ed3669SMark Brown #define WM9081_AIF_BCLK_INV_SHIFT 7 /* AIF_BCLK_INV */ 41486ed3669SMark Brown #define WM9081_AIF_BCLK_INV_WIDTH 1 /* AIF_BCLK_INV */ 41586ed3669SMark Brown #define WM9081_BCLK_DIR 0x0040 /* BCLK_DIR */ 41686ed3669SMark Brown #define WM9081_BCLK_DIR_MASK 0x0040 /* BCLK_DIR */ 41786ed3669SMark Brown #define WM9081_BCLK_DIR_SHIFT 6 /* BCLK_DIR */ 41886ed3669SMark Brown #define WM9081_BCLK_DIR_WIDTH 1 /* BCLK_DIR */ 41986ed3669SMark Brown #define WM9081_LRCLK_DIR 0x0020 /* LRCLK_DIR */ 42086ed3669SMark Brown #define WM9081_LRCLK_DIR_MASK 0x0020 /* LRCLK_DIR */ 42186ed3669SMark Brown #define WM9081_LRCLK_DIR_SHIFT 5 /* LRCLK_DIR */ 42286ed3669SMark Brown #define WM9081_LRCLK_DIR_WIDTH 1 /* LRCLK_DIR */ 42386ed3669SMark Brown #define WM9081_AIF_LRCLK_INV 0x0010 /* AIF_LRCLK_INV */ 42486ed3669SMark Brown #define WM9081_AIF_LRCLK_INV_MASK 0x0010 /* AIF_LRCLK_INV */ 42586ed3669SMark Brown #define WM9081_AIF_LRCLK_INV_SHIFT 4 /* AIF_LRCLK_INV */ 42686ed3669SMark Brown #define WM9081_AIF_LRCLK_INV_WIDTH 1 /* AIF_LRCLK_INV */ 42786ed3669SMark Brown #define WM9081_AIF_WL_MASK 0x000C /* AIF_WL - [3:2] */ 42886ed3669SMark Brown #define WM9081_AIF_WL_SHIFT 2 /* AIF_WL - [3:2] */ 42986ed3669SMark Brown #define WM9081_AIF_WL_WIDTH 2 /* AIF_WL - [3:2] */ 43086ed3669SMark Brown #define WM9081_AIF_FMT_MASK 0x0003 /* AIF_FMT - [1:0] */ 43186ed3669SMark Brown #define WM9081_AIF_FMT_SHIFT 0 /* AIF_FMT - [1:0] */ 43286ed3669SMark Brown #define WM9081_AIF_FMT_WIDTH 2 /* AIF_FMT - [1:0] */ 43386ed3669SMark Brown 43486ed3669SMark Brown /* 43586ed3669SMark Brown * R24 (0x18) - Audio Interface 3 43686ed3669SMark Brown */ 43786ed3669SMark Brown #define WM9081_BCLK_DIV_MASK 0x001F /* BCLK_DIV - [4:0] */ 43886ed3669SMark Brown #define WM9081_BCLK_DIV_SHIFT 0 /* BCLK_DIV - [4:0] */ 43986ed3669SMark Brown #define WM9081_BCLK_DIV_WIDTH 5 /* BCLK_DIV - [4:0] */ 44086ed3669SMark Brown 44186ed3669SMark Brown /* 44286ed3669SMark Brown * R25 (0x19) - Audio Interface 4 44386ed3669SMark Brown */ 44486ed3669SMark Brown #define WM9081_LRCLK_RATE_MASK 0x07FF /* LRCLK_RATE - [10:0] */ 44586ed3669SMark Brown #define WM9081_LRCLK_RATE_SHIFT 0 /* LRCLK_RATE - [10:0] */ 44686ed3669SMark Brown #define WM9081_LRCLK_RATE_WIDTH 11 /* LRCLK_RATE - [10:0] */ 44786ed3669SMark Brown 44886ed3669SMark Brown /* 44986ed3669SMark Brown * R26 (0x1A) - Interrupt Status 45086ed3669SMark Brown */ 45186ed3669SMark Brown #define WM9081_WSEQ_BUSY_EINT 0x0004 /* WSEQ_BUSY_EINT */ 45286ed3669SMark Brown #define WM9081_WSEQ_BUSY_EINT_MASK 0x0004 /* WSEQ_BUSY_EINT */ 45386ed3669SMark Brown #define WM9081_WSEQ_BUSY_EINT_SHIFT 2 /* WSEQ_BUSY_EINT */ 45486ed3669SMark Brown #define WM9081_WSEQ_BUSY_EINT_WIDTH 1 /* WSEQ_BUSY_EINT */ 45586ed3669SMark Brown #define WM9081_TSHUT_EINT 0x0001 /* TSHUT_EINT */ 45686ed3669SMark Brown #define WM9081_TSHUT_EINT_MASK 0x0001 /* TSHUT_EINT */ 45786ed3669SMark Brown #define WM9081_TSHUT_EINT_SHIFT 0 /* TSHUT_EINT */ 45886ed3669SMark Brown #define WM9081_TSHUT_EINT_WIDTH 1 /* TSHUT_EINT */ 45986ed3669SMark Brown 46086ed3669SMark Brown /* 46186ed3669SMark Brown * R27 (0x1B) - Interrupt Status Mask 46286ed3669SMark Brown */ 46386ed3669SMark Brown #define WM9081_IM_WSEQ_BUSY_EINT 0x0004 /* IM_WSEQ_BUSY_EINT */ 46486ed3669SMark Brown #define WM9081_IM_WSEQ_BUSY_EINT_MASK 0x0004 /* IM_WSEQ_BUSY_EINT */ 46586ed3669SMark Brown #define WM9081_IM_WSEQ_BUSY_EINT_SHIFT 2 /* IM_WSEQ_BUSY_EINT */ 46686ed3669SMark Brown #define WM9081_IM_WSEQ_BUSY_EINT_WIDTH 1 /* IM_WSEQ_BUSY_EINT */ 46786ed3669SMark Brown #define WM9081_IM_TSHUT_EINT 0x0001 /* IM_TSHUT_EINT */ 46886ed3669SMark Brown #define WM9081_IM_TSHUT_EINT_MASK 0x0001 /* IM_TSHUT_EINT */ 46986ed3669SMark Brown #define WM9081_IM_TSHUT_EINT_SHIFT 0 /* IM_TSHUT_EINT */ 47086ed3669SMark Brown #define WM9081_IM_TSHUT_EINT_WIDTH 1 /* IM_TSHUT_EINT */ 47186ed3669SMark Brown 47286ed3669SMark Brown /* 47386ed3669SMark Brown * R28 (0x1C) - Interrupt Polarity 47486ed3669SMark Brown */ 47586ed3669SMark Brown #define WM9081_TSHUT_INV 0x0001 /* TSHUT_INV */ 47686ed3669SMark Brown #define WM9081_TSHUT_INV_MASK 0x0001 /* TSHUT_INV */ 47786ed3669SMark Brown #define WM9081_TSHUT_INV_SHIFT 0 /* TSHUT_INV */ 47886ed3669SMark Brown #define WM9081_TSHUT_INV_WIDTH 1 /* TSHUT_INV */ 47986ed3669SMark Brown 48086ed3669SMark Brown /* 48186ed3669SMark Brown * R29 (0x1D) - Interrupt Control 48286ed3669SMark Brown */ 48386ed3669SMark Brown #define WM9081_IRQ_POL 0x8000 /* IRQ_POL */ 48486ed3669SMark Brown #define WM9081_IRQ_POL_MASK 0x8000 /* IRQ_POL */ 48586ed3669SMark Brown #define WM9081_IRQ_POL_SHIFT 15 /* IRQ_POL */ 48686ed3669SMark Brown #define WM9081_IRQ_POL_WIDTH 1 /* IRQ_POL */ 48786ed3669SMark Brown #define WM9081_IRQ_OP_CTRL 0x0001 /* IRQ_OP_CTRL */ 48886ed3669SMark Brown #define WM9081_IRQ_OP_CTRL_MASK 0x0001 /* IRQ_OP_CTRL */ 48986ed3669SMark Brown #define WM9081_IRQ_OP_CTRL_SHIFT 0 /* IRQ_OP_CTRL */ 49086ed3669SMark Brown #define WM9081_IRQ_OP_CTRL_WIDTH 1 /* IRQ_OP_CTRL */ 49186ed3669SMark Brown 49286ed3669SMark Brown /* 49386ed3669SMark Brown * R30 (0x1E) - DAC Digital 1 49486ed3669SMark Brown */ 49586ed3669SMark Brown #define WM9081_DAC_VOL_MASK 0x00FF /* DAC_VOL - [7:0] */ 49686ed3669SMark Brown #define WM9081_DAC_VOL_SHIFT 0 /* DAC_VOL - [7:0] */ 49786ed3669SMark Brown #define WM9081_DAC_VOL_WIDTH 8 /* DAC_VOL - [7:0] */ 49886ed3669SMark Brown 49986ed3669SMark Brown /* 50086ed3669SMark Brown * R31 (0x1F) - DAC Digital 2 50186ed3669SMark Brown */ 50286ed3669SMark Brown #define WM9081_DAC_MUTERATE 0x0400 /* DAC_MUTERATE */ 50386ed3669SMark Brown #define WM9081_DAC_MUTERATE_MASK 0x0400 /* DAC_MUTERATE */ 50486ed3669SMark Brown #define WM9081_DAC_MUTERATE_SHIFT 10 /* DAC_MUTERATE */ 50586ed3669SMark Brown #define WM9081_DAC_MUTERATE_WIDTH 1 /* DAC_MUTERATE */ 50686ed3669SMark Brown #define WM9081_DAC_MUTEMODE 0x0200 /* DAC_MUTEMODE */ 50786ed3669SMark Brown #define WM9081_DAC_MUTEMODE_MASK 0x0200 /* DAC_MUTEMODE */ 50886ed3669SMark Brown #define WM9081_DAC_MUTEMODE_SHIFT 9 /* DAC_MUTEMODE */ 50986ed3669SMark Brown #define WM9081_DAC_MUTEMODE_WIDTH 1 /* DAC_MUTEMODE */ 51086ed3669SMark Brown #define WM9081_DAC_MUTE 0x0008 /* DAC_MUTE */ 51186ed3669SMark Brown #define WM9081_DAC_MUTE_MASK 0x0008 /* DAC_MUTE */ 51286ed3669SMark Brown #define WM9081_DAC_MUTE_SHIFT 3 /* DAC_MUTE */ 51386ed3669SMark Brown #define WM9081_DAC_MUTE_WIDTH 1 /* DAC_MUTE */ 51486ed3669SMark Brown #define WM9081_DEEMPH_MASK 0x0006 /* DEEMPH - [2:1] */ 51586ed3669SMark Brown #define WM9081_DEEMPH_SHIFT 1 /* DEEMPH - [2:1] */ 51686ed3669SMark Brown #define WM9081_DEEMPH_WIDTH 2 /* DEEMPH - [2:1] */ 51786ed3669SMark Brown 51886ed3669SMark Brown /* 51986ed3669SMark Brown * R32 (0x20) - DRC 1 52086ed3669SMark Brown */ 52186ed3669SMark Brown #define WM9081_DRC_ENA 0x8000 /* DRC_ENA */ 52286ed3669SMark Brown #define WM9081_DRC_ENA_MASK 0x8000 /* DRC_ENA */ 52386ed3669SMark Brown #define WM9081_DRC_ENA_SHIFT 15 /* DRC_ENA */ 52486ed3669SMark Brown #define WM9081_DRC_ENA_WIDTH 1 /* DRC_ENA */ 52586ed3669SMark Brown #define WM9081_DRC_STARTUP_GAIN_MASK 0x07C0 /* DRC_STARTUP_GAIN - [10:6] */ 52686ed3669SMark Brown #define WM9081_DRC_STARTUP_GAIN_SHIFT 6 /* DRC_STARTUP_GAIN - [10:6] */ 52786ed3669SMark Brown #define WM9081_DRC_STARTUP_GAIN_WIDTH 5 /* DRC_STARTUP_GAIN - [10:6] */ 52886ed3669SMark Brown #define WM9081_DRC_FF_DLY 0x0020 /* DRC_FF_DLY */ 52986ed3669SMark Brown #define WM9081_DRC_FF_DLY_MASK 0x0020 /* DRC_FF_DLY */ 53086ed3669SMark Brown #define WM9081_DRC_FF_DLY_SHIFT 5 /* DRC_FF_DLY */ 53186ed3669SMark Brown #define WM9081_DRC_FF_DLY_WIDTH 1 /* DRC_FF_DLY */ 53286ed3669SMark Brown #define WM9081_DRC_QR 0x0004 /* DRC_QR */ 53386ed3669SMark Brown #define WM9081_DRC_QR_MASK 0x0004 /* DRC_QR */ 53486ed3669SMark Brown #define WM9081_DRC_QR_SHIFT 2 /* DRC_QR */ 53586ed3669SMark Brown #define WM9081_DRC_QR_WIDTH 1 /* DRC_QR */ 53686ed3669SMark Brown #define WM9081_DRC_ANTICLIP 0x0002 /* DRC_ANTICLIP */ 53786ed3669SMark Brown #define WM9081_DRC_ANTICLIP_MASK 0x0002 /* DRC_ANTICLIP */ 53886ed3669SMark Brown #define WM9081_DRC_ANTICLIP_SHIFT 1 /* DRC_ANTICLIP */ 53986ed3669SMark Brown #define WM9081_DRC_ANTICLIP_WIDTH 1 /* DRC_ANTICLIP */ 54086ed3669SMark Brown 54186ed3669SMark Brown /* 54286ed3669SMark Brown * R33 (0x21) - DRC 2 54386ed3669SMark Brown */ 54486ed3669SMark Brown #define WM9081_DRC_ATK_MASK 0xF000 /* DRC_ATK - [15:12] */ 54586ed3669SMark Brown #define WM9081_DRC_ATK_SHIFT 12 /* DRC_ATK - [15:12] */ 54686ed3669SMark Brown #define WM9081_DRC_ATK_WIDTH 4 /* DRC_ATK - [15:12] */ 54786ed3669SMark Brown #define WM9081_DRC_DCY_MASK 0x0F00 /* DRC_DCY - [11:8] */ 54886ed3669SMark Brown #define WM9081_DRC_DCY_SHIFT 8 /* DRC_DCY - [11:8] */ 54986ed3669SMark Brown #define WM9081_DRC_DCY_WIDTH 4 /* DRC_DCY - [11:8] */ 55086ed3669SMark Brown #define WM9081_DRC_QR_THR_MASK 0x00C0 /* DRC_QR_THR - [7:6] */ 55186ed3669SMark Brown #define WM9081_DRC_QR_THR_SHIFT 6 /* DRC_QR_THR - [7:6] */ 55286ed3669SMark Brown #define WM9081_DRC_QR_THR_WIDTH 2 /* DRC_QR_THR - [7:6] */ 55386ed3669SMark Brown #define WM9081_DRC_QR_DCY_MASK 0x0030 /* DRC_QR_DCY - [5:4] */ 55486ed3669SMark Brown #define WM9081_DRC_QR_DCY_SHIFT 4 /* DRC_QR_DCY - [5:4] */ 55586ed3669SMark Brown #define WM9081_DRC_QR_DCY_WIDTH 2 /* DRC_QR_DCY - [5:4] */ 55686ed3669SMark Brown #define WM9081_DRC_MINGAIN_MASK 0x000C /* DRC_MINGAIN - [3:2] */ 55786ed3669SMark Brown #define WM9081_DRC_MINGAIN_SHIFT 2 /* DRC_MINGAIN - [3:2] */ 55886ed3669SMark Brown #define WM9081_DRC_MINGAIN_WIDTH 2 /* DRC_MINGAIN - [3:2] */ 55986ed3669SMark Brown #define WM9081_DRC_MAXGAIN_MASK 0x0003 /* DRC_MAXGAIN - [1:0] */ 56086ed3669SMark Brown #define WM9081_DRC_MAXGAIN_SHIFT 0 /* DRC_MAXGAIN - [1:0] */ 56186ed3669SMark Brown #define WM9081_DRC_MAXGAIN_WIDTH 2 /* DRC_MAXGAIN - [1:0] */ 56286ed3669SMark Brown 56386ed3669SMark Brown /* 56486ed3669SMark Brown * R34 (0x22) - DRC 3 56586ed3669SMark Brown */ 56686ed3669SMark Brown #define WM9081_DRC_HI_COMP_MASK 0x0038 /* DRC_HI_COMP - [5:3] */ 56786ed3669SMark Brown #define WM9081_DRC_HI_COMP_SHIFT 3 /* DRC_HI_COMP - [5:3] */ 56886ed3669SMark Brown #define WM9081_DRC_HI_COMP_WIDTH 3 /* DRC_HI_COMP - [5:3] */ 56986ed3669SMark Brown #define WM9081_DRC_LO_COMP_MASK 0x0007 /* DRC_LO_COMP - [2:0] */ 57086ed3669SMark Brown #define WM9081_DRC_LO_COMP_SHIFT 0 /* DRC_LO_COMP - [2:0] */ 57186ed3669SMark Brown #define WM9081_DRC_LO_COMP_WIDTH 3 /* DRC_LO_COMP - [2:0] */ 57286ed3669SMark Brown 57386ed3669SMark Brown /* 57486ed3669SMark Brown * R35 (0x23) - DRC 4 57586ed3669SMark Brown */ 57686ed3669SMark Brown #define WM9081_DRC_KNEE_IP_MASK 0x07E0 /* DRC_KNEE_IP - [10:5] */ 57786ed3669SMark Brown #define WM9081_DRC_KNEE_IP_SHIFT 5 /* DRC_KNEE_IP - [10:5] */ 57886ed3669SMark Brown #define WM9081_DRC_KNEE_IP_WIDTH 6 /* DRC_KNEE_IP - [10:5] */ 57986ed3669SMark Brown #define WM9081_DRC_KNEE_OP_MASK 0x001F /* DRC_KNEE_OP - [4:0] */ 58086ed3669SMark Brown #define WM9081_DRC_KNEE_OP_SHIFT 0 /* DRC_KNEE_OP - [4:0] */ 58186ed3669SMark Brown #define WM9081_DRC_KNEE_OP_WIDTH 5 /* DRC_KNEE_OP - [4:0] */ 58286ed3669SMark Brown 58386ed3669SMark Brown /* 58486ed3669SMark Brown * R38 (0x26) - Write Sequencer 1 58586ed3669SMark Brown */ 58686ed3669SMark Brown #define WM9081_WSEQ_ENA 0x8000 /* WSEQ_ENA */ 58786ed3669SMark Brown #define WM9081_WSEQ_ENA_MASK 0x8000 /* WSEQ_ENA */ 58886ed3669SMark Brown #define WM9081_WSEQ_ENA_SHIFT 15 /* WSEQ_ENA */ 58986ed3669SMark Brown #define WM9081_WSEQ_ENA_WIDTH 1 /* WSEQ_ENA */ 59086ed3669SMark Brown #define WM9081_WSEQ_ABORT 0x0200 /* WSEQ_ABORT */ 59186ed3669SMark Brown #define WM9081_WSEQ_ABORT_MASK 0x0200 /* WSEQ_ABORT */ 59286ed3669SMark Brown #define WM9081_WSEQ_ABORT_SHIFT 9 /* WSEQ_ABORT */ 59386ed3669SMark Brown #define WM9081_WSEQ_ABORT_WIDTH 1 /* WSEQ_ABORT */ 59486ed3669SMark Brown #define WM9081_WSEQ_START 0x0100 /* WSEQ_START */ 59586ed3669SMark Brown #define WM9081_WSEQ_START_MASK 0x0100 /* WSEQ_START */ 59686ed3669SMark Brown #define WM9081_WSEQ_START_SHIFT 8 /* WSEQ_START */ 59786ed3669SMark Brown #define WM9081_WSEQ_START_WIDTH 1 /* WSEQ_START */ 59886ed3669SMark Brown #define WM9081_WSEQ_START_INDEX_MASK 0x007F /* WSEQ_START_INDEX - [6:0] */ 59986ed3669SMark Brown #define WM9081_WSEQ_START_INDEX_SHIFT 0 /* WSEQ_START_INDEX - [6:0] */ 60086ed3669SMark Brown #define WM9081_WSEQ_START_INDEX_WIDTH 7 /* WSEQ_START_INDEX - [6:0] */ 60186ed3669SMark Brown 60286ed3669SMark Brown /* 60386ed3669SMark Brown * R39 (0x27) - Write Sequencer 2 60486ed3669SMark Brown */ 60586ed3669SMark Brown #define WM9081_WSEQ_CURRENT_INDEX_MASK 0x07F0 /* WSEQ_CURRENT_INDEX - [10:4] */ 60686ed3669SMark Brown #define WM9081_WSEQ_CURRENT_INDEX_SHIFT 4 /* WSEQ_CURRENT_INDEX - [10:4] */ 60786ed3669SMark Brown #define WM9081_WSEQ_CURRENT_INDEX_WIDTH 7 /* WSEQ_CURRENT_INDEX - [10:4] */ 60886ed3669SMark Brown #define WM9081_WSEQ_BUSY 0x0001 /* WSEQ_BUSY */ 60986ed3669SMark Brown #define WM9081_WSEQ_BUSY_MASK 0x0001 /* WSEQ_BUSY */ 61086ed3669SMark Brown #define WM9081_WSEQ_BUSY_SHIFT 0 /* WSEQ_BUSY */ 61186ed3669SMark Brown #define WM9081_WSEQ_BUSY_WIDTH 1 /* WSEQ_BUSY */ 61286ed3669SMark Brown 61386ed3669SMark Brown /* 61486ed3669SMark Brown * R40 (0x28) - MW Slave 1 61586ed3669SMark Brown */ 61686ed3669SMark Brown #define WM9081_SPI_CFG 0x0020 /* SPI_CFG */ 61786ed3669SMark Brown #define WM9081_SPI_CFG_MASK 0x0020 /* SPI_CFG */ 61886ed3669SMark Brown #define WM9081_SPI_CFG_SHIFT 5 /* SPI_CFG */ 61986ed3669SMark Brown #define WM9081_SPI_CFG_WIDTH 1 /* SPI_CFG */ 62086ed3669SMark Brown #define WM9081_SPI_4WIRE 0x0010 /* SPI_4WIRE */ 62186ed3669SMark Brown #define WM9081_SPI_4WIRE_MASK 0x0010 /* SPI_4WIRE */ 62286ed3669SMark Brown #define WM9081_SPI_4WIRE_SHIFT 4 /* SPI_4WIRE */ 62386ed3669SMark Brown #define WM9081_SPI_4WIRE_WIDTH 1 /* SPI_4WIRE */ 62486ed3669SMark Brown #define WM9081_ARA_ENA 0x0008 /* ARA_ENA */ 62586ed3669SMark Brown #define WM9081_ARA_ENA_MASK 0x0008 /* ARA_ENA */ 62686ed3669SMark Brown #define WM9081_ARA_ENA_SHIFT 3 /* ARA_ENA */ 62786ed3669SMark Brown #define WM9081_ARA_ENA_WIDTH 1 /* ARA_ENA */ 62886ed3669SMark Brown #define WM9081_AUTO_INC 0x0002 /* AUTO_INC */ 62986ed3669SMark Brown #define WM9081_AUTO_INC_MASK 0x0002 /* AUTO_INC */ 63086ed3669SMark Brown #define WM9081_AUTO_INC_SHIFT 1 /* AUTO_INC */ 63186ed3669SMark Brown #define WM9081_AUTO_INC_WIDTH 1 /* AUTO_INC */ 63286ed3669SMark Brown 63386ed3669SMark Brown /* 63486ed3669SMark Brown * R42 (0x2A) - EQ 1 63586ed3669SMark Brown */ 63686ed3669SMark Brown #define WM9081_EQ_B1_GAIN_MASK 0xF800 /* EQ_B1_GAIN - [15:11] */ 63786ed3669SMark Brown #define WM9081_EQ_B1_GAIN_SHIFT 11 /* EQ_B1_GAIN - [15:11] */ 63886ed3669SMark Brown #define WM9081_EQ_B1_GAIN_WIDTH 5 /* EQ_B1_GAIN - [15:11] */ 63986ed3669SMark Brown #define WM9081_EQ_B2_GAIN_MASK 0x07C0 /* EQ_B2_GAIN - [10:6] */ 64086ed3669SMark Brown #define WM9081_EQ_B2_GAIN_SHIFT 6 /* EQ_B2_GAIN - [10:6] */ 64186ed3669SMark Brown #define WM9081_EQ_B2_GAIN_WIDTH 5 /* EQ_B2_GAIN - [10:6] */ 64286ed3669SMark Brown #define WM9081_EQ_B4_GAIN_MASK 0x003E /* EQ_B4_GAIN - [5:1] */ 64386ed3669SMark Brown #define WM9081_EQ_B4_GAIN_SHIFT 1 /* EQ_B4_GAIN - [5:1] */ 64486ed3669SMark Brown #define WM9081_EQ_B4_GAIN_WIDTH 5 /* EQ_B4_GAIN - [5:1] */ 64586ed3669SMark Brown #define WM9081_EQ_ENA 0x0001 /* EQ_ENA */ 64686ed3669SMark Brown #define WM9081_EQ_ENA_MASK 0x0001 /* EQ_ENA */ 64786ed3669SMark Brown #define WM9081_EQ_ENA_SHIFT 0 /* EQ_ENA */ 64886ed3669SMark Brown #define WM9081_EQ_ENA_WIDTH 1 /* EQ_ENA */ 64986ed3669SMark Brown 65086ed3669SMark Brown /* 65186ed3669SMark Brown * R43 (0x2B) - EQ 2 65286ed3669SMark Brown */ 65386ed3669SMark Brown #define WM9081_EQ_B3_GAIN_MASK 0xF800 /* EQ_B3_GAIN - [15:11] */ 65486ed3669SMark Brown #define WM9081_EQ_B3_GAIN_SHIFT 11 /* EQ_B3_GAIN - [15:11] */ 65586ed3669SMark Brown #define WM9081_EQ_B3_GAIN_WIDTH 5 /* EQ_B3_GAIN - [15:11] */ 65686ed3669SMark Brown #define WM9081_EQ_B5_GAIN_MASK 0x07C0 /* EQ_B5_GAIN - [10:6] */ 65786ed3669SMark Brown #define WM9081_EQ_B5_GAIN_SHIFT 6 /* EQ_B5_GAIN - [10:6] */ 65886ed3669SMark Brown #define WM9081_EQ_B5_GAIN_WIDTH 5 /* EQ_B5_GAIN - [10:6] */ 65986ed3669SMark Brown 66086ed3669SMark Brown /* 66186ed3669SMark Brown * R44 (0x2C) - EQ 3 66286ed3669SMark Brown */ 66386ed3669SMark Brown #define WM9081_EQ_B1_A_MASK 0xFFFF /* EQ_B1_A - [15:0] */ 66486ed3669SMark Brown #define WM9081_EQ_B1_A_SHIFT 0 /* EQ_B1_A - [15:0] */ 66586ed3669SMark Brown #define WM9081_EQ_B1_A_WIDTH 16 /* EQ_B1_A - [15:0] */ 66686ed3669SMark Brown 66786ed3669SMark Brown /* 66886ed3669SMark Brown * R45 (0x2D) - EQ 4 66986ed3669SMark Brown */ 67086ed3669SMark Brown #define WM9081_EQ_B1_B_MASK 0xFFFF /* EQ_B1_B - [15:0] */ 67186ed3669SMark Brown #define WM9081_EQ_B1_B_SHIFT 0 /* EQ_B1_B - [15:0] */ 67286ed3669SMark Brown #define WM9081_EQ_B1_B_WIDTH 16 /* EQ_B1_B - [15:0] */ 67386ed3669SMark Brown 67486ed3669SMark Brown /* 67586ed3669SMark Brown * R46 (0x2E) - EQ 5 67686ed3669SMark Brown */ 67786ed3669SMark Brown #define WM9081_EQ_B1_PG_MASK 0xFFFF /* EQ_B1_PG - [15:0] */ 67886ed3669SMark Brown #define WM9081_EQ_B1_PG_SHIFT 0 /* EQ_B1_PG - [15:0] */ 67986ed3669SMark Brown #define WM9081_EQ_B1_PG_WIDTH 16 /* EQ_B1_PG - [15:0] */ 68086ed3669SMark Brown 68186ed3669SMark Brown /* 68286ed3669SMark Brown * R47 (0x2F) - EQ 6 68386ed3669SMark Brown */ 68486ed3669SMark Brown #define WM9081_EQ_B2_A_MASK 0xFFFF /* EQ_B2_A - [15:0] */ 68586ed3669SMark Brown #define WM9081_EQ_B2_A_SHIFT 0 /* EQ_B2_A - [15:0] */ 68686ed3669SMark Brown #define WM9081_EQ_B2_A_WIDTH 16 /* EQ_B2_A - [15:0] */ 68786ed3669SMark Brown 68886ed3669SMark Brown /* 68986ed3669SMark Brown * R48 (0x30) - EQ 7 69086ed3669SMark Brown */ 69186ed3669SMark Brown #define WM9081_EQ_B2_B_MASK 0xFFFF /* EQ_B2_B - [15:0] */ 69286ed3669SMark Brown #define WM9081_EQ_B2_B_SHIFT 0 /* EQ_B2_B - [15:0] */ 69386ed3669SMark Brown #define WM9081_EQ_B2_B_WIDTH 16 /* EQ_B2_B - [15:0] */ 69486ed3669SMark Brown 69586ed3669SMark Brown /* 69686ed3669SMark Brown * R49 (0x31) - EQ 8 69786ed3669SMark Brown */ 69886ed3669SMark Brown #define WM9081_EQ_B2_C_MASK 0xFFFF /* EQ_B2_C - [15:0] */ 69986ed3669SMark Brown #define WM9081_EQ_B2_C_SHIFT 0 /* EQ_B2_C - [15:0] */ 70086ed3669SMark Brown #define WM9081_EQ_B2_C_WIDTH 16 /* EQ_B2_C - [15:0] */ 70186ed3669SMark Brown 70286ed3669SMark Brown /* 70386ed3669SMark Brown * R50 (0x32) - EQ 9 70486ed3669SMark Brown */ 70586ed3669SMark Brown #define WM9081_EQ_B2_PG_MASK 0xFFFF /* EQ_B2_PG - [15:0] */ 70686ed3669SMark Brown #define WM9081_EQ_B2_PG_SHIFT 0 /* EQ_B2_PG - [15:0] */ 70786ed3669SMark Brown #define WM9081_EQ_B2_PG_WIDTH 16 /* EQ_B2_PG - [15:0] */ 70886ed3669SMark Brown 70986ed3669SMark Brown /* 71086ed3669SMark Brown * R51 (0x33) - EQ 10 71186ed3669SMark Brown */ 71286ed3669SMark Brown #define WM9081_EQ_B4_A_MASK 0xFFFF /* EQ_B4_A - [15:0] */ 71386ed3669SMark Brown #define WM9081_EQ_B4_A_SHIFT 0 /* EQ_B4_A - [15:0] */ 71486ed3669SMark Brown #define WM9081_EQ_B4_A_WIDTH 16 /* EQ_B4_A - [15:0] */ 71586ed3669SMark Brown 71686ed3669SMark Brown /* 71786ed3669SMark Brown * R52 (0x34) - EQ 11 71886ed3669SMark Brown */ 71986ed3669SMark Brown #define WM9081_EQ_B4_B_MASK 0xFFFF /* EQ_B4_B - [15:0] */ 72086ed3669SMark Brown #define WM9081_EQ_B4_B_SHIFT 0 /* EQ_B4_B - [15:0] */ 72186ed3669SMark Brown #define WM9081_EQ_B4_B_WIDTH 16 /* EQ_B4_B - [15:0] */ 72286ed3669SMark Brown 72386ed3669SMark Brown /* 72486ed3669SMark Brown * R53 (0x35) - EQ 12 72586ed3669SMark Brown */ 72686ed3669SMark Brown #define WM9081_EQ_B4_C_MASK 0xFFFF /* EQ_B4_C - [15:0] */ 72786ed3669SMark Brown #define WM9081_EQ_B4_C_SHIFT 0 /* EQ_B4_C - [15:0] */ 72886ed3669SMark Brown #define WM9081_EQ_B4_C_WIDTH 16 /* EQ_B4_C - [15:0] */ 72986ed3669SMark Brown 73086ed3669SMark Brown /* 73186ed3669SMark Brown * R54 (0x36) - EQ 13 73286ed3669SMark Brown */ 73386ed3669SMark Brown #define WM9081_EQ_B4_PG_MASK 0xFFFF /* EQ_B4_PG - [15:0] */ 73486ed3669SMark Brown #define WM9081_EQ_B4_PG_SHIFT 0 /* EQ_B4_PG - [15:0] */ 73586ed3669SMark Brown #define WM9081_EQ_B4_PG_WIDTH 16 /* EQ_B4_PG - [15:0] */ 73686ed3669SMark Brown 73786ed3669SMark Brown /* 73886ed3669SMark Brown * R55 (0x37) - EQ 14 73986ed3669SMark Brown */ 74086ed3669SMark Brown #define WM9081_EQ_B3_A_MASK 0xFFFF /* EQ_B3_A - [15:0] */ 74186ed3669SMark Brown #define WM9081_EQ_B3_A_SHIFT 0 /* EQ_B3_A - [15:0] */ 74286ed3669SMark Brown #define WM9081_EQ_B3_A_WIDTH 16 /* EQ_B3_A - [15:0] */ 74386ed3669SMark Brown 74486ed3669SMark Brown /* 74586ed3669SMark Brown * R56 (0x38) - EQ 15 74686ed3669SMark Brown */ 74786ed3669SMark Brown #define WM9081_EQ_B3_B_MASK 0xFFFF /* EQ_B3_B - [15:0] */ 74886ed3669SMark Brown #define WM9081_EQ_B3_B_SHIFT 0 /* EQ_B3_B - [15:0] */ 74986ed3669SMark Brown #define WM9081_EQ_B3_B_WIDTH 16 /* EQ_B3_B - [15:0] */ 75086ed3669SMark Brown 75186ed3669SMark Brown /* 75286ed3669SMark Brown * R57 (0x39) - EQ 16 75386ed3669SMark Brown */ 75486ed3669SMark Brown #define WM9081_EQ_B3_C_MASK 0xFFFF /* EQ_B3_C - [15:0] */ 75586ed3669SMark Brown #define WM9081_EQ_B3_C_SHIFT 0 /* EQ_B3_C - [15:0] */ 75686ed3669SMark Brown #define WM9081_EQ_B3_C_WIDTH 16 /* EQ_B3_C - [15:0] */ 75786ed3669SMark Brown 75886ed3669SMark Brown /* 75986ed3669SMark Brown * R58 (0x3A) - EQ 17 76086ed3669SMark Brown */ 76186ed3669SMark Brown #define WM9081_EQ_B3_PG_MASK 0xFFFF /* EQ_B3_PG - [15:0] */ 76286ed3669SMark Brown #define WM9081_EQ_B3_PG_SHIFT 0 /* EQ_B3_PG - [15:0] */ 76386ed3669SMark Brown #define WM9081_EQ_B3_PG_WIDTH 16 /* EQ_B3_PG - [15:0] */ 76486ed3669SMark Brown 76586ed3669SMark Brown /* 76686ed3669SMark Brown * R59 (0x3B) - EQ 18 76786ed3669SMark Brown */ 76886ed3669SMark Brown #define WM9081_EQ_B5_A_MASK 0xFFFF /* EQ_B5_A - [15:0] */ 76986ed3669SMark Brown #define WM9081_EQ_B5_A_SHIFT 0 /* EQ_B5_A - [15:0] */ 77086ed3669SMark Brown #define WM9081_EQ_B5_A_WIDTH 16 /* EQ_B5_A - [15:0] */ 77186ed3669SMark Brown 77286ed3669SMark Brown /* 77386ed3669SMark Brown * R60 (0x3C) - EQ 19 77486ed3669SMark Brown */ 77586ed3669SMark Brown #define WM9081_EQ_B5_B_MASK 0xFFFF /* EQ_B5_B - [15:0] */ 77686ed3669SMark Brown #define WM9081_EQ_B5_B_SHIFT 0 /* EQ_B5_B - [15:0] */ 77786ed3669SMark Brown #define WM9081_EQ_B5_B_WIDTH 16 /* EQ_B5_B - [15:0] */ 77886ed3669SMark Brown 77986ed3669SMark Brown /* 78086ed3669SMark Brown * R61 (0x3D) - EQ 20 78186ed3669SMark Brown */ 78286ed3669SMark Brown #define WM9081_EQ_B5_PG_MASK 0xFFFF /* EQ_B5_PG - [15:0] */ 78386ed3669SMark Brown #define WM9081_EQ_B5_PG_SHIFT 0 /* EQ_B5_PG - [15:0] */ 78486ed3669SMark Brown #define WM9081_EQ_B5_PG_WIDTH 16 /* EQ_B5_PG - [15:0] */ 78586ed3669SMark Brown 78686ed3669SMark Brown 78786ed3669SMark Brown #endif 788