1a9ba6151SMark Brown /* 2a9ba6151SMark Brown * wm8996.c - WM8996 audio codec interface 3a9ba6151SMark Brown * 4a9ba6151SMark Brown * Copyright 2011 Wolfson Microelectronics PLC. 5a9ba6151SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 6a9ba6151SMark Brown * 7a9ba6151SMark Brown * This program is free software; you can redistribute it and/or modify it 8a9ba6151SMark Brown * under the terms of the GNU General Public License as published by the 9a9ba6151SMark Brown * Free Software Foundation; either version 2 of the License, or (at your 10a9ba6151SMark Brown * option) any later version. 11a9ba6151SMark Brown */ 12a9ba6151SMark Brown 13a9ba6151SMark Brown #include <linux/module.h> 14a9ba6151SMark Brown #include <linux/moduleparam.h> 15a9ba6151SMark Brown #include <linux/init.h> 16a9ba6151SMark Brown #include <linux/completion.h> 17a9ba6151SMark Brown #include <linux/delay.h> 18a9ba6151SMark Brown #include <linux/pm.h> 19a9ba6151SMark Brown #include <linux/gcd.h> 20a9ba6151SMark Brown #include <linux/gpio.h> 21a9ba6151SMark Brown #include <linux/i2c.h> 2279172746SMark Brown #include <linux/regmap.h> 23a9ba6151SMark Brown #include <linux/regulator/consumer.h> 24a9ba6151SMark Brown #include <linux/slab.h> 25a9ba6151SMark Brown #include <linux/workqueue.h> 26a9ba6151SMark Brown #include <sound/core.h> 27a9ba6151SMark Brown #include <sound/jack.h> 28a9ba6151SMark Brown #include <sound/pcm.h> 29a9ba6151SMark Brown #include <sound/pcm_params.h> 30a9ba6151SMark Brown #include <sound/soc.h> 31a9ba6151SMark Brown #include <sound/initval.h> 32a9ba6151SMark Brown #include <sound/tlv.h> 33a9ba6151SMark Brown #include <trace/events/asoc.h> 34a9ba6151SMark Brown 35a9ba6151SMark Brown #include <sound/wm8996.h> 36a9ba6151SMark Brown #include "wm8996.h" 37a9ba6151SMark Brown 38a9ba6151SMark Brown #define WM8996_AIFS 2 39a9ba6151SMark Brown 40a9ba6151SMark Brown #define HPOUT1L 1 41a9ba6151SMark Brown #define HPOUT1R 2 42a9ba6151SMark Brown #define HPOUT2L 4 43a9ba6151SMark Brown #define HPOUT2R 8 44a9ba6151SMark Brown 45c83495afSMark Brown #define WM8996_NUM_SUPPLIES 3 46a9ba6151SMark Brown static const char *wm8996_supply_names[WM8996_NUM_SUPPLIES] = { 47a9ba6151SMark Brown "DBVDD", 48a9ba6151SMark Brown "AVDD1", 49a9ba6151SMark Brown "AVDD2", 50a9ba6151SMark Brown }; 51a9ba6151SMark Brown 52a9ba6151SMark Brown struct wm8996_priv { 53b2d1e233SMark Brown struct device *dev; 54ee5f3872SMark Brown struct regmap *regmap; 55a9ba6151SMark Brown struct snd_soc_codec *codec; 56a9ba6151SMark Brown 57a9ba6151SMark Brown int ldo1ena; 58a9ba6151SMark Brown 59a9ba6151SMark Brown int sysclk; 60a9ba6151SMark Brown int sysclk_src; 61a9ba6151SMark Brown 62a9ba6151SMark Brown int fll_src; 63a9ba6151SMark Brown int fll_fref; 64a9ba6151SMark Brown int fll_fout; 65a9ba6151SMark Brown 66a9ba6151SMark Brown struct completion fll_lock; 67a9ba6151SMark Brown 68a9ba6151SMark Brown u16 dcs_pending; 69a9ba6151SMark Brown struct completion dcs_done; 70a9ba6151SMark Brown 71a9ba6151SMark Brown u16 hpout_ena; 72a9ba6151SMark Brown u16 hpout_pending; 73a9ba6151SMark Brown 74a9ba6151SMark Brown struct regulator_bulk_data supplies[WM8996_NUM_SUPPLIES]; 75a9ba6151SMark Brown struct notifier_block disable_nb[WM8996_NUM_SUPPLIES]; 76c83495afSMark Brown struct regulator *cpvdd; 77ded71dcbSMark Brown int bg_ena; 78a9ba6151SMark Brown 79a9ba6151SMark Brown struct wm8996_pdata pdata; 80a9ba6151SMark Brown 81a9ba6151SMark Brown int rx_rate[WM8996_AIFS]; 82a9ba6151SMark Brown int bclk_rate[WM8996_AIFS]; 83a9ba6151SMark Brown 84a9ba6151SMark Brown /* Platform dependant ReTune mobile configuration */ 85a9ba6151SMark Brown int num_retune_mobile_texts; 86a9ba6151SMark Brown const char **retune_mobile_texts; 87a9ba6151SMark Brown int retune_mobile_cfg[2]; 88a9ba6151SMark Brown struct soc_enum retune_mobile_enum; 89a9ba6151SMark Brown 90a9ba6151SMark Brown struct snd_soc_jack *jack; 91a9ba6151SMark Brown bool detecting; 92a9ba6151SMark Brown bool jack_mic; 93a9ba6151SMark Brown wm8996_polarity_fn polarity_cb; 94a9ba6151SMark Brown 95a9ba6151SMark Brown #ifdef CONFIG_GPIOLIB 96a9ba6151SMark Brown struct gpio_chip gpio_chip; 97a9ba6151SMark Brown #endif 98a9ba6151SMark Brown }; 99a9ba6151SMark Brown 100a9ba6151SMark Brown /* We can't use the same notifier block for more than one supply and 101a9ba6151SMark Brown * there's no way I can see to get from a callback to the caller 102a9ba6151SMark Brown * except container_of(). 103a9ba6151SMark Brown */ 104a9ba6151SMark Brown #define WM8996_REGULATOR_EVENT(n) \ 105a9ba6151SMark Brown static int wm8996_regulator_event_##n(struct notifier_block *nb, \ 106a9ba6151SMark Brown unsigned long event, void *data) \ 107a9ba6151SMark Brown { \ 108a9ba6151SMark Brown struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \ 109a9ba6151SMark Brown disable_nb[n]); \ 110a9ba6151SMark Brown if (event & REGULATOR_EVENT_DISABLE) { \ 111ee5f3872SMark Brown regcache_cache_only(wm8996->regmap, true); \ 112a9ba6151SMark Brown } \ 113a9ba6151SMark Brown return 0; \ 114a9ba6151SMark Brown } 115a9ba6151SMark Brown 116a9ba6151SMark Brown WM8996_REGULATOR_EVENT(0) 117a9ba6151SMark Brown WM8996_REGULATOR_EVENT(1) 118a9ba6151SMark Brown WM8996_REGULATOR_EVENT(2) 119a9ba6151SMark Brown 12079172746SMark Brown static struct reg_default wm8996_reg[] = { 12179172746SMark Brown { WM8996_SOFTWARE_RESET, 0x8996 }, 12279172746SMark Brown { WM8996_POWER_MANAGEMENT_1, 0x0 }, 12379172746SMark Brown { WM8996_POWER_MANAGEMENT_2, 0x0 }, 12479172746SMark Brown { WM8996_POWER_MANAGEMENT_3, 0x0 }, 12579172746SMark Brown { WM8996_POWER_MANAGEMENT_4, 0x0 }, 12679172746SMark Brown { WM8996_POWER_MANAGEMENT_5, 0x0 }, 12779172746SMark Brown { WM8996_POWER_MANAGEMENT_6, 0x0 }, 12879172746SMark Brown { WM8996_POWER_MANAGEMENT_7, 0x10 }, 12979172746SMark Brown { WM8996_POWER_MANAGEMENT_8, 0x0 }, 13079172746SMark Brown { WM8996_LEFT_LINE_INPUT_VOLUME, 0x0 }, 13179172746SMark Brown { WM8996_RIGHT_LINE_INPUT_VOLUME, 0x0 }, 13279172746SMark Brown { WM8996_LINE_INPUT_CONTROL, 0x0 }, 13379172746SMark Brown { WM8996_DAC1_HPOUT1_VOLUME, 0x88 }, 13479172746SMark Brown { WM8996_DAC2_HPOUT2_VOLUME, 0x88 }, 13579172746SMark Brown { WM8996_DAC1_LEFT_VOLUME, 0x2c0 }, 13679172746SMark Brown { WM8996_DAC1_RIGHT_VOLUME, 0x2c0 }, 13779172746SMark Brown { WM8996_DAC2_LEFT_VOLUME, 0x2c0 }, 13879172746SMark Brown { WM8996_DAC2_RIGHT_VOLUME, 0x2c0 }, 13979172746SMark Brown { WM8996_OUTPUT1_LEFT_VOLUME, 0x80 }, 14079172746SMark Brown { WM8996_OUTPUT1_RIGHT_VOLUME, 0x80 }, 14179172746SMark Brown { WM8996_OUTPUT2_LEFT_VOLUME, 0x80 }, 14279172746SMark Brown { WM8996_OUTPUT2_RIGHT_VOLUME, 0x80 }, 14379172746SMark Brown { WM8996_MICBIAS_1, 0x39 }, 14479172746SMark Brown { WM8996_MICBIAS_2, 0x39 }, 14579172746SMark Brown { WM8996_LDO_1, 0x3 }, 14679172746SMark Brown { WM8996_LDO_2, 0x13 }, 14779172746SMark Brown { WM8996_ACCESSORY_DETECT_MODE_1, 0x4 }, 14879172746SMark Brown { WM8996_ACCESSORY_DETECT_MODE_2, 0x0 }, 14979172746SMark Brown { WM8996_HEADPHONE_DETECT_1, 0x20 }, 15079172746SMark Brown { WM8996_HEADPHONE_DETECT_2, 0x0 }, 15179172746SMark Brown { WM8996_MIC_DETECT_1, 0x7600 }, 15279172746SMark Brown { WM8996_MIC_DETECT_2, 0xbf }, 15379172746SMark Brown { WM8996_CHARGE_PUMP_1, 0x1f25 }, 15479172746SMark Brown { WM8996_CHARGE_PUMP_2, 0xab19 }, 15579172746SMark Brown { WM8996_DC_SERVO_1, 0x0 }, 15679172746SMark Brown { WM8996_DC_SERVO_2, 0x0 }, 15779172746SMark Brown { WM8996_DC_SERVO_3, 0x0 }, 15879172746SMark Brown { WM8996_DC_SERVO_5, 0x2a2a }, 15979172746SMark Brown { WM8996_DC_SERVO_6, 0x0 }, 16079172746SMark Brown { WM8996_DC_SERVO_7, 0x0 }, 16179172746SMark Brown { WM8996_ANALOGUE_HP_1, 0x0 }, 16279172746SMark Brown { WM8996_ANALOGUE_HP_2, 0x0 }, 16379172746SMark Brown { WM8996_CONTROL_INTERFACE_1, 0x8004 }, 16479172746SMark Brown { WM8996_WRITE_SEQUENCER_CTRL_1, 0x0 }, 16579172746SMark Brown { WM8996_WRITE_SEQUENCER_CTRL_2, 0x0 }, 16679172746SMark Brown { WM8996_AIF_CLOCKING_1, 0x0 }, 16779172746SMark Brown { WM8996_AIF_CLOCKING_2, 0x0 }, 16879172746SMark Brown { WM8996_CLOCKING_1, 0x10 }, 16979172746SMark Brown { WM8996_CLOCKING_2, 0x0 }, 17079172746SMark Brown { WM8996_AIF_RATE, 0x83 }, 17179172746SMark Brown { WM8996_FLL_CONTROL_1, 0x0 }, 17279172746SMark Brown { WM8996_FLL_CONTROL_2, 0x0 }, 17379172746SMark Brown { WM8996_FLL_CONTROL_3, 0x0 }, 17479172746SMark Brown { WM8996_FLL_CONTROL_4, 0x5dc0 }, 17579172746SMark Brown { WM8996_FLL_CONTROL_5, 0xc84 }, 17679172746SMark Brown { WM8996_FLL_EFS_1, 0x0 }, 17779172746SMark Brown { WM8996_FLL_EFS_2, 0x2 }, 17879172746SMark Brown { WM8996_AIF1_CONTROL, 0x0 }, 17979172746SMark Brown { WM8996_AIF1_BCLK, 0x0 }, 18079172746SMark Brown { WM8996_AIF1_TX_LRCLK_1, 0x80 }, 18179172746SMark Brown { WM8996_AIF1_TX_LRCLK_2, 0x8 }, 18279172746SMark Brown { WM8996_AIF1_RX_LRCLK_1, 0x80 }, 18379172746SMark Brown { WM8996_AIF1_RX_LRCLK_2, 0x0 }, 18479172746SMark Brown { WM8996_AIF1TX_DATA_CONFIGURATION_1, 0x1818 }, 18579172746SMark Brown { WM8996_AIF1TX_DATA_CONFIGURATION_2, 0 }, 18679172746SMark Brown { WM8996_AIF1RX_DATA_CONFIGURATION, 0x1818 }, 18779172746SMark Brown { WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 0x0 }, 18879172746SMark Brown { WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 0x0 }, 18979172746SMark Brown { WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 0x0 }, 19079172746SMark Brown { WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 0x0 }, 19179172746SMark Brown { WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 0x0 }, 19279172746SMark Brown { WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 0x0 }, 19379172746SMark Brown { WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 0x0 }, 19479172746SMark Brown { WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 0x0 }, 19579172746SMark Brown { WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 0x0 }, 19679172746SMark Brown { WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 0x0 }, 19779172746SMark Brown { WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 0x0 }, 19879172746SMark Brown { WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 0x0 }, 19979172746SMark Brown { WM8996_AIF1RX_MONO_CONFIGURATION, 0x0 }, 20079172746SMark Brown { WM8996_AIF1TX_TEST, 0x7 }, 20179172746SMark Brown { WM8996_AIF2_CONTROL, 0x0 }, 20279172746SMark Brown { WM8996_AIF2_BCLK, 0x0 }, 20379172746SMark Brown { WM8996_AIF2_TX_LRCLK_1, 0x80 }, 20479172746SMark Brown { WM8996_AIF2_TX_LRCLK_2, 0x8 }, 20579172746SMark Brown { WM8996_AIF2_RX_LRCLK_1, 0x80 }, 20679172746SMark Brown { WM8996_AIF2_RX_LRCLK_2, 0x0 }, 20779172746SMark Brown { WM8996_AIF2TX_DATA_CONFIGURATION_1, 0x1818 }, 20879172746SMark Brown { WM8996_AIF2RX_DATA_CONFIGURATION, 0x1818 }, 20979172746SMark Brown { WM8996_AIF2RX_DATA_CONFIGURATION, 0x0 }, 21079172746SMark Brown { WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 0x0 }, 21179172746SMark Brown { WM8996_AIF2TX_CHANNEL_1_CONFIGURATION, 0x0 }, 21279172746SMark Brown { WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 0x0 }, 21379172746SMark Brown { WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 0x0 }, 21479172746SMark Brown { WM8996_AIF2RX_MONO_CONFIGURATION, 0x0 }, 21579172746SMark Brown { WM8996_AIF2TX_TEST, 0x1 }, 21679172746SMark Brown { WM8996_DSP1_TX_LEFT_VOLUME, 0xc0 }, 21779172746SMark Brown { WM8996_DSP1_TX_RIGHT_VOLUME, 0xc0 }, 21879172746SMark Brown { WM8996_DSP1_RX_LEFT_VOLUME, 0xc0 }, 21979172746SMark Brown { WM8996_DSP1_RX_RIGHT_VOLUME, 0xc0 }, 22079172746SMark Brown { WM8996_DSP1_TX_FILTERS, 0x2000 }, 22179172746SMark Brown { WM8996_DSP1_RX_FILTERS_1, 0x200 }, 22279172746SMark Brown { WM8996_DSP1_RX_FILTERS_2, 0x10 }, 22379172746SMark Brown { WM8996_DSP1_DRC_1, 0x98 }, 22479172746SMark Brown { WM8996_DSP1_DRC_2, 0x845 }, 22579172746SMark Brown { WM8996_DSP1_RX_EQ_GAINS_1, 0x6318 }, 22679172746SMark Brown { WM8996_DSP1_RX_EQ_GAINS_2, 0x6300 }, 22779172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_1_A, 0xfca }, 22879172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_1_B, 0x400 }, 22979172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_1_PG, 0xd8 }, 23079172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_A, 0x1eb5 }, 23179172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_B, 0xf145 }, 23279172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_C, 0xb75 }, 23379172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_PG, 0x1c5 }, 23479172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_A, 0x1c58 }, 23579172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_B, 0xf373 }, 23679172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_C, 0xa54 }, 23779172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_PG, 0x558 }, 23879172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_A, 0x168e }, 23979172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_B, 0xf829 }, 24079172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_C, 0x7ad }, 24179172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_PG, 0x1103 }, 24279172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_5_A, 0x564 }, 24379172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_5_B, 0x559 }, 24479172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_5_PG, 0x4000 }, 24579172746SMark Brown { WM8996_DSP2_TX_LEFT_VOLUME, 0xc0 }, 24679172746SMark Brown { WM8996_DSP2_TX_RIGHT_VOLUME, 0xc0 }, 24779172746SMark Brown { WM8996_DSP2_RX_LEFT_VOLUME, 0xc0 }, 24879172746SMark Brown { WM8996_DSP2_RX_RIGHT_VOLUME, 0xc0 }, 24979172746SMark Brown { WM8996_DSP2_TX_FILTERS, 0x2000 }, 25079172746SMark Brown { WM8996_DSP2_RX_FILTERS_1, 0x200 }, 25179172746SMark Brown { WM8996_DSP2_RX_FILTERS_2, 0x10 }, 25279172746SMark Brown { WM8996_DSP2_DRC_1, 0x98 }, 25379172746SMark Brown { WM8996_DSP2_DRC_2, 0x845 }, 25479172746SMark Brown { WM8996_DSP2_RX_EQ_GAINS_1, 0x6318 }, 25579172746SMark Brown { WM8996_DSP2_RX_EQ_GAINS_2, 0x6300 }, 25679172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_1_A, 0xfca }, 25779172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_1_B, 0x400 }, 25879172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_1_PG, 0xd8 }, 25979172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_A, 0x1eb5 }, 26079172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_B, 0xf145 }, 26179172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_C, 0xb75 }, 26279172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_PG, 0x1c5 }, 26379172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_A, 0x1c58 }, 26479172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_B, 0xf373 }, 26579172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_C, 0xa54 }, 26679172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_PG, 0x558 }, 26779172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_A, 0x168e }, 26879172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_B, 0xf829 }, 26979172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_C, 0x7ad }, 27079172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_PG, 0x1103 }, 27179172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_5_A, 0x564 }, 27279172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_5_B, 0x559 }, 27379172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_5_PG, 0x4000 }, 27479172746SMark Brown { WM8996_DAC1_MIXER_VOLUMES, 0x0 }, 27579172746SMark Brown { WM8996_DAC1_LEFT_MIXER_ROUTING, 0x0 }, 27679172746SMark Brown { WM8996_DAC1_RIGHT_MIXER_ROUTING, 0x0 }, 27779172746SMark Brown { WM8996_DAC2_MIXER_VOLUMES, 0x0 }, 27879172746SMark Brown { WM8996_DAC2_LEFT_MIXER_ROUTING, 0x0 }, 27979172746SMark Brown { WM8996_DAC2_RIGHT_MIXER_ROUTING, 0x0 }, 28079172746SMark Brown { WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 0x0 }, 28179172746SMark Brown { WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 0x0 }, 28279172746SMark Brown { WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 0x0 }, 28379172746SMark Brown { WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 0x0 }, 28479172746SMark Brown { WM8996_DSP_TX_MIXER_SELECT, 0x0 }, 28579172746SMark Brown { WM8996_DAC_SOFTMUTE, 0x0 }, 28679172746SMark Brown { WM8996_OVERSAMPLING, 0xd }, 28779172746SMark Brown { WM8996_SIDETONE, 0x1040 }, 28879172746SMark Brown { WM8996_GPIO_1, 0xa101 }, 28979172746SMark Brown { WM8996_GPIO_2, 0xa101 }, 29079172746SMark Brown { WM8996_GPIO_3, 0xa101 }, 29179172746SMark Brown { WM8996_GPIO_4, 0xa101 }, 29279172746SMark Brown { WM8996_GPIO_5, 0xa101 }, 29379172746SMark Brown { WM8996_PULL_CONTROL_1, 0x0 }, 29479172746SMark Brown { WM8996_PULL_CONTROL_2, 0x140 }, 29579172746SMark Brown { WM8996_INTERRUPT_STATUS_1_MASK, 0x1f }, 29679172746SMark Brown { WM8996_INTERRUPT_STATUS_2_MASK, 0x1ecf }, 29779172746SMark Brown { WM8996_LEFT_PDM_SPEAKER, 0x0 }, 29879172746SMark Brown { WM8996_RIGHT_PDM_SPEAKER, 0x1 }, 29979172746SMark Brown { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 }, 30079172746SMark Brown { WM8996_PDM_SPEAKER_VOLUME, 0x66 }, 30179172746SMark Brown { WM8996_WRITE_SEQUENCER_0, 0x1 }, 30279172746SMark Brown { WM8996_WRITE_SEQUENCER_1, 0x1 }, 30379172746SMark Brown { WM8996_WRITE_SEQUENCER_3, 0x6 }, 30479172746SMark Brown { WM8996_WRITE_SEQUENCER_4, 0x40 }, 30579172746SMark Brown { WM8996_WRITE_SEQUENCER_5, 0x1 }, 30679172746SMark Brown { WM8996_WRITE_SEQUENCER_6, 0xf }, 30779172746SMark Brown { WM8996_WRITE_SEQUENCER_7, 0x6 }, 30879172746SMark Brown { WM8996_WRITE_SEQUENCER_8, 0x1 }, 30979172746SMark Brown { WM8996_WRITE_SEQUENCER_9, 0x3 }, 31079172746SMark Brown { WM8996_WRITE_SEQUENCER_10, 0x104 }, 31179172746SMark Brown { WM8996_WRITE_SEQUENCER_12, 0x60 }, 31279172746SMark Brown { WM8996_WRITE_SEQUENCER_13, 0x11 }, 31379172746SMark Brown { WM8996_WRITE_SEQUENCER_14, 0x401 }, 31479172746SMark Brown { WM8996_WRITE_SEQUENCER_16, 0x50 }, 31579172746SMark Brown { WM8996_WRITE_SEQUENCER_17, 0x3 }, 31679172746SMark Brown { WM8996_WRITE_SEQUENCER_18, 0x100 }, 31779172746SMark Brown { WM8996_WRITE_SEQUENCER_20, 0x51 }, 31879172746SMark Brown { WM8996_WRITE_SEQUENCER_21, 0x3 }, 31979172746SMark Brown { WM8996_WRITE_SEQUENCER_22, 0x104 }, 32079172746SMark Brown { WM8996_WRITE_SEQUENCER_23, 0xa }, 32179172746SMark Brown { WM8996_WRITE_SEQUENCER_24, 0x60 }, 32279172746SMark Brown { WM8996_WRITE_SEQUENCER_25, 0x3b }, 32379172746SMark Brown { WM8996_WRITE_SEQUENCER_26, 0x502 }, 32479172746SMark Brown { WM8996_WRITE_SEQUENCER_27, 0x100 }, 32579172746SMark Brown { WM8996_WRITE_SEQUENCER_28, 0x2fff }, 32679172746SMark Brown { WM8996_WRITE_SEQUENCER_32, 0x2fff }, 32779172746SMark Brown { WM8996_WRITE_SEQUENCER_36, 0x2fff }, 32879172746SMark Brown { WM8996_WRITE_SEQUENCER_40, 0x2fff }, 32979172746SMark Brown { WM8996_WRITE_SEQUENCER_44, 0x2fff }, 33079172746SMark Brown { WM8996_WRITE_SEQUENCER_48, 0x2fff }, 33179172746SMark Brown { WM8996_WRITE_SEQUENCER_52, 0x2fff }, 33279172746SMark Brown { WM8996_WRITE_SEQUENCER_56, 0x2fff }, 33379172746SMark Brown { WM8996_WRITE_SEQUENCER_60, 0x2fff }, 33479172746SMark Brown { WM8996_WRITE_SEQUENCER_64, 0x1 }, 33579172746SMark Brown { WM8996_WRITE_SEQUENCER_65, 0x1 }, 33679172746SMark Brown { WM8996_WRITE_SEQUENCER_67, 0x6 }, 33779172746SMark Brown { WM8996_WRITE_SEQUENCER_68, 0x40 }, 33879172746SMark Brown { WM8996_WRITE_SEQUENCER_69, 0x1 }, 33979172746SMark Brown { WM8996_WRITE_SEQUENCER_70, 0xf }, 34079172746SMark Brown { WM8996_WRITE_SEQUENCER_71, 0x6 }, 34179172746SMark Brown { WM8996_WRITE_SEQUENCER_72, 0x1 }, 34279172746SMark Brown { WM8996_WRITE_SEQUENCER_73, 0x3 }, 34379172746SMark Brown { WM8996_WRITE_SEQUENCER_74, 0x104 }, 34479172746SMark Brown { WM8996_WRITE_SEQUENCER_76, 0x60 }, 34579172746SMark Brown { WM8996_WRITE_SEQUENCER_77, 0x11 }, 34679172746SMark Brown { WM8996_WRITE_SEQUENCER_78, 0x401 }, 34779172746SMark Brown { WM8996_WRITE_SEQUENCER_80, 0x50 }, 34879172746SMark Brown { WM8996_WRITE_SEQUENCER_81, 0x3 }, 34979172746SMark Brown { WM8996_WRITE_SEQUENCER_82, 0x100 }, 35079172746SMark Brown { WM8996_WRITE_SEQUENCER_84, 0x60 }, 35179172746SMark Brown { WM8996_WRITE_SEQUENCER_85, 0x3b }, 35279172746SMark Brown { WM8996_WRITE_SEQUENCER_86, 0x502 }, 35379172746SMark Brown { WM8996_WRITE_SEQUENCER_87, 0x100 }, 35479172746SMark Brown { WM8996_WRITE_SEQUENCER_88, 0x2fff }, 35579172746SMark Brown { WM8996_WRITE_SEQUENCER_92, 0x2fff }, 35679172746SMark Brown { WM8996_WRITE_SEQUENCER_96, 0x2fff }, 35779172746SMark Brown { WM8996_WRITE_SEQUENCER_100, 0x2fff }, 35879172746SMark Brown { WM8996_WRITE_SEQUENCER_104, 0x2fff }, 35979172746SMark Brown { WM8996_WRITE_SEQUENCER_108, 0x2fff }, 36079172746SMark Brown { WM8996_WRITE_SEQUENCER_112, 0x2fff }, 36179172746SMark Brown { WM8996_WRITE_SEQUENCER_116, 0x2fff }, 36279172746SMark Brown { WM8996_WRITE_SEQUENCER_120, 0x2fff }, 36379172746SMark Brown { WM8996_WRITE_SEQUENCER_124, 0x2fff }, 36479172746SMark Brown { WM8996_WRITE_SEQUENCER_128, 0x1 }, 36579172746SMark Brown { WM8996_WRITE_SEQUENCER_129, 0x1 }, 36679172746SMark Brown { WM8996_WRITE_SEQUENCER_131, 0x6 }, 36779172746SMark Brown { WM8996_WRITE_SEQUENCER_132, 0x40 }, 36879172746SMark Brown { WM8996_WRITE_SEQUENCER_133, 0x1 }, 36979172746SMark Brown { WM8996_WRITE_SEQUENCER_134, 0xf }, 37079172746SMark Brown { WM8996_WRITE_SEQUENCER_135, 0x6 }, 37179172746SMark Brown { WM8996_WRITE_SEQUENCER_136, 0x1 }, 37279172746SMark Brown { WM8996_WRITE_SEQUENCER_137, 0x3 }, 37379172746SMark Brown { WM8996_WRITE_SEQUENCER_138, 0x106 }, 37479172746SMark Brown { WM8996_WRITE_SEQUENCER_140, 0x61 }, 37579172746SMark Brown { WM8996_WRITE_SEQUENCER_141, 0x11 }, 37679172746SMark Brown { WM8996_WRITE_SEQUENCER_142, 0x401 }, 37779172746SMark Brown { WM8996_WRITE_SEQUENCER_144, 0x50 }, 37879172746SMark Brown { WM8996_WRITE_SEQUENCER_145, 0x3 }, 37979172746SMark Brown { WM8996_WRITE_SEQUENCER_146, 0x102 }, 38079172746SMark Brown { WM8996_WRITE_SEQUENCER_148, 0x51 }, 38179172746SMark Brown { WM8996_WRITE_SEQUENCER_149, 0x3 }, 38279172746SMark Brown { WM8996_WRITE_SEQUENCER_150, 0x106 }, 38379172746SMark Brown { WM8996_WRITE_SEQUENCER_151, 0xa }, 38479172746SMark Brown { WM8996_WRITE_SEQUENCER_152, 0x61 }, 38579172746SMark Brown { WM8996_WRITE_SEQUENCER_153, 0x3b }, 38679172746SMark Brown { WM8996_WRITE_SEQUENCER_154, 0x502 }, 38779172746SMark Brown { WM8996_WRITE_SEQUENCER_155, 0x100 }, 38879172746SMark Brown { WM8996_WRITE_SEQUENCER_156, 0x2fff }, 38979172746SMark Brown { WM8996_WRITE_SEQUENCER_160, 0x2fff }, 39079172746SMark Brown { WM8996_WRITE_SEQUENCER_164, 0x2fff }, 39179172746SMark Brown { WM8996_WRITE_SEQUENCER_168, 0x2fff }, 39279172746SMark Brown { WM8996_WRITE_SEQUENCER_172, 0x2fff }, 39379172746SMark Brown { WM8996_WRITE_SEQUENCER_176, 0x2fff }, 39479172746SMark Brown { WM8996_WRITE_SEQUENCER_180, 0x2fff }, 39579172746SMark Brown { WM8996_WRITE_SEQUENCER_184, 0x2fff }, 39679172746SMark Brown { WM8996_WRITE_SEQUENCER_188, 0x2fff }, 39779172746SMark Brown { WM8996_WRITE_SEQUENCER_192, 0x1 }, 39879172746SMark Brown { WM8996_WRITE_SEQUENCER_193, 0x1 }, 39979172746SMark Brown { WM8996_WRITE_SEQUENCER_195, 0x6 }, 40079172746SMark Brown { WM8996_WRITE_SEQUENCER_196, 0x40 }, 40179172746SMark Brown { WM8996_WRITE_SEQUENCER_197, 0x1 }, 40279172746SMark Brown { WM8996_WRITE_SEQUENCER_198, 0xf }, 40379172746SMark Brown { WM8996_WRITE_SEQUENCER_199, 0x6 }, 40479172746SMark Brown { WM8996_WRITE_SEQUENCER_200, 0x1 }, 40579172746SMark Brown { WM8996_WRITE_SEQUENCER_201, 0x3 }, 40679172746SMark Brown { WM8996_WRITE_SEQUENCER_202, 0x106 }, 40779172746SMark Brown { WM8996_WRITE_SEQUENCER_204, 0x61 }, 40879172746SMark Brown { WM8996_WRITE_SEQUENCER_205, 0x11 }, 40979172746SMark Brown { WM8996_WRITE_SEQUENCER_206, 0x401 }, 41079172746SMark Brown { WM8996_WRITE_SEQUENCER_208, 0x50 }, 41179172746SMark Brown { WM8996_WRITE_SEQUENCER_209, 0x3 }, 41279172746SMark Brown { WM8996_WRITE_SEQUENCER_210, 0x102 }, 41379172746SMark Brown { WM8996_WRITE_SEQUENCER_212, 0x61 }, 41479172746SMark Brown { WM8996_WRITE_SEQUENCER_213, 0x3b }, 41579172746SMark Brown { WM8996_WRITE_SEQUENCER_214, 0x502 }, 41679172746SMark Brown { WM8996_WRITE_SEQUENCER_215, 0x100 }, 41779172746SMark Brown { WM8996_WRITE_SEQUENCER_216, 0x2fff }, 41879172746SMark Brown { WM8996_WRITE_SEQUENCER_220, 0x2fff }, 41979172746SMark Brown { WM8996_WRITE_SEQUENCER_224, 0x2fff }, 42079172746SMark Brown { WM8996_WRITE_SEQUENCER_228, 0x2fff }, 42179172746SMark Brown { WM8996_WRITE_SEQUENCER_232, 0x2fff }, 42279172746SMark Brown { WM8996_WRITE_SEQUENCER_236, 0x2fff }, 42379172746SMark Brown { WM8996_WRITE_SEQUENCER_240, 0x2fff }, 42479172746SMark Brown { WM8996_WRITE_SEQUENCER_244, 0x2fff }, 42579172746SMark Brown { WM8996_WRITE_SEQUENCER_248, 0x2fff }, 42679172746SMark Brown { WM8996_WRITE_SEQUENCER_252, 0x2fff }, 42779172746SMark Brown { WM8996_WRITE_SEQUENCER_256, 0x60 }, 42879172746SMark Brown { WM8996_WRITE_SEQUENCER_258, 0x601 }, 42979172746SMark Brown { WM8996_WRITE_SEQUENCER_260, 0x50 }, 43079172746SMark Brown { WM8996_WRITE_SEQUENCER_262, 0x100 }, 43179172746SMark Brown { WM8996_WRITE_SEQUENCER_264, 0x1 }, 43279172746SMark Brown { WM8996_WRITE_SEQUENCER_266, 0x104 }, 43379172746SMark Brown { WM8996_WRITE_SEQUENCER_267, 0x100 }, 43479172746SMark Brown { WM8996_WRITE_SEQUENCER_268, 0x2fff }, 43579172746SMark Brown { WM8996_WRITE_SEQUENCER_272, 0x2fff }, 43679172746SMark Brown { WM8996_WRITE_SEQUENCER_276, 0x2fff }, 43779172746SMark Brown { WM8996_WRITE_SEQUENCER_280, 0x2fff }, 43879172746SMark Brown { WM8996_WRITE_SEQUENCER_284, 0x2fff }, 43979172746SMark Brown { WM8996_WRITE_SEQUENCER_288, 0x2fff }, 44079172746SMark Brown { WM8996_WRITE_SEQUENCER_292, 0x2fff }, 44179172746SMark Brown { WM8996_WRITE_SEQUENCER_296, 0x2fff }, 44279172746SMark Brown { WM8996_WRITE_SEQUENCER_300, 0x2fff }, 44379172746SMark Brown { WM8996_WRITE_SEQUENCER_304, 0x2fff }, 44479172746SMark Brown { WM8996_WRITE_SEQUENCER_308, 0x2fff }, 44579172746SMark Brown { WM8996_WRITE_SEQUENCER_312, 0x2fff }, 44679172746SMark Brown { WM8996_WRITE_SEQUENCER_316, 0x2fff }, 44779172746SMark Brown { WM8996_WRITE_SEQUENCER_320, 0x61 }, 44879172746SMark Brown { WM8996_WRITE_SEQUENCER_322, 0x601 }, 44979172746SMark Brown { WM8996_WRITE_SEQUENCER_324, 0x50 }, 45079172746SMark Brown { WM8996_WRITE_SEQUENCER_326, 0x102 }, 45179172746SMark Brown { WM8996_WRITE_SEQUENCER_328, 0x1 }, 45279172746SMark Brown { WM8996_WRITE_SEQUENCER_330, 0x106 }, 45379172746SMark Brown { WM8996_WRITE_SEQUENCER_331, 0x100 }, 45479172746SMark Brown { WM8996_WRITE_SEQUENCER_332, 0x2fff }, 45579172746SMark Brown { WM8996_WRITE_SEQUENCER_336, 0x2fff }, 45679172746SMark Brown { WM8996_WRITE_SEQUENCER_340, 0x2fff }, 45779172746SMark Brown { WM8996_WRITE_SEQUENCER_344, 0x2fff }, 45879172746SMark Brown { WM8996_WRITE_SEQUENCER_348, 0x2fff }, 45979172746SMark Brown { WM8996_WRITE_SEQUENCER_352, 0x2fff }, 46079172746SMark Brown { WM8996_WRITE_SEQUENCER_356, 0x2fff }, 46179172746SMark Brown { WM8996_WRITE_SEQUENCER_360, 0x2fff }, 46279172746SMark Brown { WM8996_WRITE_SEQUENCER_364, 0x2fff }, 46379172746SMark Brown { WM8996_WRITE_SEQUENCER_368, 0x2fff }, 46479172746SMark Brown { WM8996_WRITE_SEQUENCER_372, 0x2fff }, 46579172746SMark Brown { WM8996_WRITE_SEQUENCER_376, 0x2fff }, 46679172746SMark Brown { WM8996_WRITE_SEQUENCER_380, 0x2fff }, 46779172746SMark Brown { WM8996_WRITE_SEQUENCER_384, 0x60 }, 46879172746SMark Brown { WM8996_WRITE_SEQUENCER_386, 0x601 }, 46979172746SMark Brown { WM8996_WRITE_SEQUENCER_388, 0x61 }, 47079172746SMark Brown { WM8996_WRITE_SEQUENCER_390, 0x601 }, 47179172746SMark Brown { WM8996_WRITE_SEQUENCER_392, 0x50 }, 47279172746SMark Brown { WM8996_WRITE_SEQUENCER_394, 0x300 }, 47379172746SMark Brown { WM8996_WRITE_SEQUENCER_396, 0x1 }, 47479172746SMark Brown { WM8996_WRITE_SEQUENCER_398, 0x304 }, 47579172746SMark Brown { WM8996_WRITE_SEQUENCER_400, 0x40 }, 47679172746SMark Brown { WM8996_WRITE_SEQUENCER_402, 0xf }, 47779172746SMark Brown { WM8996_WRITE_SEQUENCER_404, 0x1 }, 47879172746SMark Brown { WM8996_WRITE_SEQUENCER_407, 0x100 }, 479a9ba6151SMark Brown }; 480a9ba6151SMark Brown 481a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0); 482a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 150, 0); 483a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 484a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(out_digital_tlv, -1200, 150, 0); 485a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -900, 75, 0); 486a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(spk_tlv, -900, 150, 0); 487a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 48818a4eef3Ssusan gao static const DECLARE_TLV_DB_SCALE(threedstereo_tlv, -1600, 183, 1); 489a9ba6151SMark Brown 490a9ba6151SMark Brown static const char *sidetone_hpf_text[] = { 491a9ba6151SMark Brown "2.9kHz", "1.5kHz", "735Hz", "403Hz", "196Hz", "98Hz", "49Hz" 492a9ba6151SMark Brown }; 493a9ba6151SMark Brown 494a9ba6151SMark Brown static const struct soc_enum sidetone_hpf = 49518036b58SMark Brown SOC_ENUM_SINGLE(WM8996_SIDETONE, 7, 7, sidetone_hpf_text); 496a9ba6151SMark Brown 497a9ba6151SMark Brown static const char *hpf_mode_text[] = { 498a9ba6151SMark Brown "HiFi", "Custom", "Voice" 499a9ba6151SMark Brown }; 500a9ba6151SMark Brown 501a9ba6151SMark Brown static const struct soc_enum dsp1tx_hpf_mode = 502a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_DSP1_TX_FILTERS, 3, 3, hpf_mode_text); 503a9ba6151SMark Brown 504a9ba6151SMark Brown static const struct soc_enum dsp2tx_hpf_mode = 505a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_DSP2_TX_FILTERS, 3, 3, hpf_mode_text); 506a9ba6151SMark Brown 507a9ba6151SMark Brown static const char *hpf_cutoff_text[] = { 508a9ba6151SMark Brown "50Hz", "75Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 509a9ba6151SMark Brown }; 510a9ba6151SMark Brown 511a9ba6151SMark Brown static const struct soc_enum dsp1tx_hpf_cutoff = 512a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_DSP1_TX_FILTERS, 0, 7, hpf_cutoff_text); 513a9ba6151SMark Brown 514a9ba6151SMark Brown static const struct soc_enum dsp2tx_hpf_cutoff = 515a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_DSP2_TX_FILTERS, 0, 7, hpf_cutoff_text); 516a9ba6151SMark Brown 517a9ba6151SMark Brown static void wm8996_set_retune_mobile(struct snd_soc_codec *codec, int block) 518a9ba6151SMark Brown { 519a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 520a9ba6151SMark Brown struct wm8996_pdata *pdata = &wm8996->pdata; 521a9ba6151SMark Brown int base, best, best_val, save, i, cfg, iface; 522a9ba6151SMark Brown 523a9ba6151SMark Brown if (!wm8996->num_retune_mobile_texts) 524a9ba6151SMark Brown return; 525a9ba6151SMark Brown 526a9ba6151SMark Brown switch (block) { 527a9ba6151SMark Brown case 0: 528a9ba6151SMark Brown base = WM8996_DSP1_RX_EQ_GAINS_1; 529a9ba6151SMark Brown if (snd_soc_read(codec, WM8996_POWER_MANAGEMENT_8) & 530a9ba6151SMark Brown WM8996_DSP1RX_SRC) 531a9ba6151SMark Brown iface = 1; 532a9ba6151SMark Brown else 533a9ba6151SMark Brown iface = 0; 534a9ba6151SMark Brown break; 535a9ba6151SMark Brown case 1: 536a9ba6151SMark Brown base = WM8996_DSP1_RX_EQ_GAINS_2; 537a9ba6151SMark Brown if (snd_soc_read(codec, WM8996_POWER_MANAGEMENT_8) & 538a9ba6151SMark Brown WM8996_DSP2RX_SRC) 539a9ba6151SMark Brown iface = 1; 540a9ba6151SMark Brown else 541a9ba6151SMark Brown iface = 0; 542a9ba6151SMark Brown break; 543a9ba6151SMark Brown default: 544a9ba6151SMark Brown return; 545a9ba6151SMark Brown } 546a9ba6151SMark Brown 547a9ba6151SMark Brown /* Find the version of the currently selected configuration 548a9ba6151SMark Brown * with the nearest sample rate. */ 549a9ba6151SMark Brown cfg = wm8996->retune_mobile_cfg[block]; 550a9ba6151SMark Brown best = 0; 551a9ba6151SMark Brown best_val = INT_MAX; 552a9ba6151SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 553a9ba6151SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 554a9ba6151SMark Brown wm8996->retune_mobile_texts[cfg]) == 0 && 555a9ba6151SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 556a9ba6151SMark Brown - wm8996->rx_rate[iface]) < best_val) { 557a9ba6151SMark Brown best = i; 558a9ba6151SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 559a9ba6151SMark Brown - wm8996->rx_rate[iface]); 560a9ba6151SMark Brown } 561a9ba6151SMark Brown } 562a9ba6151SMark Brown 563a9ba6151SMark Brown dev_dbg(codec->dev, "ReTune Mobile %d %s/%dHz for %dHz sample rate\n", 564a9ba6151SMark Brown block, 565a9ba6151SMark Brown pdata->retune_mobile_cfgs[best].name, 566a9ba6151SMark Brown pdata->retune_mobile_cfgs[best].rate, 567a9ba6151SMark Brown wm8996->rx_rate[iface]); 568a9ba6151SMark Brown 569a9ba6151SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 570a9ba6151SMark Brown * current configuration. 571a9ba6151SMark Brown */ 572a9ba6151SMark Brown save = snd_soc_read(codec, base); 573a9ba6151SMark Brown save &= WM8996_DSP1RX_EQ_ENA; 574a9ba6151SMark Brown 575a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(pdata->retune_mobile_cfgs[best].regs); i++) 576a9ba6151SMark Brown snd_soc_update_bits(codec, base + i, 0xffff, 577a9ba6151SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 578a9ba6151SMark Brown 579a9ba6151SMark Brown snd_soc_update_bits(codec, base, WM8996_DSP1RX_EQ_ENA, save); 580a9ba6151SMark Brown } 581a9ba6151SMark Brown 582a9ba6151SMark Brown /* Icky as hell but saves code duplication */ 583a9ba6151SMark Brown static int wm8996_get_retune_mobile_block(const char *name) 584a9ba6151SMark Brown { 585a9ba6151SMark Brown if (strcmp(name, "DSP1 EQ Mode") == 0) 586a9ba6151SMark Brown return 0; 587a9ba6151SMark Brown if (strcmp(name, "DSP2 EQ Mode") == 0) 588a9ba6151SMark Brown return 1; 589a9ba6151SMark Brown return -EINVAL; 590a9ba6151SMark Brown } 591a9ba6151SMark Brown 592a9ba6151SMark Brown static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 593a9ba6151SMark Brown struct snd_ctl_elem_value *ucontrol) 594a9ba6151SMark Brown { 595a9ba6151SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 596a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 597a9ba6151SMark Brown struct wm8996_pdata *pdata = &wm8996->pdata; 598a9ba6151SMark Brown int block = wm8996_get_retune_mobile_block(kcontrol->id.name); 599a9ba6151SMark Brown int value = ucontrol->value.integer.value[0]; 600a9ba6151SMark Brown 601a9ba6151SMark Brown if (block < 0) 602a9ba6151SMark Brown return block; 603a9ba6151SMark Brown 604a9ba6151SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 605a9ba6151SMark Brown return -EINVAL; 606a9ba6151SMark Brown 607a9ba6151SMark Brown wm8996->retune_mobile_cfg[block] = value; 608a9ba6151SMark Brown 609a9ba6151SMark Brown wm8996_set_retune_mobile(codec, block); 610a9ba6151SMark Brown 611a9ba6151SMark Brown return 0; 612a9ba6151SMark Brown } 613a9ba6151SMark Brown 614a9ba6151SMark Brown static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 615a9ba6151SMark Brown struct snd_ctl_elem_value *ucontrol) 616a9ba6151SMark Brown { 617a9ba6151SMark Brown struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol); 618a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 619a9ba6151SMark Brown int block = wm8996_get_retune_mobile_block(kcontrol->id.name); 620a9ba6151SMark Brown 621a9ba6151SMark Brown ucontrol->value.enumerated.item[0] = wm8996->retune_mobile_cfg[block]; 622a9ba6151SMark Brown 623a9ba6151SMark Brown return 0; 624a9ba6151SMark Brown } 625a9ba6151SMark Brown 626a9ba6151SMark Brown static const struct snd_kcontrol_new wm8996_snd_controls[] = { 627a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Capture Volume", WM8996_LEFT_LINE_INPUT_VOLUME, 628a9ba6151SMark Brown WM8996_RIGHT_LINE_INPUT_VOLUME, 0, 31, 0, inpga_tlv), 629a9ba6151SMark Brown SOC_DOUBLE_R("Capture ZC Switch", WM8996_LEFT_LINE_INPUT_VOLUME, 630a9ba6151SMark Brown WM8996_RIGHT_LINE_INPUT_VOLUME, 5, 1, 0), 631a9ba6151SMark Brown 632a9ba6151SMark Brown SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8996_DAC1_MIXER_VOLUMES, 633a9ba6151SMark Brown 0, 5, 24, 0, sidetone_tlv), 634a9ba6151SMark Brown SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8996_DAC2_MIXER_VOLUMES, 635a9ba6151SMark Brown 0, 5, 24, 0, sidetone_tlv), 636a9ba6151SMark Brown SOC_SINGLE("Sidetone LPF Switch", WM8996_SIDETONE, 12, 1, 0), 637a9ba6151SMark Brown SOC_ENUM("Sidetone HPF Cut-off", sidetone_hpf), 638a9ba6151SMark Brown SOC_SINGLE("Sidetone HPF Switch", WM8996_SIDETONE, 6, 1, 0), 639a9ba6151SMark Brown 640a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP1 Capture Volume", WM8996_DSP1_TX_LEFT_VOLUME, 641a9ba6151SMark Brown WM8996_DSP1_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv), 642a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP2 Capture Volume", WM8996_DSP2_TX_LEFT_VOLUME, 643a9ba6151SMark Brown WM8996_DSP2_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv), 644a9ba6151SMark Brown 645a9ba6151SMark Brown SOC_SINGLE("DSP1 Capture Notch Filter Switch", WM8996_DSP1_TX_FILTERS, 646a9ba6151SMark Brown 13, 1, 0), 647a9ba6151SMark Brown SOC_DOUBLE("DSP1 Capture HPF Switch", WM8996_DSP1_TX_FILTERS, 12, 11, 1, 0), 648a9ba6151SMark Brown SOC_ENUM("DSP1 Capture HPF Mode", dsp1tx_hpf_mode), 649a9ba6151SMark Brown SOC_ENUM("DSP1 Capture HPF Cutoff", dsp1tx_hpf_cutoff), 650a9ba6151SMark Brown 651a9ba6151SMark Brown SOC_SINGLE("DSP2 Capture Notch Filter Switch", WM8996_DSP2_TX_FILTERS, 652a9ba6151SMark Brown 13, 1, 0), 653a9ba6151SMark Brown SOC_DOUBLE("DSP2 Capture HPF Switch", WM8996_DSP2_TX_FILTERS, 12, 11, 1, 0), 654a9ba6151SMark Brown SOC_ENUM("DSP2 Capture HPF Mode", dsp2tx_hpf_mode), 655a9ba6151SMark Brown SOC_ENUM("DSP2 Capture HPF Cutoff", dsp2tx_hpf_cutoff), 656a9ba6151SMark Brown 657a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP1 Playback Volume", WM8996_DSP1_RX_LEFT_VOLUME, 658a9ba6151SMark Brown WM8996_DSP1_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 659a9ba6151SMark Brown SOC_SINGLE("DSP1 Playback Switch", WM8996_DSP1_RX_FILTERS_1, 9, 1, 1), 660a9ba6151SMark Brown 661a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP2 Playback Volume", WM8996_DSP2_RX_LEFT_VOLUME, 662a9ba6151SMark Brown WM8996_DSP2_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 663a9ba6151SMark Brown SOC_SINGLE("DSP2 Playback Switch", WM8996_DSP2_RX_FILTERS_1, 9, 1, 1), 664a9ba6151SMark Brown 665a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DAC1 Volume", WM8996_DAC1_LEFT_VOLUME, 666a9ba6151SMark Brown WM8996_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 667a9ba6151SMark Brown SOC_DOUBLE_R("DAC1 Switch", WM8996_DAC1_LEFT_VOLUME, 668a9ba6151SMark Brown WM8996_DAC1_RIGHT_VOLUME, 9, 1, 1), 669a9ba6151SMark Brown 670a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DAC2 Volume", WM8996_DAC2_LEFT_VOLUME, 671a9ba6151SMark Brown WM8996_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 672a9ba6151SMark Brown SOC_DOUBLE_R("DAC2 Switch", WM8996_DAC2_LEFT_VOLUME, 673a9ba6151SMark Brown WM8996_DAC2_RIGHT_VOLUME, 9, 1, 1), 674a9ba6151SMark Brown 675a9ba6151SMark Brown SOC_SINGLE("Speaker High Performance Switch", WM8996_OVERSAMPLING, 3, 1, 0), 676a9ba6151SMark Brown SOC_SINGLE("DMIC High Performance Switch", WM8996_OVERSAMPLING, 2, 1, 0), 677a9ba6151SMark Brown SOC_SINGLE("ADC High Performance Switch", WM8996_OVERSAMPLING, 1, 1, 0), 678a9ba6151SMark Brown SOC_SINGLE("DAC High Performance Switch", WM8996_OVERSAMPLING, 0, 1, 0), 679a9ba6151SMark Brown 680a9ba6151SMark Brown SOC_SINGLE("DAC Soft Mute Switch", WM8996_DAC_SOFTMUTE, 1, 1, 0), 681a9ba6151SMark Brown SOC_SINGLE("DAC Slow Soft Mute Switch", WM8996_DAC_SOFTMUTE, 0, 1, 0), 682a9ba6151SMark Brown 68318a4eef3Ssusan gao SOC_SINGLE("DSP1 3D Stereo Switch", WM8996_DSP1_RX_FILTERS_2, 8, 1, 0), 68418a4eef3Ssusan gao SOC_SINGLE("DSP2 3D Stereo Switch", WM8996_DSP2_RX_FILTERS_2, 8, 1, 0), 68518a4eef3Ssusan gao 68618a4eef3Ssusan gao SOC_SINGLE_TLV("DSP1 3D Stereo Volume", WM8996_DSP1_RX_FILTERS_2, 10, 15, 68718a4eef3Ssusan gao 0, threedstereo_tlv), 68818a4eef3Ssusan gao SOC_SINGLE_TLV("DSP2 3D Stereo Volume", WM8996_DSP2_RX_FILTERS_2, 10, 15, 68918a4eef3Ssusan gao 0, threedstereo_tlv), 69018a4eef3Ssusan gao 691a9ba6151SMark Brown SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8996_DAC1_HPOUT1_VOLUME, 0, 4, 692a9ba6151SMark Brown 8, 0, out_digital_tlv), 693a9ba6151SMark Brown SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8996_DAC2_HPOUT2_VOLUME, 0, 4, 694a9ba6151SMark Brown 8, 0, out_digital_tlv), 695a9ba6151SMark Brown 696a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Output 1 Volume", WM8996_OUTPUT1_LEFT_VOLUME, 697a9ba6151SMark Brown WM8996_OUTPUT1_RIGHT_VOLUME, 0, 12, 0, out_tlv), 698a9ba6151SMark Brown SOC_DOUBLE_R("Output 1 ZC Switch", WM8996_OUTPUT1_LEFT_VOLUME, 699a9ba6151SMark Brown WM8996_OUTPUT1_RIGHT_VOLUME, 7, 1, 0), 700a9ba6151SMark Brown 701a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Output 2 Volume", WM8996_OUTPUT2_LEFT_VOLUME, 702a9ba6151SMark Brown WM8996_OUTPUT2_RIGHT_VOLUME, 0, 12, 0, out_tlv), 703a9ba6151SMark Brown SOC_DOUBLE_R("Output 2 ZC Switch", WM8996_OUTPUT2_LEFT_VOLUME, 704a9ba6151SMark Brown WM8996_OUTPUT2_RIGHT_VOLUME, 7, 1, 0), 705a9ba6151SMark Brown 706a9ba6151SMark Brown SOC_DOUBLE_TLV("Speaker Volume", WM8996_PDM_SPEAKER_VOLUME, 0, 4, 8, 0, 707a9ba6151SMark Brown spk_tlv), 708a9ba6151SMark Brown SOC_DOUBLE_R("Speaker Switch", WM8996_LEFT_PDM_SPEAKER, 709a9ba6151SMark Brown WM8996_RIGHT_PDM_SPEAKER, 3, 1, 1), 710a9ba6151SMark Brown SOC_DOUBLE_R("Speaker ZC Switch", WM8996_LEFT_PDM_SPEAKER, 711a9ba6151SMark Brown WM8996_RIGHT_PDM_SPEAKER, 2, 1, 0), 712a9ba6151SMark Brown 713a9ba6151SMark Brown SOC_SINGLE("DSP1 EQ Switch", WM8996_DSP1_RX_EQ_GAINS_1, 0, 1, 0), 714a9ba6151SMark Brown SOC_SINGLE("DSP2 EQ Switch", WM8996_DSP2_RX_EQ_GAINS_1, 0, 1, 0), 715bcec267aSKarl Tsou 716bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC TXL Switch", WM8996_DSP1_DRC_1, 0, 1, 0), 717bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC TXR Switch", WM8996_DSP1_DRC_1, 1, 1, 0), 718bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC RX Switch", WM8996_DSP1_DRC_1, 2, 1, 0), 719bcec267aSKarl Tsou 720bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC TXL Switch", WM8996_DSP2_DRC_1, 0, 1, 0), 721bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC TXR Switch", WM8996_DSP2_DRC_1, 1, 1, 0), 722bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC RX Switch", WM8996_DSP2_DRC_1, 2, 1, 0), 723a9ba6151SMark Brown }; 724a9ba6151SMark Brown 725a9ba6151SMark Brown static const struct snd_kcontrol_new wm8996_eq_controls[] = { 726a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 11, 31, 0, 727a9ba6151SMark Brown eq_tlv), 728a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B2 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 6, 31, 0, 729a9ba6151SMark Brown eq_tlv), 730a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B3 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 1, 31, 0, 731a9ba6151SMark Brown eq_tlv), 732a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B4 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 11, 31, 0, 733a9ba6151SMark Brown eq_tlv), 734a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B5 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 6, 31, 0, 735a9ba6151SMark Brown eq_tlv), 736a9ba6151SMark Brown 737a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 11, 31, 0, 738a9ba6151SMark Brown eq_tlv), 739a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B2 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 6, 31, 0, 740a9ba6151SMark Brown eq_tlv), 741a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B3 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 1, 31, 0, 742a9ba6151SMark Brown eq_tlv), 743a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B4 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 11, 31, 0, 744a9ba6151SMark Brown eq_tlv), 745a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 6, 31, 0, 746a9ba6151SMark Brown eq_tlv), 747a9ba6151SMark Brown }; 748a9ba6151SMark Brown 749ded71dcbSMark Brown static void wm8996_bg_enable(struct snd_soc_codec *codec) 750ded71dcbSMark Brown { 751ded71dcbSMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 752ded71dcbSMark Brown 753ded71dcbSMark Brown wm8996->bg_ena++; 754ded71dcbSMark Brown if (wm8996->bg_ena == 1) { 755ded71dcbSMark Brown snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, 756ded71dcbSMark Brown WM8996_BG_ENA, WM8996_BG_ENA); 757ded71dcbSMark Brown msleep(2); 758ded71dcbSMark Brown } 759ded71dcbSMark Brown } 760ded71dcbSMark Brown 761ded71dcbSMark Brown static void wm8996_bg_disable(struct snd_soc_codec *codec) 762ded71dcbSMark Brown { 763ded71dcbSMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 764ded71dcbSMark Brown 765ded71dcbSMark Brown wm8996->bg_ena--; 766ded71dcbSMark Brown if (!wm8996->bg_ena) 767ded71dcbSMark Brown snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, 768ded71dcbSMark Brown WM8996_BG_ENA, 0); 769ded71dcbSMark Brown } 770ded71dcbSMark Brown 7718259df12SMark Brown static int bg_event(struct snd_soc_dapm_widget *w, 7728259df12SMark Brown struct snd_kcontrol *kcontrol, int event) 7738259df12SMark Brown { 774ded71dcbSMark Brown struct snd_soc_codec *codec = w->codec; 7758259df12SMark Brown int ret = 0; 7768259df12SMark Brown 7778259df12SMark Brown switch (event) { 778ded71dcbSMark Brown case SND_SOC_DAPM_PRE_PMU: 779ded71dcbSMark Brown wm8996_bg_enable(codec); 780ded71dcbSMark Brown break; 781ded71dcbSMark Brown case SND_SOC_DAPM_POST_PMD: 782ded71dcbSMark Brown wm8996_bg_disable(codec); 7838259df12SMark Brown break; 7848259df12SMark Brown default: 7858259df12SMark Brown BUG(); 7868259df12SMark Brown ret = -EINVAL; 7878259df12SMark Brown } 7888259df12SMark Brown 7898259df12SMark Brown return ret; 7908259df12SMark Brown } 7918259df12SMark Brown 792a9ba6151SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 793a9ba6151SMark Brown struct snd_kcontrol *kcontrol, int event) 794a9ba6151SMark Brown { 795c83495afSMark Brown struct snd_soc_codec *codec = w->codec; 796c83495afSMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 797c83495afSMark Brown int ret = 0; 798c83495afSMark Brown 799a9ba6151SMark Brown switch (event) { 800c83495afSMark Brown case SND_SOC_DAPM_PRE_PMU: 801c83495afSMark Brown ret = regulator_enable(wm8996->cpvdd); 802c83495afSMark Brown if (ret != 0) 803c83495afSMark Brown dev_err(codec->dev, "Failed to enable CPVDD: %d\n", 804c83495afSMark Brown ret); 805c83495afSMark Brown break; 806a9ba6151SMark Brown case SND_SOC_DAPM_POST_PMU: 807a9ba6151SMark Brown msleep(5); 808a9ba6151SMark Brown break; 809c83495afSMark Brown case SND_SOC_DAPM_POST_PMD: 810c83495afSMark Brown regulator_disable_deferred(wm8996->cpvdd, 20); 811c83495afSMark Brown break; 812a9ba6151SMark Brown default: 813a9ba6151SMark Brown BUG(); 814c83495afSMark Brown ret = -EINVAL; 815a9ba6151SMark Brown } 816a9ba6151SMark Brown 817c83495afSMark Brown return ret; 818a9ba6151SMark Brown } 819a9ba6151SMark Brown 820a9ba6151SMark Brown static int rmv_short_event(struct snd_soc_dapm_widget *w, 821a9ba6151SMark Brown struct snd_kcontrol *kcontrol, int event) 822a9ba6151SMark Brown { 823a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(w->codec); 824a9ba6151SMark Brown 825a9ba6151SMark Brown /* Record which outputs we enabled */ 826a9ba6151SMark Brown switch (event) { 827a9ba6151SMark Brown case SND_SOC_DAPM_PRE_PMD: 828a9ba6151SMark Brown wm8996->hpout_pending &= ~w->shift; 829a9ba6151SMark Brown break; 830a9ba6151SMark Brown case SND_SOC_DAPM_PRE_PMU: 831a9ba6151SMark Brown wm8996->hpout_pending |= w->shift; 832a9ba6151SMark Brown break; 833a9ba6151SMark Brown default: 834a9ba6151SMark Brown BUG(); 835a9ba6151SMark Brown return -EINVAL; 836a9ba6151SMark Brown } 837a9ba6151SMark Brown 838a9ba6151SMark Brown return 0; 839a9ba6151SMark Brown } 840a9ba6151SMark Brown 841a9ba6151SMark Brown static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask) 842a9ba6151SMark Brown { 843a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 844a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 845f998f257SMark Brown int ret; 846a9ba6151SMark Brown unsigned long timeout = 200; 847a9ba6151SMark Brown 848a9ba6151SMark Brown snd_soc_write(codec, WM8996_DC_SERVO_2, mask); 849a9ba6151SMark Brown 850a9ba6151SMark Brown /* Use the interrupt if possible */ 851a9ba6151SMark Brown do { 852a9ba6151SMark Brown if (i2c->irq) { 853a9ba6151SMark Brown timeout = wait_for_completion_timeout(&wm8996->dcs_done, 854a9ba6151SMark Brown msecs_to_jiffies(200)); 855a9ba6151SMark Brown if (timeout == 0) 856a9ba6151SMark Brown dev_err(codec->dev, "DC servo timed out\n"); 857a9ba6151SMark Brown 858a9ba6151SMark Brown } else { 859a9ba6151SMark Brown msleep(1); 860f998f257SMark Brown timeout--; 861a9ba6151SMark Brown } 862a9ba6151SMark Brown 863a9ba6151SMark Brown ret = snd_soc_read(codec, WM8996_DC_SERVO_2); 864a9ba6151SMark Brown dev_dbg(codec->dev, "DC servo state: %x\n", ret); 865f998f257SMark Brown } while (timeout && ret & mask); 866a9ba6151SMark Brown 867a9ba6151SMark Brown if (timeout == 0) 868a9ba6151SMark Brown dev_err(codec->dev, "DC servo timed out for %x\n", mask); 869a9ba6151SMark Brown else 870a9ba6151SMark Brown dev_dbg(codec->dev, "DC servo complete for %x\n", mask); 871a9ba6151SMark Brown } 872a9ba6151SMark Brown 873a9ba6151SMark Brown static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, 874a9ba6151SMark Brown enum snd_soc_dapm_type event, int subseq) 875a9ba6151SMark Brown { 876a9ba6151SMark Brown struct snd_soc_codec *codec = container_of(dapm, 877a9ba6151SMark Brown struct snd_soc_codec, dapm); 878a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 879a9ba6151SMark Brown u16 val, mask; 880a9ba6151SMark Brown 881a9ba6151SMark Brown /* Complete any pending DC servo starts */ 882a9ba6151SMark Brown if (wm8996->dcs_pending) { 883a9ba6151SMark Brown dev_dbg(codec->dev, "Starting DC servo for %x\n", 884a9ba6151SMark Brown wm8996->dcs_pending); 885a9ba6151SMark Brown 886a9ba6151SMark Brown /* Trigger a startup sequence */ 887a9ba6151SMark Brown wait_for_dc_servo(codec, wm8996->dcs_pending 888a9ba6151SMark Brown << WM8996_DCS_TRIG_STARTUP_0_SHIFT); 889a9ba6151SMark Brown 890a9ba6151SMark Brown wm8996->dcs_pending = 0; 891a9ba6151SMark Brown } 892a9ba6151SMark Brown 893a9ba6151SMark Brown if (wm8996->hpout_pending != wm8996->hpout_ena) { 894a9ba6151SMark Brown dev_dbg(codec->dev, "Applying RMV_SHORTs %x->%x\n", 895a9ba6151SMark Brown wm8996->hpout_ena, wm8996->hpout_pending); 896a9ba6151SMark Brown 897a9ba6151SMark Brown val = 0; 898a9ba6151SMark Brown mask = 0; 899a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT1L) { 900a9ba6151SMark Brown val |= WM8996_HPOUT1L_RMV_SHORT; 901a9ba6151SMark Brown mask |= WM8996_HPOUT1L_RMV_SHORT; 902a9ba6151SMark Brown } else { 903a9ba6151SMark Brown mask |= WM8996_HPOUT1L_RMV_SHORT | 904a9ba6151SMark Brown WM8996_HPOUT1L_OUTP | 905a9ba6151SMark Brown WM8996_HPOUT1L_DLY; 906a9ba6151SMark Brown } 907a9ba6151SMark Brown 908a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT1R) { 909a9ba6151SMark Brown val |= WM8996_HPOUT1R_RMV_SHORT; 910a9ba6151SMark Brown mask |= WM8996_HPOUT1R_RMV_SHORT; 911a9ba6151SMark Brown } else { 912a9ba6151SMark Brown mask |= WM8996_HPOUT1R_RMV_SHORT | 913a9ba6151SMark Brown WM8996_HPOUT1R_OUTP | 914a9ba6151SMark Brown WM8996_HPOUT1R_DLY; 915a9ba6151SMark Brown } 916a9ba6151SMark Brown 917a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, mask, val); 918a9ba6151SMark Brown 919a9ba6151SMark Brown val = 0; 920a9ba6151SMark Brown mask = 0; 921a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT2L) { 922a9ba6151SMark Brown val |= WM8996_HPOUT2L_RMV_SHORT; 923a9ba6151SMark Brown mask |= WM8996_HPOUT2L_RMV_SHORT; 924a9ba6151SMark Brown } else { 925a9ba6151SMark Brown mask |= WM8996_HPOUT2L_RMV_SHORT | 926a9ba6151SMark Brown WM8996_HPOUT2L_OUTP | 927a9ba6151SMark Brown WM8996_HPOUT2L_DLY; 928a9ba6151SMark Brown } 929a9ba6151SMark Brown 930a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT2R) { 931a9ba6151SMark Brown val |= WM8996_HPOUT2R_RMV_SHORT; 932a9ba6151SMark Brown mask |= WM8996_HPOUT2R_RMV_SHORT; 933a9ba6151SMark Brown } else { 934a9ba6151SMark Brown mask |= WM8996_HPOUT2R_RMV_SHORT | 935a9ba6151SMark Brown WM8996_HPOUT2R_OUTP | 936a9ba6151SMark Brown WM8996_HPOUT2R_DLY; 937a9ba6151SMark Brown } 938a9ba6151SMark Brown 939a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_2, mask, val); 940a9ba6151SMark Brown 941a9ba6151SMark Brown wm8996->hpout_ena = wm8996->hpout_pending; 942a9ba6151SMark Brown } 943a9ba6151SMark Brown } 944a9ba6151SMark Brown 945a9ba6151SMark Brown static int dcs_start(struct snd_soc_dapm_widget *w, 946a9ba6151SMark Brown struct snd_kcontrol *kcontrol, int event) 947a9ba6151SMark Brown { 948a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(w->codec); 949a9ba6151SMark Brown 950a9ba6151SMark Brown switch (event) { 951a9ba6151SMark Brown case SND_SOC_DAPM_POST_PMU: 952a9ba6151SMark Brown wm8996->dcs_pending |= 1 << w->shift; 953a9ba6151SMark Brown break; 954a9ba6151SMark Brown default: 955a9ba6151SMark Brown BUG(); 956a9ba6151SMark Brown return -EINVAL; 957a9ba6151SMark Brown } 958a9ba6151SMark Brown 959a9ba6151SMark Brown return 0; 960a9ba6151SMark Brown } 961a9ba6151SMark Brown 962a9ba6151SMark Brown static const char *sidetone_text[] = { 963a9ba6151SMark Brown "IN1", "IN2", 964a9ba6151SMark Brown }; 965a9ba6151SMark Brown 966a9ba6151SMark Brown static const struct soc_enum left_sidetone_enum = 967a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_SIDETONE, 0, 2, sidetone_text); 968a9ba6151SMark Brown 969a9ba6151SMark Brown static const struct snd_kcontrol_new left_sidetone = 970a9ba6151SMark Brown SOC_DAPM_ENUM("Left Sidetone", left_sidetone_enum); 971a9ba6151SMark Brown 972a9ba6151SMark Brown static const struct soc_enum right_sidetone_enum = 973a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_SIDETONE, 1, 2, sidetone_text); 974a9ba6151SMark Brown 975a9ba6151SMark Brown static const struct snd_kcontrol_new right_sidetone = 976a9ba6151SMark Brown SOC_DAPM_ENUM("Right Sidetone", right_sidetone_enum); 977a9ba6151SMark Brown 978a9ba6151SMark Brown static const char *spk_text[] = { 979a9ba6151SMark Brown "DAC1L", "DAC1R", "DAC2L", "DAC2R" 980a9ba6151SMark Brown }; 981a9ba6151SMark Brown 982a9ba6151SMark Brown static const struct soc_enum spkl_enum = 983a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_LEFT_PDM_SPEAKER, 0, 4, spk_text); 984a9ba6151SMark Brown 985a9ba6151SMark Brown static const struct snd_kcontrol_new spkl_mux = 986a9ba6151SMark Brown SOC_DAPM_ENUM("SPKL", spkl_enum); 987a9ba6151SMark Brown 988a9ba6151SMark Brown static const struct soc_enum spkr_enum = 989a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_RIGHT_PDM_SPEAKER, 0, 4, spk_text); 990a9ba6151SMark Brown 991a9ba6151SMark Brown static const struct snd_kcontrol_new spkr_mux = 992a9ba6151SMark Brown SOC_DAPM_ENUM("SPKR", spkr_enum); 993a9ba6151SMark Brown 994a9ba6151SMark Brown static const char *dsp1rx_text[] = { 995a9ba6151SMark Brown "AIF1", "AIF2" 996a9ba6151SMark Brown }; 997a9ba6151SMark Brown 998a9ba6151SMark Brown static const struct soc_enum dsp1rx_enum = 999a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_8, 0, 2, dsp1rx_text); 1000a9ba6151SMark Brown 1001a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1rx = 1002a9ba6151SMark Brown SOC_DAPM_ENUM("DSP1RX", dsp1rx_enum); 1003a9ba6151SMark Brown 1004a9ba6151SMark Brown static const char *dsp2rx_text[] = { 1005a9ba6151SMark Brown "AIF2", "AIF1" 1006a9ba6151SMark Brown }; 1007a9ba6151SMark Brown 1008a9ba6151SMark Brown static const struct soc_enum dsp2rx_enum = 1009a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_8, 4, 2, dsp2rx_text); 1010a9ba6151SMark Brown 1011a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2rx = 1012a9ba6151SMark Brown SOC_DAPM_ENUM("DSP2RX", dsp2rx_enum); 1013a9ba6151SMark Brown 1014a9ba6151SMark Brown static const char *aif2tx_text[] = { 1015a9ba6151SMark Brown "DSP2", "DSP1", "AIF1" 1016a9ba6151SMark Brown }; 1017a9ba6151SMark Brown 1018a9ba6151SMark Brown static const struct soc_enum aif2tx_enum = 1019a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_8, 6, 3, aif2tx_text); 1020a9ba6151SMark Brown 1021a9ba6151SMark Brown static const struct snd_kcontrol_new aif2tx = 1022a9ba6151SMark Brown SOC_DAPM_ENUM("AIF2TX", aif2tx_enum); 1023a9ba6151SMark Brown 1024a9ba6151SMark Brown static const char *inmux_text[] = { 1025a9ba6151SMark Brown "ADC", "DMIC1", "DMIC2" 1026a9ba6151SMark Brown }; 1027a9ba6151SMark Brown 1028a9ba6151SMark Brown static const struct soc_enum in1_enum = 1029a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_7, 0, 3, inmux_text); 1030a9ba6151SMark Brown 1031a9ba6151SMark Brown static const struct snd_kcontrol_new in1_mux = 1032a9ba6151SMark Brown SOC_DAPM_ENUM("IN1 Mux", in1_enum); 1033a9ba6151SMark Brown 1034a9ba6151SMark Brown static const struct soc_enum in2_enum = 1035a9ba6151SMark Brown SOC_ENUM_SINGLE(WM8996_POWER_MANAGEMENT_7, 4, 3, inmux_text); 1036a9ba6151SMark Brown 1037a9ba6151SMark Brown static const struct snd_kcontrol_new in2_mux = 1038a9ba6151SMark Brown SOC_DAPM_ENUM("IN2 Mux", in2_enum); 1039a9ba6151SMark Brown 1040a9ba6151SMark Brown static const struct snd_kcontrol_new dac2r_mix[] = { 1041a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1042a9ba6151SMark Brown 5, 1, 0), 1043a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1044a9ba6151SMark Brown 4, 1, 0), 1045a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1, 1, 0), 1046a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 0, 1, 0), 1047a9ba6151SMark Brown }; 1048a9ba6151SMark Brown 1049a9ba6151SMark Brown static const struct snd_kcontrol_new dac2l_mix[] = { 1050a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1051a9ba6151SMark Brown 5, 1, 0), 1052a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1053a9ba6151SMark Brown 4, 1, 0), 1054a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1, 1, 0), 1055a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 0, 1, 0), 1056a9ba6151SMark Brown }; 1057a9ba6151SMark Brown 1058a9ba6151SMark Brown static const struct snd_kcontrol_new dac1r_mix[] = { 1059a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1060a9ba6151SMark Brown 5, 1, 0), 1061a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1062a9ba6151SMark Brown 4, 1, 0), 1063a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1, 1, 0), 1064a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 0, 1, 0), 1065a9ba6151SMark Brown }; 1066a9ba6151SMark Brown 1067a9ba6151SMark Brown static const struct snd_kcontrol_new dac1l_mix[] = { 1068a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1069a9ba6151SMark Brown 5, 1, 0), 1070a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1071a9ba6151SMark Brown 4, 1, 0), 1072a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1, 1, 0), 1073a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 0, 1, 0), 1074a9ba6151SMark Brown }; 1075a9ba6151SMark Brown 1076a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1txl[] = { 1077a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 1078a9ba6151SMark Brown 1, 1, 0), 1079a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 1080a9ba6151SMark Brown 0, 1, 0), 1081a9ba6151SMark Brown }; 1082a9ba6151SMark Brown 1083a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1txr[] = { 1084a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 1085a9ba6151SMark Brown 1, 1, 0), 1086a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 1087a9ba6151SMark Brown 0, 1, 0), 1088a9ba6151SMark Brown }; 1089a9ba6151SMark Brown 1090a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2txl[] = { 1091a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 1092a9ba6151SMark Brown 1, 1, 0), 1093a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 1094a9ba6151SMark Brown 0, 1, 0), 1095a9ba6151SMark Brown }; 1096a9ba6151SMark Brown 1097a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2txr[] = { 1098a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 1099a9ba6151SMark Brown 1, 1, 0), 1100a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 1101a9ba6151SMark Brown 0, 1, 0), 1102a9ba6151SMark Brown }; 1103a9ba6151SMark Brown 1104a9ba6151SMark Brown 1105a9ba6151SMark Brown static const struct snd_soc_dapm_widget wm8996_dapm_widgets[] = { 1106a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1LN"), 1107a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1LP"), 1108a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1RN"), 1109a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1RP"), 1110a9ba6151SMark Brown 1111a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2LN"), 1112a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2LP"), 1113a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2RN"), 1114a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2RP"), 1115a9ba6151SMark Brown 1116a9ba6151SMark Brown SND_SOC_DAPM_INPUT("DMIC1DAT"), 1117a9ba6151SMark Brown SND_SOC_DAPM_INPUT("DMIC2DAT"), 1118a9ba6151SMark Brown 1119a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8996_AIF_CLOCKING_1, 0, 0, NULL, 0), 1120a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8996_CLOCKING_1, 1, 0, NULL, 0), 1121a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8996_CLOCKING_1, 2, 0, NULL, 0), 1122a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8996_CHARGE_PUMP_1, 15, 0, cp_event, 1123ded71dcbSMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1124ded71dcbSMark Brown SND_SOC_DAPM_SUPPLY("Bandgap", SND_SOC_NOPM, 0, 0, bg_event, 1125ded71dcbSMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 1126a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("LDO2", WM8996_POWER_MANAGEMENT_2, 1, 0, NULL, 0), 1127889c85c5SMark Brown SND_SOC_DAPM_SUPPLY("MICB1 Audio", WM8996_MICBIAS_1, 4, 1, NULL, 0), 1128889c85c5SMark Brown SND_SOC_DAPM_SUPPLY("MICB2 Audio", WM8996_MICBIAS_2, 4, 1, NULL, 0), 1129a9ba6151SMark Brown SND_SOC_DAPM_MICBIAS("MICB2", WM8996_POWER_MANAGEMENT_1, 9, 0), 1130a9ba6151SMark Brown SND_SOC_DAPM_MICBIAS("MICB1", WM8996_POWER_MANAGEMENT_1, 8, 0), 1131a9ba6151SMark Brown 1132a9ba6151SMark Brown SND_SOC_DAPM_PGA("IN1L PGA", WM8996_POWER_MANAGEMENT_2, 5, 0, NULL, 0), 1133a9ba6151SMark Brown SND_SOC_DAPM_PGA("IN1R PGA", WM8996_POWER_MANAGEMENT_2, 4, 0, NULL, 0), 1134a9ba6151SMark Brown 11357691cd74SMark Brown SND_SOC_DAPM_MUX("IN1L Mux", WM8996_POWER_MANAGEMENT_7, 2, 0, &in1_mux), 11367691cd74SMark Brown SND_SOC_DAPM_MUX("IN1R Mux", WM8996_POWER_MANAGEMENT_7, 3, 0, &in1_mux), 11377691cd74SMark Brown SND_SOC_DAPM_MUX("IN2L Mux", WM8996_POWER_MANAGEMENT_7, 6, 0, &in2_mux), 11387691cd74SMark Brown SND_SOC_DAPM_MUX("IN2R Mux", WM8996_POWER_MANAGEMENT_7, 7, 0, &in2_mux), 1139a9ba6151SMark Brown 1140a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("DMIC2", WM8996_POWER_MANAGEMENT_7, 9, 0, NULL, 0), 1141a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("DMIC1", WM8996_POWER_MANAGEMENT_7, 8, 0, NULL, 0), 1142a9ba6151SMark Brown 1143a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8996_POWER_MANAGEMENT_3, 5, 0), 1144a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8996_POWER_MANAGEMENT_3, 4, 0), 1145a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8996_POWER_MANAGEMENT_3, 3, 0), 1146a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8996_POWER_MANAGEMENT_3, 2, 0), 1147a9ba6151SMark Brown 1148a9ba6151SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8996_POWER_MANAGEMENT_3, 1, 0), 1149a9ba6151SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8996_POWER_MANAGEMENT_3, 0, 0), 1150a9ba6151SMark Brown 1151a9ba6151SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &left_sidetone), 1152a9ba6151SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &right_sidetone), 1153a9ba6151SMark Brown 1154a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP2RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 11, 0), 1155a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP2RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 10, 0), 1156a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP1RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 9, 0), 1157a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP1RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 8, 0), 1158a9ba6151SMark Brown 1159a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP2TXL", WM8996_POWER_MANAGEMENT_5, 11, 0, 1160a9ba6151SMark Brown dsp2txl, ARRAY_SIZE(dsp2txl)), 1161a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP2TXR", WM8996_POWER_MANAGEMENT_5, 10, 0, 1162a9ba6151SMark Brown dsp2txr, ARRAY_SIZE(dsp2txr)), 1163a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP1TXL", WM8996_POWER_MANAGEMENT_5, 9, 0, 1164a9ba6151SMark Brown dsp1txl, ARRAY_SIZE(dsp1txl)), 1165a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP1TXR", WM8996_POWER_MANAGEMENT_5, 8, 0, 1166a9ba6151SMark Brown dsp1txr, ARRAY_SIZE(dsp1txr)), 1167a9ba6151SMark Brown 1168a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC2L Mixer", SND_SOC_NOPM, 0, 0, 1169a9ba6151SMark Brown dac2l_mix, ARRAY_SIZE(dac2l_mix)), 1170a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC2R Mixer", SND_SOC_NOPM, 0, 0, 1171a9ba6151SMark Brown dac2r_mix, ARRAY_SIZE(dac2r_mix)), 1172a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0, 1173a9ba6151SMark Brown dac1l_mix, ARRAY_SIZE(dac1l_mix)), 1174a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0, 1175a9ba6151SMark Brown dac1r_mix, ARRAY_SIZE(dac1r_mix)), 1176a9ba6151SMark Brown 1177a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC2L", NULL, WM8996_POWER_MANAGEMENT_5, 3, 0), 1178a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC2R", NULL, WM8996_POWER_MANAGEMENT_5, 2, 0), 1179a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC1L", NULL, WM8996_POWER_MANAGEMENT_5, 1, 0), 1180a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC1R", NULL, WM8996_POWER_MANAGEMENT_5, 0, 0), 1181a9ba6151SMark Brown 118232d2a0c1SMark Brown SND_SOC_DAPM_AIF_IN("AIF2RX1", "AIF2 Playback", 0, 1183a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 9, 0), 118432d2a0c1SMark Brown SND_SOC_DAPM_AIF_IN("AIF2RX0", "AIF2 Playback", 1, 1185a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 8, 0), 1186a9ba6151SMark Brown 1187ff39dbe9SAxel Lin SND_SOC_DAPM_AIF_OUT("AIF2TX1", "AIF2 Capture", 0, 1188a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 9, 0), 1189ff39dbe9SAxel Lin SND_SOC_DAPM_AIF_OUT("AIF2TX0", "AIF2 Capture", 1, 1190a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 8, 0), 1191a9ba6151SMark Brown 1192a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX5", "AIF1 Playback", 5, 1193a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 5, 0), 1194a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX4", "AIF1 Playback", 4, 1195a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 4, 0), 1196a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX3", "AIF1 Playback", 3, 1197a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 3, 0), 1198a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX2", "AIF1 Playback", 2, 1199a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 2, 0), 1200a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX1", "AIF1 Playback", 1, 1201a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 1, 0), 1202a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX0", "AIF1 Playback", 0, 1203a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_4, 0, 0), 1204a9ba6151SMark Brown 1205a9ba6151SMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX5", "AIF1 Capture", 5, 1206a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 5, 0), 1207a9ba6151SMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX4", "AIF1 Capture", 4, 1208a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 4, 0), 1209a9ba6151SMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX3", "AIF1 Capture", 3, 1210a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 3, 0), 1211a9ba6151SMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX2", "AIF1 Capture", 2, 1212a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 2, 0), 1213a9ba6151SMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX1", "AIF1 Capture", 1, 1214a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 1, 0), 1215a9ba6151SMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX0", "AIF1 Capture", 0, 1216a9ba6151SMark Brown WM8996_POWER_MANAGEMENT_6, 0, 0), 1217a9ba6151SMark Brown 1218a9ba6151SMark Brown /* We route as stereo pairs so define some dummy widgets to squash 1219a9ba6151SMark Brown * things down for now. RXA = 0,1, RXB = 2,3 and so on */ 1220a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXA", SND_SOC_NOPM, 0, 0, NULL, 0), 1221a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXB", SND_SOC_NOPM, 0, 0, NULL, 0), 1222a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXC", SND_SOC_NOPM, 0, 0, NULL, 0), 1223a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF2RX", SND_SOC_NOPM, 0, 0, NULL, 0), 1224a9ba6151SMark Brown SND_SOC_DAPM_PGA("DSP2TX", SND_SOC_NOPM, 0, 0, NULL, 0), 1225a9ba6151SMark Brown 1226a9ba6151SMark Brown SND_SOC_DAPM_MUX("DSP1RX", SND_SOC_NOPM, 0, 0, &dsp1rx), 1227a9ba6151SMark Brown SND_SOC_DAPM_MUX("DSP2RX", SND_SOC_NOPM, 0, 0, &dsp2rx), 1228a9ba6151SMark Brown SND_SOC_DAPM_MUX("AIF2TX", SND_SOC_NOPM, 0, 0, &aif2tx), 1229a9ba6151SMark Brown 1230a9ba6151SMark Brown SND_SOC_DAPM_MUX("SPKL", SND_SOC_NOPM, 0, 0, &spkl_mux), 1231a9ba6151SMark Brown SND_SOC_DAPM_MUX("SPKR", SND_SOC_NOPM, 0, 0, &spkr_mux), 1232a9ba6151SMark Brown SND_SOC_DAPM_PGA("SPKL PGA", WM8996_LEFT_PDM_SPEAKER, 4, 0, NULL, 0), 1233a9ba6151SMark Brown SND_SOC_DAPM_PGA("SPKR PGA", WM8996_RIGHT_PDM_SPEAKER, 4, 0, NULL, 0), 1234a9ba6151SMark Brown 1235a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8996_POWER_MANAGEMENT_1, 7, 0, NULL, 0), 1236a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8996_ANALOGUE_HP_2, 5, 0, NULL, 0), 1237a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8996_DC_SERVO_1, 2, 0, dcs_start, 1238a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1239a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_OUTP", 3, WM8996_ANALOGUE_HP_2, 6, 0, NULL, 0), 1240a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2L, 0, 1241a9ba6151SMark Brown rmv_short_event, 1242a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1243a9ba6151SMark Brown 1244a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8996_POWER_MANAGEMENT_1, 6, 0,NULL, 0), 1245a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8996_ANALOGUE_HP_2, 1, 0, NULL, 0), 1246a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8996_DC_SERVO_1, 3, 0, dcs_start, 1247a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1248a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_OUTP", 3, WM8996_ANALOGUE_HP_2, 2, 0, NULL, 0), 1249a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2R, 0, 1250a9ba6151SMark Brown rmv_short_event, 1251a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1252a9ba6151SMark Brown 1253a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8996_POWER_MANAGEMENT_1, 5, 0, NULL, 0), 1254a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8996_ANALOGUE_HP_1, 5, 0, NULL, 0), 1255a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8996_DC_SERVO_1, 0, 0, dcs_start, 1256a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1257a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_OUTP", 3, WM8996_ANALOGUE_HP_1, 6, 0, NULL, 0), 1258a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1L, 0, 1259a9ba6151SMark Brown rmv_short_event, 1260a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1261a9ba6151SMark Brown 1262a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8996_POWER_MANAGEMENT_1, 4, 0, NULL, 0), 1263a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8996_ANALOGUE_HP_1, 1, 0, NULL, 0), 1264a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8996_DC_SERVO_1, 1, 0, dcs_start, 1265a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1266a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_OUTP", 3, WM8996_ANALOGUE_HP_1, 2, 0, NULL, 0), 1267a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1R, 0, 1268a9ba6151SMark Brown rmv_short_event, 1269a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1270a9ba6151SMark Brown 1271a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT1L"), 1272a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT1R"), 1273a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT2L"), 1274a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT2R"), 1275a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("SPKDAT"), 1276a9ba6151SMark Brown }; 1277a9ba6151SMark Brown 1278a9ba6151SMark Brown static const struct snd_soc_dapm_route wm8996_dapm_routes[] = { 1279a9ba6151SMark Brown { "AIFCLK", NULL, "SYSCLK" }, 1280a9ba6151SMark Brown { "SYSDSPCLK", NULL, "SYSCLK" }, 1281a9ba6151SMark Brown { "Charge Pump", NULL, "SYSCLK" }, 1282a9ba6151SMark Brown 1283a9ba6151SMark Brown { "MICB1", NULL, "LDO2" }, 1284889c85c5SMark Brown { "MICB1", NULL, "MICB1 Audio" }, 12858259df12SMark Brown { "MICB1", NULL, "Bandgap" }, 1286a9ba6151SMark Brown { "MICB2", NULL, "LDO2" }, 1287889c85c5SMark Brown { "MICB2", NULL, "MICB2 Audio" }, 12888259df12SMark Brown { "MICB2", NULL, "Bandgap" }, 1289a9ba6151SMark Brown 1290a9ba6151SMark Brown { "IN1L PGA", NULL, "IN2LN" }, 1291a9ba6151SMark Brown { "IN1L PGA", NULL, "IN2LP" }, 1292a9ba6151SMark Brown { "IN1L PGA", NULL, "IN1LN" }, 1293a9ba6151SMark Brown { "IN1L PGA", NULL, "IN1LP" }, 12948259df12SMark Brown { "IN1L PGA", NULL, "Bandgap" }, 1295a9ba6151SMark Brown 1296a9ba6151SMark Brown { "IN1R PGA", NULL, "IN2RN" }, 1297a9ba6151SMark Brown { "IN1R PGA", NULL, "IN2RP" }, 1298a9ba6151SMark Brown { "IN1R PGA", NULL, "IN1RN" }, 1299a9ba6151SMark Brown { "IN1R PGA", NULL, "IN1RP" }, 13008259df12SMark Brown { "IN1R PGA", NULL, "Bandgap" }, 1301a9ba6151SMark Brown 1302a9ba6151SMark Brown { "ADCL", NULL, "IN1L PGA" }, 1303a9ba6151SMark Brown 1304a9ba6151SMark Brown { "ADCR", NULL, "IN1R PGA" }, 1305a9ba6151SMark Brown 1306a9ba6151SMark Brown { "DMIC1L", NULL, "DMIC1DAT" }, 1307a9ba6151SMark Brown { "DMIC1R", NULL, "DMIC1DAT" }, 1308a9ba6151SMark Brown { "DMIC2L", NULL, "DMIC2DAT" }, 1309a9ba6151SMark Brown { "DMIC2R", NULL, "DMIC2DAT" }, 1310a9ba6151SMark Brown 1311a9ba6151SMark Brown { "DMIC2L", NULL, "DMIC2" }, 1312a9ba6151SMark Brown { "DMIC2R", NULL, "DMIC2" }, 1313a9ba6151SMark Brown { "DMIC1L", NULL, "DMIC1" }, 1314a9ba6151SMark Brown { "DMIC1R", NULL, "DMIC1" }, 1315a9ba6151SMark Brown 1316a9ba6151SMark Brown { "IN1L Mux", "ADC", "ADCL" }, 1317a9ba6151SMark Brown { "IN1L Mux", "DMIC1", "DMIC1L" }, 1318a9ba6151SMark Brown { "IN1L Mux", "DMIC2", "DMIC2L" }, 1319a9ba6151SMark Brown 1320a9ba6151SMark Brown { "IN1R Mux", "ADC", "ADCR" }, 1321a9ba6151SMark Brown { "IN1R Mux", "DMIC1", "DMIC1R" }, 1322a9ba6151SMark Brown { "IN1R Mux", "DMIC2", "DMIC2R" }, 1323a9ba6151SMark Brown 1324a9ba6151SMark Brown { "IN2L Mux", "ADC", "ADCL" }, 1325a9ba6151SMark Brown { "IN2L Mux", "DMIC1", "DMIC1L" }, 1326a9ba6151SMark Brown { "IN2L Mux", "DMIC2", "DMIC2L" }, 1327a9ba6151SMark Brown 1328a9ba6151SMark Brown { "IN2R Mux", "ADC", "ADCR" }, 1329a9ba6151SMark Brown { "IN2R Mux", "DMIC1", "DMIC1R" }, 1330a9ba6151SMark Brown { "IN2R Mux", "DMIC2", "DMIC2R" }, 1331a9ba6151SMark Brown 1332a9ba6151SMark Brown { "Left Sidetone", "IN1", "IN1L Mux" }, 1333a9ba6151SMark Brown { "Left Sidetone", "IN2", "IN2L Mux" }, 1334a9ba6151SMark Brown 1335a9ba6151SMark Brown { "Right Sidetone", "IN1", "IN1R Mux" }, 1336a9ba6151SMark Brown { "Right Sidetone", "IN2", "IN2R Mux" }, 1337a9ba6151SMark Brown 1338a9ba6151SMark Brown { "DSP1TXL", "IN1 Switch", "IN1L Mux" }, 1339a9ba6151SMark Brown { "DSP1TXR", "IN1 Switch", "IN1R Mux" }, 1340a9ba6151SMark Brown 1341a9ba6151SMark Brown { "DSP2TXL", "IN1 Switch", "IN2L Mux" }, 1342a9ba6151SMark Brown { "DSP2TXR", "IN1 Switch", "IN2R Mux" }, 1343a9ba6151SMark Brown 1344a9ba6151SMark Brown { "AIF1TX0", NULL, "DSP1TXL" }, 1345a9ba6151SMark Brown { "AIF1TX1", NULL, "DSP1TXR" }, 1346a9ba6151SMark Brown { "AIF1TX2", NULL, "DSP2TXL" }, 1347a9ba6151SMark Brown { "AIF1TX3", NULL, "DSP2TXR" }, 1348a9ba6151SMark Brown { "AIF1TX4", NULL, "AIF2RX0" }, 1349a9ba6151SMark Brown { "AIF1TX5", NULL, "AIF2RX1" }, 1350a9ba6151SMark Brown 1351a9ba6151SMark Brown { "AIF1RX0", NULL, "AIFCLK" }, 1352a9ba6151SMark Brown { "AIF1RX1", NULL, "AIFCLK" }, 1353a9ba6151SMark Brown { "AIF1RX2", NULL, "AIFCLK" }, 1354a9ba6151SMark Brown { "AIF1RX3", NULL, "AIFCLK" }, 1355a9ba6151SMark Brown { "AIF1RX4", NULL, "AIFCLK" }, 1356a9ba6151SMark Brown { "AIF1RX5", NULL, "AIFCLK" }, 1357a9ba6151SMark Brown 1358a9ba6151SMark Brown { "AIF2RX0", NULL, "AIFCLK" }, 1359a9ba6151SMark Brown { "AIF2RX1", NULL, "AIFCLK" }, 1360a9ba6151SMark Brown 13614f41adfdSMark Brown { "AIF1TX0", NULL, "AIFCLK" }, 13624f41adfdSMark Brown { "AIF1TX1", NULL, "AIFCLK" }, 13634f41adfdSMark Brown { "AIF1TX2", NULL, "AIFCLK" }, 13644f41adfdSMark Brown { "AIF1TX3", NULL, "AIFCLK" }, 13654f41adfdSMark Brown { "AIF1TX4", NULL, "AIFCLK" }, 13664f41adfdSMark Brown { "AIF1TX5", NULL, "AIFCLK" }, 13674f41adfdSMark Brown 13684f41adfdSMark Brown { "AIF2TX0", NULL, "AIFCLK" }, 13694f41adfdSMark Brown { "AIF2TX1", NULL, "AIFCLK" }, 13704f41adfdSMark Brown 1371a9ba6151SMark Brown { "DSP1RXL", NULL, "SYSDSPCLK" }, 1372a9ba6151SMark Brown { "DSP1RXR", NULL, "SYSDSPCLK" }, 1373a9ba6151SMark Brown { "DSP2RXL", NULL, "SYSDSPCLK" }, 1374a9ba6151SMark Brown { "DSP2RXR", NULL, "SYSDSPCLK" }, 1375a9ba6151SMark Brown { "DSP1TXL", NULL, "SYSDSPCLK" }, 1376a9ba6151SMark Brown { "DSP1TXR", NULL, "SYSDSPCLK" }, 1377a9ba6151SMark Brown { "DSP2TXL", NULL, "SYSDSPCLK" }, 1378a9ba6151SMark Brown { "DSP2TXR", NULL, "SYSDSPCLK" }, 1379a9ba6151SMark Brown 1380a9ba6151SMark Brown { "AIF1RXA", NULL, "AIF1RX0" }, 1381a9ba6151SMark Brown { "AIF1RXA", NULL, "AIF1RX1" }, 1382a9ba6151SMark Brown { "AIF1RXB", NULL, "AIF1RX2" }, 1383a9ba6151SMark Brown { "AIF1RXB", NULL, "AIF1RX3" }, 1384a9ba6151SMark Brown { "AIF1RXC", NULL, "AIF1RX4" }, 1385a9ba6151SMark Brown { "AIF1RXC", NULL, "AIF1RX5" }, 1386a9ba6151SMark Brown 1387a9ba6151SMark Brown { "AIF2RX", NULL, "AIF2RX0" }, 1388a9ba6151SMark Brown { "AIF2RX", NULL, "AIF2RX1" }, 1389a9ba6151SMark Brown 1390a9ba6151SMark Brown { "AIF2TX", "DSP2", "DSP2TX" }, 1391a9ba6151SMark Brown { "AIF2TX", "DSP1", "DSP1RX" }, 1392a9ba6151SMark Brown { "AIF2TX", "AIF1", "AIF1RXC" }, 1393a9ba6151SMark Brown 1394a9ba6151SMark Brown { "DSP1RXL", NULL, "DSP1RX" }, 1395a9ba6151SMark Brown { "DSP1RXR", NULL, "DSP1RX" }, 1396a9ba6151SMark Brown { "DSP2RXL", NULL, "DSP2RX" }, 1397a9ba6151SMark Brown { "DSP2RXR", NULL, "DSP2RX" }, 1398a9ba6151SMark Brown 1399a9ba6151SMark Brown { "DSP2TX", NULL, "DSP2TXL" }, 1400a9ba6151SMark Brown { "DSP2TX", NULL, "DSP2TXR" }, 1401a9ba6151SMark Brown 1402a9ba6151SMark Brown { "DSP1RX", "AIF1", "AIF1RXA" }, 1403a9ba6151SMark Brown { "DSP1RX", "AIF2", "AIF2RX" }, 1404a9ba6151SMark Brown 1405a9ba6151SMark Brown { "DSP2RX", "AIF1", "AIF1RXB" }, 1406a9ba6151SMark Brown { "DSP2RX", "AIF2", "AIF2RX" }, 1407a9ba6151SMark Brown 1408a9ba6151SMark Brown { "DAC2L Mixer", "DSP2 Switch", "DSP2RXL" }, 1409a9ba6151SMark Brown { "DAC2L Mixer", "DSP1 Switch", "DSP1RXL" }, 1410a9ba6151SMark Brown { "DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1411a9ba6151SMark Brown { "DAC2L Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1412a9ba6151SMark Brown 1413a9ba6151SMark Brown { "DAC2R Mixer", "DSP2 Switch", "DSP2RXR" }, 1414a9ba6151SMark Brown { "DAC2R Mixer", "DSP1 Switch", "DSP1RXR" }, 1415a9ba6151SMark Brown { "DAC2R Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1416a9ba6151SMark Brown { "DAC2R Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1417a9ba6151SMark Brown 1418a9ba6151SMark Brown { "DAC1L Mixer", "DSP2 Switch", "DSP2RXL" }, 1419a9ba6151SMark Brown { "DAC1L Mixer", "DSP1 Switch", "DSP1RXL" }, 1420a9ba6151SMark Brown { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1421a9ba6151SMark Brown { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1422a9ba6151SMark Brown 1423a9ba6151SMark Brown { "DAC1R Mixer", "DSP2 Switch", "DSP2RXR" }, 1424a9ba6151SMark Brown { "DAC1R Mixer", "DSP1 Switch", "DSP1RXR" }, 1425a9ba6151SMark Brown { "DAC1R Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1426a9ba6151SMark Brown { "DAC1R Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1427a9ba6151SMark Brown 1428a9ba6151SMark Brown { "DAC1L", NULL, "DAC1L Mixer" }, 1429a9ba6151SMark Brown { "DAC1R", NULL, "DAC1R Mixer" }, 1430a9ba6151SMark Brown { "DAC2L", NULL, "DAC2L Mixer" }, 1431a9ba6151SMark Brown { "DAC2R", NULL, "DAC2R Mixer" }, 1432a9ba6151SMark Brown 1433a9ba6151SMark Brown { "HPOUT2L PGA", NULL, "Charge Pump" }, 14348259df12SMark Brown { "HPOUT2L PGA", NULL, "Bandgap" }, 1435a9ba6151SMark Brown { "HPOUT2L PGA", NULL, "DAC2L" }, 1436a9ba6151SMark Brown { "HPOUT2L_DLY", NULL, "HPOUT2L PGA" }, 1437a9ba6151SMark Brown { "HPOUT2L_DCS", NULL, "HPOUT2L_DLY" }, 1438a9ba6151SMark Brown { "HPOUT2L_OUTP", NULL, "HPOUT2L_DCS" }, 1439a9ba6151SMark Brown { "HPOUT2L_RMV_SHORT", NULL, "HPOUT2L_OUTP" }, 1440a9ba6151SMark Brown 1441a9ba6151SMark Brown { "HPOUT2R PGA", NULL, "Charge Pump" }, 14428259df12SMark Brown { "HPOUT2R PGA", NULL, "Bandgap" }, 1443a9ba6151SMark Brown { "HPOUT2R PGA", NULL, "DAC2R" }, 1444a9ba6151SMark Brown { "HPOUT2R_DLY", NULL, "HPOUT2R PGA" }, 1445a9ba6151SMark Brown { "HPOUT2R_DCS", NULL, "HPOUT2R_DLY" }, 1446a9ba6151SMark Brown { "HPOUT2R_OUTP", NULL, "HPOUT2R_DCS" }, 1447a9ba6151SMark Brown { "HPOUT2R_RMV_SHORT", NULL, "HPOUT2R_OUTP" }, 1448a9ba6151SMark Brown 1449a9ba6151SMark Brown { "HPOUT1L PGA", NULL, "Charge Pump" }, 14508259df12SMark Brown { "HPOUT1L PGA", NULL, "Bandgap" }, 1451a9ba6151SMark Brown { "HPOUT1L PGA", NULL, "DAC1L" }, 1452a9ba6151SMark Brown { "HPOUT1L_DLY", NULL, "HPOUT1L PGA" }, 1453a9ba6151SMark Brown { "HPOUT1L_DCS", NULL, "HPOUT1L_DLY" }, 1454a9ba6151SMark Brown { "HPOUT1L_OUTP", NULL, "HPOUT1L_DCS" }, 1455a9ba6151SMark Brown { "HPOUT1L_RMV_SHORT", NULL, "HPOUT1L_OUTP" }, 1456a9ba6151SMark Brown 1457a9ba6151SMark Brown { "HPOUT1R PGA", NULL, "Charge Pump" }, 14588259df12SMark Brown { "HPOUT1R PGA", NULL, "Bandgap" }, 1459a9ba6151SMark Brown { "HPOUT1R PGA", NULL, "DAC1R" }, 1460a9ba6151SMark Brown { "HPOUT1R_DLY", NULL, "HPOUT1R PGA" }, 1461a9ba6151SMark Brown { "HPOUT1R_DCS", NULL, "HPOUT1R_DLY" }, 1462a9ba6151SMark Brown { "HPOUT1R_OUTP", NULL, "HPOUT1R_DCS" }, 1463a9ba6151SMark Brown { "HPOUT1R_RMV_SHORT", NULL, "HPOUT1R_OUTP" }, 1464a9ba6151SMark Brown 1465a9ba6151SMark Brown { "HPOUT2L", NULL, "HPOUT2L_RMV_SHORT" }, 1466a9ba6151SMark Brown { "HPOUT2R", NULL, "HPOUT2R_RMV_SHORT" }, 1467a9ba6151SMark Brown { "HPOUT1L", NULL, "HPOUT1L_RMV_SHORT" }, 1468a9ba6151SMark Brown { "HPOUT1R", NULL, "HPOUT1R_RMV_SHORT" }, 1469a9ba6151SMark Brown 1470a9ba6151SMark Brown { "SPKL", "DAC1L", "DAC1L" }, 1471a9ba6151SMark Brown { "SPKL", "DAC1R", "DAC1R" }, 1472a9ba6151SMark Brown { "SPKL", "DAC2L", "DAC2L" }, 1473a9ba6151SMark Brown { "SPKL", "DAC2R", "DAC2R" }, 1474a9ba6151SMark Brown 1475a9ba6151SMark Brown { "SPKR", "DAC1L", "DAC1L" }, 1476a9ba6151SMark Brown { "SPKR", "DAC1R", "DAC1R" }, 1477a9ba6151SMark Brown { "SPKR", "DAC2L", "DAC2L" }, 1478a9ba6151SMark Brown { "SPKR", "DAC2R", "DAC2R" }, 1479a9ba6151SMark Brown 1480a9ba6151SMark Brown { "SPKL PGA", NULL, "SPKL" }, 1481a9ba6151SMark Brown { "SPKR PGA", NULL, "SPKR" }, 1482a9ba6151SMark Brown 1483a9ba6151SMark Brown { "SPKDAT", NULL, "SPKL PGA" }, 1484a9ba6151SMark Brown { "SPKDAT", NULL, "SPKR PGA" }, 1485a9ba6151SMark Brown }; 1486a9ba6151SMark Brown 148779172746SMark Brown static bool wm8996_readable_register(struct device *dev, unsigned int reg) 1488a9ba6151SMark Brown { 1489a9ba6151SMark Brown /* Due to the sparseness of the register map the compiler 1490a9ba6151SMark Brown * output from an explicit switch statement ends up being much 1491a9ba6151SMark Brown * more efficient than a table. 1492a9ba6151SMark Brown */ 1493a9ba6151SMark Brown switch (reg) { 1494a9ba6151SMark Brown case WM8996_SOFTWARE_RESET: 1495a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_1: 1496a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_2: 1497a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_3: 1498a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_4: 1499a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_5: 1500a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_6: 1501a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_7: 1502a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_8: 1503a9ba6151SMark Brown case WM8996_LEFT_LINE_INPUT_VOLUME: 1504a9ba6151SMark Brown case WM8996_RIGHT_LINE_INPUT_VOLUME: 1505a9ba6151SMark Brown case WM8996_LINE_INPUT_CONTROL: 1506a9ba6151SMark Brown case WM8996_DAC1_HPOUT1_VOLUME: 1507a9ba6151SMark Brown case WM8996_DAC2_HPOUT2_VOLUME: 1508a9ba6151SMark Brown case WM8996_DAC1_LEFT_VOLUME: 1509a9ba6151SMark Brown case WM8996_DAC1_RIGHT_VOLUME: 1510a9ba6151SMark Brown case WM8996_DAC2_LEFT_VOLUME: 1511a9ba6151SMark Brown case WM8996_DAC2_RIGHT_VOLUME: 1512a9ba6151SMark Brown case WM8996_OUTPUT1_LEFT_VOLUME: 1513a9ba6151SMark Brown case WM8996_OUTPUT1_RIGHT_VOLUME: 1514a9ba6151SMark Brown case WM8996_OUTPUT2_LEFT_VOLUME: 1515a9ba6151SMark Brown case WM8996_OUTPUT2_RIGHT_VOLUME: 1516a9ba6151SMark Brown case WM8996_MICBIAS_1: 1517a9ba6151SMark Brown case WM8996_MICBIAS_2: 1518a9ba6151SMark Brown case WM8996_LDO_1: 1519a9ba6151SMark Brown case WM8996_LDO_2: 1520a9ba6151SMark Brown case WM8996_ACCESSORY_DETECT_MODE_1: 1521a9ba6151SMark Brown case WM8996_ACCESSORY_DETECT_MODE_2: 1522a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_1: 1523a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_2: 1524a9ba6151SMark Brown case WM8996_MIC_DETECT_1: 1525a9ba6151SMark Brown case WM8996_MIC_DETECT_2: 1526a9ba6151SMark Brown case WM8996_MIC_DETECT_3: 1527a9ba6151SMark Brown case WM8996_CHARGE_PUMP_1: 1528a9ba6151SMark Brown case WM8996_CHARGE_PUMP_2: 1529a9ba6151SMark Brown case WM8996_DC_SERVO_1: 1530a9ba6151SMark Brown case WM8996_DC_SERVO_2: 1531a9ba6151SMark Brown case WM8996_DC_SERVO_3: 1532a9ba6151SMark Brown case WM8996_DC_SERVO_5: 1533a9ba6151SMark Brown case WM8996_DC_SERVO_6: 1534a9ba6151SMark Brown case WM8996_DC_SERVO_7: 1535a9ba6151SMark Brown case WM8996_DC_SERVO_READBACK_0: 1536a9ba6151SMark Brown case WM8996_ANALOGUE_HP_1: 1537a9ba6151SMark Brown case WM8996_ANALOGUE_HP_2: 1538a9ba6151SMark Brown case WM8996_CHIP_REVISION: 1539a9ba6151SMark Brown case WM8996_CONTROL_INTERFACE_1: 1540a9ba6151SMark Brown case WM8996_WRITE_SEQUENCER_CTRL_1: 1541a9ba6151SMark Brown case WM8996_WRITE_SEQUENCER_CTRL_2: 1542a9ba6151SMark Brown case WM8996_AIF_CLOCKING_1: 1543a9ba6151SMark Brown case WM8996_AIF_CLOCKING_2: 1544a9ba6151SMark Brown case WM8996_CLOCKING_1: 1545a9ba6151SMark Brown case WM8996_CLOCKING_2: 1546a9ba6151SMark Brown case WM8996_AIF_RATE: 1547a9ba6151SMark Brown case WM8996_FLL_CONTROL_1: 1548a9ba6151SMark Brown case WM8996_FLL_CONTROL_2: 1549a9ba6151SMark Brown case WM8996_FLL_CONTROL_3: 1550a9ba6151SMark Brown case WM8996_FLL_CONTROL_4: 1551a9ba6151SMark Brown case WM8996_FLL_CONTROL_5: 1552a9ba6151SMark Brown case WM8996_FLL_CONTROL_6: 1553a9ba6151SMark Brown case WM8996_FLL_EFS_1: 1554a9ba6151SMark Brown case WM8996_FLL_EFS_2: 1555a9ba6151SMark Brown case WM8996_AIF1_CONTROL: 1556a9ba6151SMark Brown case WM8996_AIF1_BCLK: 1557a9ba6151SMark Brown case WM8996_AIF1_TX_LRCLK_1: 1558a9ba6151SMark Brown case WM8996_AIF1_TX_LRCLK_2: 1559a9ba6151SMark Brown case WM8996_AIF1_RX_LRCLK_1: 1560a9ba6151SMark Brown case WM8996_AIF1_RX_LRCLK_2: 1561a9ba6151SMark Brown case WM8996_AIF1TX_DATA_CONFIGURATION_1: 1562a9ba6151SMark Brown case WM8996_AIF1TX_DATA_CONFIGURATION_2: 1563a9ba6151SMark Brown case WM8996_AIF1RX_DATA_CONFIGURATION: 1564a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_0_CONFIGURATION: 1565a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_1_CONFIGURATION: 1566a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_2_CONFIGURATION: 1567a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_3_CONFIGURATION: 1568a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_4_CONFIGURATION: 1569a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_5_CONFIGURATION: 1570a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_0_CONFIGURATION: 1571a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_1_CONFIGURATION: 1572a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_2_CONFIGURATION: 1573a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_3_CONFIGURATION: 1574a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_4_CONFIGURATION: 1575a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_5_CONFIGURATION: 1576a9ba6151SMark Brown case WM8996_AIF1RX_MONO_CONFIGURATION: 1577a9ba6151SMark Brown case WM8996_AIF1TX_TEST: 1578a9ba6151SMark Brown case WM8996_AIF2_CONTROL: 1579a9ba6151SMark Brown case WM8996_AIF2_BCLK: 1580a9ba6151SMark Brown case WM8996_AIF2_TX_LRCLK_1: 1581a9ba6151SMark Brown case WM8996_AIF2_TX_LRCLK_2: 1582a9ba6151SMark Brown case WM8996_AIF2_RX_LRCLK_1: 1583a9ba6151SMark Brown case WM8996_AIF2_RX_LRCLK_2: 1584a9ba6151SMark Brown case WM8996_AIF2TX_DATA_CONFIGURATION_1: 1585a9ba6151SMark Brown case WM8996_AIF2TX_DATA_CONFIGURATION_2: 1586a9ba6151SMark Brown case WM8996_AIF2RX_DATA_CONFIGURATION: 1587a9ba6151SMark Brown case WM8996_AIF2TX_CHANNEL_0_CONFIGURATION: 1588a9ba6151SMark Brown case WM8996_AIF2TX_CHANNEL_1_CONFIGURATION: 1589a9ba6151SMark Brown case WM8996_AIF2RX_CHANNEL_0_CONFIGURATION: 1590a9ba6151SMark Brown case WM8996_AIF2RX_CHANNEL_1_CONFIGURATION: 1591a9ba6151SMark Brown case WM8996_AIF2RX_MONO_CONFIGURATION: 1592a9ba6151SMark Brown case WM8996_AIF2TX_TEST: 1593a9ba6151SMark Brown case WM8996_DSP1_TX_LEFT_VOLUME: 1594a9ba6151SMark Brown case WM8996_DSP1_TX_RIGHT_VOLUME: 1595a9ba6151SMark Brown case WM8996_DSP1_RX_LEFT_VOLUME: 1596a9ba6151SMark Brown case WM8996_DSP1_RX_RIGHT_VOLUME: 1597a9ba6151SMark Brown case WM8996_DSP1_TX_FILTERS: 1598a9ba6151SMark Brown case WM8996_DSP1_RX_FILTERS_1: 1599a9ba6151SMark Brown case WM8996_DSP1_RX_FILTERS_2: 1600a9ba6151SMark Brown case WM8996_DSP1_DRC_1: 1601a9ba6151SMark Brown case WM8996_DSP1_DRC_2: 1602a9ba6151SMark Brown case WM8996_DSP1_DRC_3: 1603a9ba6151SMark Brown case WM8996_DSP1_DRC_4: 1604a9ba6151SMark Brown case WM8996_DSP1_DRC_5: 1605a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_GAINS_1: 1606a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_GAINS_2: 1607a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_1_A: 1608a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_1_B: 1609a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_1_PG: 1610a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_A: 1611a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_B: 1612a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_C: 1613a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_PG: 1614a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_A: 1615a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_B: 1616a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_C: 1617a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_PG: 1618a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_A: 1619a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_B: 1620a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_C: 1621a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_PG: 1622a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_5_A: 1623a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_5_B: 1624a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_5_PG: 1625a9ba6151SMark Brown case WM8996_DSP2_TX_LEFT_VOLUME: 1626a9ba6151SMark Brown case WM8996_DSP2_TX_RIGHT_VOLUME: 1627a9ba6151SMark Brown case WM8996_DSP2_RX_LEFT_VOLUME: 1628a9ba6151SMark Brown case WM8996_DSP2_RX_RIGHT_VOLUME: 1629a9ba6151SMark Brown case WM8996_DSP2_TX_FILTERS: 1630a9ba6151SMark Brown case WM8996_DSP2_RX_FILTERS_1: 1631a9ba6151SMark Brown case WM8996_DSP2_RX_FILTERS_2: 1632a9ba6151SMark Brown case WM8996_DSP2_DRC_1: 1633a9ba6151SMark Brown case WM8996_DSP2_DRC_2: 1634a9ba6151SMark Brown case WM8996_DSP2_DRC_3: 1635a9ba6151SMark Brown case WM8996_DSP2_DRC_4: 1636a9ba6151SMark Brown case WM8996_DSP2_DRC_5: 1637a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_GAINS_1: 1638a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_GAINS_2: 1639a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_1_A: 1640a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_1_B: 1641a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_1_PG: 1642a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_A: 1643a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_B: 1644a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_C: 1645a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_PG: 1646a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_A: 1647a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_B: 1648a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_C: 1649a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_PG: 1650a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_A: 1651a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_B: 1652a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_C: 1653a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_PG: 1654a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_5_A: 1655a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_5_B: 1656a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_5_PG: 1657a9ba6151SMark Brown case WM8996_DAC1_MIXER_VOLUMES: 1658a9ba6151SMark Brown case WM8996_DAC1_LEFT_MIXER_ROUTING: 1659a9ba6151SMark Brown case WM8996_DAC1_RIGHT_MIXER_ROUTING: 1660a9ba6151SMark Brown case WM8996_DAC2_MIXER_VOLUMES: 1661a9ba6151SMark Brown case WM8996_DAC2_LEFT_MIXER_ROUTING: 1662a9ba6151SMark Brown case WM8996_DAC2_RIGHT_MIXER_ROUTING: 1663a9ba6151SMark Brown case WM8996_DSP1_TX_LEFT_MIXER_ROUTING: 1664a9ba6151SMark Brown case WM8996_DSP1_TX_RIGHT_MIXER_ROUTING: 1665a9ba6151SMark Brown case WM8996_DSP2_TX_LEFT_MIXER_ROUTING: 1666a9ba6151SMark Brown case WM8996_DSP2_TX_RIGHT_MIXER_ROUTING: 1667a9ba6151SMark Brown case WM8996_DSP_TX_MIXER_SELECT: 1668a9ba6151SMark Brown case WM8996_DAC_SOFTMUTE: 1669a9ba6151SMark Brown case WM8996_OVERSAMPLING: 1670a9ba6151SMark Brown case WM8996_SIDETONE: 1671a9ba6151SMark Brown case WM8996_GPIO_1: 1672a9ba6151SMark Brown case WM8996_GPIO_2: 1673a9ba6151SMark Brown case WM8996_GPIO_3: 1674a9ba6151SMark Brown case WM8996_GPIO_4: 1675a9ba6151SMark Brown case WM8996_GPIO_5: 1676a9ba6151SMark Brown case WM8996_PULL_CONTROL_1: 1677a9ba6151SMark Brown case WM8996_PULL_CONTROL_2: 1678a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_1: 1679a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_2: 1680a9ba6151SMark Brown case WM8996_INTERRUPT_RAW_STATUS_2: 1681a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_1_MASK: 1682a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_2_MASK: 1683a9ba6151SMark Brown case WM8996_INTERRUPT_CONTROL: 1684a9ba6151SMark Brown case WM8996_LEFT_PDM_SPEAKER: 1685a9ba6151SMark Brown case WM8996_RIGHT_PDM_SPEAKER: 1686a9ba6151SMark Brown case WM8996_PDM_SPEAKER_MUTE_SEQUENCE: 1687a9ba6151SMark Brown case WM8996_PDM_SPEAKER_VOLUME: 1688a9ba6151SMark Brown return 1; 1689a9ba6151SMark Brown default: 1690a9ba6151SMark Brown return 0; 1691a9ba6151SMark Brown } 1692a9ba6151SMark Brown } 1693a9ba6151SMark Brown 169479172746SMark Brown static bool wm8996_volatile_register(struct device *dev, unsigned int reg) 1695a9ba6151SMark Brown { 1696a9ba6151SMark Brown switch (reg) { 1697a9ba6151SMark Brown case WM8996_SOFTWARE_RESET: 1698a9ba6151SMark Brown case WM8996_CHIP_REVISION: 1699a9ba6151SMark Brown case WM8996_LDO_1: 1700a9ba6151SMark Brown case WM8996_LDO_2: 1701a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_1: 1702a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_2: 1703a9ba6151SMark Brown case WM8996_INTERRUPT_RAW_STATUS_2: 1704a9ba6151SMark Brown case WM8996_DC_SERVO_READBACK_0: 1705a9ba6151SMark Brown case WM8996_DC_SERVO_2: 1706a9ba6151SMark Brown case WM8996_DC_SERVO_6: 1707a9ba6151SMark Brown case WM8996_DC_SERVO_7: 1708a9ba6151SMark Brown case WM8996_FLL_CONTROL_6: 1709a9ba6151SMark Brown case WM8996_MIC_DETECT_3: 1710a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_1: 1711a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_2: 1712a9ba6151SMark Brown return 1; 1713a9ba6151SMark Brown default: 1714a9ba6151SMark Brown return 0; 1715a9ba6151SMark Brown } 1716a9ba6151SMark Brown } 1717a9ba6151SMark Brown 1718ee5f3872SMark Brown static int wm8996_reset(struct wm8996_priv *wm8996) 1719a9ba6151SMark Brown { 1720ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) { 1721ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 1722ee5f3872SMark Brown return 0; 1723ee5f3872SMark Brown } else { 1724ee5f3872SMark Brown return regmap_write(wm8996->regmap, WM8996_SOFTWARE_RESET, 1725ee5f3872SMark Brown 0x8915); 1726ee5f3872SMark Brown } 1727a9ba6151SMark Brown } 1728a9ba6151SMark Brown 1729a9ba6151SMark Brown static const int bclk_divs[] = { 1730a9ba6151SMark Brown 1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96 1731a9ba6151SMark Brown }; 1732a9ba6151SMark Brown 1733a9ba6151SMark Brown static void wm8996_update_bclk(struct snd_soc_codec *codec) 1734a9ba6151SMark Brown { 1735a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 1736a9ba6151SMark Brown int aif, best, cur_val, bclk_rate, bclk_reg, i; 1737a9ba6151SMark Brown 1738a9ba6151SMark Brown /* Don't bother if we're in a low frequency idle mode that 1739a9ba6151SMark Brown * can't support audio. 1740a9ba6151SMark Brown */ 1741a9ba6151SMark Brown if (wm8996->sysclk < 64000) 1742a9ba6151SMark Brown return; 1743a9ba6151SMark Brown 1744a9ba6151SMark Brown for (aif = 0; aif < WM8996_AIFS; aif++) { 1745a9ba6151SMark Brown switch (aif) { 1746a9ba6151SMark Brown case 0: 1747a9ba6151SMark Brown bclk_reg = WM8996_AIF1_BCLK; 1748a9ba6151SMark Brown break; 1749a9ba6151SMark Brown case 1: 1750a9ba6151SMark Brown bclk_reg = WM8996_AIF2_BCLK; 1751a9ba6151SMark Brown break; 1752a9ba6151SMark Brown } 1753a9ba6151SMark Brown 1754a9ba6151SMark Brown bclk_rate = wm8996->bclk_rate[aif]; 1755a9ba6151SMark Brown 1756a9ba6151SMark Brown /* Pick a divisor for BCLK as close as we can get to ideal */ 1757a9ba6151SMark Brown best = 0; 1758a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1759a9ba6151SMark Brown cur_val = (wm8996->sysclk / bclk_divs[i]) - bclk_rate; 1760a9ba6151SMark Brown if (cur_val < 0) /* BCLK table is sorted */ 1761a9ba6151SMark Brown break; 1762a9ba6151SMark Brown best = i; 1763a9ba6151SMark Brown } 1764a9ba6151SMark Brown bclk_rate = wm8996->sysclk / bclk_divs[best]; 1765a9ba6151SMark Brown dev_dbg(codec->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n", 1766a9ba6151SMark Brown bclk_divs[best], bclk_rate); 1767a9ba6151SMark Brown 1768a9ba6151SMark Brown snd_soc_update_bits(codec, bclk_reg, 1769a9ba6151SMark Brown WM8996_AIF1_BCLK_DIV_MASK, best); 1770a9ba6151SMark Brown } 1771a9ba6151SMark Brown } 1772a9ba6151SMark Brown 1773a9ba6151SMark Brown static int wm8996_set_bias_level(struct snd_soc_codec *codec, 1774a9ba6151SMark Brown enum snd_soc_bias_level level) 1775a9ba6151SMark Brown { 1776a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 1777a9ba6151SMark Brown int ret; 1778a9ba6151SMark Brown 1779a9ba6151SMark Brown switch (level) { 1780a9ba6151SMark Brown case SND_SOC_BIAS_ON: 1781a9ba6151SMark Brown case SND_SOC_BIAS_PREPARE: 1782a9ba6151SMark Brown break; 1783a9ba6151SMark Brown 1784a9ba6151SMark Brown case SND_SOC_BIAS_STANDBY: 1785a9ba6151SMark Brown if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1786a9ba6151SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), 1787a9ba6151SMark Brown wm8996->supplies); 1788a9ba6151SMark Brown if (ret != 0) { 1789a9ba6151SMark Brown dev_err(codec->dev, 1790a9ba6151SMark Brown "Failed to enable supplies: %d\n", 1791a9ba6151SMark Brown ret); 1792a9ba6151SMark Brown return ret; 1793a9ba6151SMark Brown } 1794a9ba6151SMark Brown 1795a9ba6151SMark Brown if (wm8996->pdata.ldo_ena >= 0) { 1796a9ba6151SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1797a9ba6151SMark Brown 1); 1798a9ba6151SMark Brown msleep(5); 1799a9ba6151SMark Brown } 1800a9ba6151SMark Brown 180179172746SMark Brown regcache_cache_only(codec->control_data, false); 180279172746SMark Brown regcache_sync(codec->control_data); 1803a9ba6151SMark Brown } 1804a9ba6151SMark Brown break; 1805a9ba6151SMark Brown 1806a9ba6151SMark Brown case SND_SOC_BIAS_OFF: 180779172746SMark Brown regcache_cache_only(codec->control_data, true); 1808a9ba6151SMark Brown if (wm8996->pdata.ldo_ena >= 0) 1809a9ba6151SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 1810a9ba6151SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), 1811a9ba6151SMark Brown wm8996->supplies); 1812a9ba6151SMark Brown break; 1813a9ba6151SMark Brown } 1814a9ba6151SMark Brown 1815a9ba6151SMark Brown codec->dapm.bias_level = level; 1816a9ba6151SMark Brown 1817a9ba6151SMark Brown return 0; 1818a9ba6151SMark Brown } 1819a9ba6151SMark Brown 1820a9ba6151SMark Brown static int wm8996_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1821a9ba6151SMark Brown { 1822a9ba6151SMark Brown struct snd_soc_codec *codec = dai->codec; 1823a9ba6151SMark Brown int aifctrl = 0; 1824a9ba6151SMark Brown int bclk = 0; 1825a9ba6151SMark Brown int lrclk_tx = 0; 1826a9ba6151SMark Brown int lrclk_rx = 0; 1827a9ba6151SMark Brown int aifctrl_reg, bclk_reg, lrclk_tx_reg, lrclk_rx_reg; 1828a9ba6151SMark Brown 1829a9ba6151SMark Brown switch (dai->id) { 1830a9ba6151SMark Brown case 0: 1831a9ba6151SMark Brown aifctrl_reg = WM8996_AIF1_CONTROL; 1832a9ba6151SMark Brown bclk_reg = WM8996_AIF1_BCLK; 1833a9ba6151SMark Brown lrclk_tx_reg = WM8996_AIF1_TX_LRCLK_2; 1834a9ba6151SMark Brown lrclk_rx_reg = WM8996_AIF1_RX_LRCLK_2; 1835a9ba6151SMark Brown break; 1836a9ba6151SMark Brown case 1: 1837a9ba6151SMark Brown aifctrl_reg = WM8996_AIF2_CONTROL; 1838a9ba6151SMark Brown bclk_reg = WM8996_AIF2_BCLK; 1839a9ba6151SMark Brown lrclk_tx_reg = WM8996_AIF2_TX_LRCLK_2; 1840a9ba6151SMark Brown lrclk_rx_reg = WM8996_AIF2_RX_LRCLK_2; 1841a9ba6151SMark Brown break; 1842a9ba6151SMark Brown default: 1843a9ba6151SMark Brown BUG(); 1844a9ba6151SMark Brown return -EINVAL; 1845a9ba6151SMark Brown } 1846a9ba6151SMark Brown 1847a9ba6151SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1848a9ba6151SMark Brown case SND_SOC_DAIFMT_NB_NF: 1849a9ba6151SMark Brown break; 1850a9ba6151SMark Brown case SND_SOC_DAIFMT_IB_NF: 1851a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_INV; 1852a9ba6151SMark Brown break; 1853a9ba6151SMark Brown case SND_SOC_DAIFMT_NB_IF: 1854a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_INV; 1855a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_INV; 1856a9ba6151SMark Brown break; 1857a9ba6151SMark Brown case SND_SOC_DAIFMT_IB_IF: 1858a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_INV; 1859a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_INV; 1860a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_INV; 1861a9ba6151SMark Brown break; 1862a9ba6151SMark Brown } 1863a9ba6151SMark Brown 1864a9ba6151SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1865a9ba6151SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1866a9ba6151SMark Brown break; 1867a9ba6151SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1868a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR; 1869a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR; 1870a9ba6151SMark Brown break; 1871a9ba6151SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1872a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_MSTR; 1873a9ba6151SMark Brown break; 1874a9ba6151SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1875a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_MSTR; 1876a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR; 1877a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR; 1878a9ba6151SMark Brown break; 1879a9ba6151SMark Brown default: 1880a9ba6151SMark Brown return -EINVAL; 1881a9ba6151SMark Brown } 1882a9ba6151SMark Brown 1883a9ba6151SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1884a9ba6151SMark Brown case SND_SOC_DAIFMT_DSP_A: 1885a9ba6151SMark Brown break; 1886a9ba6151SMark Brown case SND_SOC_DAIFMT_DSP_B: 1887a9ba6151SMark Brown aifctrl |= 1; 1888a9ba6151SMark Brown break; 1889a9ba6151SMark Brown case SND_SOC_DAIFMT_I2S: 1890a9ba6151SMark Brown aifctrl |= 2; 1891a9ba6151SMark Brown break; 1892a9ba6151SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1893a9ba6151SMark Brown aifctrl |= 3; 1894a9ba6151SMark Brown break; 1895a9ba6151SMark Brown default: 1896a9ba6151SMark Brown return -EINVAL; 1897a9ba6151SMark Brown } 1898a9ba6151SMark Brown 1899a9ba6151SMark Brown snd_soc_update_bits(codec, aifctrl_reg, WM8996_AIF1_FMT_MASK, aifctrl); 1900a9ba6151SMark Brown snd_soc_update_bits(codec, bclk_reg, 1901a9ba6151SMark Brown WM8996_AIF1_BCLK_INV | WM8996_AIF1_BCLK_MSTR, 1902a9ba6151SMark Brown bclk); 1903a9ba6151SMark Brown snd_soc_update_bits(codec, lrclk_tx_reg, 1904a9ba6151SMark Brown WM8996_AIF1TX_LRCLK_INV | 1905a9ba6151SMark Brown WM8996_AIF1TX_LRCLK_MSTR, 1906a9ba6151SMark Brown lrclk_tx); 1907a9ba6151SMark Brown snd_soc_update_bits(codec, lrclk_rx_reg, 1908a9ba6151SMark Brown WM8996_AIF1RX_LRCLK_INV | 1909a9ba6151SMark Brown WM8996_AIF1RX_LRCLK_MSTR, 1910a9ba6151SMark Brown lrclk_rx); 1911a9ba6151SMark Brown 1912a9ba6151SMark Brown return 0; 1913a9ba6151SMark Brown } 1914a9ba6151SMark Brown 1915a9ba6151SMark Brown static const int dsp_divs[] = { 1916a9ba6151SMark Brown 48000, 32000, 16000, 8000 1917a9ba6151SMark Brown }; 1918a9ba6151SMark Brown 1919a9ba6151SMark Brown static int wm8996_hw_params(struct snd_pcm_substream *substream, 1920a9ba6151SMark Brown struct snd_pcm_hw_params *params, 1921a9ba6151SMark Brown struct snd_soc_dai *dai) 1922a9ba6151SMark Brown { 1923a9ba6151SMark Brown struct snd_soc_codec *codec = dai->codec; 1924a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 1925a9ba6151SMark Brown int bits, i, bclk_rate; 1926a9ba6151SMark Brown int aifdata = 0; 1927a9ba6151SMark Brown int lrclk = 0; 1928a9ba6151SMark Brown int dsp = 0; 1929a9ba6151SMark Brown int aifdata_reg, lrclk_reg, dsp_shift; 1930a9ba6151SMark Brown 1931a9ba6151SMark Brown switch (dai->id) { 1932a9ba6151SMark Brown case 0: 1933a9ba6151SMark Brown if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || 1934a9ba6151SMark Brown (snd_soc_read(codec, WM8996_GPIO_1)) & WM8996_GP1_FN_MASK) { 1935a9ba6151SMark Brown aifdata_reg = WM8996_AIF1RX_DATA_CONFIGURATION; 1936a9ba6151SMark Brown lrclk_reg = WM8996_AIF1_RX_LRCLK_1; 1937a9ba6151SMark Brown } else { 1938a9ba6151SMark Brown aifdata_reg = WM8996_AIF1TX_DATA_CONFIGURATION_1; 1939a9ba6151SMark Brown lrclk_reg = WM8996_AIF1_TX_LRCLK_1; 1940a9ba6151SMark Brown } 1941a9ba6151SMark Brown dsp_shift = 0; 1942a9ba6151SMark Brown break; 1943a9ba6151SMark Brown case 1: 1944a9ba6151SMark Brown if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || 1945a9ba6151SMark Brown (snd_soc_read(codec, WM8996_GPIO_2)) & WM8996_GP2_FN_MASK) { 1946a9ba6151SMark Brown aifdata_reg = WM8996_AIF2RX_DATA_CONFIGURATION; 1947a9ba6151SMark Brown lrclk_reg = WM8996_AIF2_RX_LRCLK_1; 1948a9ba6151SMark Brown } else { 1949a9ba6151SMark Brown aifdata_reg = WM8996_AIF2TX_DATA_CONFIGURATION_1; 1950a9ba6151SMark Brown lrclk_reg = WM8996_AIF2_TX_LRCLK_1; 1951a9ba6151SMark Brown } 1952a9ba6151SMark Brown dsp_shift = WM8996_DSP2_DIV_SHIFT; 1953a9ba6151SMark Brown break; 1954a9ba6151SMark Brown default: 1955a9ba6151SMark Brown BUG(); 1956a9ba6151SMark Brown return -EINVAL; 1957a9ba6151SMark Brown } 1958a9ba6151SMark Brown 1959a9ba6151SMark Brown bclk_rate = snd_soc_params_to_bclk(params); 1960a9ba6151SMark Brown if (bclk_rate < 0) { 1961a9ba6151SMark Brown dev_err(codec->dev, "Unsupported BCLK rate: %d\n", bclk_rate); 1962a9ba6151SMark Brown return bclk_rate; 1963a9ba6151SMark Brown } 1964a9ba6151SMark Brown 1965a9ba6151SMark Brown wm8996->bclk_rate[dai->id] = bclk_rate; 1966a9ba6151SMark Brown wm8996->rx_rate[dai->id] = params_rate(params); 1967a9ba6151SMark Brown 1968a9ba6151SMark Brown /* Needs looking at for TDM */ 1969a9ba6151SMark Brown bits = snd_pcm_format_width(params_format(params)); 1970a9ba6151SMark Brown if (bits < 0) 1971a9ba6151SMark Brown return bits; 1972a9ba6151SMark Brown aifdata |= (bits << WM8996_AIF1TX_WL_SHIFT) | bits; 1973a9ba6151SMark Brown 1974a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(dsp_divs); i++) { 1975a9ba6151SMark Brown if (dsp_divs[i] == params_rate(params)) 1976a9ba6151SMark Brown break; 1977a9ba6151SMark Brown } 1978a9ba6151SMark Brown if (i == ARRAY_SIZE(dsp_divs)) { 1979a9ba6151SMark Brown dev_err(codec->dev, "Unsupported sample rate %dHz\n", 1980a9ba6151SMark Brown params_rate(params)); 1981a9ba6151SMark Brown return -EINVAL; 1982a9ba6151SMark Brown } 1983a9ba6151SMark Brown dsp |= i << dsp_shift; 1984a9ba6151SMark Brown 1985a9ba6151SMark Brown wm8996_update_bclk(codec); 1986a9ba6151SMark Brown 1987a9ba6151SMark Brown lrclk = bclk_rate / params_rate(params); 1988a9ba6151SMark Brown dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n", 1989a9ba6151SMark Brown lrclk, bclk_rate / lrclk); 1990a9ba6151SMark Brown 1991a9ba6151SMark Brown snd_soc_update_bits(codec, aifdata_reg, 1992a9ba6151SMark Brown WM8996_AIF1TX_WL_MASK | 1993a9ba6151SMark Brown WM8996_AIF1TX_SLOT_LEN_MASK, 1994a9ba6151SMark Brown aifdata); 1995a9ba6151SMark Brown snd_soc_update_bits(codec, lrclk_reg, WM8996_AIF1RX_RATE_MASK, 1996a9ba6151SMark Brown lrclk); 1997a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_2, 19983205e662SAxel Lin WM8996_DSP1_DIV_MASK << dsp_shift, dsp); 1999a9ba6151SMark Brown 2000a9ba6151SMark Brown return 0; 2001a9ba6151SMark Brown } 2002a9ba6151SMark Brown 2003a9ba6151SMark Brown static int wm8996_set_sysclk(struct snd_soc_dai *dai, 2004a9ba6151SMark Brown int clk_id, unsigned int freq, int dir) 2005a9ba6151SMark Brown { 2006a9ba6151SMark Brown struct snd_soc_codec *codec = dai->codec; 2007a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2008a9ba6151SMark Brown int lfclk = 0; 2009a9ba6151SMark Brown int ratediv = 0; 2010a9ba6151SMark Brown int src; 2011a9ba6151SMark Brown int old; 2012a9ba6151SMark Brown 2013a9ba6151SMark Brown if (freq == wm8996->sysclk && clk_id == wm8996->sysclk_src) 2014a9ba6151SMark Brown return 0; 2015a9ba6151SMark Brown 2016a9ba6151SMark Brown /* Disable SYSCLK while we reconfigure */ 2017a9ba6151SMark Brown old = snd_soc_read(codec, WM8996_AIF_CLOCKING_1) & WM8996_SYSCLK_ENA; 2018a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, 2019a9ba6151SMark Brown WM8996_SYSCLK_ENA, 0); 2020a9ba6151SMark Brown 2021a9ba6151SMark Brown switch (clk_id) { 2022a9ba6151SMark Brown case WM8996_SYSCLK_MCLK1: 2023a9ba6151SMark Brown wm8996->sysclk = freq; 2024a9ba6151SMark Brown src = 0; 2025a9ba6151SMark Brown break; 2026a9ba6151SMark Brown case WM8996_SYSCLK_MCLK2: 2027a9ba6151SMark Brown wm8996->sysclk = freq; 2028a9ba6151SMark Brown src = 1; 2029a9ba6151SMark Brown break; 2030a9ba6151SMark Brown case WM8996_SYSCLK_FLL: 2031a9ba6151SMark Brown wm8996->sysclk = freq; 2032a9ba6151SMark Brown src = 2; 2033a9ba6151SMark Brown break; 2034a9ba6151SMark Brown default: 2035a9ba6151SMark Brown dev_err(codec->dev, "Unsupported clock source %d\n", clk_id); 2036a9ba6151SMark Brown return -EINVAL; 2037a9ba6151SMark Brown } 2038a9ba6151SMark Brown 2039a9ba6151SMark Brown switch (wm8996->sysclk) { 2040a9ba6151SMark Brown case 6144000: 2041a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_RATE, 2042a9ba6151SMark Brown WM8996_SYSCLK_RATE, 0); 2043a9ba6151SMark Brown break; 2044a9ba6151SMark Brown case 24576000: 2045a9ba6151SMark Brown ratediv = WM8996_SYSCLK_DIV; 2046a9ba6151SMark Brown case 12288000: 2047a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_RATE, 2048a9ba6151SMark Brown WM8996_SYSCLK_RATE, WM8996_SYSCLK_RATE); 2049a9ba6151SMark Brown break; 2050a9ba6151SMark Brown case 32000: 2051a9ba6151SMark Brown case 32768: 2052a9ba6151SMark Brown lfclk = WM8996_LFCLK_ENA; 2053a9ba6151SMark Brown break; 2054a9ba6151SMark Brown default: 2055a9ba6151SMark Brown dev_warn(codec->dev, "Unsupported clock rate %dHz\n", 2056a9ba6151SMark Brown wm8996->sysclk); 2057a9ba6151SMark Brown return -EINVAL; 2058a9ba6151SMark Brown } 2059a9ba6151SMark Brown 2060a9ba6151SMark Brown wm8996_update_bclk(codec); 2061a9ba6151SMark Brown 2062a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, 2063a9ba6151SMark Brown WM8996_SYSCLK_SRC_MASK | WM8996_SYSCLK_DIV_MASK, 2064a9ba6151SMark Brown src << WM8996_SYSCLK_SRC_SHIFT | ratediv); 2065a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_CLOCKING_1, WM8996_LFCLK_ENA, lfclk); 2066a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, 2067a9ba6151SMark Brown WM8996_SYSCLK_ENA, old); 2068a9ba6151SMark Brown 2069a9ba6151SMark Brown wm8996->sysclk_src = clk_id; 2070a9ba6151SMark Brown 2071a9ba6151SMark Brown return 0; 2072a9ba6151SMark Brown } 2073a9ba6151SMark Brown 2074a9ba6151SMark Brown struct _fll_div { 2075a9ba6151SMark Brown u16 fll_fratio; 2076a9ba6151SMark Brown u16 fll_outdiv; 2077a9ba6151SMark Brown u16 fll_refclk_div; 2078a9ba6151SMark Brown u16 fll_loop_gain; 2079a9ba6151SMark Brown u16 fll_ref_freq; 2080a9ba6151SMark Brown u16 n; 2081a9ba6151SMark Brown u16 theta; 2082a9ba6151SMark Brown u16 lambda; 2083a9ba6151SMark Brown }; 2084a9ba6151SMark Brown 2085a9ba6151SMark Brown static struct { 2086a9ba6151SMark Brown unsigned int min; 2087a9ba6151SMark Brown unsigned int max; 2088a9ba6151SMark Brown u16 fll_fratio; 2089a9ba6151SMark Brown int ratio; 2090a9ba6151SMark Brown } fll_fratios[] = { 2091a9ba6151SMark Brown { 0, 64000, 4, 16 }, 2092a9ba6151SMark Brown { 64000, 128000, 3, 8 }, 2093a9ba6151SMark Brown { 128000, 256000, 2, 4 }, 2094a9ba6151SMark Brown { 256000, 1000000, 1, 2 }, 2095a9ba6151SMark Brown { 1000000, 13500000, 0, 1 }, 2096a9ba6151SMark Brown }; 2097a9ba6151SMark Brown 2098a9ba6151SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 2099a9ba6151SMark Brown unsigned int Fout) 2100a9ba6151SMark Brown { 2101a9ba6151SMark Brown unsigned int target; 2102a9ba6151SMark Brown unsigned int div; 2103a9ba6151SMark Brown unsigned int fratio, gcd_fll; 2104a9ba6151SMark Brown int i; 2105a9ba6151SMark Brown 2106a9ba6151SMark Brown /* Fref must be <=13.5MHz */ 2107a9ba6151SMark Brown div = 1; 2108a9ba6151SMark Brown fll_div->fll_refclk_div = 0; 2109a9ba6151SMark Brown while ((Fref / div) > 13500000) { 2110a9ba6151SMark Brown div *= 2; 2111a9ba6151SMark Brown fll_div->fll_refclk_div++; 2112a9ba6151SMark Brown 2113a9ba6151SMark Brown if (div > 8) { 2114a9ba6151SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 2115a9ba6151SMark Brown Fref); 2116a9ba6151SMark Brown return -EINVAL; 2117a9ba6151SMark Brown } 2118a9ba6151SMark Brown } 2119a9ba6151SMark Brown 2120a9ba6151SMark Brown pr_debug("FLL Fref=%u Fout=%u\n", Fref, Fout); 2121a9ba6151SMark Brown 2122a9ba6151SMark Brown /* Apply the division for our remaining calculations */ 2123a9ba6151SMark Brown Fref /= div; 2124a9ba6151SMark Brown 2125a9ba6151SMark Brown if (Fref >= 3000000) 2126a9ba6151SMark Brown fll_div->fll_loop_gain = 5; 2127a9ba6151SMark Brown else 2128a9ba6151SMark Brown fll_div->fll_loop_gain = 0; 2129a9ba6151SMark Brown 2130a9ba6151SMark Brown if (Fref >= 48000) 2131a9ba6151SMark Brown fll_div->fll_ref_freq = 0; 2132a9ba6151SMark Brown else 2133a9ba6151SMark Brown fll_div->fll_ref_freq = 1; 2134a9ba6151SMark Brown 2135a9ba6151SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 2136a9ba6151SMark Brown div = 2; 2137a9ba6151SMark Brown while (Fout * div < 90000000) { 2138a9ba6151SMark Brown div++; 2139a9ba6151SMark Brown if (div > 64) { 2140a9ba6151SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 2141a9ba6151SMark Brown Fout); 2142a9ba6151SMark Brown return -EINVAL; 2143a9ba6151SMark Brown } 2144a9ba6151SMark Brown } 2145a9ba6151SMark Brown target = Fout * div; 2146a9ba6151SMark Brown fll_div->fll_outdiv = div - 1; 2147a9ba6151SMark Brown 2148a9ba6151SMark Brown pr_debug("FLL Fvco=%dHz\n", target); 2149a9ba6151SMark Brown 2150a9ba6151SMark Brown /* Find an appropraite FLL_FRATIO and factor it out of the target */ 2151a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 2152a9ba6151SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 2153a9ba6151SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 2154a9ba6151SMark Brown fratio = fll_fratios[i].ratio; 2155a9ba6151SMark Brown break; 2156a9ba6151SMark Brown } 2157a9ba6151SMark Brown } 2158a9ba6151SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 2159a9ba6151SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 2160a9ba6151SMark Brown return -EINVAL; 2161a9ba6151SMark Brown } 2162a9ba6151SMark Brown 2163a9ba6151SMark Brown fll_div->n = target / (fratio * Fref); 2164a9ba6151SMark Brown 2165a9ba6151SMark Brown if (target % Fref == 0) { 2166a9ba6151SMark Brown fll_div->theta = 0; 2167a9ba6151SMark Brown fll_div->lambda = 0; 2168a9ba6151SMark Brown } else { 2169a9ba6151SMark Brown gcd_fll = gcd(target, fratio * Fref); 2170a9ba6151SMark Brown 2171a9ba6151SMark Brown fll_div->theta = (target - (fll_div->n * fratio * Fref)) 2172a9ba6151SMark Brown / gcd_fll; 2173a9ba6151SMark Brown fll_div->lambda = (fratio * Fref) / gcd_fll; 2174a9ba6151SMark Brown } 2175a9ba6151SMark Brown 2176a9ba6151SMark Brown pr_debug("FLL N=%x THETA=%x LAMBDA=%x\n", 2177a9ba6151SMark Brown fll_div->n, fll_div->theta, fll_div->lambda); 2178a9ba6151SMark Brown pr_debug("FLL_FRATIO=%x FLL_OUTDIV=%x FLL_REFCLK_DIV=%x\n", 2179a9ba6151SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 2180a9ba6151SMark Brown fll_div->fll_refclk_div); 2181a9ba6151SMark Brown 2182a9ba6151SMark Brown return 0; 2183a9ba6151SMark Brown } 2184a9ba6151SMark Brown 2185a9ba6151SMark Brown static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source, 2186a9ba6151SMark Brown unsigned int Fref, unsigned int Fout) 2187a9ba6151SMark Brown { 2188a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2189a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 2190a9ba6151SMark Brown struct _fll_div fll_div; 2191a9ba6151SMark Brown unsigned long timeout; 219227b6d92aSMark Brown int ret, reg, retry; 2193a9ba6151SMark Brown 2194a9ba6151SMark Brown /* Any change? */ 2195a9ba6151SMark Brown if (source == wm8996->fll_src && Fref == wm8996->fll_fref && 2196a9ba6151SMark Brown Fout == wm8996->fll_fout) 2197a9ba6151SMark Brown return 0; 2198a9ba6151SMark Brown 2199a9ba6151SMark Brown if (Fout == 0) { 2200a9ba6151SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 2201a9ba6151SMark Brown 2202a9ba6151SMark Brown wm8996->fll_fref = 0; 2203a9ba6151SMark Brown wm8996->fll_fout = 0; 2204a9ba6151SMark Brown 2205a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1, 2206a9ba6151SMark Brown WM8996_FLL_ENA, 0); 2207a9ba6151SMark Brown 2208ded71dcbSMark Brown wm8996_bg_disable(codec); 2209ded71dcbSMark Brown 2210a9ba6151SMark Brown return 0; 2211a9ba6151SMark Brown } 2212a9ba6151SMark Brown 2213a9ba6151SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 2214a9ba6151SMark Brown if (ret != 0) 2215a9ba6151SMark Brown return ret; 2216a9ba6151SMark Brown 2217a9ba6151SMark Brown switch (source) { 2218a9ba6151SMark Brown case WM8996_FLL_MCLK1: 2219a9ba6151SMark Brown reg = 0; 2220a9ba6151SMark Brown break; 2221a9ba6151SMark Brown case WM8996_FLL_MCLK2: 2222a9ba6151SMark Brown reg = 1; 2223a9ba6151SMark Brown break; 2224a9ba6151SMark Brown case WM8996_FLL_DACLRCLK1: 2225a9ba6151SMark Brown reg = 2; 2226a9ba6151SMark Brown break; 2227a9ba6151SMark Brown case WM8996_FLL_BCLK1: 2228a9ba6151SMark Brown reg = 3; 2229a9ba6151SMark Brown break; 2230a9ba6151SMark Brown default: 2231a9ba6151SMark Brown dev_err(codec->dev, "Unknown FLL source %d\n", ret); 2232a9ba6151SMark Brown return -EINVAL; 2233a9ba6151SMark Brown } 2234a9ba6151SMark Brown 2235a9ba6151SMark Brown reg |= fll_div.fll_refclk_div << WM8996_FLL_REFCLK_DIV_SHIFT; 2236a9ba6151SMark Brown reg |= fll_div.fll_ref_freq << WM8996_FLL_REF_FREQ_SHIFT; 2237a9ba6151SMark Brown 2238a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_5, 2239a9ba6151SMark Brown WM8996_FLL_REFCLK_DIV_MASK | WM8996_FLL_REF_FREQ | 2240a9ba6151SMark Brown WM8996_FLL_REFCLK_SRC_MASK, reg); 2241a9ba6151SMark Brown 2242a9ba6151SMark Brown reg = 0; 2243a9ba6151SMark Brown if (fll_div.theta || fll_div.lambda) 2244a9ba6151SMark Brown reg |= WM8996_FLL_EFS_ENA | (3 << WM8996_FLL_LFSR_SEL_SHIFT); 2245a9ba6151SMark Brown else 2246a9ba6151SMark Brown reg |= 1 << WM8996_FLL_LFSR_SEL_SHIFT; 2247a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_EFS_2, reg); 2248a9ba6151SMark Brown 2249a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_2, 2250a9ba6151SMark Brown WM8996_FLL_OUTDIV_MASK | 2251a9ba6151SMark Brown WM8996_FLL_FRATIO_MASK, 2252a9ba6151SMark Brown (fll_div.fll_outdiv << WM8996_FLL_OUTDIV_SHIFT) | 2253a9ba6151SMark Brown (fll_div.fll_fratio)); 2254a9ba6151SMark Brown 2255a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_CONTROL_3, fll_div.theta); 2256a9ba6151SMark Brown 2257a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_4, 2258a9ba6151SMark Brown WM8996_FLL_N_MASK | WM8996_FLL_LOOP_GAIN_MASK, 2259a9ba6151SMark Brown (fll_div.n << WM8996_FLL_N_SHIFT) | 2260a9ba6151SMark Brown fll_div.fll_loop_gain); 2261a9ba6151SMark Brown 2262a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_EFS_1, fll_div.lambda); 2263a9ba6151SMark Brown 2264ded71dcbSMark Brown /* Enable the bandgap if it's not already enabled */ 2265ded71dcbSMark Brown ret = snd_soc_read(codec, WM8996_FLL_CONTROL_1); 2266ded71dcbSMark Brown if (!(ret & WM8996_FLL_ENA)) 2267ded71dcbSMark Brown wm8996_bg_enable(codec); 2268ded71dcbSMark Brown 2269a4161945SMark Brown /* Clear any pending completions (eg, from failed startups) */ 2270a4161945SMark Brown try_wait_for_completion(&wm8996->fll_lock); 2271a4161945SMark Brown 2272a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1, 2273a9ba6151SMark Brown WM8996_FLL_ENA, WM8996_FLL_ENA); 2274a9ba6151SMark Brown 2275a9ba6151SMark Brown /* The FLL supports live reconfiguration - kick that in case we were 2276a9ba6151SMark Brown * already enabled. 2277a9ba6151SMark Brown */ 2278a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_CONTROL_6, WM8996_FLL_SWITCH_CLK); 2279a9ba6151SMark Brown 2280a9ba6151SMark Brown /* Wait for the FLL to lock, using the interrupt if possible */ 2281a9ba6151SMark Brown if (Fref > 1000000) 2282a9ba6151SMark Brown timeout = usecs_to_jiffies(300); 2283a9ba6151SMark Brown else 2284a9ba6151SMark Brown timeout = msecs_to_jiffies(2); 2285a9ba6151SMark Brown 228627b6d92aSMark Brown /* Allow substantially longer if we've actually got the IRQ, poll 228727b6d92aSMark Brown * at a slightly higher rate if we don't. 228827b6d92aSMark Brown */ 2289a9ba6151SMark Brown if (i2c->irq) 229027b6d92aSMark Brown timeout *= 10; 229127b6d92aSMark Brown else 229227b6d92aSMark Brown timeout /= 2; 2293a9ba6151SMark Brown 229427b6d92aSMark Brown for (retry = 0; retry < 10; retry++) { 229527b6d92aSMark Brown ret = wait_for_completion_timeout(&wm8996->fll_lock, 229627b6d92aSMark Brown timeout); 229727b6d92aSMark Brown if (ret != 0) { 229827b6d92aSMark Brown WARN_ON(!i2c->irq); 229927b6d92aSMark Brown break; 230027b6d92aSMark Brown } 2301a9ba6151SMark Brown 230227b6d92aSMark Brown ret = snd_soc_read(codec, WM8996_INTERRUPT_RAW_STATUS_2); 230327b6d92aSMark Brown if (ret & WM8996_FLL_LOCK_STS) 230427b6d92aSMark Brown break; 230527b6d92aSMark Brown } 230627b6d92aSMark Brown if (retry == 10) { 2307a9ba6151SMark Brown dev_err(codec->dev, "Timed out waiting for FLL\n"); 2308a9ba6151SMark Brown ret = -ETIMEDOUT; 2309a9ba6151SMark Brown } 2310a9ba6151SMark Brown 2311a9ba6151SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 2312a9ba6151SMark Brown 2313a9ba6151SMark Brown wm8996->fll_fref = Fref; 2314a9ba6151SMark Brown wm8996->fll_fout = Fout; 2315a9ba6151SMark Brown wm8996->fll_src = source; 2316a9ba6151SMark Brown 2317a9ba6151SMark Brown return ret; 2318a9ba6151SMark Brown } 2319a9ba6151SMark Brown 2320a9ba6151SMark Brown #ifdef CONFIG_GPIOLIB 2321a9ba6151SMark Brown static inline struct wm8996_priv *gpio_to_wm8996(struct gpio_chip *chip) 2322a9ba6151SMark Brown { 2323a9ba6151SMark Brown return container_of(chip, struct wm8996_priv, gpio_chip); 2324a9ba6151SMark Brown } 2325a9ba6151SMark Brown 2326a9ba6151SMark Brown static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 2327a9ba6151SMark Brown { 2328a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2329a9ba6151SMark Brown 2330b2d1e233SMark Brown regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2331a9ba6151SMark Brown WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); 2332a9ba6151SMark Brown } 2333a9ba6151SMark Brown 2334a9ba6151SMark Brown static int wm8996_gpio_direction_out(struct gpio_chip *chip, 2335a9ba6151SMark Brown unsigned offset, int value) 2336a9ba6151SMark Brown { 2337a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2338a9ba6151SMark Brown int val; 2339a9ba6151SMark Brown 2340a9ba6151SMark Brown val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT); 2341a9ba6151SMark Brown 2342b2d1e233SMark Brown return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2343a9ba6151SMark Brown WM8996_GP1_FN_MASK | WM8996_GP1_DIR | 2344a9ba6151SMark Brown WM8996_GP1_LVL, val); 2345a9ba6151SMark Brown } 2346a9ba6151SMark Brown 2347a9ba6151SMark Brown static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset) 2348a9ba6151SMark Brown { 2349a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2350b2d1e233SMark Brown unsigned int reg; 2351a9ba6151SMark Brown int ret; 2352a9ba6151SMark Brown 2353b2d1e233SMark Brown ret = regmap_read(wm8996->regmap, WM8996_GPIO_1 + offset, ®); 2354a9ba6151SMark Brown if (ret < 0) 2355a9ba6151SMark Brown return ret; 2356a9ba6151SMark Brown 2357b2d1e233SMark Brown return (reg & WM8996_GP1_LVL) != 0; 2358a9ba6151SMark Brown } 2359a9ba6151SMark Brown 2360a9ba6151SMark Brown static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 2361a9ba6151SMark Brown { 2362a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2363a9ba6151SMark Brown 2364b2d1e233SMark Brown return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2365a9ba6151SMark Brown WM8996_GP1_FN_MASK | WM8996_GP1_DIR, 2366a9ba6151SMark Brown (1 << WM8996_GP1_FN_SHIFT) | 2367a9ba6151SMark Brown (1 << WM8996_GP1_DIR_SHIFT)); 2368a9ba6151SMark Brown } 2369a9ba6151SMark Brown 2370a9ba6151SMark Brown static struct gpio_chip wm8996_template_chip = { 2371a9ba6151SMark Brown .label = "wm8996", 2372a9ba6151SMark Brown .owner = THIS_MODULE, 2373a9ba6151SMark Brown .direction_output = wm8996_gpio_direction_out, 2374a9ba6151SMark Brown .set = wm8996_gpio_set, 2375a9ba6151SMark Brown .direction_input = wm8996_gpio_direction_in, 2376a9ba6151SMark Brown .get = wm8996_gpio_get, 2377a9ba6151SMark Brown .can_sleep = 1, 2378a9ba6151SMark Brown }; 2379a9ba6151SMark Brown 2380b2d1e233SMark Brown static void wm8996_init_gpio(struct wm8996_priv *wm8996) 2381a9ba6151SMark Brown { 2382a9ba6151SMark Brown int ret; 2383a9ba6151SMark Brown 2384a9ba6151SMark Brown wm8996->gpio_chip = wm8996_template_chip; 2385a9ba6151SMark Brown wm8996->gpio_chip.ngpio = 5; 2386b2d1e233SMark Brown wm8996->gpio_chip.dev = wm8996->dev; 2387a9ba6151SMark Brown 2388a9ba6151SMark Brown if (wm8996->pdata.gpio_base) 2389a9ba6151SMark Brown wm8996->gpio_chip.base = wm8996->pdata.gpio_base; 2390a9ba6151SMark Brown else 2391a9ba6151SMark Brown wm8996->gpio_chip.base = -1; 2392a9ba6151SMark Brown 2393a9ba6151SMark Brown ret = gpiochip_add(&wm8996->gpio_chip); 2394a9ba6151SMark Brown if (ret != 0) 2395b2d1e233SMark Brown dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret); 2396a9ba6151SMark Brown } 2397a9ba6151SMark Brown 2398b2d1e233SMark Brown static void wm8996_free_gpio(struct wm8996_priv *wm8996) 2399a9ba6151SMark Brown { 2400a9ba6151SMark Brown int ret; 2401a9ba6151SMark Brown 2402a9ba6151SMark Brown ret = gpiochip_remove(&wm8996->gpio_chip); 2403a9ba6151SMark Brown if (ret != 0) 2404b2d1e233SMark Brown dev_err(wm8996->dev, "Failed to remove GPIOs: %d\n", ret); 2405a9ba6151SMark Brown } 2406a9ba6151SMark Brown #else 2407b2d1e233SMark Brown static void wm8996_init_gpio(struct wm8996_priv *wm8996) 2408a9ba6151SMark Brown { 2409a9ba6151SMark Brown } 2410a9ba6151SMark Brown 2411b2d1e233SMark Brown static void wm8996_free_gpio(struct wm8996_priv *wm8996) 2412a9ba6151SMark Brown { 2413a9ba6151SMark Brown } 2414a9ba6151SMark Brown #endif 2415a9ba6151SMark Brown 2416a9ba6151SMark Brown /** 2417a9ba6151SMark Brown * wm8996_detect - Enable default WM8996 jack detection 2418a9ba6151SMark Brown * 2419a9ba6151SMark Brown * The WM8996 has advanced accessory detection support for headsets. 2420a9ba6151SMark Brown * This function provides a default implementation which integrates 2421a9ba6151SMark Brown * the majority of this functionality with minimal user configuration. 2422a9ba6151SMark Brown * 2423a9ba6151SMark Brown * This will detect headset, headphone and short circuit button and 2424a9ba6151SMark Brown * will also detect inverted microphone ground connections and update 2425a9ba6151SMark Brown * the polarity of the connections. 2426a9ba6151SMark Brown */ 2427a9ba6151SMark Brown int wm8996_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, 2428a9ba6151SMark Brown wm8996_polarity_fn polarity_cb) 2429a9ba6151SMark Brown { 2430a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2431a9ba6151SMark Brown 2432a9ba6151SMark Brown wm8996->jack = jack; 2433a9ba6151SMark Brown wm8996->detecting = true; 2434a9ba6151SMark Brown wm8996->polarity_cb = polarity_cb; 2435a9ba6151SMark Brown 2436a9ba6151SMark Brown if (wm8996->polarity_cb) 2437a9ba6151SMark Brown wm8996->polarity_cb(codec, 0); 2438a9ba6151SMark Brown 2439a9ba6151SMark Brown /* Clear discarge to avoid noise during detection */ 2440a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_1, 2441a9ba6151SMark Brown WM8996_MICB1_DISCH, 0); 2442a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_2, 2443a9ba6151SMark Brown WM8996_MICB2_DISCH, 0); 2444a9ba6151SMark Brown 2445a9ba6151SMark Brown /* LDO2 powers the microphones, SYSCLK clocks detection */ 2446a9ba6151SMark Brown snd_soc_dapm_force_enable_pin(&codec->dapm, "LDO2"); 2447a9ba6151SMark Brown snd_soc_dapm_force_enable_pin(&codec->dapm, "SYSCLK"); 2448a9ba6151SMark Brown 2449a9ba6151SMark Brown /* We start off just enabling microphone detection - even a 2450a9ba6151SMark Brown * plain headphone will trigger detection. 2451a9ba6151SMark Brown */ 2452a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2453a9ba6151SMark Brown WM8996_MICD_ENA, WM8996_MICD_ENA); 2454a9ba6151SMark Brown 2455a9ba6151SMark Brown /* Slowest detection rate, gives debounce for initial detection */ 2456a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2457a9ba6151SMark Brown WM8996_MICD_RATE_MASK, 2458a9ba6151SMark Brown WM8996_MICD_RATE_MASK); 2459a9ba6151SMark Brown 2460a9ba6151SMark Brown /* Enable interrupts and we're off */ 2461a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_INTERRUPT_STATUS_2_MASK, 24620b684cc1SMark Brown WM8996_IM_MICD_EINT | WM8996_HP_DONE_EINT, 0); 2463a9ba6151SMark Brown 2464a9ba6151SMark Brown return 0; 2465a9ba6151SMark Brown } 2466a9ba6151SMark Brown EXPORT_SYMBOL_GPL(wm8996_detect); 2467a9ba6151SMark Brown 24680b684cc1SMark Brown static void wm8996_hpdet_irq(struct snd_soc_codec *codec) 24690b684cc1SMark Brown { 24700b684cc1SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 24710b684cc1SMark Brown int val, reg, report; 24720b684cc1SMark Brown 24730b684cc1SMark Brown /* Assume headphone in error conditions; we need to report 24740b684cc1SMark Brown * something or we stall our state machine. 24750b684cc1SMark Brown */ 24760b684cc1SMark Brown report = SND_JACK_HEADPHONE; 24770b684cc1SMark Brown 24780b684cc1SMark Brown reg = snd_soc_read(codec, WM8996_HEADPHONE_DETECT_2); 24790b684cc1SMark Brown if (reg < 0) { 24800b684cc1SMark Brown dev_err(codec->dev, "Failed to read HPDET status\n"); 24810b684cc1SMark Brown goto out; 24820b684cc1SMark Brown } 24830b684cc1SMark Brown 24840b684cc1SMark Brown if (!(reg & WM8996_HP_DONE)) { 24850b684cc1SMark Brown dev_err(codec->dev, "Got HPDET IRQ but HPDET is busy\n"); 24860b684cc1SMark Brown goto out; 24870b684cc1SMark Brown } 24880b684cc1SMark Brown 24890b684cc1SMark Brown val = reg & WM8996_HP_LVL_MASK; 24900b684cc1SMark Brown 24910b684cc1SMark Brown dev_dbg(codec->dev, "HPDET measured %d ohms\n", val); 24920b684cc1SMark Brown 24930b684cc1SMark Brown /* If we've got high enough impedence then report as line, 24940b684cc1SMark Brown * otherwise assume headphone. 24950b684cc1SMark Brown */ 24960b684cc1SMark Brown if (val >= 126) 24970b684cc1SMark Brown report = SND_JACK_LINEOUT; 24980b684cc1SMark Brown else 24990b684cc1SMark Brown report = SND_JACK_HEADPHONE; 25000b684cc1SMark Brown 25010b684cc1SMark Brown out: 25020b684cc1SMark Brown if (wm8996->jack_mic) 25030b684cc1SMark Brown report |= SND_JACK_MICROPHONE; 25040b684cc1SMark Brown 25050b684cc1SMark Brown snd_soc_jack_report(wm8996->jack, report, 25060b684cc1SMark Brown SND_JACK_LINEOUT | SND_JACK_HEADSET); 25070b684cc1SMark Brown 25080b684cc1SMark Brown wm8996->detecting = false; 25090b684cc1SMark Brown 25100b684cc1SMark Brown /* If the output isn't running re-clamp it */ 25110b684cc1SMark Brown if (!(snd_soc_read(codec, WM8996_POWER_MANAGEMENT_1) & 25120b684cc1SMark Brown (WM8996_HPOUT1L_ENA | WM8996_HPOUT1R_RMV_SHORT))) 25130b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, 25140b684cc1SMark Brown WM8996_HPOUT1L_RMV_SHORT | 25150b684cc1SMark Brown WM8996_HPOUT1R_RMV_SHORT, 0); 25160b684cc1SMark Brown 25170b684cc1SMark Brown /* Go back to looking at the microphone */ 25180b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_1, 25190b684cc1SMark Brown WM8996_JD_MODE_MASK, 0); 25200b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 25210b684cc1SMark Brown WM8996_MICD_ENA); 25220b684cc1SMark Brown 25230b684cc1SMark Brown snd_soc_dapm_disable_pin(&codec->dapm, "Bandgap"); 25240b684cc1SMark Brown snd_soc_dapm_sync(&codec->dapm); 25250b684cc1SMark Brown } 25260b684cc1SMark Brown 25270b684cc1SMark Brown static void wm8996_hpdet_start(struct snd_soc_codec *codec) 25280b684cc1SMark Brown { 25290b684cc1SMark Brown /* Unclamp the output, we can't measure while we're shorting it */ 25300b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, 25310b684cc1SMark Brown WM8996_HPOUT1L_RMV_SHORT | 25320b684cc1SMark Brown WM8996_HPOUT1R_RMV_SHORT, 25330b684cc1SMark Brown WM8996_HPOUT1L_RMV_SHORT | 25340b684cc1SMark Brown WM8996_HPOUT1R_RMV_SHORT); 25350b684cc1SMark Brown 25360b684cc1SMark Brown /* We need bandgap for HPDET */ 25370b684cc1SMark Brown snd_soc_dapm_force_enable_pin(&codec->dapm, "Bandgap"); 25380b684cc1SMark Brown snd_soc_dapm_sync(&codec->dapm); 25390b684cc1SMark Brown 25400b684cc1SMark Brown /* Go into headphone detect left mode */ 25410b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 0); 25420b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_1, 25430b684cc1SMark Brown WM8996_JD_MODE_MASK, 1); 25440b684cc1SMark Brown 25450b684cc1SMark Brown /* Trigger a measurement */ 25460b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_HEADPHONE_DETECT_1, 25470b684cc1SMark Brown WM8996_HP_POLL, WM8996_HP_POLL); 25480b684cc1SMark Brown } 25490b684cc1SMark Brown 2550a9ba6151SMark Brown static void wm8996_micd(struct snd_soc_codec *codec) 2551a9ba6151SMark Brown { 2552a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2553a9ba6151SMark Brown int val, reg; 2554a9ba6151SMark Brown 2555a9ba6151SMark Brown val = snd_soc_read(codec, WM8996_MIC_DETECT_3); 2556a9ba6151SMark Brown 2557a9ba6151SMark Brown dev_dbg(codec->dev, "Microphone event: %x\n", val); 2558a9ba6151SMark Brown 2559a9ba6151SMark Brown if (!(val & WM8996_MICD_VALID)) { 2560a9ba6151SMark Brown dev_warn(codec->dev, "Microphone detection state invalid\n"); 2561a9ba6151SMark Brown return; 2562a9ba6151SMark Brown } 2563a9ba6151SMark Brown 2564a9ba6151SMark Brown /* No accessory, reset everything and report removal */ 2565a9ba6151SMark Brown if (!(val & WM8996_MICD_STS)) { 2566a9ba6151SMark Brown dev_dbg(codec->dev, "Jack removal detected\n"); 2567a9ba6151SMark Brown wm8996->jack_mic = false; 2568a9ba6151SMark Brown wm8996->detecting = true; 2569a9ba6151SMark Brown snd_soc_jack_report(wm8996->jack, 0, 25700b684cc1SMark Brown SND_JACK_LINEOUT | SND_JACK_HEADSET | 25710b684cc1SMark Brown SND_JACK_BTN_0); 25720b684cc1SMark Brown 2573a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2574a9ba6151SMark Brown WM8996_MICD_RATE_MASK, 2575a9ba6151SMark Brown WM8996_MICD_RATE_MASK); 2576a9ba6151SMark Brown return; 2577a9ba6151SMark Brown } 2578a9ba6151SMark Brown 25790b684cc1SMark Brown /* If the measurement is very high we've got a microphone, 25800b684cc1SMark Brown * either we just detected one or if we already reported then 25810b684cc1SMark Brown * we've got a button release event. 2582a9ba6151SMark Brown */ 2583a9ba6151SMark Brown if (val & 0x400) { 25840b684cc1SMark Brown if (wm8996->detecting) { 2585a9ba6151SMark Brown dev_dbg(codec->dev, "Microphone detected\n"); 2586a9ba6151SMark Brown wm8996->jack_mic = true; 25870b684cc1SMark Brown wm8996_hpdet_start(codec); 2588a9ba6151SMark Brown 2589a9ba6151SMark Brown /* Increase poll rate to give better responsiveness 2590a9ba6151SMark Brown * for buttons */ 2591a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2592a9ba6151SMark Brown WM8996_MICD_RATE_MASK, 2593a9ba6151SMark Brown 5 << WM8996_MICD_RATE_SHIFT); 25940b684cc1SMark Brown } else { 25950b684cc1SMark Brown dev_dbg(codec->dev, "Mic button up\n"); 25960b684cc1SMark Brown snd_soc_jack_report(wm8996->jack, 0, SND_JACK_BTN_0); 25970b684cc1SMark Brown } 25980b684cc1SMark Brown 25990b684cc1SMark Brown return; 2600a9ba6151SMark Brown } 2601a9ba6151SMark Brown 2602a9ba6151SMark Brown /* If we detected a lower impedence during initial startup 2603a9ba6151SMark Brown * then we probably have the wrong polarity, flip it. Don't 2604a9ba6151SMark Brown * do this for the lowest impedences to speed up detection of 2605a9ba6151SMark Brown * plain headphones. 2606a9ba6151SMark Brown */ 2607a9ba6151SMark Brown if (wm8996->detecting && (val & 0x3f0)) { 2608a9ba6151SMark Brown reg = snd_soc_read(codec, WM8996_ACCESSORY_DETECT_MODE_2); 2609a9ba6151SMark Brown reg ^= WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC | 2610a9ba6151SMark Brown WM8996_MICD_BIAS_SRC; 2611a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_2, 2612a9ba6151SMark Brown WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC | 2613a9ba6151SMark Brown WM8996_MICD_BIAS_SRC, reg); 2614a9ba6151SMark Brown 2615a9ba6151SMark Brown if (wm8996->polarity_cb) 2616a9ba6151SMark Brown wm8996->polarity_cb(codec, 2617a9ba6151SMark Brown (reg & WM8996_MICD_SRC) != 0); 2618a9ba6151SMark Brown 2619a9ba6151SMark Brown dev_dbg(codec->dev, "Set microphone polarity to %d\n", 2620a9ba6151SMark Brown (reg & WM8996_MICD_SRC) != 0); 2621a9ba6151SMark Brown 2622a9ba6151SMark Brown return; 2623a9ba6151SMark Brown } 2624a9ba6151SMark Brown 2625a9ba6151SMark Brown /* Don't distinguish between buttons, just report any low 2626a9ba6151SMark Brown * impedence as BTN_0. 2627a9ba6151SMark Brown */ 2628a9ba6151SMark Brown if (val & 0x3fc) { 2629a9ba6151SMark Brown if (wm8996->jack_mic) { 2630a9ba6151SMark Brown dev_dbg(codec->dev, "Mic button detected\n"); 26310b684cc1SMark Brown snd_soc_jack_report(wm8996->jack, SND_JACK_BTN_0, 2632a9ba6151SMark Brown SND_JACK_BTN_0); 26330b684cc1SMark Brown } else if (wm8996->detecting) { 26340b684cc1SMark Brown dev_dbg(codec->dev, "Headphone detected\n"); 26350b684cc1SMark Brown wm8996_hpdet_start(codec); 2636a9ba6151SMark Brown 2637a9ba6151SMark Brown /* Increase the detection rate a bit for 2638a9ba6151SMark Brown * responsiveness. 2639a9ba6151SMark Brown */ 2640a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2641a9ba6151SMark Brown WM8996_MICD_RATE_MASK, 2642a9ba6151SMark Brown 7 << WM8996_MICD_RATE_SHIFT); 2643a9ba6151SMark Brown } 2644a9ba6151SMark Brown } 2645a9ba6151SMark Brown } 2646a9ba6151SMark Brown 2647a9ba6151SMark Brown static irqreturn_t wm8996_irq(int irq, void *data) 2648a9ba6151SMark Brown { 2649a9ba6151SMark Brown struct snd_soc_codec *codec = data; 2650a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2651a9ba6151SMark Brown int irq_val; 2652a9ba6151SMark Brown 2653a9ba6151SMark Brown irq_val = snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2); 2654a9ba6151SMark Brown if (irq_val < 0) { 2655a9ba6151SMark Brown dev_err(codec->dev, "Failed to read IRQ status: %d\n", 2656a9ba6151SMark Brown irq_val); 2657a9ba6151SMark Brown return IRQ_NONE; 2658a9ba6151SMark Brown } 2659a9ba6151SMark Brown irq_val &= ~snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2_MASK); 2660a9ba6151SMark Brown 26612fde6e80SMark Brown if (!irq_val) 26622fde6e80SMark Brown return IRQ_NONE; 26632fde6e80SMark Brown 266484497091SMark Brown snd_soc_write(codec, WM8996_INTERRUPT_STATUS_2, irq_val); 266584497091SMark Brown 2666a9ba6151SMark Brown if (irq_val & (WM8996_DCS_DONE_01_EINT | WM8996_DCS_DONE_23_EINT)) { 2667a9ba6151SMark Brown dev_dbg(codec->dev, "DC servo IRQ\n"); 2668a9ba6151SMark Brown complete(&wm8996->dcs_done); 2669a9ba6151SMark Brown } 2670a9ba6151SMark Brown 2671a9ba6151SMark Brown if (irq_val & WM8996_FIFOS_ERR_EINT) 2672a9ba6151SMark Brown dev_err(codec->dev, "Digital core FIFO error\n"); 2673a9ba6151SMark Brown 2674a9ba6151SMark Brown if (irq_val & WM8996_FLL_LOCK_EINT) { 2675a9ba6151SMark Brown dev_dbg(codec->dev, "FLL locked\n"); 2676a9ba6151SMark Brown complete(&wm8996->fll_lock); 2677a9ba6151SMark Brown } 2678a9ba6151SMark Brown 2679a9ba6151SMark Brown if (irq_val & WM8996_MICD_EINT) 2680a9ba6151SMark Brown wm8996_micd(codec); 2681a9ba6151SMark Brown 26820b684cc1SMark Brown if (irq_val & WM8996_HP_DONE_EINT) 26830b684cc1SMark Brown wm8996_hpdet_irq(codec); 26840b684cc1SMark Brown 2685a9ba6151SMark Brown return IRQ_HANDLED; 2686a9ba6151SMark Brown } 2687a9ba6151SMark Brown 2688a9ba6151SMark Brown static irqreturn_t wm8996_edge_irq(int irq, void *data) 2689a9ba6151SMark Brown { 2690a9ba6151SMark Brown irqreturn_t ret = IRQ_NONE; 2691a9ba6151SMark Brown irqreturn_t val; 2692a9ba6151SMark Brown 2693a9ba6151SMark Brown do { 2694a9ba6151SMark Brown val = wm8996_irq(irq, data); 2695a9ba6151SMark Brown if (val != IRQ_NONE) 2696a9ba6151SMark Brown ret = val; 2697a9ba6151SMark Brown } while (val != IRQ_NONE); 2698a9ba6151SMark Brown 2699a9ba6151SMark Brown return ret; 2700a9ba6151SMark Brown } 2701a9ba6151SMark Brown 2702a9ba6151SMark Brown static void wm8996_retune_mobile_pdata(struct snd_soc_codec *codec) 2703a9ba6151SMark Brown { 2704a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2705a9ba6151SMark Brown struct wm8996_pdata *pdata = &wm8996->pdata; 2706a9ba6151SMark Brown 2707a9ba6151SMark Brown struct snd_kcontrol_new controls[] = { 2708a9ba6151SMark Brown SOC_ENUM_EXT("DSP1 EQ Mode", 2709a9ba6151SMark Brown wm8996->retune_mobile_enum, 2710a9ba6151SMark Brown wm8996_get_retune_mobile_enum, 2711a9ba6151SMark Brown wm8996_put_retune_mobile_enum), 2712a9ba6151SMark Brown SOC_ENUM_EXT("DSP2 EQ Mode", 2713a9ba6151SMark Brown wm8996->retune_mobile_enum, 2714a9ba6151SMark Brown wm8996_get_retune_mobile_enum, 2715a9ba6151SMark Brown wm8996_put_retune_mobile_enum), 2716a9ba6151SMark Brown }; 2717a9ba6151SMark Brown int ret, i, j; 2718a9ba6151SMark Brown const char **t; 2719a9ba6151SMark Brown 2720a9ba6151SMark Brown /* We need an array of texts for the enum API but the number 2721a9ba6151SMark Brown * of texts is likely to be less than the number of 2722a9ba6151SMark Brown * configurations due to the sample rate dependency of the 2723a9ba6151SMark Brown * configurations. */ 2724a9ba6151SMark Brown wm8996->num_retune_mobile_texts = 0; 2725a9ba6151SMark Brown wm8996->retune_mobile_texts = NULL; 2726a9ba6151SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 2727a9ba6151SMark Brown for (j = 0; j < wm8996->num_retune_mobile_texts; j++) { 2728a9ba6151SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 2729a9ba6151SMark Brown wm8996->retune_mobile_texts[j]) == 0) 2730a9ba6151SMark Brown break; 2731a9ba6151SMark Brown } 2732a9ba6151SMark Brown 2733a9ba6151SMark Brown if (j != wm8996->num_retune_mobile_texts) 2734a9ba6151SMark Brown continue; 2735a9ba6151SMark Brown 2736a9ba6151SMark Brown /* Expand the array... */ 2737a9ba6151SMark Brown t = krealloc(wm8996->retune_mobile_texts, 2738a9ba6151SMark Brown sizeof(char *) * 2739a9ba6151SMark Brown (wm8996->num_retune_mobile_texts + 1), 2740a9ba6151SMark Brown GFP_KERNEL); 2741a9ba6151SMark Brown if (t == NULL) 2742a9ba6151SMark Brown continue; 2743a9ba6151SMark Brown 2744a9ba6151SMark Brown /* ...store the new entry... */ 2745a9ba6151SMark Brown t[wm8996->num_retune_mobile_texts] = 2746a9ba6151SMark Brown pdata->retune_mobile_cfgs[i].name; 2747a9ba6151SMark Brown 2748a9ba6151SMark Brown /* ...and remember the new version. */ 2749a9ba6151SMark Brown wm8996->num_retune_mobile_texts++; 2750a9ba6151SMark Brown wm8996->retune_mobile_texts = t; 2751a9ba6151SMark Brown } 2752a9ba6151SMark Brown 2753a9ba6151SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 2754a9ba6151SMark Brown wm8996->num_retune_mobile_texts); 2755a9ba6151SMark Brown 2756a9ba6151SMark Brown wm8996->retune_mobile_enum.max = wm8996->num_retune_mobile_texts; 2757a9ba6151SMark Brown wm8996->retune_mobile_enum.texts = wm8996->retune_mobile_texts; 2758a9ba6151SMark Brown 2759a9ba6151SMark Brown ret = snd_soc_add_controls(codec, controls, ARRAY_SIZE(controls)); 2760a9ba6151SMark Brown if (ret != 0) 2761a9ba6151SMark Brown dev_err(codec->dev, 2762a9ba6151SMark Brown "Failed to add ReTune Mobile controls: %d\n", ret); 2763a9ba6151SMark Brown } 2764a9ba6151SMark Brown 276579172746SMark Brown static const struct regmap_config wm8996_regmap = { 276679172746SMark Brown .reg_bits = 16, 276779172746SMark Brown .val_bits = 16, 276879172746SMark Brown 276979172746SMark Brown .max_register = WM8996_MAX_REGISTER, 277079172746SMark Brown .reg_defaults = wm8996_reg, 277179172746SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8996_reg), 277279172746SMark Brown .volatile_reg = wm8996_volatile_register, 277379172746SMark Brown .readable_reg = wm8996_readable_register, 277479172746SMark Brown .cache_type = REGCACHE_RBTREE, 277579172746SMark Brown }; 277679172746SMark Brown 2777a9ba6151SMark Brown static int wm8996_probe(struct snd_soc_codec *codec) 2778a9ba6151SMark Brown { 2779a9ba6151SMark Brown int ret; 2780a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2781a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 2782a9ba6151SMark Brown struct snd_soc_dapm_context *dapm = &codec->dapm; 2783a9ba6151SMark Brown int i, irq_flags; 2784a9ba6151SMark Brown 2785a9ba6151SMark Brown wm8996->codec = codec; 2786a9ba6151SMark Brown 2787a9ba6151SMark Brown init_completion(&wm8996->dcs_done); 2788a9ba6151SMark Brown init_completion(&wm8996->fll_lock); 2789a9ba6151SMark Brown 2790a9ba6151SMark Brown dapm->idle_bias_off = true; 2791a9ba6151SMark Brown 2792ee5f3872SMark Brown codec->control_data = wm8996->regmap; 279379172746SMark Brown 279479172746SMark Brown ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); 2795a9ba6151SMark Brown if (ret != 0) { 2796a9ba6151SMark Brown dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 2797ee5f3872SMark Brown goto err; 2798a9ba6151SMark Brown } 2799a9ba6151SMark Brown 2800a9ba6151SMark Brown wm8996->disable_nb[0].notifier_call = wm8996_regulator_event_0; 2801a9ba6151SMark Brown wm8996->disable_nb[1].notifier_call = wm8996_regulator_event_1; 2802a9ba6151SMark Brown wm8996->disable_nb[2].notifier_call = wm8996_regulator_event_2; 2803c83495afSMark Brown 2804a9ba6151SMark Brown /* This should really be moved into the regulator core */ 2805a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) { 2806a9ba6151SMark Brown ret = regulator_register_notifier(wm8996->supplies[i].consumer, 2807a9ba6151SMark Brown &wm8996->disable_nb[i]); 2808a9ba6151SMark Brown if (ret != 0) { 2809a9ba6151SMark Brown dev_err(codec->dev, 2810a9ba6151SMark Brown "Failed to register regulator notifier: %d\n", 2811a9ba6151SMark Brown ret); 2812a9ba6151SMark Brown } 2813a9ba6151SMark Brown } 2814a9ba6151SMark Brown 281579172746SMark Brown regcache_cache_only(codec->control_data, true); 2816a9ba6151SMark Brown 2817a9ba6151SMark Brown /* Apply platform data settings */ 2818a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_LINE_INPUT_CONTROL, 2819a9ba6151SMark Brown WM8996_INL_MODE_MASK | WM8996_INR_MODE_MASK, 2820a9ba6151SMark Brown wm8996->pdata.inl_mode << WM8996_INL_MODE_SHIFT | 2821a9ba6151SMark Brown wm8996->pdata.inr_mode); 2822a9ba6151SMark Brown 2823a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->pdata.gpio_default); i++) { 2824a9ba6151SMark Brown if (!wm8996->pdata.gpio_default[i]) 2825a9ba6151SMark Brown continue; 2826a9ba6151SMark Brown 2827a9ba6151SMark Brown snd_soc_write(codec, WM8996_GPIO_1 + i, 2828a9ba6151SMark Brown wm8996->pdata.gpio_default[i] & 0xffff); 2829a9ba6151SMark Brown } 2830a9ba6151SMark Brown 2831a9ba6151SMark Brown if (wm8996->pdata.spkmute_seq) 2832a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 2833a9ba6151SMark Brown WM8996_SPK_MUTE_ENDIAN | 2834a9ba6151SMark Brown WM8996_SPK_MUTE_SEQ1_MASK, 2835a9ba6151SMark Brown wm8996->pdata.spkmute_seq); 2836a9ba6151SMark Brown 2837a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_2, 2838a9ba6151SMark Brown WM8996_MICD_BIAS_SRC | WM8996_HPOUT1FB_SRC | 2839a9ba6151SMark Brown WM8996_MICD_SRC, wm8996->pdata.micdet_def); 2840a9ba6151SMark Brown 2841a9ba6151SMark Brown /* Latch volume update bits */ 2842a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_LEFT_LINE_INPUT_VOLUME, 2843a9ba6151SMark Brown WM8996_IN1_VU, WM8996_IN1_VU); 2844a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_RIGHT_LINE_INPUT_VOLUME, 2845a9ba6151SMark Brown WM8996_IN1_VU, WM8996_IN1_VU); 2846a9ba6151SMark Brown 2847a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DAC1_LEFT_VOLUME, 2848a9ba6151SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2849a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DAC1_RIGHT_VOLUME, 2850a9ba6151SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2851a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DAC2_LEFT_VOLUME, 2852a9ba6151SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2853a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DAC2_RIGHT_VOLUME, 2854a9ba6151SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2855a9ba6151SMark Brown 2856a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_OUTPUT1_LEFT_VOLUME, 2857a9ba6151SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2858a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_OUTPUT1_RIGHT_VOLUME, 2859a9ba6151SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2860a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_OUTPUT2_LEFT_VOLUME, 2861a9ba6151SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2862a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_OUTPUT2_RIGHT_VOLUME, 2863a9ba6151SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2864a9ba6151SMark Brown 2865a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP1_TX_LEFT_VOLUME, 2866a9ba6151SMark Brown WM8996_DSP1TX_VU, WM8996_DSP1TX_VU); 2867a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP1_TX_RIGHT_VOLUME, 2868a9ba6151SMark Brown WM8996_DSP1TX_VU, WM8996_DSP1TX_VU); 2869a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP2_TX_LEFT_VOLUME, 2870a9ba6151SMark Brown WM8996_DSP2TX_VU, WM8996_DSP2TX_VU); 2871a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP2_TX_RIGHT_VOLUME, 2872a9ba6151SMark Brown WM8996_DSP2TX_VU, WM8996_DSP2TX_VU); 2873a9ba6151SMark Brown 2874a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP1_RX_LEFT_VOLUME, 2875a9ba6151SMark Brown WM8996_DSP1RX_VU, WM8996_DSP1RX_VU); 2876a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP1_RX_RIGHT_VOLUME, 2877a9ba6151SMark Brown WM8996_DSP1RX_VU, WM8996_DSP1RX_VU); 2878a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP2_RX_LEFT_VOLUME, 2879a9ba6151SMark Brown WM8996_DSP2RX_VU, WM8996_DSP2RX_VU); 2880a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_DSP2_RX_RIGHT_VOLUME, 2881a9ba6151SMark Brown WM8996_DSP2RX_VU, WM8996_DSP2RX_VU); 2882a9ba6151SMark Brown 2883a9ba6151SMark Brown /* No support currently for the underclocked TDM modes and 2884a9ba6151SMark Brown * pick a default TDM layout with each channel pair working with 2885a9ba6151SMark Brown * slots 0 and 1. */ 2886a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 2887a9ba6151SMark Brown WM8996_AIF1RX_CHAN0_SLOTS_MASK | 2888a9ba6151SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2889a9ba6151SMark Brown 1 << WM8996_AIF1RX_CHAN0_SLOTS_SHIFT | 0); 2890a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 2891a9ba6151SMark Brown WM8996_AIF1RX_CHAN1_SLOTS_MASK | 2892a9ba6151SMark Brown WM8996_AIF1RX_CHAN1_START_SLOT_MASK, 2893a9ba6151SMark Brown 1 << WM8996_AIF1RX_CHAN1_SLOTS_SHIFT | 1); 2894a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 2895a9ba6151SMark Brown WM8996_AIF1RX_CHAN2_SLOTS_MASK | 2896a9ba6151SMark Brown WM8996_AIF1RX_CHAN2_START_SLOT_MASK, 2897a9ba6151SMark Brown 1 << WM8996_AIF1RX_CHAN2_SLOTS_SHIFT | 0); 2898a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 2899a9ba6151SMark Brown WM8996_AIF1RX_CHAN3_SLOTS_MASK | 2900a9ba6151SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2901a9ba6151SMark Brown 1 << WM8996_AIF1RX_CHAN3_SLOTS_SHIFT | 1); 2902a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 2903a9ba6151SMark Brown WM8996_AIF1RX_CHAN4_SLOTS_MASK | 2904a9ba6151SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2905a9ba6151SMark Brown 1 << WM8996_AIF1RX_CHAN4_SLOTS_SHIFT | 0); 2906a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 2907a9ba6151SMark Brown WM8996_AIF1RX_CHAN5_SLOTS_MASK | 2908a9ba6151SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2909a9ba6151SMark Brown 1 << WM8996_AIF1RX_CHAN5_SLOTS_SHIFT | 1); 2910a9ba6151SMark Brown 2911a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 2912a9ba6151SMark Brown WM8996_AIF2RX_CHAN0_SLOTS_MASK | 2913a9ba6151SMark Brown WM8996_AIF2RX_CHAN0_START_SLOT_MASK, 2914a9ba6151SMark Brown 1 << WM8996_AIF2RX_CHAN0_SLOTS_SHIFT | 0); 2915a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 2916a9ba6151SMark Brown WM8996_AIF2RX_CHAN1_SLOTS_MASK | 2917a9ba6151SMark Brown WM8996_AIF2RX_CHAN1_START_SLOT_MASK, 2918a9ba6151SMark Brown 1 << WM8996_AIF2RX_CHAN1_SLOTS_SHIFT | 1); 2919a9ba6151SMark Brown 2920a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 2921a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_SLOTS_MASK | 2922a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2923a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN0_SLOTS_SHIFT | 0); 2924a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 2925a9ba6151SMark Brown WM8996_AIF1TX_CHAN1_SLOTS_MASK | 2926a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2927a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1); 2928a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 2929a9ba6151SMark Brown WM8996_AIF1TX_CHAN2_SLOTS_MASK | 2930a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2931a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN2_SLOTS_SHIFT | 0); 2932a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 2933a9ba6151SMark Brown WM8996_AIF1TX_CHAN3_SLOTS_MASK | 2934a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2935a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN3_SLOTS_SHIFT | 1); 2936a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 2937a9ba6151SMark Brown WM8996_AIF1TX_CHAN4_SLOTS_MASK | 2938a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2939a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN4_SLOTS_SHIFT | 0); 2940a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 2941a9ba6151SMark Brown WM8996_AIF1TX_CHAN5_SLOTS_MASK | 2942a9ba6151SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2943a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN5_SLOTS_SHIFT | 1); 2944a9ba6151SMark Brown 2945a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 2946a9ba6151SMark Brown WM8996_AIF2TX_CHAN0_SLOTS_MASK | 2947a9ba6151SMark Brown WM8996_AIF2TX_CHAN0_START_SLOT_MASK, 2948a9ba6151SMark Brown 1 << WM8996_AIF2TX_CHAN0_SLOTS_SHIFT | 0); 2949a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 2950a9ba6151SMark Brown WM8996_AIF2TX_CHAN1_SLOTS_MASK | 2951a9ba6151SMark Brown WM8996_AIF2TX_CHAN1_START_SLOT_MASK, 2952a9ba6151SMark Brown 1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1); 2953a9ba6151SMark Brown 2954a9ba6151SMark Brown if (wm8996->pdata.num_retune_mobile_cfgs) 2955a9ba6151SMark Brown wm8996_retune_mobile_pdata(codec); 2956a9ba6151SMark Brown else 2957a9ba6151SMark Brown snd_soc_add_controls(codec, wm8996_eq_controls, 2958a9ba6151SMark Brown ARRAY_SIZE(wm8996_eq_controls)); 2959a9ba6151SMark Brown 2960a9ba6151SMark Brown /* If the TX LRCLK pins are not in LRCLK mode configure the 2961a9ba6151SMark Brown * AIFs to source their clocks from the RX LRCLKs. 2962a9ba6151SMark Brown */ 2963a9ba6151SMark Brown if ((snd_soc_read(codec, WM8996_GPIO_1))) 2964a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF1_TX_LRCLK_2, 2965a9ba6151SMark Brown WM8996_AIF1TX_LRCLK_MODE, 2966a9ba6151SMark Brown WM8996_AIF1TX_LRCLK_MODE); 2967a9ba6151SMark Brown 2968a9ba6151SMark Brown if ((snd_soc_read(codec, WM8996_GPIO_2))) 2969a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF2_TX_LRCLK_2, 2970a9ba6151SMark Brown WM8996_AIF2TX_LRCLK_MODE, 2971a9ba6151SMark Brown WM8996_AIF2TX_LRCLK_MODE); 2972a9ba6151SMark Brown 2973a9ba6151SMark Brown if (i2c->irq) { 2974a9ba6151SMark Brown if (wm8996->pdata.irq_flags) 2975a9ba6151SMark Brown irq_flags = wm8996->pdata.irq_flags; 2976a9ba6151SMark Brown else 2977a9ba6151SMark Brown irq_flags = IRQF_TRIGGER_LOW; 2978a9ba6151SMark Brown 2979a9ba6151SMark Brown irq_flags |= IRQF_ONESHOT; 2980a9ba6151SMark Brown 2981a9ba6151SMark Brown if (irq_flags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) 2982a9ba6151SMark Brown ret = request_threaded_irq(i2c->irq, NULL, 2983a9ba6151SMark Brown wm8996_edge_irq, 2984a9ba6151SMark Brown irq_flags, "wm8996", codec); 2985a9ba6151SMark Brown else 2986a9ba6151SMark Brown ret = request_threaded_irq(i2c->irq, NULL, wm8996_irq, 2987a9ba6151SMark Brown irq_flags, "wm8996", codec); 2988a9ba6151SMark Brown 2989a9ba6151SMark Brown if (ret == 0) { 2990a9ba6151SMark Brown /* Unmask the interrupt */ 2991a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_INTERRUPT_CONTROL, 2992a9ba6151SMark Brown WM8996_IM_IRQ, 0); 2993a9ba6151SMark Brown 2994a9ba6151SMark Brown /* Enable error reporting and DC servo status */ 2995a9ba6151SMark Brown snd_soc_update_bits(codec, 2996a9ba6151SMark Brown WM8996_INTERRUPT_STATUS_2_MASK, 2997a9ba6151SMark Brown WM8996_IM_DCS_DONE_23_EINT | 2998a9ba6151SMark Brown WM8996_IM_DCS_DONE_01_EINT | 2999a9ba6151SMark Brown WM8996_IM_FLL_LOCK_EINT | 3000a9ba6151SMark Brown WM8996_IM_FIFOS_ERR_EINT, 3001a9ba6151SMark Brown 0); 3002a9ba6151SMark Brown } else { 3003a9ba6151SMark Brown dev_err(codec->dev, "Failed to request IRQ: %d\n", 3004a9ba6151SMark Brown ret); 3005a9ba6151SMark Brown } 3006a9ba6151SMark Brown } 3007a9ba6151SMark Brown 3008a9ba6151SMark Brown return 0; 3009a9ba6151SMark Brown 3010a9ba6151SMark Brown err: 3011a9ba6151SMark Brown return ret; 3012a9ba6151SMark Brown } 3013a9ba6151SMark Brown 3014a9ba6151SMark Brown static int wm8996_remove(struct snd_soc_codec *codec) 3015a9ba6151SMark Brown { 3016a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 3017a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 3018a9ba6151SMark Brown int i; 3019a9ba6151SMark Brown 3020a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_INTERRUPT_CONTROL, 3021a9ba6151SMark Brown WM8996_IM_IRQ, WM8996_IM_IRQ); 3022a9ba6151SMark Brown 3023a9ba6151SMark Brown if (i2c->irq) 3024a9ba6151SMark Brown free_irq(i2c->irq, codec); 3025a9ba6151SMark Brown 3026a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) 3027a9ba6151SMark Brown regulator_unregister_notifier(wm8996->supplies[i].consumer, 3028a9ba6151SMark Brown &wm8996->disable_nb[i]); 3029c83495afSMark Brown regulator_put(wm8996->cpvdd); 3030a9ba6151SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 3031a9ba6151SMark Brown 3032a9ba6151SMark Brown return 0; 3033a9ba6151SMark Brown } 3034a9ba6151SMark Brown 3035a9ba6151SMark Brown static struct snd_soc_codec_driver soc_codec_dev_wm8996 = { 3036a9ba6151SMark Brown .probe = wm8996_probe, 3037a9ba6151SMark Brown .remove = wm8996_remove, 3038a9ba6151SMark Brown .set_bias_level = wm8996_set_bias_level, 3039a9ba6151SMark Brown .seq_notifier = wm8996_seq_notifier, 3040a9ba6151SMark Brown .controls = wm8996_snd_controls, 3041a9ba6151SMark Brown .num_controls = ARRAY_SIZE(wm8996_snd_controls), 3042a9ba6151SMark Brown .dapm_widgets = wm8996_dapm_widgets, 3043a9ba6151SMark Brown .num_dapm_widgets = ARRAY_SIZE(wm8996_dapm_widgets), 3044a9ba6151SMark Brown .dapm_routes = wm8996_dapm_routes, 3045a9ba6151SMark Brown .num_dapm_routes = ARRAY_SIZE(wm8996_dapm_routes), 3046a9ba6151SMark Brown .set_pll = wm8996_set_fll, 3047a9ba6151SMark Brown }; 3048a9ba6151SMark Brown 3049a9ba6151SMark Brown #define WM8996_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ 3050a9ba6151SMark Brown SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_48000) 3051a9ba6151SMark Brown #define WM8996_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\ 3052a9ba6151SMark Brown SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\ 3053a9ba6151SMark Brown SNDRV_PCM_FMTBIT_S32_LE) 3054a9ba6151SMark Brown 3055a9ba6151SMark Brown static struct snd_soc_dai_ops wm8996_dai_ops = { 3056a9ba6151SMark Brown .set_fmt = wm8996_set_fmt, 3057a9ba6151SMark Brown .hw_params = wm8996_hw_params, 3058a9ba6151SMark Brown .set_sysclk = wm8996_set_sysclk, 3059a9ba6151SMark Brown }; 3060a9ba6151SMark Brown 3061a9ba6151SMark Brown static struct snd_soc_dai_driver wm8996_dai[] = { 3062a9ba6151SMark Brown { 3063a9ba6151SMark Brown .name = "wm8996-aif1", 3064a9ba6151SMark Brown .playback = { 3065a9ba6151SMark Brown .stream_name = "AIF1 Playback", 3066a9ba6151SMark Brown .channels_min = 1, 3067a9ba6151SMark Brown .channels_max = 6, 3068a9ba6151SMark Brown .rates = WM8996_RATES, 3069a9ba6151SMark Brown .formats = WM8996_FORMATS, 3070a9ba6151SMark Brown }, 3071a9ba6151SMark Brown .capture = { 3072a9ba6151SMark Brown .stream_name = "AIF1 Capture", 3073a9ba6151SMark Brown .channels_min = 1, 3074a9ba6151SMark Brown .channels_max = 6, 3075a9ba6151SMark Brown .rates = WM8996_RATES, 3076a9ba6151SMark Brown .formats = WM8996_FORMATS, 3077a9ba6151SMark Brown }, 3078a9ba6151SMark Brown .ops = &wm8996_dai_ops, 3079a9ba6151SMark Brown }, 3080a9ba6151SMark Brown { 3081a9ba6151SMark Brown .name = "wm8996-aif2", 3082a9ba6151SMark Brown .playback = { 3083a9ba6151SMark Brown .stream_name = "AIF2 Playback", 3084a9ba6151SMark Brown .channels_min = 1, 3085a9ba6151SMark Brown .channels_max = 2, 3086a9ba6151SMark Brown .rates = WM8996_RATES, 3087a9ba6151SMark Brown .formats = WM8996_FORMATS, 3088a9ba6151SMark Brown }, 3089a9ba6151SMark Brown .capture = { 3090a9ba6151SMark Brown .stream_name = "AIF2 Capture", 3091a9ba6151SMark Brown .channels_min = 1, 3092a9ba6151SMark Brown .channels_max = 2, 3093a9ba6151SMark Brown .rates = WM8996_RATES, 3094a9ba6151SMark Brown .formats = WM8996_FORMATS, 3095a9ba6151SMark Brown }, 3096a9ba6151SMark Brown .ops = &wm8996_dai_ops, 3097a9ba6151SMark Brown }, 3098a9ba6151SMark Brown }; 3099a9ba6151SMark Brown 3100a9ba6151SMark Brown static __devinit int wm8996_i2c_probe(struct i2c_client *i2c, 3101a9ba6151SMark Brown const struct i2c_device_id *id) 3102a9ba6151SMark Brown { 3103a9ba6151SMark Brown struct wm8996_priv *wm8996; 3104ee5f3872SMark Brown int ret, i; 3105ee5f3872SMark Brown unsigned int reg; 3106a9ba6151SMark Brown 3107a9ba6151SMark Brown wm8996 = kzalloc(sizeof(struct wm8996_priv), GFP_KERNEL); 3108a9ba6151SMark Brown if (wm8996 == NULL) 3109a9ba6151SMark Brown return -ENOMEM; 3110a9ba6151SMark Brown 3111a9ba6151SMark Brown i2c_set_clientdata(i2c, wm8996); 3112b2d1e233SMark Brown wm8996->dev = &i2c->dev; 3113a9ba6151SMark Brown 3114a9ba6151SMark Brown if (dev_get_platdata(&i2c->dev)) 3115a9ba6151SMark Brown memcpy(&wm8996->pdata, dev_get_platdata(&i2c->dev), 3116a9ba6151SMark Brown sizeof(wm8996->pdata)); 3117a9ba6151SMark Brown 3118a9ba6151SMark Brown if (wm8996->pdata.ldo_ena > 0) { 3119a9ba6151SMark Brown ret = gpio_request_one(wm8996->pdata.ldo_ena, 3120a9ba6151SMark Brown GPIOF_OUT_INIT_LOW, "WM8996 ENA"); 3121a9ba6151SMark Brown if (ret < 0) { 3122a9ba6151SMark Brown dev_err(&i2c->dev, "Failed to request GPIO %d: %d\n", 3123a9ba6151SMark Brown wm8996->pdata.ldo_ena, ret); 3124a9ba6151SMark Brown goto err; 3125a9ba6151SMark Brown } 3126a9ba6151SMark Brown } 3127a9ba6151SMark Brown 3128ee5f3872SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) 3129ee5f3872SMark Brown wm8996->supplies[i].supply = wm8996_supply_names[i]; 3130ee5f3872SMark Brown 3131ee5f3872SMark Brown ret = regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8996->supplies), 3132ee5f3872SMark Brown wm8996->supplies); 3133ee5f3872SMark Brown if (ret != 0) { 3134ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); 3135ee5f3872SMark Brown goto err_gpio; 3136ee5f3872SMark Brown } 3137ee5f3872SMark Brown 3138ee5f3872SMark Brown wm8996->cpvdd = regulator_get(&i2c->dev, "CPVDD"); 3139ee5f3872SMark Brown if (IS_ERR(wm8996->cpvdd)) { 3140ee5f3872SMark Brown ret = PTR_ERR(wm8996->cpvdd); 3141ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to get CPVDD: %d\n", ret); 3142ee5f3872SMark Brown goto err_get; 3143ee5f3872SMark Brown } 3144ee5f3872SMark Brown 3145ee5f3872SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), 3146ee5f3872SMark Brown wm8996->supplies); 3147ee5f3872SMark Brown if (ret != 0) { 3148ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); 3149ee5f3872SMark Brown goto err_cpvdd; 3150ee5f3872SMark Brown } 3151ee5f3872SMark Brown 3152ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) { 3153ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); 3154ee5f3872SMark Brown msleep(5); 3155ee5f3872SMark Brown } 3156ee5f3872SMark Brown 3157ee5f3872SMark Brown wm8996->regmap = regmap_init_i2c(i2c, &wm8996_regmap); 3158ee5f3872SMark Brown if (IS_ERR(wm8996->regmap)) { 3159ee5f3872SMark Brown ret = PTR_ERR(wm8996->regmap); 3160ee5f3872SMark Brown dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); 3161ee5f3872SMark Brown goto err_enable; 3162ee5f3872SMark Brown } 3163ee5f3872SMark Brown 3164ee5f3872SMark Brown ret = regmap_read(wm8996->regmap, WM8996_SOFTWARE_RESET, ®); 3165ee5f3872SMark Brown if (ret < 0) { 3166ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret); 3167ee5f3872SMark Brown goto err_regmap; 3168ee5f3872SMark Brown } 3169ee5f3872SMark Brown if (reg != 0x8915) { 3170ee5f3872SMark Brown dev_err(&i2c->dev, "Device is not a WM8996, ID %x\n", ret); 3171ee5f3872SMark Brown ret = -EINVAL; 3172ee5f3872SMark Brown goto err_regmap; 3173ee5f3872SMark Brown } 3174ee5f3872SMark Brown 3175ee5f3872SMark Brown ret = regmap_read(wm8996->regmap, WM8996_CHIP_REVISION, ®); 3176ee5f3872SMark Brown if (ret < 0) { 3177ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to read device revision: %d\n", 3178ee5f3872SMark Brown ret); 3179ee5f3872SMark Brown goto err_regmap; 3180ee5f3872SMark Brown } 3181ee5f3872SMark Brown 3182ee5f3872SMark Brown dev_info(&i2c->dev, "revision %c\n", 3183ee5f3872SMark Brown (reg & WM8996_CHIP_REV_MASK) + 'A'); 3184ee5f3872SMark Brown 3185ee5f3872SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 3186ee5f3872SMark Brown 3187ee5f3872SMark Brown ret = wm8996_reset(wm8996); 3188ee5f3872SMark Brown if (ret < 0) { 3189ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to issue reset\n"); 3190ee5f3872SMark Brown goto err_regmap; 3191ee5f3872SMark Brown } 3192ee5f3872SMark Brown 3193b2d1e233SMark Brown wm8996_init_gpio(wm8996); 3194b2d1e233SMark Brown 3195a9ba6151SMark Brown ret = snd_soc_register_codec(&i2c->dev, 3196a9ba6151SMark Brown &soc_codec_dev_wm8996, wm8996_dai, 3197a9ba6151SMark Brown ARRAY_SIZE(wm8996_dai)); 3198a9ba6151SMark Brown if (ret < 0) 3199b2d1e233SMark Brown goto err_gpiolib; 3200a9ba6151SMark Brown 3201a9ba6151SMark Brown return ret; 3202a9ba6151SMark Brown 3203b2d1e233SMark Brown err_gpiolib: 3204b2d1e233SMark Brown wm8996_free_gpio(wm8996); 3205ee5f3872SMark Brown err_regmap: 3206ee5f3872SMark Brown regmap_exit(wm8996->regmap); 3207ee5f3872SMark Brown err_enable: 3208ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) 3209ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 3210ee5f3872SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 3211ee5f3872SMark Brown err_cpvdd: 3212ee5f3872SMark Brown regulator_put(wm8996->cpvdd); 3213ee5f3872SMark Brown err_get: 3214ee5f3872SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 3215a9ba6151SMark Brown err_gpio: 3216a9ba6151SMark Brown if (wm8996->pdata.ldo_ena > 0) 3217a9ba6151SMark Brown gpio_free(wm8996->pdata.ldo_ena); 3218a9ba6151SMark Brown err: 3219a9ba6151SMark Brown kfree(wm8996); 3220a9ba6151SMark Brown 3221a9ba6151SMark Brown return ret; 3222a9ba6151SMark Brown } 3223a9ba6151SMark Brown 3224a9ba6151SMark Brown static __devexit int wm8996_i2c_remove(struct i2c_client *client) 3225a9ba6151SMark Brown { 3226a9ba6151SMark Brown struct wm8996_priv *wm8996 = i2c_get_clientdata(client); 3227a9ba6151SMark Brown 3228a9ba6151SMark Brown snd_soc_unregister_codec(&client->dev); 3229b2d1e233SMark Brown wm8996_free_gpio(wm8996); 3230ee5f3872SMark Brown regulator_put(wm8996->cpvdd); 3231ee5f3872SMark Brown regulator_bulk_free(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 3232ee5f3872SMark Brown regmap_exit(wm8996->regmap); 3233ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) { 3234ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 3235a9ba6151SMark Brown gpio_free(wm8996->pdata.ldo_ena); 3236ee5f3872SMark Brown } 3237753ddf52SAxel Lin kfree(wm8996); 3238a9ba6151SMark Brown return 0; 3239a9ba6151SMark Brown } 3240a9ba6151SMark Brown 3241a9ba6151SMark Brown static const struct i2c_device_id wm8996_i2c_id[] = { 3242a9ba6151SMark Brown { "wm8996", 0 }, 3243a9ba6151SMark Brown { } 3244a9ba6151SMark Brown }; 3245a9ba6151SMark Brown MODULE_DEVICE_TABLE(i2c, wm8996_i2c_id); 3246a9ba6151SMark Brown 3247a9ba6151SMark Brown static struct i2c_driver wm8996_i2c_driver = { 3248a9ba6151SMark Brown .driver = { 3249a9ba6151SMark Brown .name = "wm8996", 3250a9ba6151SMark Brown .owner = THIS_MODULE, 3251a9ba6151SMark Brown }, 3252a9ba6151SMark Brown .probe = wm8996_i2c_probe, 3253a9ba6151SMark Brown .remove = __devexit_p(wm8996_i2c_remove), 3254a9ba6151SMark Brown .id_table = wm8996_i2c_id, 3255a9ba6151SMark Brown }; 3256a9ba6151SMark Brown 3257a9ba6151SMark Brown static int __init wm8996_modinit(void) 3258a9ba6151SMark Brown { 3259a9ba6151SMark Brown int ret; 3260a9ba6151SMark Brown 3261a9ba6151SMark Brown ret = i2c_add_driver(&wm8996_i2c_driver); 3262a9ba6151SMark Brown if (ret != 0) { 3263a9ba6151SMark Brown printk(KERN_ERR "Failed to register WM8996 I2C driver: %d\n", 3264a9ba6151SMark Brown ret); 3265a9ba6151SMark Brown } 3266a9ba6151SMark Brown 3267a9ba6151SMark Brown return ret; 3268a9ba6151SMark Brown } 3269a9ba6151SMark Brown module_init(wm8996_modinit); 3270a9ba6151SMark Brown 3271a9ba6151SMark Brown static void __exit wm8996_exit(void) 3272a9ba6151SMark Brown { 3273a9ba6151SMark Brown i2c_del_driver(&wm8996_i2c_driver); 3274a9ba6151SMark Brown } 3275a9ba6151SMark Brown module_exit(wm8996_exit); 3276a9ba6151SMark Brown 3277a9ba6151SMark Brown MODULE_DESCRIPTION("ASoC WM8996 driver"); 3278a9ba6151SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 3279a9ba6151SMark Brown MODULE_LICENSE("GPL"); 3280