1a9ba6151SMark Brown /* 2a9ba6151SMark Brown * wm8996.c - WM8996 audio codec interface 3a9ba6151SMark Brown * 4656baaebSMark Brown * Copyright 2011-2 Wolfson Microelectronics PLC. 5a9ba6151SMark Brown * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 6a9ba6151SMark Brown * 7a9ba6151SMark Brown * This program is free software; you can redistribute it and/or modify it 8a9ba6151SMark Brown * under the terms of the GNU General Public License as published by the 9a9ba6151SMark Brown * Free Software Foundation; either version 2 of the License, or (at your 10a9ba6151SMark Brown * option) any later version. 11a9ba6151SMark Brown */ 12a9ba6151SMark Brown 13a9ba6151SMark Brown #include <linux/module.h> 14a9ba6151SMark Brown #include <linux/moduleparam.h> 15a9ba6151SMark Brown #include <linux/init.h> 16a9ba6151SMark Brown #include <linux/completion.h> 17a9ba6151SMark Brown #include <linux/delay.h> 18a9ba6151SMark Brown #include <linux/pm.h> 19a9ba6151SMark Brown #include <linux/gcd.h> 20a9ba6151SMark Brown #include <linux/gpio.h> 21a9ba6151SMark Brown #include <linux/i2c.h> 2279172746SMark Brown #include <linux/regmap.h> 23a9ba6151SMark Brown #include <linux/regulator/consumer.h> 24a9ba6151SMark Brown #include <linux/slab.h> 25a9ba6151SMark Brown #include <linux/workqueue.h> 26a9ba6151SMark Brown #include <sound/core.h> 27a9ba6151SMark Brown #include <sound/jack.h> 28a9ba6151SMark Brown #include <sound/pcm.h> 29a9ba6151SMark Brown #include <sound/pcm_params.h> 30a9ba6151SMark Brown #include <sound/soc.h> 31a9ba6151SMark Brown #include <sound/initval.h> 32a9ba6151SMark Brown #include <sound/tlv.h> 33a9ba6151SMark Brown #include <trace/events/asoc.h> 34a9ba6151SMark Brown 35a9ba6151SMark Brown #include <sound/wm8996.h> 36a9ba6151SMark Brown #include "wm8996.h" 37a9ba6151SMark Brown 38a9ba6151SMark Brown #define WM8996_AIFS 2 39a9ba6151SMark Brown 40a9ba6151SMark Brown #define HPOUT1L 1 41a9ba6151SMark Brown #define HPOUT1R 2 42a9ba6151SMark Brown #define HPOUT2L 4 43a9ba6151SMark Brown #define HPOUT2R 8 44a9ba6151SMark Brown 45c83495afSMark Brown #define WM8996_NUM_SUPPLIES 3 46a9ba6151SMark Brown static const char *wm8996_supply_names[WM8996_NUM_SUPPLIES] = { 47a9ba6151SMark Brown "DBVDD", 48a9ba6151SMark Brown "AVDD1", 49a9ba6151SMark Brown "AVDD2", 50a9ba6151SMark Brown }; 51a9ba6151SMark Brown 52a9ba6151SMark Brown struct wm8996_priv { 53b2d1e233SMark Brown struct device *dev; 54ee5f3872SMark Brown struct regmap *regmap; 55a9ba6151SMark Brown struct snd_soc_codec *codec; 56a9ba6151SMark Brown 57a9ba6151SMark Brown int ldo1ena; 58a9ba6151SMark Brown 59a9ba6151SMark Brown int sysclk; 60a9ba6151SMark Brown int sysclk_src; 61a9ba6151SMark Brown 62a9ba6151SMark Brown int fll_src; 63a9ba6151SMark Brown int fll_fref; 64a9ba6151SMark Brown int fll_fout; 65a9ba6151SMark Brown 66a9ba6151SMark Brown struct completion fll_lock; 67a9ba6151SMark Brown 68a9ba6151SMark Brown u16 dcs_pending; 69a9ba6151SMark Brown struct completion dcs_done; 70a9ba6151SMark Brown 71a9ba6151SMark Brown u16 hpout_ena; 72a9ba6151SMark Brown u16 hpout_pending; 73a9ba6151SMark Brown 74a9ba6151SMark Brown struct regulator_bulk_data supplies[WM8996_NUM_SUPPLIES]; 75a9ba6151SMark Brown struct notifier_block disable_nb[WM8996_NUM_SUPPLIES]; 76ded71dcbSMark Brown int bg_ena; 77a9ba6151SMark Brown 78a9ba6151SMark Brown struct wm8996_pdata pdata; 79a9ba6151SMark Brown 80a9ba6151SMark Brown int rx_rate[WM8996_AIFS]; 81a9ba6151SMark Brown int bclk_rate[WM8996_AIFS]; 82a9ba6151SMark Brown 83a9ba6151SMark Brown /* Platform dependant ReTune mobile configuration */ 84a9ba6151SMark Brown int num_retune_mobile_texts; 85a9ba6151SMark Brown const char **retune_mobile_texts; 86a9ba6151SMark Brown int retune_mobile_cfg[2]; 87a9ba6151SMark Brown struct soc_enum retune_mobile_enum; 88a9ba6151SMark Brown 89a9ba6151SMark Brown struct snd_soc_jack *jack; 90a9ba6151SMark Brown bool detecting; 91a9ba6151SMark Brown bool jack_mic; 92d7b35570SMark Brown int jack_flips; 93a9ba6151SMark Brown wm8996_polarity_fn polarity_cb; 94a9ba6151SMark Brown 95a9ba6151SMark Brown #ifdef CONFIG_GPIOLIB 96a9ba6151SMark Brown struct gpio_chip gpio_chip; 97a9ba6151SMark Brown #endif 98a9ba6151SMark Brown }; 99a9ba6151SMark Brown 100a9ba6151SMark Brown /* We can't use the same notifier block for more than one supply and 101a9ba6151SMark Brown * there's no way I can see to get from a callback to the caller 102a9ba6151SMark Brown * except container_of(). 103a9ba6151SMark Brown */ 104a9ba6151SMark Brown #define WM8996_REGULATOR_EVENT(n) \ 105a9ba6151SMark Brown static int wm8996_regulator_event_##n(struct notifier_block *nb, \ 106a9ba6151SMark Brown unsigned long event, void *data) \ 107a9ba6151SMark Brown { \ 108a9ba6151SMark Brown struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \ 109a9ba6151SMark Brown disable_nb[n]); \ 110a9ba6151SMark Brown if (event & REGULATOR_EVENT_DISABLE) { \ 1111b76d2eeSMark Brown regcache_mark_dirty(wm8996->regmap); \ 112a9ba6151SMark Brown } \ 113a9ba6151SMark Brown return 0; \ 114a9ba6151SMark Brown } 115a9ba6151SMark Brown 116a9ba6151SMark Brown WM8996_REGULATOR_EVENT(0) 117a9ba6151SMark Brown WM8996_REGULATOR_EVENT(1) 118a9ba6151SMark Brown WM8996_REGULATOR_EVENT(2) 119a9ba6151SMark Brown 12079172746SMark Brown static struct reg_default wm8996_reg[] = { 12179172746SMark Brown { WM8996_POWER_MANAGEMENT_1, 0x0 }, 12279172746SMark Brown { WM8996_POWER_MANAGEMENT_2, 0x0 }, 12379172746SMark Brown { WM8996_POWER_MANAGEMENT_3, 0x0 }, 12479172746SMark Brown { WM8996_POWER_MANAGEMENT_4, 0x0 }, 12579172746SMark Brown { WM8996_POWER_MANAGEMENT_5, 0x0 }, 12679172746SMark Brown { WM8996_POWER_MANAGEMENT_6, 0x0 }, 12779172746SMark Brown { WM8996_POWER_MANAGEMENT_7, 0x10 }, 12879172746SMark Brown { WM8996_POWER_MANAGEMENT_8, 0x0 }, 12979172746SMark Brown { WM8996_LEFT_LINE_INPUT_VOLUME, 0x0 }, 13079172746SMark Brown { WM8996_RIGHT_LINE_INPUT_VOLUME, 0x0 }, 13179172746SMark Brown { WM8996_LINE_INPUT_CONTROL, 0x0 }, 13279172746SMark Brown { WM8996_DAC1_HPOUT1_VOLUME, 0x88 }, 13379172746SMark Brown { WM8996_DAC2_HPOUT2_VOLUME, 0x88 }, 13479172746SMark Brown { WM8996_DAC1_LEFT_VOLUME, 0x2c0 }, 13579172746SMark Brown { WM8996_DAC1_RIGHT_VOLUME, 0x2c0 }, 13679172746SMark Brown { WM8996_DAC2_LEFT_VOLUME, 0x2c0 }, 13779172746SMark Brown { WM8996_DAC2_RIGHT_VOLUME, 0x2c0 }, 13879172746SMark Brown { WM8996_OUTPUT1_LEFT_VOLUME, 0x80 }, 13979172746SMark Brown { WM8996_OUTPUT1_RIGHT_VOLUME, 0x80 }, 14079172746SMark Brown { WM8996_OUTPUT2_LEFT_VOLUME, 0x80 }, 14179172746SMark Brown { WM8996_OUTPUT2_RIGHT_VOLUME, 0x80 }, 14279172746SMark Brown { WM8996_MICBIAS_1, 0x39 }, 14379172746SMark Brown { WM8996_MICBIAS_2, 0x39 }, 14479172746SMark Brown { WM8996_LDO_1, 0x3 }, 14579172746SMark Brown { WM8996_LDO_2, 0x13 }, 14679172746SMark Brown { WM8996_ACCESSORY_DETECT_MODE_1, 0x4 }, 14779172746SMark Brown { WM8996_ACCESSORY_DETECT_MODE_2, 0x0 }, 14879172746SMark Brown { WM8996_HEADPHONE_DETECT_1, 0x20 }, 14979172746SMark Brown { WM8996_HEADPHONE_DETECT_2, 0x0 }, 15079172746SMark Brown { WM8996_MIC_DETECT_1, 0x7600 }, 15179172746SMark Brown { WM8996_MIC_DETECT_2, 0xbf }, 15279172746SMark Brown { WM8996_CHARGE_PUMP_1, 0x1f25 }, 15379172746SMark Brown { WM8996_CHARGE_PUMP_2, 0xab19 }, 15479172746SMark Brown { WM8996_DC_SERVO_1, 0x0 }, 15579172746SMark Brown { WM8996_DC_SERVO_3, 0x0 }, 15679172746SMark Brown { WM8996_DC_SERVO_5, 0x2a2a }, 15779172746SMark Brown { WM8996_DC_SERVO_6, 0x0 }, 15879172746SMark Brown { WM8996_DC_SERVO_7, 0x0 }, 15979172746SMark Brown { WM8996_ANALOGUE_HP_1, 0x0 }, 16079172746SMark Brown { WM8996_ANALOGUE_HP_2, 0x0 }, 16179172746SMark Brown { WM8996_CONTROL_INTERFACE_1, 0x8004 }, 16279172746SMark Brown { WM8996_WRITE_SEQUENCER_CTRL_1, 0x0 }, 16379172746SMark Brown { WM8996_WRITE_SEQUENCER_CTRL_2, 0x0 }, 16479172746SMark Brown { WM8996_AIF_CLOCKING_1, 0x0 }, 16579172746SMark Brown { WM8996_AIF_CLOCKING_2, 0x0 }, 16679172746SMark Brown { WM8996_CLOCKING_1, 0x10 }, 16779172746SMark Brown { WM8996_CLOCKING_2, 0x0 }, 16879172746SMark Brown { WM8996_AIF_RATE, 0x83 }, 16979172746SMark Brown { WM8996_FLL_CONTROL_1, 0x0 }, 17079172746SMark Brown { WM8996_FLL_CONTROL_2, 0x0 }, 17179172746SMark Brown { WM8996_FLL_CONTROL_3, 0x0 }, 17279172746SMark Brown { WM8996_FLL_CONTROL_4, 0x5dc0 }, 17379172746SMark Brown { WM8996_FLL_CONTROL_5, 0xc84 }, 17479172746SMark Brown { WM8996_FLL_EFS_1, 0x0 }, 17579172746SMark Brown { WM8996_FLL_EFS_2, 0x2 }, 17679172746SMark Brown { WM8996_AIF1_CONTROL, 0x0 }, 17779172746SMark Brown { WM8996_AIF1_BCLK, 0x0 }, 17879172746SMark Brown { WM8996_AIF1_TX_LRCLK_1, 0x80 }, 17979172746SMark Brown { WM8996_AIF1_TX_LRCLK_2, 0x8 }, 18079172746SMark Brown { WM8996_AIF1_RX_LRCLK_1, 0x80 }, 18179172746SMark Brown { WM8996_AIF1_RX_LRCLK_2, 0x0 }, 18279172746SMark Brown { WM8996_AIF1TX_DATA_CONFIGURATION_1, 0x1818 }, 18379172746SMark Brown { WM8996_AIF1TX_DATA_CONFIGURATION_2, 0 }, 18479172746SMark Brown { WM8996_AIF1RX_DATA_CONFIGURATION, 0x1818 }, 18579172746SMark Brown { WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 0x0 }, 18679172746SMark Brown { WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 0x0 }, 18779172746SMark Brown { WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 0x0 }, 18879172746SMark Brown { WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 0x0 }, 18979172746SMark Brown { WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 0x0 }, 19079172746SMark Brown { WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 0x0 }, 19179172746SMark Brown { WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 0x0 }, 19279172746SMark Brown { WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 0x0 }, 19379172746SMark Brown { WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 0x0 }, 19479172746SMark Brown { WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 0x0 }, 19579172746SMark Brown { WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 0x0 }, 19679172746SMark Brown { WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 0x0 }, 19779172746SMark Brown { WM8996_AIF1RX_MONO_CONFIGURATION, 0x0 }, 19879172746SMark Brown { WM8996_AIF1TX_TEST, 0x7 }, 19979172746SMark Brown { WM8996_AIF2_CONTROL, 0x0 }, 20079172746SMark Brown { WM8996_AIF2_BCLK, 0x0 }, 20179172746SMark Brown { WM8996_AIF2_TX_LRCLK_1, 0x80 }, 20279172746SMark Brown { WM8996_AIF2_TX_LRCLK_2, 0x8 }, 20379172746SMark Brown { WM8996_AIF2_RX_LRCLK_1, 0x80 }, 20479172746SMark Brown { WM8996_AIF2_RX_LRCLK_2, 0x0 }, 20579172746SMark Brown { WM8996_AIF2TX_DATA_CONFIGURATION_1, 0x1818 }, 20679172746SMark Brown { WM8996_AIF2RX_DATA_CONFIGURATION, 0x1818 }, 20779172746SMark Brown { WM8996_AIF2RX_DATA_CONFIGURATION, 0x0 }, 20879172746SMark Brown { WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 0x0 }, 20979172746SMark Brown { WM8996_AIF2TX_CHANNEL_1_CONFIGURATION, 0x0 }, 21079172746SMark Brown { WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 0x0 }, 21179172746SMark Brown { WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 0x0 }, 21279172746SMark Brown { WM8996_AIF2RX_MONO_CONFIGURATION, 0x0 }, 21379172746SMark Brown { WM8996_AIF2TX_TEST, 0x1 }, 21479172746SMark Brown { WM8996_DSP1_TX_LEFT_VOLUME, 0xc0 }, 21579172746SMark Brown { WM8996_DSP1_TX_RIGHT_VOLUME, 0xc0 }, 21679172746SMark Brown { WM8996_DSP1_RX_LEFT_VOLUME, 0xc0 }, 21779172746SMark Brown { WM8996_DSP1_RX_RIGHT_VOLUME, 0xc0 }, 21879172746SMark Brown { WM8996_DSP1_TX_FILTERS, 0x2000 }, 21979172746SMark Brown { WM8996_DSP1_RX_FILTERS_1, 0x200 }, 22079172746SMark Brown { WM8996_DSP1_RX_FILTERS_2, 0x10 }, 22179172746SMark Brown { WM8996_DSP1_DRC_1, 0x98 }, 22279172746SMark Brown { WM8996_DSP1_DRC_2, 0x845 }, 22379172746SMark Brown { WM8996_DSP1_RX_EQ_GAINS_1, 0x6318 }, 22479172746SMark Brown { WM8996_DSP1_RX_EQ_GAINS_2, 0x6300 }, 22579172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_1_A, 0xfca }, 22679172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_1_B, 0x400 }, 22779172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_1_PG, 0xd8 }, 22879172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_A, 0x1eb5 }, 22979172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_B, 0xf145 }, 23079172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_C, 0xb75 }, 23179172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_2_PG, 0x1c5 }, 23279172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_A, 0x1c58 }, 23379172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_B, 0xf373 }, 23479172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_C, 0xa54 }, 23579172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_3_PG, 0x558 }, 23679172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_A, 0x168e }, 23779172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_B, 0xf829 }, 23879172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_C, 0x7ad }, 23979172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_4_PG, 0x1103 }, 24079172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_5_A, 0x564 }, 24179172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_5_B, 0x559 }, 24279172746SMark Brown { WM8996_DSP1_RX_EQ_BAND_5_PG, 0x4000 }, 24379172746SMark Brown { WM8996_DSP2_TX_LEFT_VOLUME, 0xc0 }, 24479172746SMark Brown { WM8996_DSP2_TX_RIGHT_VOLUME, 0xc0 }, 24579172746SMark Brown { WM8996_DSP2_RX_LEFT_VOLUME, 0xc0 }, 24679172746SMark Brown { WM8996_DSP2_RX_RIGHT_VOLUME, 0xc0 }, 24779172746SMark Brown { WM8996_DSP2_TX_FILTERS, 0x2000 }, 24879172746SMark Brown { WM8996_DSP2_RX_FILTERS_1, 0x200 }, 24979172746SMark Brown { WM8996_DSP2_RX_FILTERS_2, 0x10 }, 25079172746SMark Brown { WM8996_DSP2_DRC_1, 0x98 }, 25179172746SMark Brown { WM8996_DSP2_DRC_2, 0x845 }, 25279172746SMark Brown { WM8996_DSP2_RX_EQ_GAINS_1, 0x6318 }, 25379172746SMark Brown { WM8996_DSP2_RX_EQ_GAINS_2, 0x6300 }, 25479172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_1_A, 0xfca }, 25579172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_1_B, 0x400 }, 25679172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_1_PG, 0xd8 }, 25779172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_A, 0x1eb5 }, 25879172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_B, 0xf145 }, 25979172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_C, 0xb75 }, 26079172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_2_PG, 0x1c5 }, 26179172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_A, 0x1c58 }, 26279172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_B, 0xf373 }, 26379172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_C, 0xa54 }, 26479172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_3_PG, 0x558 }, 26579172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_A, 0x168e }, 26679172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_B, 0xf829 }, 26779172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_C, 0x7ad }, 26879172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_4_PG, 0x1103 }, 26979172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_5_A, 0x564 }, 27079172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_5_B, 0x559 }, 27179172746SMark Brown { WM8996_DSP2_RX_EQ_BAND_5_PG, 0x4000 }, 27279172746SMark Brown { WM8996_DAC1_MIXER_VOLUMES, 0x0 }, 27379172746SMark Brown { WM8996_DAC1_LEFT_MIXER_ROUTING, 0x0 }, 27479172746SMark Brown { WM8996_DAC1_RIGHT_MIXER_ROUTING, 0x0 }, 27579172746SMark Brown { WM8996_DAC2_MIXER_VOLUMES, 0x0 }, 27679172746SMark Brown { WM8996_DAC2_LEFT_MIXER_ROUTING, 0x0 }, 27779172746SMark Brown { WM8996_DAC2_RIGHT_MIXER_ROUTING, 0x0 }, 27879172746SMark Brown { WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 0x0 }, 27979172746SMark Brown { WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 0x0 }, 28079172746SMark Brown { WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 0x0 }, 28179172746SMark Brown { WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 0x0 }, 28279172746SMark Brown { WM8996_DSP_TX_MIXER_SELECT, 0x0 }, 28379172746SMark Brown { WM8996_DAC_SOFTMUTE, 0x0 }, 28479172746SMark Brown { WM8996_OVERSAMPLING, 0xd }, 28579172746SMark Brown { WM8996_SIDETONE, 0x1040 }, 28679172746SMark Brown { WM8996_GPIO_1, 0xa101 }, 28779172746SMark Brown { WM8996_GPIO_2, 0xa101 }, 28879172746SMark Brown { WM8996_GPIO_3, 0xa101 }, 28979172746SMark Brown { WM8996_GPIO_4, 0xa101 }, 29079172746SMark Brown { WM8996_GPIO_5, 0xa101 }, 29179172746SMark Brown { WM8996_PULL_CONTROL_1, 0x0 }, 29279172746SMark Brown { WM8996_PULL_CONTROL_2, 0x140 }, 29379172746SMark Brown { WM8996_INTERRUPT_STATUS_1_MASK, 0x1f }, 29479172746SMark Brown { WM8996_INTERRUPT_STATUS_2_MASK, 0x1ecf }, 29579172746SMark Brown { WM8996_LEFT_PDM_SPEAKER, 0x0 }, 29679172746SMark Brown { WM8996_RIGHT_PDM_SPEAKER, 0x1 }, 29779172746SMark Brown { WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 }, 29879172746SMark Brown { WM8996_PDM_SPEAKER_VOLUME, 0x66 }, 299a9ba6151SMark Brown }; 300a9ba6151SMark Brown 301a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0); 302a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 150, 0); 303a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 304a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(out_digital_tlv, -1200, 150, 0); 305a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -900, 75, 0); 306a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(spk_tlv, -900, 150, 0); 307a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 30818a4eef3Ssusan gao static const DECLARE_TLV_DB_SCALE(threedstereo_tlv, -1600, 183, 1); 309a9ba6151SMark Brown 310a9ba6151SMark Brown static const char *sidetone_hpf_text[] = { 311a9ba6151SMark Brown "2.9kHz", "1.5kHz", "735Hz", "403Hz", "196Hz", "98Hz", "49Hz" 312a9ba6151SMark Brown }; 313a9ba6151SMark Brown 3145cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(sidetone_hpf, 3155cca5a91STakashi Iwai WM8996_SIDETONE, 7, sidetone_hpf_text); 316a9ba6151SMark Brown 317a9ba6151SMark Brown static const char *hpf_mode_text[] = { 318a9ba6151SMark Brown "HiFi", "Custom", "Voice" 319a9ba6151SMark Brown }; 320a9ba6151SMark Brown 3215cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp1tx_hpf_mode, 3225cca5a91STakashi Iwai WM8996_DSP1_TX_FILTERS, 3, hpf_mode_text); 323a9ba6151SMark Brown 3245cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp2tx_hpf_mode, 3255cca5a91STakashi Iwai WM8996_DSP2_TX_FILTERS, 3, hpf_mode_text); 326a9ba6151SMark Brown 327a9ba6151SMark Brown static const char *hpf_cutoff_text[] = { 328a9ba6151SMark Brown "50Hz", "75Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz" 329a9ba6151SMark Brown }; 330a9ba6151SMark Brown 3315cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp1tx_hpf_cutoff, 3325cca5a91STakashi Iwai WM8996_DSP1_TX_FILTERS, 0, hpf_cutoff_text); 333a9ba6151SMark Brown 3345cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp2tx_hpf_cutoff, 3355cca5a91STakashi Iwai WM8996_DSP2_TX_FILTERS, 0, hpf_cutoff_text); 336a9ba6151SMark Brown 337a9ba6151SMark Brown static void wm8996_set_retune_mobile(struct snd_soc_codec *codec, int block) 338a9ba6151SMark Brown { 339a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 340a9ba6151SMark Brown struct wm8996_pdata *pdata = &wm8996->pdata; 341a9ba6151SMark Brown int base, best, best_val, save, i, cfg, iface; 342a9ba6151SMark Brown 343a9ba6151SMark Brown if (!wm8996->num_retune_mobile_texts) 344a9ba6151SMark Brown return; 345a9ba6151SMark Brown 346a9ba6151SMark Brown switch (block) { 347a9ba6151SMark Brown case 0: 348a9ba6151SMark Brown base = WM8996_DSP1_RX_EQ_GAINS_1; 349a9ba6151SMark Brown if (snd_soc_read(codec, WM8996_POWER_MANAGEMENT_8) & 350a9ba6151SMark Brown WM8996_DSP1RX_SRC) 351a9ba6151SMark Brown iface = 1; 352a9ba6151SMark Brown else 353a9ba6151SMark Brown iface = 0; 354a9ba6151SMark Brown break; 355a9ba6151SMark Brown case 1: 356a9ba6151SMark Brown base = WM8996_DSP1_RX_EQ_GAINS_2; 357a9ba6151SMark Brown if (snd_soc_read(codec, WM8996_POWER_MANAGEMENT_8) & 358a9ba6151SMark Brown WM8996_DSP2RX_SRC) 359a9ba6151SMark Brown iface = 1; 360a9ba6151SMark Brown else 361a9ba6151SMark Brown iface = 0; 362a9ba6151SMark Brown break; 363a9ba6151SMark Brown default: 364a9ba6151SMark Brown return; 365a9ba6151SMark Brown } 366a9ba6151SMark Brown 367a9ba6151SMark Brown /* Find the version of the currently selected configuration 368a9ba6151SMark Brown * with the nearest sample rate. */ 369a9ba6151SMark Brown cfg = wm8996->retune_mobile_cfg[block]; 370a9ba6151SMark Brown best = 0; 371a9ba6151SMark Brown best_val = INT_MAX; 372a9ba6151SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 373a9ba6151SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 374a9ba6151SMark Brown wm8996->retune_mobile_texts[cfg]) == 0 && 375a9ba6151SMark Brown abs(pdata->retune_mobile_cfgs[i].rate 376a9ba6151SMark Brown - wm8996->rx_rate[iface]) < best_val) { 377a9ba6151SMark Brown best = i; 378a9ba6151SMark Brown best_val = abs(pdata->retune_mobile_cfgs[i].rate 379a9ba6151SMark Brown - wm8996->rx_rate[iface]); 380a9ba6151SMark Brown } 381a9ba6151SMark Brown } 382a9ba6151SMark Brown 383a9ba6151SMark Brown dev_dbg(codec->dev, "ReTune Mobile %d %s/%dHz for %dHz sample rate\n", 384a9ba6151SMark Brown block, 385a9ba6151SMark Brown pdata->retune_mobile_cfgs[best].name, 386a9ba6151SMark Brown pdata->retune_mobile_cfgs[best].rate, 387a9ba6151SMark Brown wm8996->rx_rate[iface]); 388a9ba6151SMark Brown 389a9ba6151SMark Brown /* The EQ will be disabled while reconfiguring it, remember the 390a9ba6151SMark Brown * current configuration. 391a9ba6151SMark Brown */ 392a9ba6151SMark Brown save = snd_soc_read(codec, base); 393a9ba6151SMark Brown save &= WM8996_DSP1RX_EQ_ENA; 394a9ba6151SMark Brown 395a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(pdata->retune_mobile_cfgs[best].regs); i++) 396a9ba6151SMark Brown snd_soc_update_bits(codec, base + i, 0xffff, 397a9ba6151SMark Brown pdata->retune_mobile_cfgs[best].regs[i]); 398a9ba6151SMark Brown 399a9ba6151SMark Brown snd_soc_update_bits(codec, base, WM8996_DSP1RX_EQ_ENA, save); 400a9ba6151SMark Brown } 401a9ba6151SMark Brown 402a9ba6151SMark Brown /* Icky as hell but saves code duplication */ 403a9ba6151SMark Brown static int wm8996_get_retune_mobile_block(const char *name) 404a9ba6151SMark Brown { 405a9ba6151SMark Brown if (strcmp(name, "DSP1 EQ Mode") == 0) 406a9ba6151SMark Brown return 0; 407a9ba6151SMark Brown if (strcmp(name, "DSP2 EQ Mode") == 0) 408a9ba6151SMark Brown return 1; 409a9ba6151SMark Brown return -EINVAL; 410a9ba6151SMark Brown } 411a9ba6151SMark Brown 412a9ba6151SMark Brown static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol, 413a9ba6151SMark Brown struct snd_ctl_elem_value *ucontrol) 414a9ba6151SMark Brown { 415ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 416a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 417a9ba6151SMark Brown struct wm8996_pdata *pdata = &wm8996->pdata; 418a9ba6151SMark Brown int block = wm8996_get_retune_mobile_block(kcontrol->id.name); 419a9ba6151SMark Brown int value = ucontrol->value.integer.value[0]; 420a9ba6151SMark Brown 421a9ba6151SMark Brown if (block < 0) 422a9ba6151SMark Brown return block; 423a9ba6151SMark Brown 424a9ba6151SMark Brown if (value >= pdata->num_retune_mobile_cfgs) 425a9ba6151SMark Brown return -EINVAL; 426a9ba6151SMark Brown 427a9ba6151SMark Brown wm8996->retune_mobile_cfg[block] = value; 428a9ba6151SMark Brown 429a9ba6151SMark Brown wm8996_set_retune_mobile(codec, block); 430a9ba6151SMark Brown 431a9ba6151SMark Brown return 0; 432a9ba6151SMark Brown } 433a9ba6151SMark Brown 434a9ba6151SMark Brown static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol, 435a9ba6151SMark Brown struct snd_ctl_elem_value *ucontrol) 436a9ba6151SMark Brown { 437ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 438a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 439a9ba6151SMark Brown int block = wm8996_get_retune_mobile_block(kcontrol->id.name); 440a9ba6151SMark Brown 441fe329a1aSTakashi Iwai if (block < 0) 442fe329a1aSTakashi Iwai return block; 443a9ba6151SMark Brown ucontrol->value.enumerated.item[0] = wm8996->retune_mobile_cfg[block]; 444a9ba6151SMark Brown 445a9ba6151SMark Brown return 0; 446a9ba6151SMark Brown } 447a9ba6151SMark Brown 448a9ba6151SMark Brown static const struct snd_kcontrol_new wm8996_snd_controls[] = { 449a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Capture Volume", WM8996_LEFT_LINE_INPUT_VOLUME, 450a9ba6151SMark Brown WM8996_RIGHT_LINE_INPUT_VOLUME, 0, 31, 0, inpga_tlv), 451a9ba6151SMark Brown SOC_DOUBLE_R("Capture ZC Switch", WM8996_LEFT_LINE_INPUT_VOLUME, 452a9ba6151SMark Brown WM8996_RIGHT_LINE_INPUT_VOLUME, 5, 1, 0), 453a9ba6151SMark Brown 454a9ba6151SMark Brown SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8996_DAC1_MIXER_VOLUMES, 455a9ba6151SMark Brown 0, 5, 24, 0, sidetone_tlv), 456a9ba6151SMark Brown SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8996_DAC2_MIXER_VOLUMES, 457a9ba6151SMark Brown 0, 5, 24, 0, sidetone_tlv), 458a9ba6151SMark Brown SOC_SINGLE("Sidetone LPF Switch", WM8996_SIDETONE, 12, 1, 0), 459a9ba6151SMark Brown SOC_ENUM("Sidetone HPF Cut-off", sidetone_hpf), 460a9ba6151SMark Brown SOC_SINGLE("Sidetone HPF Switch", WM8996_SIDETONE, 6, 1, 0), 461a9ba6151SMark Brown 462a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP1 Capture Volume", WM8996_DSP1_TX_LEFT_VOLUME, 463a9ba6151SMark Brown WM8996_DSP1_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv), 464a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP2 Capture Volume", WM8996_DSP2_TX_LEFT_VOLUME, 465a9ba6151SMark Brown WM8996_DSP2_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv), 466a9ba6151SMark Brown 467a9ba6151SMark Brown SOC_SINGLE("DSP1 Capture Notch Filter Switch", WM8996_DSP1_TX_FILTERS, 468a9ba6151SMark Brown 13, 1, 0), 469a9ba6151SMark Brown SOC_DOUBLE("DSP1 Capture HPF Switch", WM8996_DSP1_TX_FILTERS, 12, 11, 1, 0), 470a9ba6151SMark Brown SOC_ENUM("DSP1 Capture HPF Mode", dsp1tx_hpf_mode), 471a9ba6151SMark Brown SOC_ENUM("DSP1 Capture HPF Cutoff", dsp1tx_hpf_cutoff), 472a9ba6151SMark Brown 473a9ba6151SMark Brown SOC_SINGLE("DSP2 Capture Notch Filter Switch", WM8996_DSP2_TX_FILTERS, 474a9ba6151SMark Brown 13, 1, 0), 475a9ba6151SMark Brown SOC_DOUBLE("DSP2 Capture HPF Switch", WM8996_DSP2_TX_FILTERS, 12, 11, 1, 0), 476a9ba6151SMark Brown SOC_ENUM("DSP2 Capture HPF Mode", dsp2tx_hpf_mode), 477a9ba6151SMark Brown SOC_ENUM("DSP2 Capture HPF Cutoff", dsp2tx_hpf_cutoff), 478a9ba6151SMark Brown 479a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP1 Playback Volume", WM8996_DSP1_RX_LEFT_VOLUME, 480a9ba6151SMark Brown WM8996_DSP1_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 481a9ba6151SMark Brown SOC_SINGLE("DSP1 Playback Switch", WM8996_DSP1_RX_FILTERS_1, 9, 1, 1), 482a9ba6151SMark Brown 483a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP2 Playback Volume", WM8996_DSP2_RX_LEFT_VOLUME, 484a9ba6151SMark Brown WM8996_DSP2_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 485a9ba6151SMark Brown SOC_SINGLE("DSP2 Playback Switch", WM8996_DSP2_RX_FILTERS_1, 9, 1, 1), 486a9ba6151SMark Brown 487a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DAC1 Volume", WM8996_DAC1_LEFT_VOLUME, 488a9ba6151SMark Brown WM8996_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 489a9ba6151SMark Brown SOC_DOUBLE_R("DAC1 Switch", WM8996_DAC1_LEFT_VOLUME, 490a9ba6151SMark Brown WM8996_DAC1_RIGHT_VOLUME, 9, 1, 1), 491a9ba6151SMark Brown 492a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DAC2 Volume", WM8996_DAC2_LEFT_VOLUME, 493a9ba6151SMark Brown WM8996_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv), 494a9ba6151SMark Brown SOC_DOUBLE_R("DAC2 Switch", WM8996_DAC2_LEFT_VOLUME, 495a9ba6151SMark Brown WM8996_DAC2_RIGHT_VOLUME, 9, 1, 1), 496a9ba6151SMark Brown 497a9ba6151SMark Brown SOC_SINGLE("Speaker High Performance Switch", WM8996_OVERSAMPLING, 3, 1, 0), 498a9ba6151SMark Brown SOC_SINGLE("DMIC High Performance Switch", WM8996_OVERSAMPLING, 2, 1, 0), 499a9ba6151SMark Brown SOC_SINGLE("ADC High Performance Switch", WM8996_OVERSAMPLING, 1, 1, 0), 500a9ba6151SMark Brown SOC_SINGLE("DAC High Performance Switch", WM8996_OVERSAMPLING, 0, 1, 0), 501a9ba6151SMark Brown 502a9ba6151SMark Brown SOC_SINGLE("DAC Soft Mute Switch", WM8996_DAC_SOFTMUTE, 1, 1, 0), 503a9ba6151SMark Brown SOC_SINGLE("DAC Slow Soft Mute Switch", WM8996_DAC_SOFTMUTE, 0, 1, 0), 504a9ba6151SMark Brown 50518a4eef3Ssusan gao SOC_SINGLE("DSP1 3D Stereo Switch", WM8996_DSP1_RX_FILTERS_2, 8, 1, 0), 50618a4eef3Ssusan gao SOC_SINGLE("DSP2 3D Stereo Switch", WM8996_DSP2_RX_FILTERS_2, 8, 1, 0), 50718a4eef3Ssusan gao 50818a4eef3Ssusan gao SOC_SINGLE_TLV("DSP1 3D Stereo Volume", WM8996_DSP1_RX_FILTERS_2, 10, 15, 50918a4eef3Ssusan gao 0, threedstereo_tlv), 51018a4eef3Ssusan gao SOC_SINGLE_TLV("DSP2 3D Stereo Volume", WM8996_DSP2_RX_FILTERS_2, 10, 15, 51118a4eef3Ssusan gao 0, threedstereo_tlv), 51218a4eef3Ssusan gao 513a9ba6151SMark Brown SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8996_DAC1_HPOUT1_VOLUME, 0, 4, 514a9ba6151SMark Brown 8, 0, out_digital_tlv), 515a9ba6151SMark Brown SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8996_DAC2_HPOUT2_VOLUME, 0, 4, 516a9ba6151SMark Brown 8, 0, out_digital_tlv), 517a9ba6151SMark Brown 518a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Output 1 Volume", WM8996_OUTPUT1_LEFT_VOLUME, 519a9ba6151SMark Brown WM8996_OUTPUT1_RIGHT_VOLUME, 0, 12, 0, out_tlv), 520a9ba6151SMark Brown SOC_DOUBLE_R("Output 1 ZC Switch", WM8996_OUTPUT1_LEFT_VOLUME, 521a9ba6151SMark Brown WM8996_OUTPUT1_RIGHT_VOLUME, 7, 1, 0), 522a9ba6151SMark Brown 523a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Output 2 Volume", WM8996_OUTPUT2_LEFT_VOLUME, 524a9ba6151SMark Brown WM8996_OUTPUT2_RIGHT_VOLUME, 0, 12, 0, out_tlv), 525a9ba6151SMark Brown SOC_DOUBLE_R("Output 2 ZC Switch", WM8996_OUTPUT2_LEFT_VOLUME, 526a9ba6151SMark Brown WM8996_OUTPUT2_RIGHT_VOLUME, 7, 1, 0), 527a9ba6151SMark Brown 528a9ba6151SMark Brown SOC_DOUBLE_TLV("Speaker Volume", WM8996_PDM_SPEAKER_VOLUME, 0, 4, 8, 0, 529a9ba6151SMark Brown spk_tlv), 530a9ba6151SMark Brown SOC_DOUBLE_R("Speaker Switch", WM8996_LEFT_PDM_SPEAKER, 531a9ba6151SMark Brown WM8996_RIGHT_PDM_SPEAKER, 3, 1, 1), 532a9ba6151SMark Brown SOC_DOUBLE_R("Speaker ZC Switch", WM8996_LEFT_PDM_SPEAKER, 533a9ba6151SMark Brown WM8996_RIGHT_PDM_SPEAKER, 2, 1, 0), 534a9ba6151SMark Brown 535a9ba6151SMark Brown SOC_SINGLE("DSP1 EQ Switch", WM8996_DSP1_RX_EQ_GAINS_1, 0, 1, 0), 536a9ba6151SMark Brown SOC_SINGLE("DSP2 EQ Switch", WM8996_DSP2_RX_EQ_GAINS_1, 0, 1, 0), 537bcec267aSKarl Tsou 538bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC TXL Switch", WM8996_DSP1_DRC_1, 0, 1, 0), 539bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC TXR Switch", WM8996_DSP1_DRC_1, 1, 1, 0), 540bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC RX Switch", WM8996_DSP1_DRC_1, 2, 1, 0), 54129e3cc15SMark Brown SND_SOC_BYTES_MASK("DSP1 DRC", WM8996_DSP1_DRC_1, 5, 54229e3cc15SMark Brown WM8996_DSP1RX_DRC_ENA | WM8996_DSP1TXL_DRC_ENA | 54329e3cc15SMark Brown WM8996_DSP1TXR_DRC_ENA), 544bcec267aSKarl Tsou 545bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC TXL Switch", WM8996_DSP2_DRC_1, 0, 1, 0), 546bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC TXR Switch", WM8996_DSP2_DRC_1, 1, 1, 0), 547bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC RX Switch", WM8996_DSP2_DRC_1, 2, 1, 0), 54829e3cc15SMark Brown SND_SOC_BYTES_MASK("DSP2 DRC", WM8996_DSP2_DRC_1, 5, 54929e3cc15SMark Brown WM8996_DSP2RX_DRC_ENA | WM8996_DSP2TXL_DRC_ENA | 55029e3cc15SMark Brown WM8996_DSP2TXR_DRC_ENA), 551a9ba6151SMark Brown }; 552a9ba6151SMark Brown 553a9ba6151SMark Brown static const struct snd_kcontrol_new wm8996_eq_controls[] = { 554a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 11, 31, 0, 555a9ba6151SMark Brown eq_tlv), 556a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B2 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 6, 31, 0, 557a9ba6151SMark Brown eq_tlv), 558a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B3 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 1, 31, 0, 559a9ba6151SMark Brown eq_tlv), 560a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B4 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 11, 31, 0, 561a9ba6151SMark Brown eq_tlv), 562a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B5 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 6, 31, 0, 563a9ba6151SMark Brown eq_tlv), 564a9ba6151SMark Brown 565a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 11, 31, 0, 566a9ba6151SMark Brown eq_tlv), 567a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B2 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 6, 31, 0, 568a9ba6151SMark Brown eq_tlv), 569a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B3 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 1, 31, 0, 570a9ba6151SMark Brown eq_tlv), 571a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B4 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 11, 31, 0, 572a9ba6151SMark Brown eq_tlv), 573a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 6, 31, 0, 574a9ba6151SMark Brown eq_tlv), 575a9ba6151SMark Brown }; 576a9ba6151SMark Brown 577ded71dcbSMark Brown static void wm8996_bg_enable(struct snd_soc_codec *codec) 578ded71dcbSMark Brown { 579ded71dcbSMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 580ded71dcbSMark Brown 581ded71dcbSMark Brown wm8996->bg_ena++; 582ded71dcbSMark Brown if (wm8996->bg_ena == 1) { 583ded71dcbSMark Brown snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, 584ded71dcbSMark Brown WM8996_BG_ENA, WM8996_BG_ENA); 585ded71dcbSMark Brown msleep(2); 586ded71dcbSMark Brown } 587ded71dcbSMark Brown } 588ded71dcbSMark Brown 589ded71dcbSMark Brown static void wm8996_bg_disable(struct snd_soc_codec *codec) 590ded71dcbSMark Brown { 591ded71dcbSMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 592ded71dcbSMark Brown 593ded71dcbSMark Brown wm8996->bg_ena--; 594ded71dcbSMark Brown if (!wm8996->bg_ena) 595ded71dcbSMark Brown snd_soc_update_bits(codec, WM8996_POWER_MANAGEMENT_1, 596ded71dcbSMark Brown WM8996_BG_ENA, 0); 597ded71dcbSMark Brown } 598ded71dcbSMark Brown 5998259df12SMark Brown static int bg_event(struct snd_soc_dapm_widget *w, 6008259df12SMark Brown struct snd_kcontrol *kcontrol, int event) 6018259df12SMark Brown { 60200748490SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 6038259df12SMark Brown int ret = 0; 6048259df12SMark Brown 6058259df12SMark Brown switch (event) { 606ded71dcbSMark Brown case SND_SOC_DAPM_PRE_PMU: 607ded71dcbSMark Brown wm8996_bg_enable(codec); 608ded71dcbSMark Brown break; 609ded71dcbSMark Brown case SND_SOC_DAPM_POST_PMD: 610ded71dcbSMark Brown wm8996_bg_disable(codec); 6118259df12SMark Brown break; 6128259df12SMark Brown default: 613d8e9a544STakashi Iwai WARN(1, "Invalid event %d\n", event); 6148259df12SMark Brown ret = -EINVAL; 6158259df12SMark Brown } 6168259df12SMark Brown 6178259df12SMark Brown return ret; 6188259df12SMark Brown } 6198259df12SMark Brown 620a9ba6151SMark Brown static int cp_event(struct snd_soc_dapm_widget *w, 621a9ba6151SMark Brown struct snd_kcontrol *kcontrol, int event) 622a9ba6151SMark Brown { 623a9ba6151SMark Brown switch (event) { 624a9ba6151SMark Brown case SND_SOC_DAPM_POST_PMU: 625a9ba6151SMark Brown msleep(5); 626a9ba6151SMark Brown break; 627a9ba6151SMark Brown default: 628d8e9a544STakashi Iwai WARN(1, "Invalid event %d\n", event); 629a9ba6151SMark Brown } 630a9ba6151SMark Brown 6314a086e4cSMark Brown return 0; 632a9ba6151SMark Brown } 633a9ba6151SMark Brown 634a9ba6151SMark Brown static int rmv_short_event(struct snd_soc_dapm_widget *w, 635a9ba6151SMark Brown struct snd_kcontrol *kcontrol, int event) 636a9ba6151SMark Brown { 63700748490SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 63800748490SLars-Peter Clausen struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 639a9ba6151SMark Brown 640a9ba6151SMark Brown /* Record which outputs we enabled */ 641a9ba6151SMark Brown switch (event) { 642a9ba6151SMark Brown case SND_SOC_DAPM_PRE_PMD: 643a9ba6151SMark Brown wm8996->hpout_pending &= ~w->shift; 644a9ba6151SMark Brown break; 645a9ba6151SMark Brown case SND_SOC_DAPM_PRE_PMU: 646a9ba6151SMark Brown wm8996->hpout_pending |= w->shift; 647a9ba6151SMark Brown break; 648a9ba6151SMark Brown default: 649d8e9a544STakashi Iwai WARN(1, "Invalid event %d\n", event); 650a9ba6151SMark Brown return -EINVAL; 651a9ba6151SMark Brown } 652a9ba6151SMark Brown 653a9ba6151SMark Brown return 0; 654a9ba6151SMark Brown } 655a9ba6151SMark Brown 656a9ba6151SMark Brown static void wait_for_dc_servo(struct snd_soc_codec *codec, u16 mask) 657a9ba6151SMark Brown { 658a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 659a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 660f998f257SMark Brown int ret; 661a9ba6151SMark Brown unsigned long timeout = 200; 662a9ba6151SMark Brown 663a9ba6151SMark Brown snd_soc_write(codec, WM8996_DC_SERVO_2, mask); 664a9ba6151SMark Brown 665a9ba6151SMark Brown /* Use the interrupt if possible */ 666a9ba6151SMark Brown do { 667a9ba6151SMark Brown if (i2c->irq) { 668a9ba6151SMark Brown timeout = wait_for_completion_timeout(&wm8996->dcs_done, 669a9ba6151SMark Brown msecs_to_jiffies(200)); 670a9ba6151SMark Brown if (timeout == 0) 671a9ba6151SMark Brown dev_err(codec->dev, "DC servo timed out\n"); 672a9ba6151SMark Brown 673a9ba6151SMark Brown } else { 674a9ba6151SMark Brown msleep(1); 675f998f257SMark Brown timeout--; 676a9ba6151SMark Brown } 677a9ba6151SMark Brown 678a9ba6151SMark Brown ret = snd_soc_read(codec, WM8996_DC_SERVO_2); 679a9ba6151SMark Brown dev_dbg(codec->dev, "DC servo state: %x\n", ret); 680f998f257SMark Brown } while (timeout && ret & mask); 681a9ba6151SMark Brown 682a9ba6151SMark Brown if (timeout == 0) 683a9ba6151SMark Brown dev_err(codec->dev, "DC servo timed out for %x\n", mask); 684a9ba6151SMark Brown else 685a9ba6151SMark Brown dev_dbg(codec->dev, "DC servo complete for %x\n", mask); 686a9ba6151SMark Brown } 687a9ba6151SMark Brown 688a9ba6151SMark Brown static void wm8996_seq_notifier(struct snd_soc_dapm_context *dapm, 689a9ba6151SMark Brown enum snd_soc_dapm_type event, int subseq) 690a9ba6151SMark Brown { 691e73a2571SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm); 692a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 693a9ba6151SMark Brown u16 val, mask; 694a9ba6151SMark Brown 695a9ba6151SMark Brown /* Complete any pending DC servo starts */ 696a9ba6151SMark Brown if (wm8996->dcs_pending) { 697a9ba6151SMark Brown dev_dbg(codec->dev, "Starting DC servo for %x\n", 698a9ba6151SMark Brown wm8996->dcs_pending); 699a9ba6151SMark Brown 700a9ba6151SMark Brown /* Trigger a startup sequence */ 701a9ba6151SMark Brown wait_for_dc_servo(codec, wm8996->dcs_pending 702a9ba6151SMark Brown << WM8996_DCS_TRIG_STARTUP_0_SHIFT); 703a9ba6151SMark Brown 704a9ba6151SMark Brown wm8996->dcs_pending = 0; 705a9ba6151SMark Brown } 706a9ba6151SMark Brown 707a9ba6151SMark Brown if (wm8996->hpout_pending != wm8996->hpout_ena) { 708a9ba6151SMark Brown dev_dbg(codec->dev, "Applying RMV_SHORTs %x->%x\n", 709a9ba6151SMark Brown wm8996->hpout_ena, wm8996->hpout_pending); 710a9ba6151SMark Brown 711a9ba6151SMark Brown val = 0; 712a9ba6151SMark Brown mask = 0; 713a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT1L) { 7145b596483SMark Brown val |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP; 7155b596483SMark Brown mask |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP; 716a9ba6151SMark Brown } else { 717a9ba6151SMark Brown mask |= WM8996_HPOUT1L_RMV_SHORT | 718a9ba6151SMark Brown WM8996_HPOUT1L_OUTP | 719a9ba6151SMark Brown WM8996_HPOUT1L_DLY; 720a9ba6151SMark Brown } 721a9ba6151SMark Brown 722a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT1R) { 7235b596483SMark Brown val |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP; 7245b596483SMark Brown mask |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP; 725a9ba6151SMark Brown } else { 726a9ba6151SMark Brown mask |= WM8996_HPOUT1R_RMV_SHORT | 727a9ba6151SMark Brown WM8996_HPOUT1R_OUTP | 728a9ba6151SMark Brown WM8996_HPOUT1R_DLY; 729a9ba6151SMark Brown } 730a9ba6151SMark Brown 731a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, mask, val); 732a9ba6151SMark Brown 733a9ba6151SMark Brown val = 0; 734a9ba6151SMark Brown mask = 0; 735a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT2L) { 7365b596483SMark Brown val |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP; 7375b596483SMark Brown mask |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP; 738a9ba6151SMark Brown } else { 739a9ba6151SMark Brown mask |= WM8996_HPOUT2L_RMV_SHORT | 740a9ba6151SMark Brown WM8996_HPOUT2L_OUTP | 741a9ba6151SMark Brown WM8996_HPOUT2L_DLY; 742a9ba6151SMark Brown } 743a9ba6151SMark Brown 744a9ba6151SMark Brown if (wm8996->hpout_pending & HPOUT2R) { 7455b596483SMark Brown val |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP; 7465b596483SMark Brown mask |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP; 747a9ba6151SMark Brown } else { 748a9ba6151SMark Brown mask |= WM8996_HPOUT2R_RMV_SHORT | 749a9ba6151SMark Brown WM8996_HPOUT2R_OUTP | 750a9ba6151SMark Brown WM8996_HPOUT2R_DLY; 751a9ba6151SMark Brown } 752a9ba6151SMark Brown 753a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_2, mask, val); 754a9ba6151SMark Brown 755a9ba6151SMark Brown wm8996->hpout_ena = wm8996->hpout_pending; 756a9ba6151SMark Brown } 757a9ba6151SMark Brown } 758a9ba6151SMark Brown 759a9ba6151SMark Brown static int dcs_start(struct snd_soc_dapm_widget *w, 760a9ba6151SMark Brown struct snd_kcontrol *kcontrol, int event) 761a9ba6151SMark Brown { 76200748490SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm); 76300748490SLars-Peter Clausen struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 764a9ba6151SMark Brown 765a9ba6151SMark Brown switch (event) { 766a9ba6151SMark Brown case SND_SOC_DAPM_POST_PMU: 767a9ba6151SMark Brown wm8996->dcs_pending |= 1 << w->shift; 768a9ba6151SMark Brown break; 769a9ba6151SMark Brown default: 770d8e9a544STakashi Iwai WARN(1, "Invalid event %d\n", event); 771a9ba6151SMark Brown return -EINVAL; 772a9ba6151SMark Brown } 773a9ba6151SMark Brown 774a9ba6151SMark Brown return 0; 775a9ba6151SMark Brown } 776a9ba6151SMark Brown 777a9ba6151SMark Brown static const char *sidetone_text[] = { 778a9ba6151SMark Brown "IN1", "IN2", 779a9ba6151SMark Brown }; 780a9ba6151SMark Brown 7815cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(left_sidetone_enum, 7825cca5a91STakashi Iwai WM8996_SIDETONE, 0, sidetone_text); 783a9ba6151SMark Brown 784a9ba6151SMark Brown static const struct snd_kcontrol_new left_sidetone = 785a9ba6151SMark Brown SOC_DAPM_ENUM("Left Sidetone", left_sidetone_enum); 786a9ba6151SMark Brown 7875cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(right_sidetone_enum, 7885cca5a91STakashi Iwai WM8996_SIDETONE, 1, sidetone_text); 789a9ba6151SMark Brown 790a9ba6151SMark Brown static const struct snd_kcontrol_new right_sidetone = 791a9ba6151SMark Brown SOC_DAPM_ENUM("Right Sidetone", right_sidetone_enum); 792a9ba6151SMark Brown 793a9ba6151SMark Brown static const char *spk_text[] = { 794a9ba6151SMark Brown "DAC1L", "DAC1R", "DAC2L", "DAC2R" 795a9ba6151SMark Brown }; 796a9ba6151SMark Brown 7975cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(spkl_enum, 7985cca5a91STakashi Iwai WM8996_LEFT_PDM_SPEAKER, 0, spk_text); 799a9ba6151SMark Brown 800a9ba6151SMark Brown static const struct snd_kcontrol_new spkl_mux = 801a9ba6151SMark Brown SOC_DAPM_ENUM("SPKL", spkl_enum); 802a9ba6151SMark Brown 8035cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(spkr_enum, 8045cca5a91STakashi Iwai WM8996_RIGHT_PDM_SPEAKER, 0, spk_text); 805a9ba6151SMark Brown 806a9ba6151SMark Brown static const struct snd_kcontrol_new spkr_mux = 807a9ba6151SMark Brown SOC_DAPM_ENUM("SPKR", spkr_enum); 808a9ba6151SMark Brown 809a9ba6151SMark Brown static const char *dsp1rx_text[] = { 810a9ba6151SMark Brown "AIF1", "AIF2" 811a9ba6151SMark Brown }; 812a9ba6151SMark Brown 8135cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp1rx_enum, 8145cca5a91STakashi Iwai WM8996_POWER_MANAGEMENT_8, 0, dsp1rx_text); 815a9ba6151SMark Brown 816a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1rx = 817a9ba6151SMark Brown SOC_DAPM_ENUM("DSP1RX", dsp1rx_enum); 818a9ba6151SMark Brown 819a9ba6151SMark Brown static const char *dsp2rx_text[] = { 820a9ba6151SMark Brown "AIF2", "AIF1" 821a9ba6151SMark Brown }; 822a9ba6151SMark Brown 8235cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp2rx_enum, 8245cca5a91STakashi Iwai WM8996_POWER_MANAGEMENT_8, 4, dsp2rx_text); 825a9ba6151SMark Brown 826a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2rx = 827a9ba6151SMark Brown SOC_DAPM_ENUM("DSP2RX", dsp2rx_enum); 828a9ba6151SMark Brown 829a9ba6151SMark Brown static const char *aif2tx_text[] = { 830a9ba6151SMark Brown "DSP2", "DSP1", "AIF1" 831a9ba6151SMark Brown }; 832a9ba6151SMark Brown 8335cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(aif2tx_enum, 8345cca5a91STakashi Iwai WM8996_POWER_MANAGEMENT_8, 6, aif2tx_text); 835a9ba6151SMark Brown 836a9ba6151SMark Brown static const struct snd_kcontrol_new aif2tx = 837a9ba6151SMark Brown SOC_DAPM_ENUM("AIF2TX", aif2tx_enum); 838a9ba6151SMark Brown 839a9ba6151SMark Brown static const char *inmux_text[] = { 840a9ba6151SMark Brown "ADC", "DMIC1", "DMIC2" 841a9ba6151SMark Brown }; 842a9ba6151SMark Brown 8435cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(in1_enum, 8445cca5a91STakashi Iwai WM8996_POWER_MANAGEMENT_7, 0, inmux_text); 845a9ba6151SMark Brown 846a9ba6151SMark Brown static const struct snd_kcontrol_new in1_mux = 847a9ba6151SMark Brown SOC_DAPM_ENUM("IN1 Mux", in1_enum); 848a9ba6151SMark Brown 8495cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(in2_enum, 8505cca5a91STakashi Iwai WM8996_POWER_MANAGEMENT_7, 4, inmux_text); 851a9ba6151SMark Brown 852a9ba6151SMark Brown static const struct snd_kcontrol_new in2_mux = 853a9ba6151SMark Brown SOC_DAPM_ENUM("IN2 Mux", in2_enum); 854a9ba6151SMark Brown 855a9ba6151SMark Brown static const struct snd_kcontrol_new dac2r_mix[] = { 856a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 857a9ba6151SMark Brown 5, 1, 0), 858a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 859a9ba6151SMark Brown 4, 1, 0), 860a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1, 1, 0), 861a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 0, 1, 0), 862a9ba6151SMark Brown }; 863a9ba6151SMark Brown 864a9ba6151SMark Brown static const struct snd_kcontrol_new dac2l_mix[] = { 865a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 866a9ba6151SMark Brown 5, 1, 0), 867a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 868a9ba6151SMark Brown 4, 1, 0), 869a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1, 1, 0), 870a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 0, 1, 0), 871a9ba6151SMark Brown }; 872a9ba6151SMark Brown 873a9ba6151SMark Brown static const struct snd_kcontrol_new dac1r_mix[] = { 874a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 875a9ba6151SMark Brown 5, 1, 0), 876a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 877a9ba6151SMark Brown 4, 1, 0), 878a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1, 1, 0), 879a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 0, 1, 0), 880a9ba6151SMark Brown }; 881a9ba6151SMark Brown 882a9ba6151SMark Brown static const struct snd_kcontrol_new dac1l_mix[] = { 883a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 884a9ba6151SMark Brown 5, 1, 0), 885a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 886a9ba6151SMark Brown 4, 1, 0), 887a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1, 1, 0), 888a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 0, 1, 0), 889a9ba6151SMark Brown }; 890a9ba6151SMark Brown 891a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1txl[] = { 892a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 893a9ba6151SMark Brown 1, 1, 0), 894a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 895a9ba6151SMark Brown 0, 1, 0), 896a9ba6151SMark Brown }; 897a9ba6151SMark Brown 898a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1txr[] = { 899a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 900a9ba6151SMark Brown 1, 1, 0), 901a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 902a9ba6151SMark Brown 0, 1, 0), 903a9ba6151SMark Brown }; 904a9ba6151SMark Brown 905a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2txl[] = { 906a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 907a9ba6151SMark Brown 1, 1, 0), 908a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 909a9ba6151SMark Brown 0, 1, 0), 910a9ba6151SMark Brown }; 911a9ba6151SMark Brown 912a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2txr[] = { 913a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 914a9ba6151SMark Brown 1, 1, 0), 915a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 916a9ba6151SMark Brown 0, 1, 0), 917a9ba6151SMark Brown }; 918a9ba6151SMark Brown 919a9ba6151SMark Brown 920a9ba6151SMark Brown static const struct snd_soc_dapm_widget wm8996_dapm_widgets[] = { 921a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1LN"), 922a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1LP"), 923a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1RN"), 924a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1RP"), 925a9ba6151SMark Brown 926a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2LN"), 927a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2LP"), 928a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2RN"), 929a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2RP"), 930a9ba6151SMark Brown 931a9ba6151SMark Brown SND_SOC_DAPM_INPUT("DMIC1DAT"), 932a9ba6151SMark Brown SND_SOC_DAPM_INPUT("DMIC2DAT"), 933a9ba6151SMark Brown 934822b4b8dSMark Brown SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0), 935a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8996_AIF_CLOCKING_1, 0, 0, NULL, 0), 936a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8996_CLOCKING_1, 1, 0, NULL, 0), 937a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8996_CLOCKING_1, 2, 0, NULL, 0), 938a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8996_CHARGE_PUMP_1, 15, 0, cp_event, 9394a086e4cSMark Brown SND_SOC_DAPM_POST_PMU), 940ded71dcbSMark Brown SND_SOC_DAPM_SUPPLY("Bandgap", SND_SOC_NOPM, 0, 0, bg_event, 941ded71dcbSMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD), 942a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("LDO2", WM8996_POWER_MANAGEMENT_2, 1, 0, NULL, 0), 943889c85c5SMark Brown SND_SOC_DAPM_SUPPLY("MICB1 Audio", WM8996_MICBIAS_1, 4, 1, NULL, 0), 944889c85c5SMark Brown SND_SOC_DAPM_SUPPLY("MICB2 Audio", WM8996_MICBIAS_2, 4, 1, NULL, 0), 945a9ba6151SMark Brown SND_SOC_DAPM_MICBIAS("MICB2", WM8996_POWER_MANAGEMENT_1, 9, 0), 946a9ba6151SMark Brown SND_SOC_DAPM_MICBIAS("MICB1", WM8996_POWER_MANAGEMENT_1, 8, 0), 947a9ba6151SMark Brown 948a9ba6151SMark Brown SND_SOC_DAPM_PGA("IN1L PGA", WM8996_POWER_MANAGEMENT_2, 5, 0, NULL, 0), 949a9ba6151SMark Brown SND_SOC_DAPM_PGA("IN1R PGA", WM8996_POWER_MANAGEMENT_2, 4, 0, NULL, 0), 950a9ba6151SMark Brown 9517691cd74SMark Brown SND_SOC_DAPM_MUX("IN1L Mux", WM8996_POWER_MANAGEMENT_7, 2, 0, &in1_mux), 9527691cd74SMark Brown SND_SOC_DAPM_MUX("IN1R Mux", WM8996_POWER_MANAGEMENT_7, 3, 0, &in1_mux), 9537691cd74SMark Brown SND_SOC_DAPM_MUX("IN2L Mux", WM8996_POWER_MANAGEMENT_7, 6, 0, &in2_mux), 9547691cd74SMark Brown SND_SOC_DAPM_MUX("IN2R Mux", WM8996_POWER_MANAGEMENT_7, 7, 0, &in2_mux), 955a9ba6151SMark Brown 956a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("DMIC2", WM8996_POWER_MANAGEMENT_7, 9, 0, NULL, 0), 957a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("DMIC1", WM8996_POWER_MANAGEMENT_7, 8, 0, NULL, 0), 958a9ba6151SMark Brown 959a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8996_POWER_MANAGEMENT_3, 5, 0), 960a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8996_POWER_MANAGEMENT_3, 4, 0), 961a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8996_POWER_MANAGEMENT_3, 3, 0), 962a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8996_POWER_MANAGEMENT_3, 2, 0), 963a9ba6151SMark Brown 964a9ba6151SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8996_POWER_MANAGEMENT_3, 1, 0), 965a9ba6151SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8996_POWER_MANAGEMENT_3, 0, 0), 966a9ba6151SMark Brown 967a9ba6151SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &left_sidetone), 968a9ba6151SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &right_sidetone), 969a9ba6151SMark Brown 970a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP2RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 11, 0), 971a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP2RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 10, 0), 972a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP1RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 9, 0), 973a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP1RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 8, 0), 974a9ba6151SMark Brown 975a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP2TXL", WM8996_POWER_MANAGEMENT_5, 11, 0, 976a9ba6151SMark Brown dsp2txl, ARRAY_SIZE(dsp2txl)), 977a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP2TXR", WM8996_POWER_MANAGEMENT_5, 10, 0, 978a9ba6151SMark Brown dsp2txr, ARRAY_SIZE(dsp2txr)), 979a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP1TXL", WM8996_POWER_MANAGEMENT_5, 9, 0, 980a9ba6151SMark Brown dsp1txl, ARRAY_SIZE(dsp1txl)), 981a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP1TXR", WM8996_POWER_MANAGEMENT_5, 8, 0, 982a9ba6151SMark Brown dsp1txr, ARRAY_SIZE(dsp1txr)), 983a9ba6151SMark Brown 984a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC2L Mixer", SND_SOC_NOPM, 0, 0, 985a9ba6151SMark Brown dac2l_mix, ARRAY_SIZE(dac2l_mix)), 986a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC2R Mixer", SND_SOC_NOPM, 0, 0, 987a9ba6151SMark Brown dac2r_mix, ARRAY_SIZE(dac2r_mix)), 988a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0, 989a9ba6151SMark Brown dac1l_mix, ARRAY_SIZE(dac1l_mix)), 990a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0, 991a9ba6151SMark Brown dac1r_mix, ARRAY_SIZE(dac1r_mix)), 992a9ba6151SMark Brown 993a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC2L", NULL, WM8996_POWER_MANAGEMENT_5, 3, 0), 994a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC2R", NULL, WM8996_POWER_MANAGEMENT_5, 2, 0), 995a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC1L", NULL, WM8996_POWER_MANAGEMENT_5, 1, 0), 996a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC1R", NULL, WM8996_POWER_MANAGEMENT_5, 0, 0), 997a9ba6151SMark Brown 9981ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, WM8996_POWER_MANAGEMENT_4, 9, 0), 9991ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF2RX0", NULL, 1, WM8996_POWER_MANAGEMENT_4, 8, 0), 1000a9ba6151SMark Brown 10011ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, WM8996_POWER_MANAGEMENT_6, 9, 0), 10021ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF2TX0", NULL, 1, WM8996_POWER_MANAGEMENT_6, 8, 0), 1003a9ba6151SMark Brown 10041ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 5, WM8996_POWER_MANAGEMENT_4, 5, 0), 10051ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 4, WM8996_POWER_MANAGEMENT_4, 4, 0), 10061ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 3, WM8996_POWER_MANAGEMENT_4, 3, 0), 10071ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 2, WM8996_POWER_MANAGEMENT_4, 2, 0), 10081ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 1, WM8996_POWER_MANAGEMENT_4, 1, 0), 10091ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX0", NULL, 0, WM8996_POWER_MANAGEMENT_4, 0, 0), 1010a9ba6151SMark Brown 10111ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 5, WM8996_POWER_MANAGEMENT_6, 5, 0), 10121ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 4, WM8996_POWER_MANAGEMENT_6, 4, 0), 10131ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 3, WM8996_POWER_MANAGEMENT_6, 3, 0), 10141ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 2, WM8996_POWER_MANAGEMENT_6, 2, 0), 10151ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 1, WM8996_POWER_MANAGEMENT_6, 1, 0), 10161ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX0", NULL, 0, WM8996_POWER_MANAGEMENT_6, 0, 0), 1017a9ba6151SMark Brown 1018a9ba6151SMark Brown /* We route as stereo pairs so define some dummy widgets to squash 1019a9ba6151SMark Brown * things down for now. RXA = 0,1, RXB = 2,3 and so on */ 1020a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXA", SND_SOC_NOPM, 0, 0, NULL, 0), 1021a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXB", SND_SOC_NOPM, 0, 0, NULL, 0), 1022a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXC", SND_SOC_NOPM, 0, 0, NULL, 0), 1023a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF2RX", SND_SOC_NOPM, 0, 0, NULL, 0), 1024a9ba6151SMark Brown SND_SOC_DAPM_PGA("DSP2TX", SND_SOC_NOPM, 0, 0, NULL, 0), 1025a9ba6151SMark Brown 1026a9ba6151SMark Brown SND_SOC_DAPM_MUX("DSP1RX", SND_SOC_NOPM, 0, 0, &dsp1rx), 1027a9ba6151SMark Brown SND_SOC_DAPM_MUX("DSP2RX", SND_SOC_NOPM, 0, 0, &dsp2rx), 1028a9ba6151SMark Brown SND_SOC_DAPM_MUX("AIF2TX", SND_SOC_NOPM, 0, 0, &aif2tx), 1029a9ba6151SMark Brown 1030a9ba6151SMark Brown SND_SOC_DAPM_MUX("SPKL", SND_SOC_NOPM, 0, 0, &spkl_mux), 1031a9ba6151SMark Brown SND_SOC_DAPM_MUX("SPKR", SND_SOC_NOPM, 0, 0, &spkr_mux), 1032a9ba6151SMark Brown SND_SOC_DAPM_PGA("SPKL PGA", WM8996_LEFT_PDM_SPEAKER, 4, 0, NULL, 0), 1033a9ba6151SMark Brown SND_SOC_DAPM_PGA("SPKR PGA", WM8996_RIGHT_PDM_SPEAKER, 4, 0, NULL, 0), 1034a9ba6151SMark Brown 1035a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8996_POWER_MANAGEMENT_1, 7, 0, NULL, 0), 1036a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8996_ANALOGUE_HP_2, 5, 0, NULL, 0), 1037a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8996_DC_SERVO_1, 2, 0, dcs_start, 1038a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1039a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2L, 0, 1040a9ba6151SMark Brown rmv_short_event, 1041a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1042a9ba6151SMark Brown 1043a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8996_POWER_MANAGEMENT_1, 6, 0,NULL, 0), 1044a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8996_ANALOGUE_HP_2, 1, 0, NULL, 0), 1045a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8996_DC_SERVO_1, 3, 0, dcs_start, 1046a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1047a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2R, 0, 1048a9ba6151SMark Brown rmv_short_event, 1049a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1050a9ba6151SMark Brown 1051a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8996_POWER_MANAGEMENT_1, 5, 0, NULL, 0), 1052a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8996_ANALOGUE_HP_1, 5, 0, NULL, 0), 1053a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8996_DC_SERVO_1, 0, 0, dcs_start, 1054a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1055a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1L, 0, 1056a9ba6151SMark Brown rmv_short_event, 1057a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1058a9ba6151SMark Brown 1059a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8996_POWER_MANAGEMENT_1, 4, 0, NULL, 0), 1060a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8996_ANALOGUE_HP_1, 1, 0, NULL, 0), 1061a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8996_DC_SERVO_1, 1, 0, dcs_start, 1062a9ba6151SMark Brown SND_SOC_DAPM_POST_PMU), 1063a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1R, 0, 1064a9ba6151SMark Brown rmv_short_event, 1065a9ba6151SMark Brown SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 1066a9ba6151SMark Brown 1067a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT1L"), 1068a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT1R"), 1069a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT2L"), 1070a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT2R"), 1071a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("SPKDAT"), 1072a9ba6151SMark Brown }; 1073a9ba6151SMark Brown 1074a9ba6151SMark Brown static const struct snd_soc_dapm_route wm8996_dapm_routes[] = { 1075a9ba6151SMark Brown { "AIFCLK", NULL, "SYSCLK" }, 1076a9ba6151SMark Brown { "SYSDSPCLK", NULL, "SYSCLK" }, 1077a9ba6151SMark Brown { "Charge Pump", NULL, "SYSCLK" }, 10784a086e4cSMark Brown { "Charge Pump", NULL, "CPVDD" }, 1079a9ba6151SMark Brown 1080a9ba6151SMark Brown { "MICB1", NULL, "LDO2" }, 1081889c85c5SMark Brown { "MICB1", NULL, "MICB1 Audio" }, 10828259df12SMark Brown { "MICB1", NULL, "Bandgap" }, 1083a9ba6151SMark Brown { "MICB2", NULL, "LDO2" }, 1084889c85c5SMark Brown { "MICB2", NULL, "MICB2 Audio" }, 10858259df12SMark Brown { "MICB2", NULL, "Bandgap" }, 1086a9ba6151SMark Brown 10871ec1cdfbSMark Brown { "AIF1RX0", NULL, "AIF1 Playback" }, 10881ec1cdfbSMark Brown { "AIF1RX1", NULL, "AIF1 Playback" }, 10891ec1cdfbSMark Brown { "AIF1RX2", NULL, "AIF1 Playback" }, 10901ec1cdfbSMark Brown { "AIF1RX3", NULL, "AIF1 Playback" }, 10911ec1cdfbSMark Brown { "AIF1RX4", NULL, "AIF1 Playback" }, 10921ec1cdfbSMark Brown { "AIF1RX5", NULL, "AIF1 Playback" }, 10931ec1cdfbSMark Brown 10941ec1cdfbSMark Brown { "AIF2RX0", NULL, "AIF2 Playback" }, 10951ec1cdfbSMark Brown { "AIF2RX1", NULL, "AIF2 Playback" }, 10961ec1cdfbSMark Brown 10971ec1cdfbSMark Brown { "AIF1 Capture", NULL, "AIF1TX0" }, 10981ec1cdfbSMark Brown { "AIF1 Capture", NULL, "AIF1TX1" }, 10991ec1cdfbSMark Brown { "AIF1 Capture", NULL, "AIF1TX2" }, 11001ec1cdfbSMark Brown { "AIF1 Capture", NULL, "AIF1TX3" }, 11011ec1cdfbSMark Brown { "AIF1 Capture", NULL, "AIF1TX4" }, 11021ec1cdfbSMark Brown { "AIF1 Capture", NULL, "AIF1TX5" }, 11031ec1cdfbSMark Brown 11041ec1cdfbSMark Brown { "AIF2 Capture", NULL, "AIF2TX0" }, 11051ec1cdfbSMark Brown { "AIF2 Capture", NULL, "AIF2TX1" }, 11061ec1cdfbSMark Brown 1107a9ba6151SMark Brown { "IN1L PGA", NULL, "IN2LN" }, 1108a9ba6151SMark Brown { "IN1L PGA", NULL, "IN2LP" }, 1109a9ba6151SMark Brown { "IN1L PGA", NULL, "IN1LN" }, 1110a9ba6151SMark Brown { "IN1L PGA", NULL, "IN1LP" }, 11118259df12SMark Brown { "IN1L PGA", NULL, "Bandgap" }, 1112a9ba6151SMark Brown 1113a9ba6151SMark Brown { "IN1R PGA", NULL, "IN2RN" }, 1114a9ba6151SMark Brown { "IN1R PGA", NULL, "IN2RP" }, 1115a9ba6151SMark Brown { "IN1R PGA", NULL, "IN1RN" }, 1116a9ba6151SMark Brown { "IN1R PGA", NULL, "IN1RP" }, 11178259df12SMark Brown { "IN1R PGA", NULL, "Bandgap" }, 1118a9ba6151SMark Brown 1119a9ba6151SMark Brown { "ADCL", NULL, "IN1L PGA" }, 1120a9ba6151SMark Brown 1121a9ba6151SMark Brown { "ADCR", NULL, "IN1R PGA" }, 1122a9ba6151SMark Brown 1123a9ba6151SMark Brown { "DMIC1L", NULL, "DMIC1DAT" }, 1124a9ba6151SMark Brown { "DMIC1R", NULL, "DMIC1DAT" }, 1125a9ba6151SMark Brown { "DMIC2L", NULL, "DMIC2DAT" }, 1126a9ba6151SMark Brown { "DMIC2R", NULL, "DMIC2DAT" }, 1127a9ba6151SMark Brown 1128a9ba6151SMark Brown { "DMIC2L", NULL, "DMIC2" }, 1129a9ba6151SMark Brown { "DMIC2R", NULL, "DMIC2" }, 1130a9ba6151SMark Brown { "DMIC1L", NULL, "DMIC1" }, 1131a9ba6151SMark Brown { "DMIC1R", NULL, "DMIC1" }, 1132a9ba6151SMark Brown 1133a9ba6151SMark Brown { "IN1L Mux", "ADC", "ADCL" }, 1134a9ba6151SMark Brown { "IN1L Mux", "DMIC1", "DMIC1L" }, 1135a9ba6151SMark Brown { "IN1L Mux", "DMIC2", "DMIC2L" }, 1136a9ba6151SMark Brown 1137a9ba6151SMark Brown { "IN1R Mux", "ADC", "ADCR" }, 1138a9ba6151SMark Brown { "IN1R Mux", "DMIC1", "DMIC1R" }, 1139a9ba6151SMark Brown { "IN1R Mux", "DMIC2", "DMIC2R" }, 1140a9ba6151SMark Brown 1141a9ba6151SMark Brown { "IN2L Mux", "ADC", "ADCL" }, 1142a9ba6151SMark Brown { "IN2L Mux", "DMIC1", "DMIC1L" }, 1143a9ba6151SMark Brown { "IN2L Mux", "DMIC2", "DMIC2L" }, 1144a9ba6151SMark Brown 1145a9ba6151SMark Brown { "IN2R Mux", "ADC", "ADCR" }, 1146a9ba6151SMark Brown { "IN2R Mux", "DMIC1", "DMIC1R" }, 1147a9ba6151SMark Brown { "IN2R Mux", "DMIC2", "DMIC2R" }, 1148a9ba6151SMark Brown 1149a9ba6151SMark Brown { "Left Sidetone", "IN1", "IN1L Mux" }, 1150a9ba6151SMark Brown { "Left Sidetone", "IN2", "IN2L Mux" }, 1151a9ba6151SMark Brown 1152a9ba6151SMark Brown { "Right Sidetone", "IN1", "IN1R Mux" }, 1153a9ba6151SMark Brown { "Right Sidetone", "IN2", "IN2R Mux" }, 1154a9ba6151SMark Brown 1155a9ba6151SMark Brown { "DSP1TXL", "IN1 Switch", "IN1L Mux" }, 1156a9ba6151SMark Brown { "DSP1TXR", "IN1 Switch", "IN1R Mux" }, 1157a9ba6151SMark Brown 1158a9ba6151SMark Brown { "DSP2TXL", "IN1 Switch", "IN2L Mux" }, 1159a9ba6151SMark Brown { "DSP2TXR", "IN1 Switch", "IN2R Mux" }, 1160a9ba6151SMark Brown 1161a9ba6151SMark Brown { "AIF1TX0", NULL, "DSP1TXL" }, 1162a9ba6151SMark Brown { "AIF1TX1", NULL, "DSP1TXR" }, 1163a9ba6151SMark Brown { "AIF1TX2", NULL, "DSP2TXL" }, 1164a9ba6151SMark Brown { "AIF1TX3", NULL, "DSP2TXR" }, 1165a9ba6151SMark Brown { "AIF1TX4", NULL, "AIF2RX0" }, 1166a9ba6151SMark Brown { "AIF1TX5", NULL, "AIF2RX1" }, 1167a9ba6151SMark Brown 1168a9ba6151SMark Brown { "AIF1RX0", NULL, "AIFCLK" }, 1169a9ba6151SMark Brown { "AIF1RX1", NULL, "AIFCLK" }, 1170a9ba6151SMark Brown { "AIF1RX2", NULL, "AIFCLK" }, 1171a9ba6151SMark Brown { "AIF1RX3", NULL, "AIFCLK" }, 1172a9ba6151SMark Brown { "AIF1RX4", NULL, "AIFCLK" }, 1173a9ba6151SMark Brown { "AIF1RX5", NULL, "AIFCLK" }, 1174a9ba6151SMark Brown 1175a9ba6151SMark Brown { "AIF2RX0", NULL, "AIFCLK" }, 1176a9ba6151SMark Brown { "AIF2RX1", NULL, "AIFCLK" }, 1177a9ba6151SMark Brown 11784f41adfdSMark Brown { "AIF1TX0", NULL, "AIFCLK" }, 11794f41adfdSMark Brown { "AIF1TX1", NULL, "AIFCLK" }, 11804f41adfdSMark Brown { "AIF1TX2", NULL, "AIFCLK" }, 11814f41adfdSMark Brown { "AIF1TX3", NULL, "AIFCLK" }, 11824f41adfdSMark Brown { "AIF1TX4", NULL, "AIFCLK" }, 11834f41adfdSMark Brown { "AIF1TX5", NULL, "AIFCLK" }, 11844f41adfdSMark Brown 11854f41adfdSMark Brown { "AIF2TX0", NULL, "AIFCLK" }, 11864f41adfdSMark Brown { "AIF2TX1", NULL, "AIFCLK" }, 11874f41adfdSMark Brown 1188a9ba6151SMark Brown { "DSP1RXL", NULL, "SYSDSPCLK" }, 1189a9ba6151SMark Brown { "DSP1RXR", NULL, "SYSDSPCLK" }, 1190a9ba6151SMark Brown { "DSP2RXL", NULL, "SYSDSPCLK" }, 1191a9ba6151SMark Brown { "DSP2RXR", NULL, "SYSDSPCLK" }, 1192a9ba6151SMark Brown { "DSP1TXL", NULL, "SYSDSPCLK" }, 1193a9ba6151SMark Brown { "DSP1TXR", NULL, "SYSDSPCLK" }, 1194a9ba6151SMark Brown { "DSP2TXL", NULL, "SYSDSPCLK" }, 1195a9ba6151SMark Brown { "DSP2TXR", NULL, "SYSDSPCLK" }, 1196a9ba6151SMark Brown 1197a9ba6151SMark Brown { "AIF1RXA", NULL, "AIF1RX0" }, 1198a9ba6151SMark Brown { "AIF1RXA", NULL, "AIF1RX1" }, 1199a9ba6151SMark Brown { "AIF1RXB", NULL, "AIF1RX2" }, 1200a9ba6151SMark Brown { "AIF1RXB", NULL, "AIF1RX3" }, 1201a9ba6151SMark Brown { "AIF1RXC", NULL, "AIF1RX4" }, 1202a9ba6151SMark Brown { "AIF1RXC", NULL, "AIF1RX5" }, 1203a9ba6151SMark Brown 1204a9ba6151SMark Brown { "AIF2RX", NULL, "AIF2RX0" }, 1205a9ba6151SMark Brown { "AIF2RX", NULL, "AIF2RX1" }, 1206a9ba6151SMark Brown 1207a9ba6151SMark Brown { "AIF2TX", "DSP2", "DSP2TX" }, 1208a9ba6151SMark Brown { "AIF2TX", "DSP1", "DSP1RX" }, 1209a9ba6151SMark Brown { "AIF2TX", "AIF1", "AIF1RXC" }, 1210a9ba6151SMark Brown 1211a9ba6151SMark Brown { "DSP1RXL", NULL, "DSP1RX" }, 1212a9ba6151SMark Brown { "DSP1RXR", NULL, "DSP1RX" }, 1213a9ba6151SMark Brown { "DSP2RXL", NULL, "DSP2RX" }, 1214a9ba6151SMark Brown { "DSP2RXR", NULL, "DSP2RX" }, 1215a9ba6151SMark Brown 1216a9ba6151SMark Brown { "DSP2TX", NULL, "DSP2TXL" }, 1217a9ba6151SMark Brown { "DSP2TX", NULL, "DSP2TXR" }, 1218a9ba6151SMark Brown 1219a9ba6151SMark Brown { "DSP1RX", "AIF1", "AIF1RXA" }, 1220a9ba6151SMark Brown { "DSP1RX", "AIF2", "AIF2RX" }, 1221a9ba6151SMark Brown 1222a9ba6151SMark Brown { "DSP2RX", "AIF1", "AIF1RXB" }, 1223a9ba6151SMark Brown { "DSP2RX", "AIF2", "AIF2RX" }, 1224a9ba6151SMark Brown 1225a9ba6151SMark Brown { "DAC2L Mixer", "DSP2 Switch", "DSP2RXL" }, 1226a9ba6151SMark Brown { "DAC2L Mixer", "DSP1 Switch", "DSP1RXL" }, 1227a9ba6151SMark Brown { "DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1228a9ba6151SMark Brown { "DAC2L Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1229a9ba6151SMark Brown 1230a9ba6151SMark Brown { "DAC2R Mixer", "DSP2 Switch", "DSP2RXR" }, 1231a9ba6151SMark Brown { "DAC2R Mixer", "DSP1 Switch", "DSP1RXR" }, 1232a9ba6151SMark Brown { "DAC2R Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1233a9ba6151SMark Brown { "DAC2R Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1234a9ba6151SMark Brown 1235a9ba6151SMark Brown { "DAC1L Mixer", "DSP2 Switch", "DSP2RXL" }, 1236a9ba6151SMark Brown { "DAC1L Mixer", "DSP1 Switch", "DSP1RXL" }, 1237a9ba6151SMark Brown { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1238a9ba6151SMark Brown { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1239a9ba6151SMark Brown 1240a9ba6151SMark Brown { "DAC1R Mixer", "DSP2 Switch", "DSP2RXR" }, 1241a9ba6151SMark Brown { "DAC1R Mixer", "DSP1 Switch", "DSP1RXR" }, 1242a9ba6151SMark Brown { "DAC1R Mixer", "Right Sidetone Switch", "Right Sidetone" }, 1243a9ba6151SMark Brown { "DAC1R Mixer", "Left Sidetone Switch", "Left Sidetone" }, 1244a9ba6151SMark Brown 1245a9ba6151SMark Brown { "DAC1L", NULL, "DAC1L Mixer" }, 1246a9ba6151SMark Brown { "DAC1R", NULL, "DAC1R Mixer" }, 1247a9ba6151SMark Brown { "DAC2L", NULL, "DAC2L Mixer" }, 1248a9ba6151SMark Brown { "DAC2R", NULL, "DAC2R Mixer" }, 1249a9ba6151SMark Brown 1250a9ba6151SMark Brown { "HPOUT2L PGA", NULL, "Charge Pump" }, 12518259df12SMark Brown { "HPOUT2L PGA", NULL, "Bandgap" }, 1252a9ba6151SMark Brown { "HPOUT2L PGA", NULL, "DAC2L" }, 1253a9ba6151SMark Brown { "HPOUT2L_DLY", NULL, "HPOUT2L PGA" }, 1254a9ba6151SMark Brown { "HPOUT2L_DCS", NULL, "HPOUT2L_DLY" }, 12555b596483SMark Brown { "HPOUT2L_RMV_SHORT", NULL, "HPOUT2L_DCS" }, 1256a9ba6151SMark Brown 1257a9ba6151SMark Brown { "HPOUT2R PGA", NULL, "Charge Pump" }, 12588259df12SMark Brown { "HPOUT2R PGA", NULL, "Bandgap" }, 1259a9ba6151SMark Brown { "HPOUT2R PGA", NULL, "DAC2R" }, 1260a9ba6151SMark Brown { "HPOUT2R_DLY", NULL, "HPOUT2R PGA" }, 1261a9ba6151SMark Brown { "HPOUT2R_DCS", NULL, "HPOUT2R_DLY" }, 12625b596483SMark Brown { "HPOUT2R_RMV_SHORT", NULL, "HPOUT2R_DCS" }, 1263a9ba6151SMark Brown 1264a9ba6151SMark Brown { "HPOUT1L PGA", NULL, "Charge Pump" }, 12658259df12SMark Brown { "HPOUT1L PGA", NULL, "Bandgap" }, 1266a9ba6151SMark Brown { "HPOUT1L PGA", NULL, "DAC1L" }, 1267a9ba6151SMark Brown { "HPOUT1L_DLY", NULL, "HPOUT1L PGA" }, 1268a9ba6151SMark Brown { "HPOUT1L_DCS", NULL, "HPOUT1L_DLY" }, 12695b596483SMark Brown { "HPOUT1L_RMV_SHORT", NULL, "HPOUT1L_DCS" }, 1270a9ba6151SMark Brown 1271a9ba6151SMark Brown { "HPOUT1R PGA", NULL, "Charge Pump" }, 12728259df12SMark Brown { "HPOUT1R PGA", NULL, "Bandgap" }, 1273a9ba6151SMark Brown { "HPOUT1R PGA", NULL, "DAC1R" }, 1274a9ba6151SMark Brown { "HPOUT1R_DLY", NULL, "HPOUT1R PGA" }, 1275a9ba6151SMark Brown { "HPOUT1R_DCS", NULL, "HPOUT1R_DLY" }, 12765b596483SMark Brown { "HPOUT1R_RMV_SHORT", NULL, "HPOUT1R_DCS" }, 1277a9ba6151SMark Brown 1278a9ba6151SMark Brown { "HPOUT2L", NULL, "HPOUT2L_RMV_SHORT" }, 1279a9ba6151SMark Brown { "HPOUT2R", NULL, "HPOUT2R_RMV_SHORT" }, 1280a9ba6151SMark Brown { "HPOUT1L", NULL, "HPOUT1L_RMV_SHORT" }, 1281a9ba6151SMark Brown { "HPOUT1R", NULL, "HPOUT1R_RMV_SHORT" }, 1282a9ba6151SMark Brown 1283a9ba6151SMark Brown { "SPKL", "DAC1L", "DAC1L" }, 1284a9ba6151SMark Brown { "SPKL", "DAC1R", "DAC1R" }, 1285a9ba6151SMark Brown { "SPKL", "DAC2L", "DAC2L" }, 1286a9ba6151SMark Brown { "SPKL", "DAC2R", "DAC2R" }, 1287a9ba6151SMark Brown 1288a9ba6151SMark Brown { "SPKR", "DAC1L", "DAC1L" }, 1289a9ba6151SMark Brown { "SPKR", "DAC1R", "DAC1R" }, 1290a9ba6151SMark Brown { "SPKR", "DAC2L", "DAC2L" }, 1291a9ba6151SMark Brown { "SPKR", "DAC2R", "DAC2R" }, 1292a9ba6151SMark Brown 1293a9ba6151SMark Brown { "SPKL PGA", NULL, "SPKL" }, 1294a9ba6151SMark Brown { "SPKR PGA", NULL, "SPKR" }, 1295a9ba6151SMark Brown 1296a9ba6151SMark Brown { "SPKDAT", NULL, "SPKL PGA" }, 1297a9ba6151SMark Brown { "SPKDAT", NULL, "SPKR PGA" }, 1298a9ba6151SMark Brown }; 1299a9ba6151SMark Brown 130079172746SMark Brown static bool wm8996_readable_register(struct device *dev, unsigned int reg) 1301a9ba6151SMark Brown { 1302a9ba6151SMark Brown /* Due to the sparseness of the register map the compiler 1303a9ba6151SMark Brown * output from an explicit switch statement ends up being much 1304a9ba6151SMark Brown * more efficient than a table. 1305a9ba6151SMark Brown */ 1306a9ba6151SMark Brown switch (reg) { 1307a9ba6151SMark Brown case WM8996_SOFTWARE_RESET: 1308a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_1: 1309a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_2: 1310a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_3: 1311a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_4: 1312a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_5: 1313a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_6: 1314a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_7: 1315a9ba6151SMark Brown case WM8996_POWER_MANAGEMENT_8: 1316a9ba6151SMark Brown case WM8996_LEFT_LINE_INPUT_VOLUME: 1317a9ba6151SMark Brown case WM8996_RIGHT_LINE_INPUT_VOLUME: 1318a9ba6151SMark Brown case WM8996_LINE_INPUT_CONTROL: 1319a9ba6151SMark Brown case WM8996_DAC1_HPOUT1_VOLUME: 1320a9ba6151SMark Brown case WM8996_DAC2_HPOUT2_VOLUME: 1321a9ba6151SMark Brown case WM8996_DAC1_LEFT_VOLUME: 1322a9ba6151SMark Brown case WM8996_DAC1_RIGHT_VOLUME: 1323a9ba6151SMark Brown case WM8996_DAC2_LEFT_VOLUME: 1324a9ba6151SMark Brown case WM8996_DAC2_RIGHT_VOLUME: 1325a9ba6151SMark Brown case WM8996_OUTPUT1_LEFT_VOLUME: 1326a9ba6151SMark Brown case WM8996_OUTPUT1_RIGHT_VOLUME: 1327a9ba6151SMark Brown case WM8996_OUTPUT2_LEFT_VOLUME: 1328a9ba6151SMark Brown case WM8996_OUTPUT2_RIGHT_VOLUME: 1329a9ba6151SMark Brown case WM8996_MICBIAS_1: 1330a9ba6151SMark Brown case WM8996_MICBIAS_2: 1331a9ba6151SMark Brown case WM8996_LDO_1: 1332a9ba6151SMark Brown case WM8996_LDO_2: 1333a9ba6151SMark Brown case WM8996_ACCESSORY_DETECT_MODE_1: 1334a9ba6151SMark Brown case WM8996_ACCESSORY_DETECT_MODE_2: 1335a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_1: 1336a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_2: 1337a9ba6151SMark Brown case WM8996_MIC_DETECT_1: 1338a9ba6151SMark Brown case WM8996_MIC_DETECT_2: 1339a9ba6151SMark Brown case WM8996_MIC_DETECT_3: 1340a9ba6151SMark Brown case WM8996_CHARGE_PUMP_1: 1341a9ba6151SMark Brown case WM8996_CHARGE_PUMP_2: 1342a9ba6151SMark Brown case WM8996_DC_SERVO_1: 1343a9ba6151SMark Brown case WM8996_DC_SERVO_2: 1344a9ba6151SMark Brown case WM8996_DC_SERVO_3: 1345a9ba6151SMark Brown case WM8996_DC_SERVO_5: 1346a9ba6151SMark Brown case WM8996_DC_SERVO_6: 1347a9ba6151SMark Brown case WM8996_DC_SERVO_7: 1348a9ba6151SMark Brown case WM8996_DC_SERVO_READBACK_0: 1349a9ba6151SMark Brown case WM8996_ANALOGUE_HP_1: 1350a9ba6151SMark Brown case WM8996_ANALOGUE_HP_2: 1351a9ba6151SMark Brown case WM8996_CHIP_REVISION: 1352a9ba6151SMark Brown case WM8996_CONTROL_INTERFACE_1: 1353a9ba6151SMark Brown case WM8996_WRITE_SEQUENCER_CTRL_1: 1354a9ba6151SMark Brown case WM8996_WRITE_SEQUENCER_CTRL_2: 1355a9ba6151SMark Brown case WM8996_AIF_CLOCKING_1: 1356a9ba6151SMark Brown case WM8996_AIF_CLOCKING_2: 1357a9ba6151SMark Brown case WM8996_CLOCKING_1: 1358a9ba6151SMark Brown case WM8996_CLOCKING_2: 1359a9ba6151SMark Brown case WM8996_AIF_RATE: 1360a9ba6151SMark Brown case WM8996_FLL_CONTROL_1: 1361a9ba6151SMark Brown case WM8996_FLL_CONTROL_2: 1362a9ba6151SMark Brown case WM8996_FLL_CONTROL_3: 1363a9ba6151SMark Brown case WM8996_FLL_CONTROL_4: 1364a9ba6151SMark Brown case WM8996_FLL_CONTROL_5: 1365a9ba6151SMark Brown case WM8996_FLL_CONTROL_6: 1366a9ba6151SMark Brown case WM8996_FLL_EFS_1: 1367a9ba6151SMark Brown case WM8996_FLL_EFS_2: 1368a9ba6151SMark Brown case WM8996_AIF1_CONTROL: 1369a9ba6151SMark Brown case WM8996_AIF1_BCLK: 1370a9ba6151SMark Brown case WM8996_AIF1_TX_LRCLK_1: 1371a9ba6151SMark Brown case WM8996_AIF1_TX_LRCLK_2: 1372a9ba6151SMark Brown case WM8996_AIF1_RX_LRCLK_1: 1373a9ba6151SMark Brown case WM8996_AIF1_RX_LRCLK_2: 1374a9ba6151SMark Brown case WM8996_AIF1TX_DATA_CONFIGURATION_1: 1375a9ba6151SMark Brown case WM8996_AIF1TX_DATA_CONFIGURATION_2: 1376a9ba6151SMark Brown case WM8996_AIF1RX_DATA_CONFIGURATION: 1377a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_0_CONFIGURATION: 1378a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_1_CONFIGURATION: 1379a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_2_CONFIGURATION: 1380a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_3_CONFIGURATION: 1381a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_4_CONFIGURATION: 1382a9ba6151SMark Brown case WM8996_AIF1TX_CHANNEL_5_CONFIGURATION: 1383a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_0_CONFIGURATION: 1384a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_1_CONFIGURATION: 1385a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_2_CONFIGURATION: 1386a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_3_CONFIGURATION: 1387a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_4_CONFIGURATION: 1388a9ba6151SMark Brown case WM8996_AIF1RX_CHANNEL_5_CONFIGURATION: 1389a9ba6151SMark Brown case WM8996_AIF1RX_MONO_CONFIGURATION: 1390a9ba6151SMark Brown case WM8996_AIF1TX_TEST: 1391a9ba6151SMark Brown case WM8996_AIF2_CONTROL: 1392a9ba6151SMark Brown case WM8996_AIF2_BCLK: 1393a9ba6151SMark Brown case WM8996_AIF2_TX_LRCLK_1: 1394a9ba6151SMark Brown case WM8996_AIF2_TX_LRCLK_2: 1395a9ba6151SMark Brown case WM8996_AIF2_RX_LRCLK_1: 1396a9ba6151SMark Brown case WM8996_AIF2_RX_LRCLK_2: 1397a9ba6151SMark Brown case WM8996_AIF2TX_DATA_CONFIGURATION_1: 1398a9ba6151SMark Brown case WM8996_AIF2TX_DATA_CONFIGURATION_2: 1399a9ba6151SMark Brown case WM8996_AIF2RX_DATA_CONFIGURATION: 1400a9ba6151SMark Brown case WM8996_AIF2TX_CHANNEL_0_CONFIGURATION: 1401a9ba6151SMark Brown case WM8996_AIF2TX_CHANNEL_1_CONFIGURATION: 1402a9ba6151SMark Brown case WM8996_AIF2RX_CHANNEL_0_CONFIGURATION: 1403a9ba6151SMark Brown case WM8996_AIF2RX_CHANNEL_1_CONFIGURATION: 1404a9ba6151SMark Brown case WM8996_AIF2RX_MONO_CONFIGURATION: 1405a9ba6151SMark Brown case WM8996_AIF2TX_TEST: 1406a9ba6151SMark Brown case WM8996_DSP1_TX_LEFT_VOLUME: 1407a9ba6151SMark Brown case WM8996_DSP1_TX_RIGHT_VOLUME: 1408a9ba6151SMark Brown case WM8996_DSP1_RX_LEFT_VOLUME: 1409a9ba6151SMark Brown case WM8996_DSP1_RX_RIGHT_VOLUME: 1410a9ba6151SMark Brown case WM8996_DSP1_TX_FILTERS: 1411a9ba6151SMark Brown case WM8996_DSP1_RX_FILTERS_1: 1412a9ba6151SMark Brown case WM8996_DSP1_RX_FILTERS_2: 1413a9ba6151SMark Brown case WM8996_DSP1_DRC_1: 1414a9ba6151SMark Brown case WM8996_DSP1_DRC_2: 1415a9ba6151SMark Brown case WM8996_DSP1_DRC_3: 1416a9ba6151SMark Brown case WM8996_DSP1_DRC_4: 1417a9ba6151SMark Brown case WM8996_DSP1_DRC_5: 1418a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_GAINS_1: 1419a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_GAINS_2: 1420a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_1_A: 1421a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_1_B: 1422a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_1_PG: 1423a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_A: 1424a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_B: 1425a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_C: 1426a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_2_PG: 1427a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_A: 1428a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_B: 1429a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_C: 1430a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_3_PG: 1431a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_A: 1432a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_B: 1433a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_C: 1434a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_4_PG: 1435a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_5_A: 1436a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_5_B: 1437a9ba6151SMark Brown case WM8996_DSP1_RX_EQ_BAND_5_PG: 1438a9ba6151SMark Brown case WM8996_DSP2_TX_LEFT_VOLUME: 1439a9ba6151SMark Brown case WM8996_DSP2_TX_RIGHT_VOLUME: 1440a9ba6151SMark Brown case WM8996_DSP2_RX_LEFT_VOLUME: 1441a9ba6151SMark Brown case WM8996_DSP2_RX_RIGHT_VOLUME: 1442a9ba6151SMark Brown case WM8996_DSP2_TX_FILTERS: 1443a9ba6151SMark Brown case WM8996_DSP2_RX_FILTERS_1: 1444a9ba6151SMark Brown case WM8996_DSP2_RX_FILTERS_2: 1445a9ba6151SMark Brown case WM8996_DSP2_DRC_1: 1446a9ba6151SMark Brown case WM8996_DSP2_DRC_2: 1447a9ba6151SMark Brown case WM8996_DSP2_DRC_3: 1448a9ba6151SMark Brown case WM8996_DSP2_DRC_4: 1449a9ba6151SMark Brown case WM8996_DSP2_DRC_5: 1450a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_GAINS_1: 1451a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_GAINS_2: 1452a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_1_A: 1453a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_1_B: 1454a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_1_PG: 1455a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_A: 1456a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_B: 1457a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_C: 1458a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_2_PG: 1459a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_A: 1460a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_B: 1461a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_C: 1462a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_3_PG: 1463a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_A: 1464a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_B: 1465a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_C: 1466a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_4_PG: 1467a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_5_A: 1468a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_5_B: 1469a9ba6151SMark Brown case WM8996_DSP2_RX_EQ_BAND_5_PG: 1470a9ba6151SMark Brown case WM8996_DAC1_MIXER_VOLUMES: 1471a9ba6151SMark Brown case WM8996_DAC1_LEFT_MIXER_ROUTING: 1472a9ba6151SMark Brown case WM8996_DAC1_RIGHT_MIXER_ROUTING: 1473a9ba6151SMark Brown case WM8996_DAC2_MIXER_VOLUMES: 1474a9ba6151SMark Brown case WM8996_DAC2_LEFT_MIXER_ROUTING: 1475a9ba6151SMark Brown case WM8996_DAC2_RIGHT_MIXER_ROUTING: 1476a9ba6151SMark Brown case WM8996_DSP1_TX_LEFT_MIXER_ROUTING: 1477a9ba6151SMark Brown case WM8996_DSP1_TX_RIGHT_MIXER_ROUTING: 1478a9ba6151SMark Brown case WM8996_DSP2_TX_LEFT_MIXER_ROUTING: 1479a9ba6151SMark Brown case WM8996_DSP2_TX_RIGHT_MIXER_ROUTING: 1480a9ba6151SMark Brown case WM8996_DSP_TX_MIXER_SELECT: 1481a9ba6151SMark Brown case WM8996_DAC_SOFTMUTE: 1482a9ba6151SMark Brown case WM8996_OVERSAMPLING: 1483a9ba6151SMark Brown case WM8996_SIDETONE: 1484a9ba6151SMark Brown case WM8996_GPIO_1: 1485a9ba6151SMark Brown case WM8996_GPIO_2: 1486a9ba6151SMark Brown case WM8996_GPIO_3: 1487a9ba6151SMark Brown case WM8996_GPIO_4: 1488a9ba6151SMark Brown case WM8996_GPIO_5: 1489a9ba6151SMark Brown case WM8996_PULL_CONTROL_1: 1490a9ba6151SMark Brown case WM8996_PULL_CONTROL_2: 1491a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_1: 1492a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_2: 1493a9ba6151SMark Brown case WM8996_INTERRUPT_RAW_STATUS_2: 1494a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_1_MASK: 1495a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_2_MASK: 1496a9ba6151SMark Brown case WM8996_INTERRUPT_CONTROL: 1497a9ba6151SMark Brown case WM8996_LEFT_PDM_SPEAKER: 1498a9ba6151SMark Brown case WM8996_RIGHT_PDM_SPEAKER: 1499a9ba6151SMark Brown case WM8996_PDM_SPEAKER_MUTE_SEQUENCE: 1500a9ba6151SMark Brown case WM8996_PDM_SPEAKER_VOLUME: 1501a9ba6151SMark Brown return 1; 1502a9ba6151SMark Brown default: 1503a9ba6151SMark Brown return 0; 1504a9ba6151SMark Brown } 1505a9ba6151SMark Brown } 1506a9ba6151SMark Brown 150779172746SMark Brown static bool wm8996_volatile_register(struct device *dev, unsigned int reg) 1508a9ba6151SMark Brown { 1509a9ba6151SMark Brown switch (reg) { 1510a9ba6151SMark Brown case WM8996_SOFTWARE_RESET: 1511a9ba6151SMark Brown case WM8996_CHIP_REVISION: 1512a9ba6151SMark Brown case WM8996_LDO_1: 1513a9ba6151SMark Brown case WM8996_LDO_2: 1514a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_1: 1515a9ba6151SMark Brown case WM8996_INTERRUPT_STATUS_2: 1516a9ba6151SMark Brown case WM8996_INTERRUPT_RAW_STATUS_2: 1517a9ba6151SMark Brown case WM8996_DC_SERVO_READBACK_0: 1518a9ba6151SMark Brown case WM8996_DC_SERVO_2: 1519a9ba6151SMark Brown case WM8996_DC_SERVO_6: 1520a9ba6151SMark Brown case WM8996_DC_SERVO_7: 1521a9ba6151SMark Brown case WM8996_FLL_CONTROL_6: 1522a9ba6151SMark Brown case WM8996_MIC_DETECT_3: 1523a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_1: 1524a9ba6151SMark Brown case WM8996_HEADPHONE_DETECT_2: 1525a9ba6151SMark Brown return 1; 1526a9ba6151SMark Brown default: 1527a9ba6151SMark Brown return 0; 1528a9ba6151SMark Brown } 1529a9ba6151SMark Brown } 1530a9ba6151SMark Brown 1531a9ba6151SMark Brown static const int bclk_divs[] = { 1532a9ba6151SMark Brown 1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96 1533a9ba6151SMark Brown }; 1534a9ba6151SMark Brown 1535a9ba6151SMark Brown static void wm8996_update_bclk(struct snd_soc_codec *codec) 1536a9ba6151SMark Brown { 1537a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 1538a9ba6151SMark Brown int aif, best, cur_val, bclk_rate, bclk_reg, i; 1539a9ba6151SMark Brown 1540a9ba6151SMark Brown /* Don't bother if we're in a low frequency idle mode that 1541a9ba6151SMark Brown * can't support audio. 1542a9ba6151SMark Brown */ 1543a9ba6151SMark Brown if (wm8996->sysclk < 64000) 1544a9ba6151SMark Brown return; 1545a9ba6151SMark Brown 1546a9ba6151SMark Brown for (aif = 0; aif < WM8996_AIFS; aif++) { 1547a9ba6151SMark Brown switch (aif) { 1548a9ba6151SMark Brown case 0: 1549a9ba6151SMark Brown bclk_reg = WM8996_AIF1_BCLK; 1550a9ba6151SMark Brown break; 1551a9ba6151SMark Brown case 1: 1552a9ba6151SMark Brown bclk_reg = WM8996_AIF2_BCLK; 1553a9ba6151SMark Brown break; 1554a9ba6151SMark Brown } 1555a9ba6151SMark Brown 1556a9ba6151SMark Brown bclk_rate = wm8996->bclk_rate[aif]; 1557a9ba6151SMark Brown 1558a9ba6151SMark Brown /* Pick a divisor for BCLK as close as we can get to ideal */ 1559a9ba6151SMark Brown best = 0; 1560a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 1561a9ba6151SMark Brown cur_val = (wm8996->sysclk / bclk_divs[i]) - bclk_rate; 1562a9ba6151SMark Brown if (cur_val < 0) /* BCLK table is sorted */ 1563a9ba6151SMark Brown break; 1564a9ba6151SMark Brown best = i; 1565a9ba6151SMark Brown } 1566a9ba6151SMark Brown bclk_rate = wm8996->sysclk / bclk_divs[best]; 1567a9ba6151SMark Brown dev_dbg(codec->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n", 1568a9ba6151SMark Brown bclk_divs[best], bclk_rate); 1569a9ba6151SMark Brown 1570a9ba6151SMark Brown snd_soc_update_bits(codec, bclk_reg, 1571a9ba6151SMark Brown WM8996_AIF1_BCLK_DIV_MASK, best); 1572a9ba6151SMark Brown } 1573a9ba6151SMark Brown } 1574a9ba6151SMark Brown 1575a9ba6151SMark Brown static int wm8996_set_bias_level(struct snd_soc_codec *codec, 1576a9ba6151SMark Brown enum snd_soc_bias_level level) 1577a9ba6151SMark Brown { 1578a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 1579a9ba6151SMark Brown int ret; 1580a9ba6151SMark Brown 1581a9ba6151SMark Brown switch (level) { 1582a9ba6151SMark Brown case SND_SOC_BIAS_ON: 1583501bf035SMark Brown break; 1584a9ba6151SMark Brown case SND_SOC_BIAS_PREPARE: 1585501bf035SMark Brown /* Put the MICBIASes into regulating mode */ 1586501bf035SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_1, 1587501bf035SMark Brown WM8996_MICB1_MODE, 0); 1588501bf035SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_2, 1589501bf035SMark Brown WM8996_MICB2_MODE, 0); 1590a9ba6151SMark Brown break; 1591a9ba6151SMark Brown 1592a9ba6151SMark Brown case SND_SOC_BIAS_STANDBY: 1593a9ba6151SMark Brown if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1594a9ba6151SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), 1595a9ba6151SMark Brown wm8996->supplies); 1596a9ba6151SMark Brown if (ret != 0) { 1597a9ba6151SMark Brown dev_err(codec->dev, 1598a9ba6151SMark Brown "Failed to enable supplies: %d\n", 1599a9ba6151SMark Brown ret); 1600a9ba6151SMark Brown return ret; 1601a9ba6151SMark Brown } 1602a9ba6151SMark Brown 1603a9ba6151SMark Brown if (wm8996->pdata.ldo_ena >= 0) { 1604a9ba6151SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1605a9ba6151SMark Brown 1); 1606a9ba6151SMark Brown msleep(5); 1607a9ba6151SMark Brown } 1608a9ba6151SMark Brown 1609b7c1b730SLars-Peter Clausen regcache_cache_only(wm8996->regmap, false); 1610b7c1b730SLars-Peter Clausen regcache_sync(wm8996->regmap); 1611a9ba6151SMark Brown } 1612501bf035SMark Brown 1613501bf035SMark Brown /* Bypass the MICBIASes for lowest power */ 1614501bf035SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_1, 1615501bf035SMark Brown WM8996_MICB1_MODE, WM8996_MICB1_MODE); 1616501bf035SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_2, 1617501bf035SMark Brown WM8996_MICB2_MODE, WM8996_MICB2_MODE); 1618a9ba6151SMark Brown break; 1619a9ba6151SMark Brown 1620a9ba6151SMark Brown case SND_SOC_BIAS_OFF: 1621b7c1b730SLars-Peter Clausen regcache_cache_only(wm8996->regmap, true); 1622d4b3d0fbSMark Brown if (wm8996->pdata.ldo_ena >= 0) { 1623a9ba6151SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 1624b7c1b730SLars-Peter Clausen regcache_cache_only(wm8996->regmap, true); 1625d4b3d0fbSMark Brown } 1626a9ba6151SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), 1627a9ba6151SMark Brown wm8996->supplies); 1628a9ba6151SMark Brown break; 1629a9ba6151SMark Brown } 1630a9ba6151SMark Brown 1631a9ba6151SMark Brown codec->dapm.bias_level = level; 1632a9ba6151SMark Brown 1633a9ba6151SMark Brown return 0; 1634a9ba6151SMark Brown } 1635a9ba6151SMark Brown 1636a9ba6151SMark Brown static int wm8996_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 1637a9ba6151SMark Brown { 1638a9ba6151SMark Brown struct snd_soc_codec *codec = dai->codec; 1639a9ba6151SMark Brown int aifctrl = 0; 1640a9ba6151SMark Brown int bclk = 0; 1641a9ba6151SMark Brown int lrclk_tx = 0; 1642a9ba6151SMark Brown int lrclk_rx = 0; 1643a9ba6151SMark Brown int aifctrl_reg, bclk_reg, lrclk_tx_reg, lrclk_rx_reg; 1644a9ba6151SMark Brown 1645a9ba6151SMark Brown switch (dai->id) { 1646a9ba6151SMark Brown case 0: 1647a9ba6151SMark Brown aifctrl_reg = WM8996_AIF1_CONTROL; 1648a9ba6151SMark Brown bclk_reg = WM8996_AIF1_BCLK; 1649a9ba6151SMark Brown lrclk_tx_reg = WM8996_AIF1_TX_LRCLK_2; 1650a9ba6151SMark Brown lrclk_rx_reg = WM8996_AIF1_RX_LRCLK_2; 1651a9ba6151SMark Brown break; 1652a9ba6151SMark Brown case 1: 1653a9ba6151SMark Brown aifctrl_reg = WM8996_AIF2_CONTROL; 1654a9ba6151SMark Brown bclk_reg = WM8996_AIF2_BCLK; 1655a9ba6151SMark Brown lrclk_tx_reg = WM8996_AIF2_TX_LRCLK_2; 1656a9ba6151SMark Brown lrclk_rx_reg = WM8996_AIF2_RX_LRCLK_2; 1657a9ba6151SMark Brown break; 1658a9ba6151SMark Brown default: 1659d8e9a544STakashi Iwai WARN(1, "Invalid dai id %d\n", dai->id); 1660a9ba6151SMark Brown return -EINVAL; 1661a9ba6151SMark Brown } 1662a9ba6151SMark Brown 1663a9ba6151SMark Brown switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 1664a9ba6151SMark Brown case SND_SOC_DAIFMT_NB_NF: 1665a9ba6151SMark Brown break; 1666a9ba6151SMark Brown case SND_SOC_DAIFMT_IB_NF: 1667a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_INV; 1668a9ba6151SMark Brown break; 1669a9ba6151SMark Brown case SND_SOC_DAIFMT_NB_IF: 1670a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_INV; 1671a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_INV; 1672a9ba6151SMark Brown break; 1673a9ba6151SMark Brown case SND_SOC_DAIFMT_IB_IF: 1674a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_INV; 1675a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_INV; 1676a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_INV; 1677a9ba6151SMark Brown break; 1678a9ba6151SMark Brown } 1679a9ba6151SMark Brown 1680a9ba6151SMark Brown switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 1681a9ba6151SMark Brown case SND_SOC_DAIFMT_CBS_CFS: 1682a9ba6151SMark Brown break; 1683a9ba6151SMark Brown case SND_SOC_DAIFMT_CBS_CFM: 1684a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR; 1685a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR; 1686a9ba6151SMark Brown break; 1687a9ba6151SMark Brown case SND_SOC_DAIFMT_CBM_CFS: 1688a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_MSTR; 1689a9ba6151SMark Brown break; 1690a9ba6151SMark Brown case SND_SOC_DAIFMT_CBM_CFM: 1691a9ba6151SMark Brown bclk |= WM8996_AIF1_BCLK_MSTR; 1692a9ba6151SMark Brown lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR; 1693a9ba6151SMark Brown lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR; 1694a9ba6151SMark Brown break; 1695a9ba6151SMark Brown default: 1696a9ba6151SMark Brown return -EINVAL; 1697a9ba6151SMark Brown } 1698a9ba6151SMark Brown 1699a9ba6151SMark Brown switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1700a9ba6151SMark Brown case SND_SOC_DAIFMT_DSP_A: 1701a9ba6151SMark Brown break; 1702a9ba6151SMark Brown case SND_SOC_DAIFMT_DSP_B: 1703a9ba6151SMark Brown aifctrl |= 1; 1704a9ba6151SMark Brown break; 1705a9ba6151SMark Brown case SND_SOC_DAIFMT_I2S: 1706a9ba6151SMark Brown aifctrl |= 2; 1707a9ba6151SMark Brown break; 1708a9ba6151SMark Brown case SND_SOC_DAIFMT_LEFT_J: 1709a9ba6151SMark Brown aifctrl |= 3; 1710a9ba6151SMark Brown break; 1711a9ba6151SMark Brown default: 1712a9ba6151SMark Brown return -EINVAL; 1713a9ba6151SMark Brown } 1714a9ba6151SMark Brown 1715a9ba6151SMark Brown snd_soc_update_bits(codec, aifctrl_reg, WM8996_AIF1_FMT_MASK, aifctrl); 1716a9ba6151SMark Brown snd_soc_update_bits(codec, bclk_reg, 1717a9ba6151SMark Brown WM8996_AIF1_BCLK_INV | WM8996_AIF1_BCLK_MSTR, 1718a9ba6151SMark Brown bclk); 1719a9ba6151SMark Brown snd_soc_update_bits(codec, lrclk_tx_reg, 1720a9ba6151SMark Brown WM8996_AIF1TX_LRCLK_INV | 1721a9ba6151SMark Brown WM8996_AIF1TX_LRCLK_MSTR, 1722a9ba6151SMark Brown lrclk_tx); 1723a9ba6151SMark Brown snd_soc_update_bits(codec, lrclk_rx_reg, 1724a9ba6151SMark Brown WM8996_AIF1RX_LRCLK_INV | 1725a9ba6151SMark Brown WM8996_AIF1RX_LRCLK_MSTR, 1726a9ba6151SMark Brown lrclk_rx); 1727a9ba6151SMark Brown 1728a9ba6151SMark Brown return 0; 1729a9ba6151SMark Brown } 1730a9ba6151SMark Brown 1731a9ba6151SMark Brown static const int dsp_divs[] = { 1732a9ba6151SMark Brown 48000, 32000, 16000, 8000 1733a9ba6151SMark Brown }; 1734a9ba6151SMark Brown 1735a9ba6151SMark Brown static int wm8996_hw_params(struct snd_pcm_substream *substream, 1736a9ba6151SMark Brown struct snd_pcm_hw_params *params, 1737a9ba6151SMark Brown struct snd_soc_dai *dai) 1738a9ba6151SMark Brown { 1739a9ba6151SMark Brown struct snd_soc_codec *codec = dai->codec; 1740a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 17414eb98f45SMark Brown int bits, i, bclk_rate, best; 1742a9ba6151SMark Brown int aifdata = 0; 1743a9ba6151SMark Brown int lrclk = 0; 1744a9ba6151SMark Brown int dsp = 0; 1745a9ba6151SMark Brown int aifdata_reg, lrclk_reg, dsp_shift; 1746a9ba6151SMark Brown 1747a9ba6151SMark Brown switch (dai->id) { 1748a9ba6151SMark Brown case 0: 1749a9ba6151SMark Brown if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || 1750a9ba6151SMark Brown (snd_soc_read(codec, WM8996_GPIO_1)) & WM8996_GP1_FN_MASK) { 1751a9ba6151SMark Brown aifdata_reg = WM8996_AIF1RX_DATA_CONFIGURATION; 1752a9ba6151SMark Brown lrclk_reg = WM8996_AIF1_RX_LRCLK_1; 1753a9ba6151SMark Brown } else { 1754a9ba6151SMark Brown aifdata_reg = WM8996_AIF1TX_DATA_CONFIGURATION_1; 1755a9ba6151SMark Brown lrclk_reg = WM8996_AIF1_TX_LRCLK_1; 1756a9ba6151SMark Brown } 1757a9ba6151SMark Brown dsp_shift = 0; 1758a9ba6151SMark Brown break; 1759a9ba6151SMark Brown case 1: 1760a9ba6151SMark Brown if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK || 1761a9ba6151SMark Brown (snd_soc_read(codec, WM8996_GPIO_2)) & WM8996_GP2_FN_MASK) { 1762a9ba6151SMark Brown aifdata_reg = WM8996_AIF2RX_DATA_CONFIGURATION; 1763a9ba6151SMark Brown lrclk_reg = WM8996_AIF2_RX_LRCLK_1; 1764a9ba6151SMark Brown } else { 1765a9ba6151SMark Brown aifdata_reg = WM8996_AIF2TX_DATA_CONFIGURATION_1; 1766a9ba6151SMark Brown lrclk_reg = WM8996_AIF2_TX_LRCLK_1; 1767a9ba6151SMark Brown } 1768a9ba6151SMark Brown dsp_shift = WM8996_DSP2_DIV_SHIFT; 1769a9ba6151SMark Brown break; 1770a9ba6151SMark Brown default: 1771d8e9a544STakashi Iwai WARN(1, "Invalid dai id %d\n", dai->id); 1772a9ba6151SMark Brown return -EINVAL; 1773a9ba6151SMark Brown } 1774a9ba6151SMark Brown 1775a9ba6151SMark Brown bclk_rate = snd_soc_params_to_bclk(params); 1776a9ba6151SMark Brown if (bclk_rate < 0) { 1777a9ba6151SMark Brown dev_err(codec->dev, "Unsupported BCLK rate: %d\n", bclk_rate); 1778a9ba6151SMark Brown return bclk_rate; 1779a9ba6151SMark Brown } 1780a9ba6151SMark Brown 1781a9ba6151SMark Brown wm8996->bclk_rate[dai->id] = bclk_rate; 1782a9ba6151SMark Brown wm8996->rx_rate[dai->id] = params_rate(params); 1783a9ba6151SMark Brown 1784a9ba6151SMark Brown /* Needs looking at for TDM */ 1785a9ba6151SMark Brown bits = snd_pcm_format_width(params_format(params)); 1786a9ba6151SMark Brown if (bits < 0) 1787a9ba6151SMark Brown return bits; 1788a9ba6151SMark Brown aifdata |= (bits << WM8996_AIF1TX_WL_SHIFT) | bits; 1789a9ba6151SMark Brown 17904eb98f45SMark Brown best = 0; 1791a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(dsp_divs); i++) { 17924eb98f45SMark Brown if (abs(dsp_divs[i] - params_rate(params)) < 17934eb98f45SMark Brown abs(dsp_divs[best] - params_rate(params))) 17944eb98f45SMark Brown best = i; 1795a9ba6151SMark Brown } 1796a9ba6151SMark Brown dsp |= i << dsp_shift; 1797a9ba6151SMark Brown 1798a9ba6151SMark Brown wm8996_update_bclk(codec); 1799a9ba6151SMark Brown 1800a9ba6151SMark Brown lrclk = bclk_rate / params_rate(params); 1801a9ba6151SMark Brown dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n", 1802a9ba6151SMark Brown lrclk, bclk_rate / lrclk); 1803a9ba6151SMark Brown 1804a9ba6151SMark Brown snd_soc_update_bits(codec, aifdata_reg, 1805a9ba6151SMark Brown WM8996_AIF1TX_WL_MASK | 1806a9ba6151SMark Brown WM8996_AIF1TX_SLOT_LEN_MASK, 1807a9ba6151SMark Brown aifdata); 1808a9ba6151SMark Brown snd_soc_update_bits(codec, lrclk_reg, WM8996_AIF1RX_RATE_MASK, 1809a9ba6151SMark Brown lrclk); 1810a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_2, 18113205e662SAxel Lin WM8996_DSP1_DIV_MASK << dsp_shift, dsp); 1812a9ba6151SMark Brown 1813a9ba6151SMark Brown return 0; 1814a9ba6151SMark Brown } 1815a9ba6151SMark Brown 1816a9ba6151SMark Brown static int wm8996_set_sysclk(struct snd_soc_dai *dai, 1817a9ba6151SMark Brown int clk_id, unsigned int freq, int dir) 1818a9ba6151SMark Brown { 1819a9ba6151SMark Brown struct snd_soc_codec *codec = dai->codec; 1820a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 1821a9ba6151SMark Brown int lfclk = 0; 1822a9ba6151SMark Brown int ratediv = 0; 1823fed22007SMark Brown int sync = WM8996_REG_SYNC; 1824a9ba6151SMark Brown int src; 1825a9ba6151SMark Brown int old; 1826a9ba6151SMark Brown 1827a9ba6151SMark Brown if (freq == wm8996->sysclk && clk_id == wm8996->sysclk_src) 1828a9ba6151SMark Brown return 0; 1829a9ba6151SMark Brown 1830a9ba6151SMark Brown /* Disable SYSCLK while we reconfigure */ 1831a9ba6151SMark Brown old = snd_soc_read(codec, WM8996_AIF_CLOCKING_1) & WM8996_SYSCLK_ENA; 1832a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, 1833a9ba6151SMark Brown WM8996_SYSCLK_ENA, 0); 1834a9ba6151SMark Brown 1835a9ba6151SMark Brown switch (clk_id) { 1836a9ba6151SMark Brown case WM8996_SYSCLK_MCLK1: 1837a9ba6151SMark Brown wm8996->sysclk = freq; 1838a9ba6151SMark Brown src = 0; 1839a9ba6151SMark Brown break; 1840a9ba6151SMark Brown case WM8996_SYSCLK_MCLK2: 1841a9ba6151SMark Brown wm8996->sysclk = freq; 1842a9ba6151SMark Brown src = 1; 1843a9ba6151SMark Brown break; 1844a9ba6151SMark Brown case WM8996_SYSCLK_FLL: 1845a9ba6151SMark Brown wm8996->sysclk = freq; 1846a9ba6151SMark Brown src = 2; 1847a9ba6151SMark Brown break; 1848a9ba6151SMark Brown default: 1849a9ba6151SMark Brown dev_err(codec->dev, "Unsupported clock source %d\n", clk_id); 1850a9ba6151SMark Brown return -EINVAL; 1851a9ba6151SMark Brown } 1852a9ba6151SMark Brown 1853a9ba6151SMark Brown switch (wm8996->sysclk) { 18544eb98f45SMark Brown case 5644800: 1855a9ba6151SMark Brown case 6144000: 1856a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_RATE, 1857a9ba6151SMark Brown WM8996_SYSCLK_RATE, 0); 1858a9ba6151SMark Brown break; 18594eb98f45SMark Brown case 22579200: 1860a9ba6151SMark Brown case 24576000: 1861a9ba6151SMark Brown ratediv = WM8996_SYSCLK_DIV; 186237d5993cSMark Brown wm8996->sysclk /= 2; 18634eb98f45SMark Brown case 11289600: 1864a9ba6151SMark Brown case 12288000: 1865a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_RATE, 1866a9ba6151SMark Brown WM8996_SYSCLK_RATE, WM8996_SYSCLK_RATE); 1867a9ba6151SMark Brown break; 1868a9ba6151SMark Brown case 32000: 1869a9ba6151SMark Brown case 32768: 1870a9ba6151SMark Brown lfclk = WM8996_LFCLK_ENA; 1871fed22007SMark Brown sync = 0; 1872a9ba6151SMark Brown break; 1873a9ba6151SMark Brown default: 1874a9ba6151SMark Brown dev_warn(codec->dev, "Unsupported clock rate %dHz\n", 1875a9ba6151SMark Brown wm8996->sysclk); 1876a9ba6151SMark Brown return -EINVAL; 1877a9ba6151SMark Brown } 1878a9ba6151SMark Brown 1879a9ba6151SMark Brown wm8996_update_bclk(codec); 1880a9ba6151SMark Brown 1881a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, 1882a9ba6151SMark Brown WM8996_SYSCLK_SRC_MASK | WM8996_SYSCLK_DIV_MASK, 1883a9ba6151SMark Brown src << WM8996_SYSCLK_SRC_SHIFT | ratediv); 1884a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_CLOCKING_1, WM8996_LFCLK_ENA, lfclk); 1885fed22007SMark Brown snd_soc_update_bits(codec, WM8996_CONTROL_INTERFACE_1, 1886fed22007SMark Brown WM8996_REG_SYNC, sync); 1887a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_AIF_CLOCKING_1, 1888a9ba6151SMark Brown WM8996_SYSCLK_ENA, old); 1889a9ba6151SMark Brown 1890a9ba6151SMark Brown wm8996->sysclk_src = clk_id; 1891a9ba6151SMark Brown 1892a9ba6151SMark Brown return 0; 1893a9ba6151SMark Brown } 1894a9ba6151SMark Brown 1895a9ba6151SMark Brown struct _fll_div { 1896a9ba6151SMark Brown u16 fll_fratio; 1897a9ba6151SMark Brown u16 fll_outdiv; 1898a9ba6151SMark Brown u16 fll_refclk_div; 1899a9ba6151SMark Brown u16 fll_loop_gain; 1900a9ba6151SMark Brown u16 fll_ref_freq; 1901a9ba6151SMark Brown u16 n; 1902a9ba6151SMark Brown u16 theta; 1903a9ba6151SMark Brown u16 lambda; 1904a9ba6151SMark Brown }; 1905a9ba6151SMark Brown 1906a9ba6151SMark Brown static struct { 1907a9ba6151SMark Brown unsigned int min; 1908a9ba6151SMark Brown unsigned int max; 1909a9ba6151SMark Brown u16 fll_fratio; 1910a9ba6151SMark Brown int ratio; 1911a9ba6151SMark Brown } fll_fratios[] = { 1912a9ba6151SMark Brown { 0, 64000, 4, 16 }, 1913a9ba6151SMark Brown { 64000, 128000, 3, 8 }, 1914a9ba6151SMark Brown { 128000, 256000, 2, 4 }, 1915a9ba6151SMark Brown { 256000, 1000000, 1, 2 }, 1916a9ba6151SMark Brown { 1000000, 13500000, 0, 1 }, 1917a9ba6151SMark Brown }; 1918a9ba6151SMark Brown 1919a9ba6151SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref, 1920a9ba6151SMark Brown unsigned int Fout) 1921a9ba6151SMark Brown { 1922a9ba6151SMark Brown unsigned int target; 1923a9ba6151SMark Brown unsigned int div; 1924a9ba6151SMark Brown unsigned int fratio, gcd_fll; 1925a9ba6151SMark Brown int i; 1926a9ba6151SMark Brown 1927a9ba6151SMark Brown /* Fref must be <=13.5MHz */ 1928a9ba6151SMark Brown div = 1; 1929a9ba6151SMark Brown fll_div->fll_refclk_div = 0; 1930a9ba6151SMark Brown while ((Fref / div) > 13500000) { 1931a9ba6151SMark Brown div *= 2; 1932a9ba6151SMark Brown fll_div->fll_refclk_div++; 1933a9ba6151SMark Brown 1934a9ba6151SMark Brown if (div > 8) { 1935a9ba6151SMark Brown pr_err("Can't scale %dMHz input down to <=13.5MHz\n", 1936a9ba6151SMark Brown Fref); 1937a9ba6151SMark Brown return -EINVAL; 1938a9ba6151SMark Brown } 1939a9ba6151SMark Brown } 1940a9ba6151SMark Brown 1941a9ba6151SMark Brown pr_debug("FLL Fref=%u Fout=%u\n", Fref, Fout); 1942a9ba6151SMark Brown 1943a9ba6151SMark Brown /* Apply the division for our remaining calculations */ 1944a9ba6151SMark Brown Fref /= div; 1945a9ba6151SMark Brown 1946a9ba6151SMark Brown if (Fref >= 3000000) 1947a9ba6151SMark Brown fll_div->fll_loop_gain = 5; 1948a9ba6151SMark Brown else 1949a9ba6151SMark Brown fll_div->fll_loop_gain = 0; 1950a9ba6151SMark Brown 1951a9ba6151SMark Brown if (Fref >= 48000) 1952a9ba6151SMark Brown fll_div->fll_ref_freq = 0; 1953a9ba6151SMark Brown else 1954a9ba6151SMark Brown fll_div->fll_ref_freq = 1; 1955a9ba6151SMark Brown 1956a9ba6151SMark Brown /* Fvco should be 90-100MHz; don't check the upper bound */ 1957a9ba6151SMark Brown div = 2; 1958a9ba6151SMark Brown while (Fout * div < 90000000) { 1959a9ba6151SMark Brown div++; 1960a9ba6151SMark Brown if (div > 64) { 1961a9ba6151SMark Brown pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n", 1962a9ba6151SMark Brown Fout); 1963a9ba6151SMark Brown return -EINVAL; 1964a9ba6151SMark Brown } 1965a9ba6151SMark Brown } 1966a9ba6151SMark Brown target = Fout * div; 1967a9ba6151SMark Brown fll_div->fll_outdiv = div - 1; 1968a9ba6151SMark Brown 1969a9ba6151SMark Brown pr_debug("FLL Fvco=%dHz\n", target); 1970a9ba6151SMark Brown 1971a9ba6151SMark Brown /* Find an appropraite FLL_FRATIO and factor it out of the target */ 1972a9ba6151SMark Brown for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) { 1973a9ba6151SMark Brown if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) { 1974a9ba6151SMark Brown fll_div->fll_fratio = fll_fratios[i].fll_fratio; 1975a9ba6151SMark Brown fratio = fll_fratios[i].ratio; 1976a9ba6151SMark Brown break; 1977a9ba6151SMark Brown } 1978a9ba6151SMark Brown } 1979a9ba6151SMark Brown if (i == ARRAY_SIZE(fll_fratios)) { 1980a9ba6151SMark Brown pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref); 1981a9ba6151SMark Brown return -EINVAL; 1982a9ba6151SMark Brown } 1983a9ba6151SMark Brown 1984a9ba6151SMark Brown fll_div->n = target / (fratio * Fref); 1985a9ba6151SMark Brown 1986a9ba6151SMark Brown if (target % Fref == 0) { 1987a9ba6151SMark Brown fll_div->theta = 0; 1988a9ba6151SMark Brown fll_div->lambda = 0; 1989a9ba6151SMark Brown } else { 1990a9ba6151SMark Brown gcd_fll = gcd(target, fratio * Fref); 1991a9ba6151SMark Brown 1992a9ba6151SMark Brown fll_div->theta = (target - (fll_div->n * fratio * Fref)) 1993a9ba6151SMark Brown / gcd_fll; 1994a9ba6151SMark Brown fll_div->lambda = (fratio * Fref) / gcd_fll; 1995a9ba6151SMark Brown } 1996a9ba6151SMark Brown 1997a9ba6151SMark Brown pr_debug("FLL N=%x THETA=%x LAMBDA=%x\n", 1998a9ba6151SMark Brown fll_div->n, fll_div->theta, fll_div->lambda); 1999a9ba6151SMark Brown pr_debug("FLL_FRATIO=%x FLL_OUTDIV=%x FLL_REFCLK_DIV=%x\n", 2000a9ba6151SMark Brown fll_div->fll_fratio, fll_div->fll_outdiv, 2001a9ba6151SMark Brown fll_div->fll_refclk_div); 2002a9ba6151SMark Brown 2003a9ba6151SMark Brown return 0; 2004a9ba6151SMark Brown } 2005a9ba6151SMark Brown 2006a9ba6151SMark Brown static int wm8996_set_fll(struct snd_soc_codec *codec, int fll_id, int source, 2007a9ba6151SMark Brown unsigned int Fref, unsigned int Fout) 2008a9ba6151SMark Brown { 2009a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2010a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 2011a9ba6151SMark Brown struct _fll_div fll_div; 201262c76fe2SNicholas Mc Guire unsigned long timeout, time_left; 201327b6d92aSMark Brown int ret, reg, retry; 2014a9ba6151SMark Brown 2015a9ba6151SMark Brown /* Any change? */ 2016a9ba6151SMark Brown if (source == wm8996->fll_src && Fref == wm8996->fll_fref && 2017a9ba6151SMark Brown Fout == wm8996->fll_fout) 2018a9ba6151SMark Brown return 0; 2019a9ba6151SMark Brown 2020a9ba6151SMark Brown if (Fout == 0) { 2021a9ba6151SMark Brown dev_dbg(codec->dev, "FLL disabled\n"); 2022a9ba6151SMark Brown 2023a9ba6151SMark Brown wm8996->fll_fref = 0; 2024a9ba6151SMark Brown wm8996->fll_fout = 0; 2025a9ba6151SMark Brown 2026a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1, 2027a9ba6151SMark Brown WM8996_FLL_ENA, 0); 2028a9ba6151SMark Brown 2029ded71dcbSMark Brown wm8996_bg_disable(codec); 2030ded71dcbSMark Brown 2031a9ba6151SMark Brown return 0; 2032a9ba6151SMark Brown } 2033a9ba6151SMark Brown 2034a9ba6151SMark Brown ret = fll_factors(&fll_div, Fref, Fout); 2035a9ba6151SMark Brown if (ret != 0) 2036a9ba6151SMark Brown return ret; 2037a9ba6151SMark Brown 2038a9ba6151SMark Brown switch (source) { 2039a9ba6151SMark Brown case WM8996_FLL_MCLK1: 2040a9ba6151SMark Brown reg = 0; 2041a9ba6151SMark Brown break; 2042a9ba6151SMark Brown case WM8996_FLL_MCLK2: 2043a9ba6151SMark Brown reg = 1; 2044a9ba6151SMark Brown break; 2045a9ba6151SMark Brown case WM8996_FLL_DACLRCLK1: 2046a9ba6151SMark Brown reg = 2; 2047a9ba6151SMark Brown break; 2048a9ba6151SMark Brown case WM8996_FLL_BCLK1: 2049a9ba6151SMark Brown reg = 3; 2050a9ba6151SMark Brown break; 2051a9ba6151SMark Brown default: 2052a9ba6151SMark Brown dev_err(codec->dev, "Unknown FLL source %d\n", ret); 2053a9ba6151SMark Brown return -EINVAL; 2054a9ba6151SMark Brown } 2055a9ba6151SMark Brown 2056a9ba6151SMark Brown reg |= fll_div.fll_refclk_div << WM8996_FLL_REFCLK_DIV_SHIFT; 2057a9ba6151SMark Brown reg |= fll_div.fll_ref_freq << WM8996_FLL_REF_FREQ_SHIFT; 2058a9ba6151SMark Brown 2059a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_5, 2060a9ba6151SMark Brown WM8996_FLL_REFCLK_DIV_MASK | WM8996_FLL_REF_FREQ | 2061a9ba6151SMark Brown WM8996_FLL_REFCLK_SRC_MASK, reg); 2062a9ba6151SMark Brown 2063a9ba6151SMark Brown reg = 0; 2064a9ba6151SMark Brown if (fll_div.theta || fll_div.lambda) 2065a9ba6151SMark Brown reg |= WM8996_FLL_EFS_ENA | (3 << WM8996_FLL_LFSR_SEL_SHIFT); 2066a9ba6151SMark Brown else 2067a9ba6151SMark Brown reg |= 1 << WM8996_FLL_LFSR_SEL_SHIFT; 2068a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_EFS_2, reg); 2069a9ba6151SMark Brown 2070a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_2, 2071a9ba6151SMark Brown WM8996_FLL_OUTDIV_MASK | 2072a9ba6151SMark Brown WM8996_FLL_FRATIO_MASK, 2073a9ba6151SMark Brown (fll_div.fll_outdiv << WM8996_FLL_OUTDIV_SHIFT) | 2074a9ba6151SMark Brown (fll_div.fll_fratio)); 2075a9ba6151SMark Brown 2076a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_CONTROL_3, fll_div.theta); 2077a9ba6151SMark Brown 2078a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_4, 2079a9ba6151SMark Brown WM8996_FLL_N_MASK | WM8996_FLL_LOOP_GAIN_MASK, 2080a9ba6151SMark Brown (fll_div.n << WM8996_FLL_N_SHIFT) | 2081a9ba6151SMark Brown fll_div.fll_loop_gain); 2082a9ba6151SMark Brown 2083a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_EFS_1, fll_div.lambda); 2084a9ba6151SMark Brown 2085ded71dcbSMark Brown /* Enable the bandgap if it's not already enabled */ 2086ded71dcbSMark Brown ret = snd_soc_read(codec, WM8996_FLL_CONTROL_1); 2087ded71dcbSMark Brown if (!(ret & WM8996_FLL_ENA)) 2088ded71dcbSMark Brown wm8996_bg_enable(codec); 2089ded71dcbSMark Brown 2090a4161945SMark Brown /* Clear any pending completions (eg, from failed startups) */ 2091a4161945SMark Brown try_wait_for_completion(&wm8996->fll_lock); 2092a4161945SMark Brown 2093a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_FLL_CONTROL_1, 2094a9ba6151SMark Brown WM8996_FLL_ENA, WM8996_FLL_ENA); 2095a9ba6151SMark Brown 2096a9ba6151SMark Brown /* The FLL supports live reconfiguration - kick that in case we were 2097a9ba6151SMark Brown * already enabled. 2098a9ba6151SMark Brown */ 2099a9ba6151SMark Brown snd_soc_write(codec, WM8996_FLL_CONTROL_6, WM8996_FLL_SWITCH_CLK); 2100a9ba6151SMark Brown 2101a9ba6151SMark Brown /* Wait for the FLL to lock, using the interrupt if possible */ 2102a9ba6151SMark Brown if (Fref > 1000000) 2103a9ba6151SMark Brown timeout = usecs_to_jiffies(300); 2104a9ba6151SMark Brown else 2105a9ba6151SMark Brown timeout = msecs_to_jiffies(2); 2106a9ba6151SMark Brown 210727b6d92aSMark Brown /* Allow substantially longer if we've actually got the IRQ, poll 210827b6d92aSMark Brown * at a slightly higher rate if we don't. 210927b6d92aSMark Brown */ 2110a9ba6151SMark Brown if (i2c->irq) 211127b6d92aSMark Brown timeout *= 10; 211227b6d92aSMark Brown else 2113159366eaSNicholas Mc Guire /* ensure timeout of atleast 1 jiffies */ 2114159366eaSNicholas Mc Guire timeout = timeout/2 ? : 1; 2115a9ba6151SMark Brown 211627b6d92aSMark Brown for (retry = 0; retry < 10; retry++) { 211762c76fe2SNicholas Mc Guire time_left = wait_for_completion_timeout(&wm8996->fll_lock, 211827b6d92aSMark Brown timeout); 211962c76fe2SNicholas Mc Guire if (time_left != 0) { 212027b6d92aSMark Brown WARN_ON(!i2c->irq); 212162c76fe2SNicholas Mc Guire ret = 1; 212227b6d92aSMark Brown break; 212327b6d92aSMark Brown } 2124a9ba6151SMark Brown 212527b6d92aSMark Brown ret = snd_soc_read(codec, WM8996_INTERRUPT_RAW_STATUS_2); 212627b6d92aSMark Brown if (ret & WM8996_FLL_LOCK_STS) 212727b6d92aSMark Brown break; 212827b6d92aSMark Brown } 212927b6d92aSMark Brown if (retry == 10) { 2130a9ba6151SMark Brown dev_err(codec->dev, "Timed out waiting for FLL\n"); 2131a9ba6151SMark Brown ret = -ETIMEDOUT; 2132a9ba6151SMark Brown } 2133a9ba6151SMark Brown 2134a9ba6151SMark Brown dev_dbg(codec->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout); 2135a9ba6151SMark Brown 2136a9ba6151SMark Brown wm8996->fll_fref = Fref; 2137a9ba6151SMark Brown wm8996->fll_fout = Fout; 2138a9ba6151SMark Brown wm8996->fll_src = source; 2139a9ba6151SMark Brown 2140a9ba6151SMark Brown return ret; 2141a9ba6151SMark Brown } 2142a9ba6151SMark Brown 2143a9ba6151SMark Brown #ifdef CONFIG_GPIOLIB 2144a9ba6151SMark Brown static inline struct wm8996_priv *gpio_to_wm8996(struct gpio_chip *chip) 2145a9ba6151SMark Brown { 2146a9ba6151SMark Brown return container_of(chip, struct wm8996_priv, gpio_chip); 2147a9ba6151SMark Brown } 2148a9ba6151SMark Brown 2149a9ba6151SMark Brown static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value) 2150a9ba6151SMark Brown { 2151a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2152a9ba6151SMark Brown 2153b2d1e233SMark Brown regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2154a9ba6151SMark Brown WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT); 2155a9ba6151SMark Brown } 2156a9ba6151SMark Brown 2157a9ba6151SMark Brown static int wm8996_gpio_direction_out(struct gpio_chip *chip, 2158a9ba6151SMark Brown unsigned offset, int value) 2159a9ba6151SMark Brown { 2160a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2161a9ba6151SMark Brown int val; 2162a9ba6151SMark Brown 2163a9ba6151SMark Brown val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT); 2164a9ba6151SMark Brown 2165b2d1e233SMark Brown return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2166a9ba6151SMark Brown WM8996_GP1_FN_MASK | WM8996_GP1_DIR | 2167a9ba6151SMark Brown WM8996_GP1_LVL, val); 2168a9ba6151SMark Brown } 2169a9ba6151SMark Brown 2170a9ba6151SMark Brown static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset) 2171a9ba6151SMark Brown { 2172a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2173b2d1e233SMark Brown unsigned int reg; 2174a9ba6151SMark Brown int ret; 2175a9ba6151SMark Brown 2176b2d1e233SMark Brown ret = regmap_read(wm8996->regmap, WM8996_GPIO_1 + offset, ®); 2177a9ba6151SMark Brown if (ret < 0) 2178a9ba6151SMark Brown return ret; 2179a9ba6151SMark Brown 2180b2d1e233SMark Brown return (reg & WM8996_GP1_LVL) != 0; 2181a9ba6151SMark Brown } 2182a9ba6151SMark Brown 2183a9ba6151SMark Brown static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset) 2184a9ba6151SMark Brown { 2185a9ba6151SMark Brown struct wm8996_priv *wm8996 = gpio_to_wm8996(chip); 2186a9ba6151SMark Brown 2187b2d1e233SMark Brown return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset, 2188a9ba6151SMark Brown WM8996_GP1_FN_MASK | WM8996_GP1_DIR, 2189a9ba6151SMark Brown (1 << WM8996_GP1_FN_SHIFT) | 2190a9ba6151SMark Brown (1 << WM8996_GP1_DIR_SHIFT)); 2191a9ba6151SMark Brown } 2192a9ba6151SMark Brown 2193a9ba6151SMark Brown static struct gpio_chip wm8996_template_chip = { 2194a9ba6151SMark Brown .label = "wm8996", 2195a9ba6151SMark Brown .owner = THIS_MODULE, 2196a9ba6151SMark Brown .direction_output = wm8996_gpio_direction_out, 2197a9ba6151SMark Brown .set = wm8996_gpio_set, 2198a9ba6151SMark Brown .direction_input = wm8996_gpio_direction_in, 2199a9ba6151SMark Brown .get = wm8996_gpio_get, 2200a9ba6151SMark Brown .can_sleep = 1, 2201a9ba6151SMark Brown }; 2202a9ba6151SMark Brown 2203b2d1e233SMark Brown static void wm8996_init_gpio(struct wm8996_priv *wm8996) 2204a9ba6151SMark Brown { 2205a9ba6151SMark Brown int ret; 2206a9ba6151SMark Brown 2207a9ba6151SMark Brown wm8996->gpio_chip = wm8996_template_chip; 2208a9ba6151SMark Brown wm8996->gpio_chip.ngpio = 5; 2209b2d1e233SMark Brown wm8996->gpio_chip.dev = wm8996->dev; 2210a9ba6151SMark Brown 2211a9ba6151SMark Brown if (wm8996->pdata.gpio_base) 2212a9ba6151SMark Brown wm8996->gpio_chip.base = wm8996->pdata.gpio_base; 2213a9ba6151SMark Brown else 2214a9ba6151SMark Brown wm8996->gpio_chip.base = -1; 2215a9ba6151SMark Brown 2216a9ba6151SMark Brown ret = gpiochip_add(&wm8996->gpio_chip); 2217a9ba6151SMark Brown if (ret != 0) 2218b2d1e233SMark Brown dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret); 2219a9ba6151SMark Brown } 2220a9ba6151SMark Brown 2221b2d1e233SMark Brown static void wm8996_free_gpio(struct wm8996_priv *wm8996) 2222a9ba6151SMark Brown { 222388d5e520Sabdoulaye berthe gpiochip_remove(&wm8996->gpio_chip); 2224a9ba6151SMark Brown } 2225a9ba6151SMark Brown #else 2226b2d1e233SMark Brown static void wm8996_init_gpio(struct wm8996_priv *wm8996) 2227a9ba6151SMark Brown { 2228a9ba6151SMark Brown } 2229a9ba6151SMark Brown 2230b2d1e233SMark Brown static void wm8996_free_gpio(struct wm8996_priv *wm8996) 2231a9ba6151SMark Brown { 2232a9ba6151SMark Brown } 2233a9ba6151SMark Brown #endif 2234a9ba6151SMark Brown 2235a9ba6151SMark Brown /** 2236a9ba6151SMark Brown * wm8996_detect - Enable default WM8996 jack detection 2237a9ba6151SMark Brown * 2238a9ba6151SMark Brown * The WM8996 has advanced accessory detection support for headsets. 2239a9ba6151SMark Brown * This function provides a default implementation which integrates 2240a9ba6151SMark Brown * the majority of this functionality with minimal user configuration. 2241a9ba6151SMark Brown * 2242a9ba6151SMark Brown * This will detect headset, headphone and short circuit button and 2243a9ba6151SMark Brown * will also detect inverted microphone ground connections and update 2244a9ba6151SMark Brown * the polarity of the connections. 2245a9ba6151SMark Brown */ 2246a9ba6151SMark Brown int wm8996_detect(struct snd_soc_codec *codec, struct snd_soc_jack *jack, 2247a9ba6151SMark Brown wm8996_polarity_fn polarity_cb) 2248a9ba6151SMark Brown { 2249a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 225002afc6a2SCharles Keepax struct snd_soc_dapm_context *dapm = &codec->dapm; 2251a9ba6151SMark Brown 2252a9ba6151SMark Brown wm8996->jack = jack; 2253a9ba6151SMark Brown wm8996->detecting = true; 2254a9ba6151SMark Brown wm8996->polarity_cb = polarity_cb; 2255d7b35570SMark Brown wm8996->jack_flips = 0; 2256a9ba6151SMark Brown 2257a9ba6151SMark Brown if (wm8996->polarity_cb) 2258a9ba6151SMark Brown wm8996->polarity_cb(codec, 0); 2259a9ba6151SMark Brown 2260a9ba6151SMark Brown /* Clear discarge to avoid noise during detection */ 2261a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_1, 2262a9ba6151SMark Brown WM8996_MICB1_DISCH, 0); 2263a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MICBIAS_2, 2264a9ba6151SMark Brown WM8996_MICB2_DISCH, 0); 2265a9ba6151SMark Brown 2266a9ba6151SMark Brown /* LDO2 powers the microphones, SYSCLK clocks detection */ 226702afc6a2SCharles Keepax snd_soc_dapm_mutex_lock(dapm); 226802afc6a2SCharles Keepax 226902afc6a2SCharles Keepax snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO2"); 227002afc6a2SCharles Keepax snd_soc_dapm_force_enable_pin_unlocked(dapm, "SYSCLK"); 227102afc6a2SCharles Keepax 227202afc6a2SCharles Keepax snd_soc_dapm_mutex_unlock(dapm); 2273a9ba6151SMark Brown 2274a9ba6151SMark Brown /* We start off just enabling microphone detection - even a 2275a9ba6151SMark Brown * plain headphone will trigger detection. 2276a9ba6151SMark Brown */ 2277a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2278a9ba6151SMark Brown WM8996_MICD_ENA, WM8996_MICD_ENA); 2279a9ba6151SMark Brown 2280a9ba6151SMark Brown /* Slowest detection rate, gives debounce for initial detection */ 2281a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2282a9ba6151SMark Brown WM8996_MICD_RATE_MASK, 2283a9ba6151SMark Brown WM8996_MICD_RATE_MASK); 2284a9ba6151SMark Brown 2285a9ba6151SMark Brown /* Enable interrupts and we're off */ 2286a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_INTERRUPT_STATUS_2_MASK, 22870b684cc1SMark Brown WM8996_IM_MICD_EINT | WM8996_HP_DONE_EINT, 0); 2288a9ba6151SMark Brown 2289a9ba6151SMark Brown return 0; 2290a9ba6151SMark Brown } 2291a9ba6151SMark Brown EXPORT_SYMBOL_GPL(wm8996_detect); 2292a9ba6151SMark Brown 22930b684cc1SMark Brown static void wm8996_hpdet_irq(struct snd_soc_codec *codec) 22940b684cc1SMark Brown { 22950b684cc1SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 22960b684cc1SMark Brown int val, reg, report; 22970b684cc1SMark Brown 22980b684cc1SMark Brown /* Assume headphone in error conditions; we need to report 22990b684cc1SMark Brown * something or we stall our state machine. 23000b684cc1SMark Brown */ 23010b684cc1SMark Brown report = SND_JACK_HEADPHONE; 23020b684cc1SMark Brown 23030b684cc1SMark Brown reg = snd_soc_read(codec, WM8996_HEADPHONE_DETECT_2); 23040b684cc1SMark Brown if (reg < 0) { 23050b684cc1SMark Brown dev_err(codec->dev, "Failed to read HPDET status\n"); 23060b684cc1SMark Brown goto out; 23070b684cc1SMark Brown } 23080b684cc1SMark Brown 23090b684cc1SMark Brown if (!(reg & WM8996_HP_DONE)) { 23100b684cc1SMark Brown dev_err(codec->dev, "Got HPDET IRQ but HPDET is busy\n"); 23110b684cc1SMark Brown goto out; 23120b684cc1SMark Brown } 23130b684cc1SMark Brown 23140b684cc1SMark Brown val = reg & WM8996_HP_LVL_MASK; 23150b684cc1SMark Brown 23160b684cc1SMark Brown dev_dbg(codec->dev, "HPDET measured %d ohms\n", val); 23170b684cc1SMark Brown 23180b684cc1SMark Brown /* If we've got high enough impedence then report as line, 23190b684cc1SMark Brown * otherwise assume headphone. 23200b684cc1SMark Brown */ 23210b684cc1SMark Brown if (val >= 126) 23220b684cc1SMark Brown report = SND_JACK_LINEOUT; 23230b684cc1SMark Brown else 23240b684cc1SMark Brown report = SND_JACK_HEADPHONE; 23250b684cc1SMark Brown 23260b684cc1SMark Brown out: 23270b684cc1SMark Brown if (wm8996->jack_mic) 23280b684cc1SMark Brown report |= SND_JACK_MICROPHONE; 23290b684cc1SMark Brown 23300b684cc1SMark Brown snd_soc_jack_report(wm8996->jack, report, 23310b684cc1SMark Brown SND_JACK_LINEOUT | SND_JACK_HEADSET); 23320b684cc1SMark Brown 23330b684cc1SMark Brown wm8996->detecting = false; 23340b684cc1SMark Brown 23350b684cc1SMark Brown /* If the output isn't running re-clamp it */ 23360b684cc1SMark Brown if (!(snd_soc_read(codec, WM8996_POWER_MANAGEMENT_1) & 23370b684cc1SMark Brown (WM8996_HPOUT1L_ENA | WM8996_HPOUT1R_RMV_SHORT))) 23380b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, 23390b684cc1SMark Brown WM8996_HPOUT1L_RMV_SHORT | 23400b684cc1SMark Brown WM8996_HPOUT1R_RMV_SHORT, 0); 23410b684cc1SMark Brown 23420b684cc1SMark Brown /* Go back to looking at the microphone */ 23430b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_1, 23440b684cc1SMark Brown WM8996_JD_MODE_MASK, 0); 23450b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 23460b684cc1SMark Brown WM8996_MICD_ENA); 23470b684cc1SMark Brown 23480b684cc1SMark Brown snd_soc_dapm_disable_pin(&codec->dapm, "Bandgap"); 23490b684cc1SMark Brown snd_soc_dapm_sync(&codec->dapm); 23500b684cc1SMark Brown } 23510b684cc1SMark Brown 23520b684cc1SMark Brown static void wm8996_hpdet_start(struct snd_soc_codec *codec) 23530b684cc1SMark Brown { 23540b684cc1SMark Brown /* Unclamp the output, we can't measure while we're shorting it */ 23550b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ANALOGUE_HP_1, 23560b684cc1SMark Brown WM8996_HPOUT1L_RMV_SHORT | 23570b684cc1SMark Brown WM8996_HPOUT1R_RMV_SHORT, 23580b684cc1SMark Brown WM8996_HPOUT1L_RMV_SHORT | 23590b684cc1SMark Brown WM8996_HPOUT1R_RMV_SHORT); 23600b684cc1SMark Brown 23610b684cc1SMark Brown /* We need bandgap for HPDET */ 23620b684cc1SMark Brown snd_soc_dapm_force_enable_pin(&codec->dapm, "Bandgap"); 23630b684cc1SMark Brown snd_soc_dapm_sync(&codec->dapm); 23640b684cc1SMark Brown 23650b684cc1SMark Brown /* Go into headphone detect left mode */ 23660b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 0); 23670b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_1, 23680b684cc1SMark Brown WM8996_JD_MODE_MASK, 1); 23690b684cc1SMark Brown 23700b684cc1SMark Brown /* Trigger a measurement */ 23710b684cc1SMark Brown snd_soc_update_bits(codec, WM8996_HEADPHONE_DETECT_1, 23720b684cc1SMark Brown WM8996_HP_POLL, WM8996_HP_POLL); 23730b684cc1SMark Brown } 23740b684cc1SMark Brown 2375d7b35570SMark Brown static void wm8996_report_headphone(struct snd_soc_codec *codec) 2376d7b35570SMark Brown { 2377d7b35570SMark Brown dev_dbg(codec->dev, "Headphone detected\n"); 2378d7b35570SMark Brown wm8996_hpdet_start(codec); 2379d7b35570SMark Brown 2380d7b35570SMark Brown /* Increase the detection rate a bit for responsiveness. */ 2381d7b35570SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 2382d7b35570SMark Brown WM8996_MICD_RATE_MASK | 2383d7b35570SMark Brown WM8996_MICD_BIAS_STARTTIME_MASK, 2384d7b35570SMark Brown 7 << WM8996_MICD_RATE_SHIFT | 2385d7b35570SMark Brown 7 << WM8996_MICD_BIAS_STARTTIME_SHIFT); 2386d7b35570SMark Brown } 2387d7b35570SMark Brown 2388a9ba6151SMark Brown static void wm8996_micd(struct snd_soc_codec *codec) 2389a9ba6151SMark Brown { 2390a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2391a9ba6151SMark Brown int val, reg; 2392a9ba6151SMark Brown 2393a9ba6151SMark Brown val = snd_soc_read(codec, WM8996_MIC_DETECT_3); 2394a9ba6151SMark Brown 2395a9ba6151SMark Brown dev_dbg(codec->dev, "Microphone event: %x\n", val); 2396a9ba6151SMark Brown 2397a9ba6151SMark Brown if (!(val & WM8996_MICD_VALID)) { 2398a9ba6151SMark Brown dev_warn(codec->dev, "Microphone detection state invalid\n"); 2399a9ba6151SMark Brown return; 2400a9ba6151SMark Brown } 2401a9ba6151SMark Brown 2402a9ba6151SMark Brown /* No accessory, reset everything and report removal */ 2403a9ba6151SMark Brown if (!(val & WM8996_MICD_STS)) { 2404a9ba6151SMark Brown dev_dbg(codec->dev, "Jack removal detected\n"); 2405a9ba6151SMark Brown wm8996->jack_mic = false; 2406a9ba6151SMark Brown wm8996->detecting = true; 2407d7b35570SMark Brown wm8996->jack_flips = 0; 2408a9ba6151SMark Brown snd_soc_jack_report(wm8996->jack, 0, 24090b684cc1SMark Brown SND_JACK_LINEOUT | SND_JACK_HEADSET | 24100b684cc1SMark Brown SND_JACK_BTN_0); 24110b684cc1SMark Brown 2412a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 241345ba82d8SMark Brown WM8996_MICD_RATE_MASK | 241445ba82d8SMark Brown WM8996_MICD_BIAS_STARTTIME_MASK, 241545ba82d8SMark Brown WM8996_MICD_RATE_MASK | 241645ba82d8SMark Brown 9 << WM8996_MICD_BIAS_STARTTIME_SHIFT); 2417a9ba6151SMark Brown return; 2418a9ba6151SMark Brown } 2419a9ba6151SMark Brown 24200b684cc1SMark Brown /* If the measurement is very high we've got a microphone, 24210b684cc1SMark Brown * either we just detected one or if we already reported then 24220b684cc1SMark Brown * we've got a button release event. 2423a9ba6151SMark Brown */ 2424a9ba6151SMark Brown if (val & 0x400) { 24250b684cc1SMark Brown if (wm8996->detecting) { 2426a9ba6151SMark Brown dev_dbg(codec->dev, "Microphone detected\n"); 2427a9ba6151SMark Brown wm8996->jack_mic = true; 24280b684cc1SMark Brown wm8996_hpdet_start(codec); 2429a9ba6151SMark Brown 2430a9ba6151SMark Brown /* Increase poll rate to give better responsiveness 2431a9ba6151SMark Brown * for buttons */ 2432a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_MIC_DETECT_1, 243345ba82d8SMark Brown WM8996_MICD_RATE_MASK | 243445ba82d8SMark Brown WM8996_MICD_BIAS_STARTTIME_MASK, 243545ba82d8SMark Brown 5 << WM8996_MICD_RATE_SHIFT | 243645ba82d8SMark Brown 7 << WM8996_MICD_BIAS_STARTTIME_SHIFT); 24370b684cc1SMark Brown } else { 24380b684cc1SMark Brown dev_dbg(codec->dev, "Mic button up\n"); 24390b684cc1SMark Brown snd_soc_jack_report(wm8996->jack, 0, SND_JACK_BTN_0); 24400b684cc1SMark Brown } 24410b684cc1SMark Brown 24420b684cc1SMark Brown return; 2443a9ba6151SMark Brown } 2444a9ba6151SMark Brown 2445a9ba6151SMark Brown /* If we detected a lower impedence during initial startup 2446a9ba6151SMark Brown * then we probably have the wrong polarity, flip it. Don't 2447a9ba6151SMark Brown * do this for the lowest impedences to speed up detection of 2448d7b35570SMark Brown * plain headphones. If both polarities report a low 2449d7b35570SMark Brown * impedence then give up and report headphones. 2450a9ba6151SMark Brown */ 2451a9ba6151SMark Brown if (wm8996->detecting && (val & 0x3f0)) { 2452d7b35570SMark Brown wm8996->jack_flips++; 2453d7b35570SMark Brown 2454d7b35570SMark Brown if (wm8996->jack_flips > 1) { 2455d7b35570SMark Brown wm8996_report_headphone(codec); 2456d7b35570SMark Brown return; 2457d7b35570SMark Brown } 2458d7b35570SMark Brown 2459a9ba6151SMark Brown reg = snd_soc_read(codec, WM8996_ACCESSORY_DETECT_MODE_2); 2460a9ba6151SMark Brown reg ^= WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC | 2461a9ba6151SMark Brown WM8996_MICD_BIAS_SRC; 2462a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_ACCESSORY_DETECT_MODE_2, 2463a9ba6151SMark Brown WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC | 2464a9ba6151SMark Brown WM8996_MICD_BIAS_SRC, reg); 2465a9ba6151SMark Brown 2466a9ba6151SMark Brown if (wm8996->polarity_cb) 2467a9ba6151SMark Brown wm8996->polarity_cb(codec, 2468a9ba6151SMark Brown (reg & WM8996_MICD_SRC) != 0); 2469a9ba6151SMark Brown 2470a9ba6151SMark Brown dev_dbg(codec->dev, "Set microphone polarity to %d\n", 2471a9ba6151SMark Brown (reg & WM8996_MICD_SRC) != 0); 2472a9ba6151SMark Brown 2473a9ba6151SMark Brown return; 2474a9ba6151SMark Brown } 2475a9ba6151SMark Brown 2476a9ba6151SMark Brown /* Don't distinguish between buttons, just report any low 2477a9ba6151SMark Brown * impedence as BTN_0. 2478a9ba6151SMark Brown */ 2479a9ba6151SMark Brown if (val & 0x3fc) { 2480a9ba6151SMark Brown if (wm8996->jack_mic) { 2481a9ba6151SMark Brown dev_dbg(codec->dev, "Mic button detected\n"); 24820b684cc1SMark Brown snd_soc_jack_report(wm8996->jack, SND_JACK_BTN_0, 2483a9ba6151SMark Brown SND_JACK_BTN_0); 24840b684cc1SMark Brown } else if (wm8996->detecting) { 2485d7b35570SMark Brown wm8996_report_headphone(codec); 2486a9ba6151SMark Brown } 2487a9ba6151SMark Brown } 2488a9ba6151SMark Brown } 2489a9ba6151SMark Brown 2490a9ba6151SMark Brown static irqreturn_t wm8996_irq(int irq, void *data) 2491a9ba6151SMark Brown { 2492a9ba6151SMark Brown struct snd_soc_codec *codec = data; 2493a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2494a9ba6151SMark Brown int irq_val; 2495a9ba6151SMark Brown 2496a9ba6151SMark Brown irq_val = snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2); 2497a9ba6151SMark Brown if (irq_val < 0) { 2498a9ba6151SMark Brown dev_err(codec->dev, "Failed to read IRQ status: %d\n", 2499a9ba6151SMark Brown irq_val); 2500a9ba6151SMark Brown return IRQ_NONE; 2501a9ba6151SMark Brown } 2502a9ba6151SMark Brown irq_val &= ~snd_soc_read(codec, WM8996_INTERRUPT_STATUS_2_MASK); 2503a9ba6151SMark Brown 25042fde6e80SMark Brown if (!irq_val) 25052fde6e80SMark Brown return IRQ_NONE; 25062fde6e80SMark Brown 250784497091SMark Brown snd_soc_write(codec, WM8996_INTERRUPT_STATUS_2, irq_val); 250884497091SMark Brown 2509a9ba6151SMark Brown if (irq_val & (WM8996_DCS_DONE_01_EINT | WM8996_DCS_DONE_23_EINT)) { 2510a9ba6151SMark Brown dev_dbg(codec->dev, "DC servo IRQ\n"); 2511a9ba6151SMark Brown complete(&wm8996->dcs_done); 2512a9ba6151SMark Brown } 2513a9ba6151SMark Brown 2514a9ba6151SMark Brown if (irq_val & WM8996_FIFOS_ERR_EINT) 2515a9ba6151SMark Brown dev_err(codec->dev, "Digital core FIFO error\n"); 2516a9ba6151SMark Brown 2517a9ba6151SMark Brown if (irq_val & WM8996_FLL_LOCK_EINT) { 2518a9ba6151SMark Brown dev_dbg(codec->dev, "FLL locked\n"); 2519a9ba6151SMark Brown complete(&wm8996->fll_lock); 2520a9ba6151SMark Brown } 2521a9ba6151SMark Brown 2522a9ba6151SMark Brown if (irq_val & WM8996_MICD_EINT) 2523a9ba6151SMark Brown wm8996_micd(codec); 2524a9ba6151SMark Brown 25250b684cc1SMark Brown if (irq_val & WM8996_HP_DONE_EINT) 25260b684cc1SMark Brown wm8996_hpdet_irq(codec); 25270b684cc1SMark Brown 2528a9ba6151SMark Brown return IRQ_HANDLED; 2529a9ba6151SMark Brown } 2530a9ba6151SMark Brown 2531a9ba6151SMark Brown static irqreturn_t wm8996_edge_irq(int irq, void *data) 2532a9ba6151SMark Brown { 2533a9ba6151SMark Brown irqreturn_t ret = IRQ_NONE; 2534a9ba6151SMark Brown irqreturn_t val; 2535a9ba6151SMark Brown 2536a9ba6151SMark Brown do { 2537a9ba6151SMark Brown val = wm8996_irq(irq, data); 2538a9ba6151SMark Brown if (val != IRQ_NONE) 2539a9ba6151SMark Brown ret = val; 2540a9ba6151SMark Brown } while (val != IRQ_NONE); 2541a9ba6151SMark Brown 2542a9ba6151SMark Brown return ret; 2543a9ba6151SMark Brown } 2544a9ba6151SMark Brown 2545a9ba6151SMark Brown static void wm8996_retune_mobile_pdata(struct snd_soc_codec *codec) 2546a9ba6151SMark Brown { 2547a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2548a9ba6151SMark Brown struct wm8996_pdata *pdata = &wm8996->pdata; 2549a9ba6151SMark Brown 2550a9ba6151SMark Brown struct snd_kcontrol_new controls[] = { 2551a9ba6151SMark Brown SOC_ENUM_EXT("DSP1 EQ Mode", 2552a9ba6151SMark Brown wm8996->retune_mobile_enum, 2553a9ba6151SMark Brown wm8996_get_retune_mobile_enum, 2554a9ba6151SMark Brown wm8996_put_retune_mobile_enum), 2555a9ba6151SMark Brown SOC_ENUM_EXT("DSP2 EQ Mode", 2556a9ba6151SMark Brown wm8996->retune_mobile_enum, 2557a9ba6151SMark Brown wm8996_get_retune_mobile_enum, 2558a9ba6151SMark Brown wm8996_put_retune_mobile_enum), 2559a9ba6151SMark Brown }; 2560a9ba6151SMark Brown int ret, i, j; 2561a9ba6151SMark Brown const char **t; 2562a9ba6151SMark Brown 2563a9ba6151SMark Brown /* We need an array of texts for the enum API but the number 2564a9ba6151SMark Brown * of texts is likely to be less than the number of 2565a9ba6151SMark Brown * configurations due to the sample rate dependency of the 2566a9ba6151SMark Brown * configurations. */ 2567a9ba6151SMark Brown wm8996->num_retune_mobile_texts = 0; 2568a9ba6151SMark Brown wm8996->retune_mobile_texts = NULL; 2569a9ba6151SMark Brown for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) { 2570a9ba6151SMark Brown for (j = 0; j < wm8996->num_retune_mobile_texts; j++) { 2571a9ba6151SMark Brown if (strcmp(pdata->retune_mobile_cfgs[i].name, 2572a9ba6151SMark Brown wm8996->retune_mobile_texts[j]) == 0) 2573a9ba6151SMark Brown break; 2574a9ba6151SMark Brown } 2575a9ba6151SMark Brown 2576a9ba6151SMark Brown if (j != wm8996->num_retune_mobile_texts) 2577a9ba6151SMark Brown continue; 2578a9ba6151SMark Brown 2579a9ba6151SMark Brown /* Expand the array... */ 2580a9ba6151SMark Brown t = krealloc(wm8996->retune_mobile_texts, 2581a9ba6151SMark Brown sizeof(char *) * 2582a9ba6151SMark Brown (wm8996->num_retune_mobile_texts + 1), 2583a9ba6151SMark Brown GFP_KERNEL); 2584a9ba6151SMark Brown if (t == NULL) 2585a9ba6151SMark Brown continue; 2586a9ba6151SMark Brown 2587a9ba6151SMark Brown /* ...store the new entry... */ 2588a9ba6151SMark Brown t[wm8996->num_retune_mobile_texts] = 2589a9ba6151SMark Brown pdata->retune_mobile_cfgs[i].name; 2590a9ba6151SMark Brown 2591a9ba6151SMark Brown /* ...and remember the new version. */ 2592a9ba6151SMark Brown wm8996->num_retune_mobile_texts++; 2593a9ba6151SMark Brown wm8996->retune_mobile_texts = t; 2594a9ba6151SMark Brown } 2595a9ba6151SMark Brown 2596a9ba6151SMark Brown dev_dbg(codec->dev, "Allocated %d unique ReTune Mobile names\n", 2597a9ba6151SMark Brown wm8996->num_retune_mobile_texts); 2598a9ba6151SMark Brown 25999a8d38dbSTakashi Iwai wm8996->retune_mobile_enum.items = wm8996->num_retune_mobile_texts; 2600a9ba6151SMark Brown wm8996->retune_mobile_enum.texts = wm8996->retune_mobile_texts; 2601a9ba6151SMark Brown 2602022658beSLiam Girdwood ret = snd_soc_add_codec_controls(codec, controls, ARRAY_SIZE(controls)); 2603a9ba6151SMark Brown if (ret != 0) 2604a9ba6151SMark Brown dev_err(codec->dev, 2605a9ba6151SMark Brown "Failed to add ReTune Mobile controls: %d\n", ret); 2606a9ba6151SMark Brown } 2607a9ba6151SMark Brown 260879172746SMark Brown static const struct regmap_config wm8996_regmap = { 260979172746SMark Brown .reg_bits = 16, 261079172746SMark Brown .val_bits = 16, 261179172746SMark Brown 261279172746SMark Brown .max_register = WM8996_MAX_REGISTER, 261379172746SMark Brown .reg_defaults = wm8996_reg, 261479172746SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8996_reg), 261579172746SMark Brown .volatile_reg = wm8996_volatile_register, 261679172746SMark Brown .readable_reg = wm8996_readable_register, 261779172746SMark Brown .cache_type = REGCACHE_RBTREE, 261879172746SMark Brown }; 261979172746SMark Brown 2620a9ba6151SMark Brown static int wm8996_probe(struct snd_soc_codec *codec) 2621a9ba6151SMark Brown { 2622a9ba6151SMark Brown int ret; 2623a9ba6151SMark Brown struct wm8996_priv *wm8996 = snd_soc_codec_get_drvdata(codec); 2624a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 2625ec8ffe18SMark Brown int irq_flags; 2626a9ba6151SMark Brown 2627a9ba6151SMark Brown wm8996->codec = codec; 2628a9ba6151SMark Brown 2629a9ba6151SMark Brown init_completion(&wm8996->dcs_done); 2630a9ba6151SMark Brown init_completion(&wm8996->fll_lock); 2631a9ba6151SMark Brown 2632a9ba6151SMark Brown if (wm8996->pdata.num_retune_mobile_cfgs) 2633a9ba6151SMark Brown wm8996_retune_mobile_pdata(codec); 2634a9ba6151SMark Brown else 2635022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8996_eq_controls, 2636a9ba6151SMark Brown ARRAY_SIZE(wm8996_eq_controls)); 2637a9ba6151SMark Brown 2638a9ba6151SMark Brown if (i2c->irq) { 2639a9ba6151SMark Brown if (wm8996->pdata.irq_flags) 2640a9ba6151SMark Brown irq_flags = wm8996->pdata.irq_flags; 2641a9ba6151SMark Brown else 2642a9ba6151SMark Brown irq_flags = IRQF_TRIGGER_LOW; 2643a9ba6151SMark Brown 2644a9ba6151SMark Brown irq_flags |= IRQF_ONESHOT; 2645a9ba6151SMark Brown 2646a9ba6151SMark Brown if (irq_flags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING)) 2647a9ba6151SMark Brown ret = request_threaded_irq(i2c->irq, NULL, 2648a9ba6151SMark Brown wm8996_edge_irq, 2649a9ba6151SMark Brown irq_flags, "wm8996", codec); 2650a9ba6151SMark Brown else 2651a9ba6151SMark Brown ret = request_threaded_irq(i2c->irq, NULL, wm8996_irq, 2652a9ba6151SMark Brown irq_flags, "wm8996", codec); 2653a9ba6151SMark Brown 2654a9ba6151SMark Brown if (ret == 0) { 2655a9ba6151SMark Brown /* Unmask the interrupt */ 2656a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_INTERRUPT_CONTROL, 2657a9ba6151SMark Brown WM8996_IM_IRQ, 0); 2658a9ba6151SMark Brown 2659a9ba6151SMark Brown /* Enable error reporting and DC servo status */ 2660a9ba6151SMark Brown snd_soc_update_bits(codec, 2661a9ba6151SMark Brown WM8996_INTERRUPT_STATUS_2_MASK, 2662a9ba6151SMark Brown WM8996_IM_DCS_DONE_23_EINT | 2663a9ba6151SMark Brown WM8996_IM_DCS_DONE_01_EINT | 2664a9ba6151SMark Brown WM8996_IM_FLL_LOCK_EINT | 2665a9ba6151SMark Brown WM8996_IM_FIFOS_ERR_EINT, 2666a9ba6151SMark Brown 0); 2667a9ba6151SMark Brown } else { 2668a9ba6151SMark Brown dev_err(codec->dev, "Failed to request IRQ: %d\n", 2669a9ba6151SMark Brown ret); 26705d6be5aaSXiubo Li return ret; 2671a9ba6151SMark Brown } 2672a9ba6151SMark Brown } 2673a9ba6151SMark Brown 2674a9ba6151SMark Brown return 0; 2675a9ba6151SMark Brown } 2676a9ba6151SMark Brown 2677a9ba6151SMark Brown static int wm8996_remove(struct snd_soc_codec *codec) 2678a9ba6151SMark Brown { 2679a9ba6151SMark Brown struct i2c_client *i2c = to_i2c_client(codec->dev); 2680a9ba6151SMark Brown 2681a9ba6151SMark Brown snd_soc_update_bits(codec, WM8996_INTERRUPT_CONTROL, 2682a9ba6151SMark Brown WM8996_IM_IRQ, WM8996_IM_IRQ); 2683a9ba6151SMark Brown 2684a9ba6151SMark Brown if (i2c->irq) 2685a9ba6151SMark Brown free_irq(i2c->irq, codec); 2686a9ba6151SMark Brown 2687a9ba6151SMark Brown return 0; 2688a9ba6151SMark Brown } 2689a9ba6151SMark Brown 2690a9ba6151SMark Brown static struct snd_soc_codec_driver soc_codec_dev_wm8996 = { 2691a9ba6151SMark Brown .probe = wm8996_probe, 2692a9ba6151SMark Brown .remove = wm8996_remove, 2693a9ba6151SMark Brown .set_bias_level = wm8996_set_bias_level, 2694eb3032f8SAxel Lin .idle_bias_off = true, 2695a9ba6151SMark Brown .seq_notifier = wm8996_seq_notifier, 2696a9ba6151SMark Brown .controls = wm8996_snd_controls, 2697a9ba6151SMark Brown .num_controls = ARRAY_SIZE(wm8996_snd_controls), 2698a9ba6151SMark Brown .dapm_widgets = wm8996_dapm_widgets, 2699a9ba6151SMark Brown .num_dapm_widgets = ARRAY_SIZE(wm8996_dapm_widgets), 2700a9ba6151SMark Brown .dapm_routes = wm8996_dapm_routes, 2701a9ba6151SMark Brown .num_dapm_routes = ARRAY_SIZE(wm8996_dapm_routes), 2702a9ba6151SMark Brown .set_pll = wm8996_set_fll, 2703a9ba6151SMark Brown }; 2704a9ba6151SMark Brown 2705a9ba6151SMark Brown #define WM8996_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\ 27064eb98f45SMark Brown SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\ 27074eb98f45SMark Brown SNDRV_PCM_RATE_48000) 2708a9ba6151SMark Brown #define WM8996_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\ 2709a9ba6151SMark Brown SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\ 2710a9ba6151SMark Brown SNDRV_PCM_FMTBIT_S32_LE) 2711a9ba6151SMark Brown 271285e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8996_dai_ops = { 2713a9ba6151SMark Brown .set_fmt = wm8996_set_fmt, 2714a9ba6151SMark Brown .hw_params = wm8996_hw_params, 2715a9ba6151SMark Brown .set_sysclk = wm8996_set_sysclk, 2716a9ba6151SMark Brown }; 2717a9ba6151SMark Brown 2718a9ba6151SMark Brown static struct snd_soc_dai_driver wm8996_dai[] = { 2719a9ba6151SMark Brown { 2720a9ba6151SMark Brown .name = "wm8996-aif1", 2721a9ba6151SMark Brown .playback = { 2722a9ba6151SMark Brown .stream_name = "AIF1 Playback", 2723a9ba6151SMark Brown .channels_min = 1, 2724a9ba6151SMark Brown .channels_max = 6, 2725a9ba6151SMark Brown .rates = WM8996_RATES, 2726a9ba6151SMark Brown .formats = WM8996_FORMATS, 2727a4b52337SMark Brown .sig_bits = 24, 2728a9ba6151SMark Brown }, 2729a9ba6151SMark Brown .capture = { 2730a9ba6151SMark Brown .stream_name = "AIF1 Capture", 2731a9ba6151SMark Brown .channels_min = 1, 2732a9ba6151SMark Brown .channels_max = 6, 2733a9ba6151SMark Brown .rates = WM8996_RATES, 2734a9ba6151SMark Brown .formats = WM8996_FORMATS, 2735a4b52337SMark Brown .sig_bits = 24, 2736a9ba6151SMark Brown }, 2737a9ba6151SMark Brown .ops = &wm8996_dai_ops, 2738a9ba6151SMark Brown }, 2739a9ba6151SMark Brown { 2740a9ba6151SMark Brown .name = "wm8996-aif2", 2741a9ba6151SMark Brown .playback = { 2742a9ba6151SMark Brown .stream_name = "AIF2 Playback", 2743a9ba6151SMark Brown .channels_min = 1, 2744a9ba6151SMark Brown .channels_max = 2, 2745a9ba6151SMark Brown .rates = WM8996_RATES, 2746a9ba6151SMark Brown .formats = WM8996_FORMATS, 2747a4b52337SMark Brown .sig_bits = 24, 2748a9ba6151SMark Brown }, 2749a9ba6151SMark Brown .capture = { 2750a9ba6151SMark Brown .stream_name = "AIF2 Capture", 2751a9ba6151SMark Brown .channels_min = 1, 2752a9ba6151SMark Brown .channels_max = 2, 2753a9ba6151SMark Brown .rates = WM8996_RATES, 2754a9ba6151SMark Brown .formats = WM8996_FORMATS, 2755a4b52337SMark Brown .sig_bits = 24, 2756a9ba6151SMark Brown }, 2757a9ba6151SMark Brown .ops = &wm8996_dai_ops, 2758a9ba6151SMark Brown }, 2759a9ba6151SMark Brown }; 2760a9ba6151SMark Brown 27617a79e94eSBill Pemberton static int wm8996_i2c_probe(struct i2c_client *i2c, 2762a9ba6151SMark Brown const struct i2c_device_id *id) 2763a9ba6151SMark Brown { 2764a9ba6151SMark Brown struct wm8996_priv *wm8996; 2765ee5f3872SMark Brown int ret, i; 2766ee5f3872SMark Brown unsigned int reg; 2767a9ba6151SMark Brown 2768a290986bSMark Brown wm8996 = devm_kzalloc(&i2c->dev, sizeof(struct wm8996_priv), 2769a290986bSMark Brown GFP_KERNEL); 2770a9ba6151SMark Brown if (wm8996 == NULL) 2771a9ba6151SMark Brown return -ENOMEM; 2772a9ba6151SMark Brown 2773a9ba6151SMark Brown i2c_set_clientdata(i2c, wm8996); 2774b2d1e233SMark Brown wm8996->dev = &i2c->dev; 2775a9ba6151SMark Brown 2776a9ba6151SMark Brown if (dev_get_platdata(&i2c->dev)) 2777a9ba6151SMark Brown memcpy(&wm8996->pdata, dev_get_platdata(&i2c->dev), 2778a9ba6151SMark Brown sizeof(wm8996->pdata)); 2779a9ba6151SMark Brown 2780a9ba6151SMark Brown if (wm8996->pdata.ldo_ena > 0) { 2781a9ba6151SMark Brown ret = gpio_request_one(wm8996->pdata.ldo_ena, 2782a9ba6151SMark Brown GPIOF_OUT_INIT_LOW, "WM8996 ENA"); 2783a9ba6151SMark Brown if (ret < 0) { 2784a9ba6151SMark Brown dev_err(&i2c->dev, "Failed to request GPIO %d: %d\n", 2785a9ba6151SMark Brown wm8996->pdata.ldo_ena, ret); 2786a9ba6151SMark Brown goto err; 2787a9ba6151SMark Brown } 2788a9ba6151SMark Brown } 2789a9ba6151SMark Brown 2790ee5f3872SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) 2791ee5f3872SMark Brown wm8996->supplies[i].supply = wm8996_supply_names[i]; 2792ee5f3872SMark Brown 279324e0c57bSMark Brown ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8996->supplies), 2794ee5f3872SMark Brown wm8996->supplies); 2795ee5f3872SMark Brown if (ret != 0) { 2796ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret); 2797ee5f3872SMark Brown goto err_gpio; 2798ee5f3872SMark Brown } 2799ee5f3872SMark Brown 2800625c4888SMark Brown wm8996->disable_nb[0].notifier_call = wm8996_regulator_event_0; 2801625c4888SMark Brown wm8996->disable_nb[1].notifier_call = wm8996_regulator_event_1; 2802625c4888SMark Brown wm8996->disable_nb[2].notifier_call = wm8996_regulator_event_2; 2803625c4888SMark Brown 2804625c4888SMark Brown /* This should really be moved into the regulator core */ 2805625c4888SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) { 2806625c4888SMark Brown ret = regulator_register_notifier(wm8996->supplies[i].consumer, 2807625c4888SMark Brown &wm8996->disable_nb[i]); 2808625c4888SMark Brown if (ret != 0) { 2809625c4888SMark Brown dev_err(&i2c->dev, 2810625c4888SMark Brown "Failed to register regulator notifier: %d\n", 2811625c4888SMark Brown ret); 2812625c4888SMark Brown } 2813625c4888SMark Brown } 2814625c4888SMark Brown 2815ee5f3872SMark Brown ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies), 2816ee5f3872SMark Brown wm8996->supplies); 2817ee5f3872SMark Brown if (ret != 0) { 2818ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret); 281924e0c57bSMark Brown goto err_gpio; 2820ee5f3872SMark Brown } 2821ee5f3872SMark Brown 2822ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) { 2823ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1); 2824ee5f3872SMark Brown msleep(5); 2825ee5f3872SMark Brown } 2826ee5f3872SMark Brown 2827af691fb6SMark Brown wm8996->regmap = devm_regmap_init_i2c(i2c, &wm8996_regmap); 2828ee5f3872SMark Brown if (IS_ERR(wm8996->regmap)) { 2829ee5f3872SMark Brown ret = PTR_ERR(wm8996->regmap); 2830ee5f3872SMark Brown dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret); 2831ee5f3872SMark Brown goto err_enable; 2832ee5f3872SMark Brown } 2833ee5f3872SMark Brown 2834ee5f3872SMark Brown ret = regmap_read(wm8996->regmap, WM8996_SOFTWARE_RESET, ®); 2835ee5f3872SMark Brown if (ret < 0) { 2836ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret); 2837ee5f3872SMark Brown goto err_regmap; 2838ee5f3872SMark Brown } 2839ee5f3872SMark Brown if (reg != 0x8915) { 2840905b4195SAxel Lin dev_err(&i2c->dev, "Device is not a WM8996, ID %x\n", reg); 2841ee5f3872SMark Brown ret = -EINVAL; 2842ee5f3872SMark Brown goto err_regmap; 2843ee5f3872SMark Brown } 2844ee5f3872SMark Brown 2845ee5f3872SMark Brown ret = regmap_read(wm8996->regmap, WM8996_CHIP_REVISION, ®); 2846ee5f3872SMark Brown if (ret < 0) { 2847ee5f3872SMark Brown dev_err(&i2c->dev, "Failed to read device revision: %d\n", 2848ee5f3872SMark Brown ret); 2849ee5f3872SMark Brown goto err_regmap; 2850ee5f3872SMark Brown } 2851ee5f3872SMark Brown 2852ee5f3872SMark Brown dev_info(&i2c->dev, "revision %c\n", 2853ee5f3872SMark Brown (reg & WM8996_CHIP_REV_MASK) + 'A'); 2854ee5f3872SMark Brown 2855d4b3d0fbSMark Brown if (wm8996->pdata.ldo_ena > 0) { 2856d4b3d0fbSMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 2857d4b3d0fbSMark Brown regcache_cache_only(wm8996->regmap, true); 2858d4b3d0fbSMark Brown } else { 2859d4b3d0fbSMark Brown ret = regmap_write(wm8996->regmap, WM8996_SOFTWARE_RESET, 2860d4b3d0fbSMark Brown 0x8915); 2861d4b3d0fbSMark Brown if (ret != 0) { 2862d4b3d0fbSMark Brown dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret); 2863ee5f3872SMark Brown goto err_regmap; 2864ee5f3872SMark Brown } 2865d4b3d0fbSMark Brown } 2866ee5f3872SMark Brown 2867db133409SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 2868db133409SMark Brown 2869ec8ffe18SMark Brown /* Apply platform data settings */ 2870ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_LINE_INPUT_CONTROL, 2871ec8ffe18SMark Brown WM8996_INL_MODE_MASK | WM8996_INR_MODE_MASK, 2872ec8ffe18SMark Brown wm8996->pdata.inl_mode << WM8996_INL_MODE_SHIFT | 2873ec8ffe18SMark Brown wm8996->pdata.inr_mode); 2874ec8ffe18SMark Brown 2875ec8ffe18SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->pdata.gpio_default); i++) { 2876ec8ffe18SMark Brown if (!wm8996->pdata.gpio_default[i]) 2877ec8ffe18SMark Brown continue; 2878ec8ffe18SMark Brown 2879ec8ffe18SMark Brown regmap_write(wm8996->regmap, WM8996_GPIO_1 + i, 2880ec8ffe18SMark Brown wm8996->pdata.gpio_default[i] & 0xffff); 2881ec8ffe18SMark Brown } 2882ec8ffe18SMark Brown 2883ec8ffe18SMark Brown if (wm8996->pdata.spkmute_seq) 2884ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2885ec8ffe18SMark Brown WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 2886ec8ffe18SMark Brown WM8996_SPK_MUTE_ENDIAN | 2887ec8ffe18SMark Brown WM8996_SPK_MUTE_SEQ1_MASK, 2888ec8ffe18SMark Brown wm8996->pdata.spkmute_seq); 2889ec8ffe18SMark Brown 2890ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_ACCESSORY_DETECT_MODE_2, 2891ec8ffe18SMark Brown WM8996_MICD_BIAS_SRC | WM8996_HPOUT1FB_SRC | 2892ec8ffe18SMark Brown WM8996_MICD_SRC, wm8996->pdata.micdet_def); 2893ec8ffe18SMark Brown 2894ec8ffe18SMark Brown /* Latch volume update bits */ 2895ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_LEFT_LINE_INPUT_VOLUME, 2896ec8ffe18SMark Brown WM8996_IN1_VU, WM8996_IN1_VU); 2897ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_RIGHT_LINE_INPUT_VOLUME, 2898ec8ffe18SMark Brown WM8996_IN1_VU, WM8996_IN1_VU); 2899ec8ffe18SMark Brown 2900ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DAC1_LEFT_VOLUME, 2901ec8ffe18SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2902ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DAC1_RIGHT_VOLUME, 2903ec8ffe18SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2904ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DAC2_LEFT_VOLUME, 2905ec8ffe18SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2906ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DAC2_RIGHT_VOLUME, 2907ec8ffe18SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2908ec8ffe18SMark Brown 2909ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_OUTPUT1_LEFT_VOLUME, 2910ec8ffe18SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2911ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_OUTPUT1_RIGHT_VOLUME, 2912ec8ffe18SMark Brown WM8996_DAC1_VU, WM8996_DAC1_VU); 2913ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_OUTPUT2_LEFT_VOLUME, 2914ec8ffe18SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2915ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_OUTPUT2_RIGHT_VOLUME, 2916ec8ffe18SMark Brown WM8996_DAC2_VU, WM8996_DAC2_VU); 2917ec8ffe18SMark Brown 2918ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP1_TX_LEFT_VOLUME, 2919ec8ffe18SMark Brown WM8996_DSP1TX_VU, WM8996_DSP1TX_VU); 2920ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP1_TX_RIGHT_VOLUME, 2921ec8ffe18SMark Brown WM8996_DSP1TX_VU, WM8996_DSP1TX_VU); 2922ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP2_TX_LEFT_VOLUME, 2923ec8ffe18SMark Brown WM8996_DSP2TX_VU, WM8996_DSP2TX_VU); 2924ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP2_TX_RIGHT_VOLUME, 2925ec8ffe18SMark Brown WM8996_DSP2TX_VU, WM8996_DSP2TX_VU); 2926ec8ffe18SMark Brown 2927ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP1_RX_LEFT_VOLUME, 2928ec8ffe18SMark Brown WM8996_DSP1RX_VU, WM8996_DSP1RX_VU); 2929ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP1_RX_RIGHT_VOLUME, 2930ec8ffe18SMark Brown WM8996_DSP1RX_VU, WM8996_DSP1RX_VU); 2931ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP2_RX_LEFT_VOLUME, 2932ec8ffe18SMark Brown WM8996_DSP2RX_VU, WM8996_DSP2RX_VU); 2933ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_DSP2_RX_RIGHT_VOLUME, 2934ec8ffe18SMark Brown WM8996_DSP2RX_VU, WM8996_DSP2RX_VU); 2935ec8ffe18SMark Brown 2936ec8ffe18SMark Brown /* No support currently for the underclocked TDM modes and 2937ec8ffe18SMark Brown * pick a default TDM layout with each channel pair working with 2938ec8ffe18SMark Brown * slots 0 and 1. */ 2939ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2940ec8ffe18SMark Brown WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 2941ec8ffe18SMark Brown WM8996_AIF1RX_CHAN0_SLOTS_MASK | 2942ec8ffe18SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2943ec8ffe18SMark Brown 1 << WM8996_AIF1RX_CHAN0_SLOTS_SHIFT | 0); 2944ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2945ec8ffe18SMark Brown WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 2946ec8ffe18SMark Brown WM8996_AIF1RX_CHAN1_SLOTS_MASK | 2947ec8ffe18SMark Brown WM8996_AIF1RX_CHAN1_START_SLOT_MASK, 2948ec8ffe18SMark Brown 1 << WM8996_AIF1RX_CHAN1_SLOTS_SHIFT | 1); 2949ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2950ec8ffe18SMark Brown WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 2951ec8ffe18SMark Brown WM8996_AIF1RX_CHAN2_SLOTS_MASK | 2952ec8ffe18SMark Brown WM8996_AIF1RX_CHAN2_START_SLOT_MASK, 2953ec8ffe18SMark Brown 1 << WM8996_AIF1RX_CHAN2_SLOTS_SHIFT | 0); 2954ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2955ec8ffe18SMark Brown WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 2956ec8ffe18SMark Brown WM8996_AIF1RX_CHAN3_SLOTS_MASK | 2957ec8ffe18SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2958ec8ffe18SMark Brown 1 << WM8996_AIF1RX_CHAN3_SLOTS_SHIFT | 1); 2959ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2960ec8ffe18SMark Brown WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 2961ec8ffe18SMark Brown WM8996_AIF1RX_CHAN4_SLOTS_MASK | 2962ec8ffe18SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2963ec8ffe18SMark Brown 1 << WM8996_AIF1RX_CHAN4_SLOTS_SHIFT | 0); 2964ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2965ec8ffe18SMark Brown WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 2966ec8ffe18SMark Brown WM8996_AIF1RX_CHAN5_SLOTS_MASK | 2967ec8ffe18SMark Brown WM8996_AIF1RX_CHAN0_START_SLOT_MASK, 2968ec8ffe18SMark Brown 1 << WM8996_AIF1RX_CHAN5_SLOTS_SHIFT | 1); 2969ec8ffe18SMark Brown 2970ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2971ec8ffe18SMark Brown WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 2972ec8ffe18SMark Brown WM8996_AIF2RX_CHAN0_SLOTS_MASK | 2973ec8ffe18SMark Brown WM8996_AIF2RX_CHAN0_START_SLOT_MASK, 2974ec8ffe18SMark Brown 1 << WM8996_AIF2RX_CHAN0_SLOTS_SHIFT | 0); 2975ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2976ec8ffe18SMark Brown WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 2977ec8ffe18SMark Brown WM8996_AIF2RX_CHAN1_SLOTS_MASK | 2978ec8ffe18SMark Brown WM8996_AIF2RX_CHAN1_START_SLOT_MASK, 2979ec8ffe18SMark Brown 1 << WM8996_AIF2RX_CHAN1_SLOTS_SHIFT | 1); 2980ec8ffe18SMark Brown 2981ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2982ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 2983ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_SLOTS_MASK | 2984ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2985ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN0_SLOTS_SHIFT | 0); 2986ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2987ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 2988ec8ffe18SMark Brown WM8996_AIF1TX_CHAN1_SLOTS_MASK | 2989ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2990ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1); 2991ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2992ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 2993ec8ffe18SMark Brown WM8996_AIF1TX_CHAN2_SLOTS_MASK | 2994ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 2995ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN2_SLOTS_SHIFT | 0); 2996ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 2997ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 2998ec8ffe18SMark Brown WM8996_AIF1TX_CHAN3_SLOTS_MASK | 2999ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 3000ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN3_SLOTS_SHIFT | 1); 3001ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 3002ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 3003ec8ffe18SMark Brown WM8996_AIF1TX_CHAN4_SLOTS_MASK | 3004ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 3005ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN4_SLOTS_SHIFT | 0); 3006ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 3007ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 3008ec8ffe18SMark Brown WM8996_AIF1TX_CHAN5_SLOTS_MASK | 3009ec8ffe18SMark Brown WM8996_AIF1TX_CHAN0_START_SLOT_MASK, 3010ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN5_SLOTS_SHIFT | 1); 3011ec8ffe18SMark Brown 3012ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 3013ec8ffe18SMark Brown WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 3014ec8ffe18SMark Brown WM8996_AIF2TX_CHAN0_SLOTS_MASK | 3015ec8ffe18SMark Brown WM8996_AIF2TX_CHAN0_START_SLOT_MASK, 3016ec8ffe18SMark Brown 1 << WM8996_AIF2TX_CHAN0_SLOTS_SHIFT | 0); 3017ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, 3018ec8ffe18SMark Brown WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 3019ec8ffe18SMark Brown WM8996_AIF2TX_CHAN1_SLOTS_MASK | 3020ec8ffe18SMark Brown WM8996_AIF2TX_CHAN1_START_SLOT_MASK, 3021ec8ffe18SMark Brown 1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1); 3022ec8ffe18SMark Brown 3023ec8ffe18SMark Brown /* If the TX LRCLK pins are not in LRCLK mode configure the 3024ec8ffe18SMark Brown * AIFs to source their clocks from the RX LRCLKs. 3025ec8ffe18SMark Brown */ 3026ec8ffe18SMark Brown ret = regmap_read(wm8996->regmap, WM8996_GPIO_1, ®); 3027ec8ffe18SMark Brown if (ret != 0) { 3028ec8ffe18SMark Brown dev_err(&i2c->dev, "Failed to read GPIO1: %d\n", ret); 3029ec8ffe18SMark Brown goto err_regmap; 3030ec8ffe18SMark Brown } 3031ec8ffe18SMark Brown 3032ec8ffe18SMark Brown if (reg & WM8996_GP1_FN_MASK) 3033ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_AIF1_TX_LRCLK_2, 3034ec8ffe18SMark Brown WM8996_AIF1TX_LRCLK_MODE, 3035ec8ffe18SMark Brown WM8996_AIF1TX_LRCLK_MODE); 3036ec8ffe18SMark Brown 3037ec8ffe18SMark Brown ret = regmap_read(wm8996->regmap, WM8996_GPIO_2, ®); 3038ec8ffe18SMark Brown if (ret != 0) { 3039ec8ffe18SMark Brown dev_err(&i2c->dev, "Failed to read GPIO2: %d\n", ret); 3040ec8ffe18SMark Brown goto err_regmap; 3041ec8ffe18SMark Brown } 3042ec8ffe18SMark Brown 3043ec8ffe18SMark Brown if (reg & WM8996_GP2_FN_MASK) 3044ec8ffe18SMark Brown regmap_update_bits(wm8996->regmap, WM8996_AIF2_TX_LRCLK_2, 3045ec8ffe18SMark Brown WM8996_AIF2TX_LRCLK_MODE, 3046ec8ffe18SMark Brown WM8996_AIF2TX_LRCLK_MODE); 3047ec8ffe18SMark Brown 3048b2d1e233SMark Brown wm8996_init_gpio(wm8996); 3049b2d1e233SMark Brown 3050a9ba6151SMark Brown ret = snd_soc_register_codec(&i2c->dev, 3051a9ba6151SMark Brown &soc_codec_dev_wm8996, wm8996_dai, 3052a9ba6151SMark Brown ARRAY_SIZE(wm8996_dai)); 3053a9ba6151SMark Brown if (ret < 0) 3054b2d1e233SMark Brown goto err_gpiolib; 3055a9ba6151SMark Brown 3056a9ba6151SMark Brown return ret; 3057a9ba6151SMark Brown 3058b2d1e233SMark Brown err_gpiolib: 3059b2d1e233SMark Brown wm8996_free_gpio(wm8996); 3060ee5f3872SMark Brown err_regmap: 3061ee5f3872SMark Brown err_enable: 3062ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) 3063ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 3064ee5f3872SMark Brown regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies); 3065a9ba6151SMark Brown err_gpio: 3066a9ba6151SMark Brown if (wm8996->pdata.ldo_ena > 0) 3067a9ba6151SMark Brown gpio_free(wm8996->pdata.ldo_ena); 3068a9ba6151SMark Brown err: 3069a9ba6151SMark Brown 3070a9ba6151SMark Brown return ret; 3071a9ba6151SMark Brown } 3072a9ba6151SMark Brown 30737a79e94eSBill Pemberton static int wm8996_i2c_remove(struct i2c_client *client) 3074a9ba6151SMark Brown { 3075a9ba6151SMark Brown struct wm8996_priv *wm8996 = i2c_get_clientdata(client); 3076625c4888SMark Brown int i; 3077a9ba6151SMark Brown 3078a9ba6151SMark Brown snd_soc_unregister_codec(&client->dev); 3079b2d1e233SMark Brown wm8996_free_gpio(wm8996); 3080ee5f3872SMark Brown if (wm8996->pdata.ldo_ena > 0) { 3081ee5f3872SMark Brown gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0); 3082a9ba6151SMark Brown gpio_free(wm8996->pdata.ldo_ena); 3083ee5f3872SMark Brown } 3084625c4888SMark Brown for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) 3085625c4888SMark Brown regulator_unregister_notifier(wm8996->supplies[i].consumer, 3086625c4888SMark Brown &wm8996->disable_nb[i]); 3087625c4888SMark Brown 3088a9ba6151SMark Brown return 0; 3089a9ba6151SMark Brown } 3090a9ba6151SMark Brown 3091a9ba6151SMark Brown static const struct i2c_device_id wm8996_i2c_id[] = { 3092a9ba6151SMark Brown { "wm8996", 0 }, 3093a9ba6151SMark Brown { } 3094a9ba6151SMark Brown }; 3095a9ba6151SMark Brown MODULE_DEVICE_TABLE(i2c, wm8996_i2c_id); 3096a9ba6151SMark Brown 3097a9ba6151SMark Brown static struct i2c_driver wm8996_i2c_driver = { 3098a9ba6151SMark Brown .driver = { 3099a9ba6151SMark Brown .name = "wm8996", 3100a9ba6151SMark Brown .owner = THIS_MODULE, 3101a9ba6151SMark Brown }, 3102a9ba6151SMark Brown .probe = wm8996_i2c_probe, 31037a79e94eSBill Pemberton .remove = wm8996_i2c_remove, 3104a9ba6151SMark Brown .id_table = wm8996_i2c_id, 3105a9ba6151SMark Brown }; 3106a9ba6151SMark Brown 31078005f394SMark Brown module_i2c_driver(wm8996_i2c_driver); 3108a9ba6151SMark Brown 3109a9ba6151SMark Brown MODULE_DESCRIPTION("ASoC WM8996 driver"); 3110a9ba6151SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 3111a9ba6151SMark Brown MODULE_LICENSE("GPL"); 3112