xref: /openbmc/linux/sound/soc/codecs/wm8996.c (revision a4b6c6ec) 
12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later
2a9ba6151SMark Brown /*
3a9ba6151SMark Brown  * wm8996.c - WM8996 audio codec interface
4a9ba6151SMark Brown  *
5656baaebSMark Brown  * Copyright 2011-2 Wolfson Microelectronics PLC.
6a9ba6151SMark Brown  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7a9ba6151SMark Brown  */
8a9ba6151SMark Brown 
9a9ba6151SMark Brown #include <linux/module.h>
10a9ba6151SMark Brown #include <linux/moduleparam.h>
11a9ba6151SMark Brown #include <linux/init.h>
12a9ba6151SMark Brown #include <linux/completion.h>
13a9ba6151SMark Brown #include <linux/delay.h>
14a9ba6151SMark Brown #include <linux/pm.h>
15a9ba6151SMark Brown #include <linux/gcd.h>
16c2aea142SLinus Walleij #include <linux/gpio/driver.h>
17a9ba6151SMark Brown #include <linux/gpio.h>
18a9ba6151SMark Brown #include <linux/i2c.h>
1979172746SMark Brown #include <linux/regmap.h>
20a9ba6151SMark Brown #include <linux/regulator/consumer.h>
21a9ba6151SMark Brown #include <linux/slab.h>
22a9ba6151SMark Brown #include <linux/workqueue.h>
23a9ba6151SMark Brown #include <sound/core.h>
24a9ba6151SMark Brown #include <sound/jack.h>
25a9ba6151SMark Brown #include <sound/pcm.h>
26a9ba6151SMark Brown #include <sound/pcm_params.h>
27a9ba6151SMark Brown #include <sound/soc.h>
28a9ba6151SMark Brown #include <sound/initval.h>
29a9ba6151SMark Brown #include <sound/tlv.h>
30a9ba6151SMark Brown #include <trace/events/asoc.h>
31a9ba6151SMark Brown 
32a9ba6151SMark Brown #include <sound/wm8996.h>
33a9ba6151SMark Brown #include "wm8996.h"
34a9ba6151SMark Brown 
35a9ba6151SMark Brown #define WM8996_AIFS 2
36a9ba6151SMark Brown 
37a9ba6151SMark Brown #define HPOUT1L 1
38a9ba6151SMark Brown #define HPOUT1R 2
39a9ba6151SMark Brown #define HPOUT2L 4
40a9ba6151SMark Brown #define HPOUT2R 8
41a9ba6151SMark Brown 
42c83495afSMark Brown #define WM8996_NUM_SUPPLIES 3
43a9ba6151SMark Brown static const char *wm8996_supply_names[WM8996_NUM_SUPPLIES] = {
44a9ba6151SMark Brown 	"DBVDD",
45a9ba6151SMark Brown 	"AVDD1",
46a9ba6151SMark Brown 	"AVDD2",
47a9ba6151SMark Brown };
48a9ba6151SMark Brown 
49a9ba6151SMark Brown struct wm8996_priv {
50b2d1e233SMark Brown 	struct device *dev;
51ee5f3872SMark Brown 	struct regmap *regmap;
525d61ef8bSKuninori Morimoto 	struct snd_soc_component *component;
53a9ba6151SMark Brown 
54a9ba6151SMark Brown 	int ldo1ena;
55a9ba6151SMark Brown 
56a9ba6151SMark Brown 	int sysclk;
57a9ba6151SMark Brown 	int sysclk_src;
58a9ba6151SMark Brown 
59a9ba6151SMark Brown 	int fll_src;
60a9ba6151SMark Brown 	int fll_fref;
61a9ba6151SMark Brown 	int fll_fout;
62a9ba6151SMark Brown 
63a9ba6151SMark Brown 	struct completion fll_lock;
64a9ba6151SMark Brown 
65a9ba6151SMark Brown 	u16 dcs_pending;
66a9ba6151SMark Brown 	struct completion dcs_done;
67a9ba6151SMark Brown 
68a9ba6151SMark Brown 	u16 hpout_ena;
69a9ba6151SMark Brown 	u16 hpout_pending;
70a9ba6151SMark Brown 
71a9ba6151SMark Brown 	struct regulator_bulk_data supplies[WM8996_NUM_SUPPLIES];
72a9ba6151SMark Brown 	struct notifier_block disable_nb[WM8996_NUM_SUPPLIES];
73ded71dcbSMark Brown 	int bg_ena;
74a9ba6151SMark Brown 
75a9ba6151SMark Brown 	struct wm8996_pdata pdata;
76a9ba6151SMark Brown 
77a9ba6151SMark Brown 	int rx_rate[WM8996_AIFS];
78a9ba6151SMark Brown 	int bclk_rate[WM8996_AIFS];
79a9ba6151SMark Brown 
80a9ba6151SMark Brown 	/* Platform dependant ReTune mobile configuration */
81a9ba6151SMark Brown 	int num_retune_mobile_texts;
82a9ba6151SMark Brown 	const char **retune_mobile_texts;
83a9ba6151SMark Brown 	int retune_mobile_cfg[2];
84a9ba6151SMark Brown 	struct soc_enum retune_mobile_enum;
85a9ba6151SMark Brown 
86a9ba6151SMark Brown 	struct snd_soc_jack *jack;
87a9ba6151SMark Brown 	bool detecting;
88a9ba6151SMark Brown 	bool jack_mic;
89d7b35570SMark Brown 	int jack_flips;
90a9ba6151SMark Brown 	wm8996_polarity_fn polarity_cb;
91a9ba6151SMark Brown 
92a9ba6151SMark Brown #ifdef CONFIG_GPIOLIB
93a9ba6151SMark Brown 	struct gpio_chip gpio_chip;
94a9ba6151SMark Brown #endif
95a9ba6151SMark Brown };
96a9ba6151SMark Brown 
97a9ba6151SMark Brown /* We can't use the same notifier block for more than one supply and
98a9ba6151SMark Brown  * there's no way I can see to get from a callback to the caller
99a9ba6151SMark Brown  * except container_of().
100a9ba6151SMark Brown  */
101a9ba6151SMark Brown #define WM8996_REGULATOR_EVENT(n) \
102a9ba6151SMark Brown static int wm8996_regulator_event_##n(struct notifier_block *nb, \
103a9ba6151SMark Brown 				    unsigned long event, void *data)	\
104a9ba6151SMark Brown { \
105a9ba6151SMark Brown 	struct wm8996_priv *wm8996 = container_of(nb, struct wm8996_priv, \
106a9ba6151SMark Brown 						  disable_nb[n]); \
107a9ba6151SMark Brown 	if (event & REGULATOR_EVENT_DISABLE) { \
1081b76d2eeSMark Brown 		regcache_mark_dirty(wm8996->regmap);	\
109a9ba6151SMark Brown 	} \
110a9ba6151SMark Brown 	return 0; \
111a9ba6151SMark Brown }
112a9ba6151SMark Brown 
113a9ba6151SMark Brown WM8996_REGULATOR_EVENT(0)
114a9ba6151SMark Brown WM8996_REGULATOR_EVENT(1)
115a9ba6151SMark Brown WM8996_REGULATOR_EVENT(2)
116a9ba6151SMark Brown 
117c418a84aSAxel Lin static const struct reg_default wm8996_reg[] = {
11879172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_1, 0x0 },
11979172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_2, 0x0 },
12079172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_3, 0x0 },
12179172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_4, 0x0 },
12279172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_5, 0x0 },
12379172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_6, 0x0 },
12479172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_7, 0x10 },
12579172746SMark Brown 	{ WM8996_POWER_MANAGEMENT_8, 0x0 },
12679172746SMark Brown 	{ WM8996_LEFT_LINE_INPUT_VOLUME, 0x0 },
12779172746SMark Brown 	{ WM8996_RIGHT_LINE_INPUT_VOLUME, 0x0 },
12879172746SMark Brown 	{ WM8996_LINE_INPUT_CONTROL, 0x0 },
12979172746SMark Brown 	{ WM8996_DAC1_HPOUT1_VOLUME, 0x88 },
13079172746SMark Brown 	{ WM8996_DAC2_HPOUT2_VOLUME, 0x88 },
13179172746SMark Brown 	{ WM8996_DAC1_LEFT_VOLUME, 0x2c0 },
13279172746SMark Brown 	{ WM8996_DAC1_RIGHT_VOLUME, 0x2c0 },
13379172746SMark Brown 	{ WM8996_DAC2_LEFT_VOLUME, 0x2c0 },
13479172746SMark Brown 	{ WM8996_DAC2_RIGHT_VOLUME, 0x2c0 },
13579172746SMark Brown 	{ WM8996_OUTPUT1_LEFT_VOLUME, 0x80 },
13679172746SMark Brown 	{ WM8996_OUTPUT1_RIGHT_VOLUME, 0x80 },
13779172746SMark Brown 	{ WM8996_OUTPUT2_LEFT_VOLUME, 0x80 },
13879172746SMark Brown 	{ WM8996_OUTPUT2_RIGHT_VOLUME, 0x80 },
13979172746SMark Brown 	{ WM8996_MICBIAS_1, 0x39 },
14079172746SMark Brown 	{ WM8996_MICBIAS_2, 0x39 },
14179172746SMark Brown 	{ WM8996_LDO_1, 0x3 },
14279172746SMark Brown 	{ WM8996_LDO_2, 0x13 },
14379172746SMark Brown 	{ WM8996_ACCESSORY_DETECT_MODE_1, 0x4 },
14479172746SMark Brown 	{ WM8996_ACCESSORY_DETECT_MODE_2, 0x0 },
14579172746SMark Brown 	{ WM8996_HEADPHONE_DETECT_1, 0x20 },
14679172746SMark Brown 	{ WM8996_HEADPHONE_DETECT_2, 0x0 },
14779172746SMark Brown 	{ WM8996_MIC_DETECT_1, 0x7600 },
14879172746SMark Brown 	{ WM8996_MIC_DETECT_2, 0xbf },
14979172746SMark Brown 	{ WM8996_CHARGE_PUMP_1, 0x1f25 },
15079172746SMark Brown 	{ WM8996_CHARGE_PUMP_2, 0xab19 },
15179172746SMark Brown 	{ WM8996_DC_SERVO_1, 0x0 },
15279172746SMark Brown 	{ WM8996_DC_SERVO_3, 0x0 },
15379172746SMark Brown 	{ WM8996_DC_SERVO_5, 0x2a2a },
15479172746SMark Brown 	{ WM8996_DC_SERVO_6, 0x0 },
15579172746SMark Brown 	{ WM8996_DC_SERVO_7, 0x0 },
15679172746SMark Brown 	{ WM8996_ANALOGUE_HP_1, 0x0 },
15779172746SMark Brown 	{ WM8996_ANALOGUE_HP_2, 0x0 },
15879172746SMark Brown 	{ WM8996_CONTROL_INTERFACE_1, 0x8004 },
15979172746SMark Brown 	{ WM8996_WRITE_SEQUENCER_CTRL_1, 0x0 },
16079172746SMark Brown 	{ WM8996_WRITE_SEQUENCER_CTRL_2, 0x0 },
16179172746SMark Brown 	{ WM8996_AIF_CLOCKING_1, 0x0 },
16279172746SMark Brown 	{ WM8996_AIF_CLOCKING_2, 0x0 },
16379172746SMark Brown 	{ WM8996_CLOCKING_1, 0x10 },
16479172746SMark Brown 	{ WM8996_CLOCKING_2, 0x0 },
16579172746SMark Brown 	{ WM8996_AIF_RATE, 0x83 },
16679172746SMark Brown 	{ WM8996_FLL_CONTROL_1, 0x0 },
16779172746SMark Brown 	{ WM8996_FLL_CONTROL_2, 0x0 },
16879172746SMark Brown 	{ WM8996_FLL_CONTROL_3, 0x0 },
16979172746SMark Brown 	{ WM8996_FLL_CONTROL_4, 0x5dc0 },
17079172746SMark Brown 	{ WM8996_FLL_CONTROL_5, 0xc84 },
17179172746SMark Brown 	{ WM8996_FLL_EFS_1, 0x0 },
17279172746SMark Brown 	{ WM8996_FLL_EFS_2, 0x2 },
17379172746SMark Brown 	{ WM8996_AIF1_CONTROL, 0x0 },
17479172746SMark Brown 	{ WM8996_AIF1_BCLK, 0x0 },
17579172746SMark Brown 	{ WM8996_AIF1_TX_LRCLK_1, 0x80 },
17679172746SMark Brown 	{ WM8996_AIF1_TX_LRCLK_2, 0x8 },
17779172746SMark Brown 	{ WM8996_AIF1_RX_LRCLK_1, 0x80 },
17879172746SMark Brown 	{ WM8996_AIF1_RX_LRCLK_2, 0x0 },
17979172746SMark Brown 	{ WM8996_AIF1TX_DATA_CONFIGURATION_1, 0x1818 },
18079172746SMark Brown 	{ WM8996_AIF1TX_DATA_CONFIGURATION_2, 0 },
18179172746SMark Brown 	{ WM8996_AIF1RX_DATA_CONFIGURATION, 0x1818 },
18279172746SMark Brown 	{ WM8996_AIF1TX_CHANNEL_0_CONFIGURATION, 0x0 },
18379172746SMark Brown 	{ WM8996_AIF1TX_CHANNEL_1_CONFIGURATION, 0x0 },
18479172746SMark Brown 	{ WM8996_AIF1TX_CHANNEL_2_CONFIGURATION, 0x0 },
18579172746SMark Brown 	{ WM8996_AIF1TX_CHANNEL_3_CONFIGURATION, 0x0 },
18679172746SMark Brown 	{ WM8996_AIF1TX_CHANNEL_4_CONFIGURATION, 0x0 },
18779172746SMark Brown 	{ WM8996_AIF1TX_CHANNEL_5_CONFIGURATION, 0x0 },
18879172746SMark Brown 	{ WM8996_AIF1RX_CHANNEL_0_CONFIGURATION, 0x0 },
18979172746SMark Brown 	{ WM8996_AIF1RX_CHANNEL_1_CONFIGURATION, 0x0 },
19079172746SMark Brown 	{ WM8996_AIF1RX_CHANNEL_2_CONFIGURATION, 0x0 },
19179172746SMark Brown 	{ WM8996_AIF1RX_CHANNEL_3_CONFIGURATION, 0x0 },
19279172746SMark Brown 	{ WM8996_AIF1RX_CHANNEL_4_CONFIGURATION, 0x0 },
19379172746SMark Brown 	{ WM8996_AIF1RX_CHANNEL_5_CONFIGURATION, 0x0 },
19479172746SMark Brown 	{ WM8996_AIF1RX_MONO_CONFIGURATION, 0x0 },
19579172746SMark Brown 	{ WM8996_AIF1TX_TEST, 0x7 },
19679172746SMark Brown 	{ WM8996_AIF2_CONTROL, 0x0 },
19779172746SMark Brown 	{ WM8996_AIF2_BCLK, 0x0 },
19879172746SMark Brown 	{ WM8996_AIF2_TX_LRCLK_1, 0x80 },
19979172746SMark Brown 	{ WM8996_AIF2_TX_LRCLK_2, 0x8 },
20079172746SMark Brown 	{ WM8996_AIF2_RX_LRCLK_1, 0x80 },
20179172746SMark Brown 	{ WM8996_AIF2_RX_LRCLK_2, 0x0 },
20279172746SMark Brown 	{ WM8996_AIF2TX_DATA_CONFIGURATION_1, 0x1818 },
20379172746SMark Brown 	{ WM8996_AIF2RX_DATA_CONFIGURATION, 0x1818 },
20479172746SMark Brown 	{ WM8996_AIF2RX_DATA_CONFIGURATION, 0x0 },
20579172746SMark Brown 	{ WM8996_AIF2TX_CHANNEL_0_CONFIGURATION, 0x0 },
20679172746SMark Brown 	{ WM8996_AIF2TX_CHANNEL_1_CONFIGURATION, 0x0 },
20779172746SMark Brown 	{ WM8996_AIF2RX_CHANNEL_0_CONFIGURATION, 0x0 },
20879172746SMark Brown 	{ WM8996_AIF2RX_CHANNEL_1_CONFIGURATION, 0x0 },
20979172746SMark Brown 	{ WM8996_AIF2RX_MONO_CONFIGURATION, 0x0 },
21079172746SMark Brown 	{ WM8996_AIF2TX_TEST, 0x1 },
21179172746SMark Brown 	{ WM8996_DSP1_TX_LEFT_VOLUME, 0xc0 },
21279172746SMark Brown 	{ WM8996_DSP1_TX_RIGHT_VOLUME, 0xc0 },
21379172746SMark Brown 	{ WM8996_DSP1_RX_LEFT_VOLUME, 0xc0 },
21479172746SMark Brown 	{ WM8996_DSP1_RX_RIGHT_VOLUME, 0xc0 },
21579172746SMark Brown 	{ WM8996_DSP1_TX_FILTERS, 0x2000 },
21679172746SMark Brown 	{ WM8996_DSP1_RX_FILTERS_1, 0x200 },
21779172746SMark Brown 	{ WM8996_DSP1_RX_FILTERS_2, 0x10 },
21879172746SMark Brown 	{ WM8996_DSP1_DRC_1, 0x98 },
21979172746SMark Brown 	{ WM8996_DSP1_DRC_2, 0x845 },
22079172746SMark Brown 	{ WM8996_DSP1_RX_EQ_GAINS_1, 0x6318 },
22179172746SMark Brown 	{ WM8996_DSP1_RX_EQ_GAINS_2, 0x6300 },
22279172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_1_A, 0xfca },
22379172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_1_B, 0x400 },
22479172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_1_PG, 0xd8 },
22579172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_2_A, 0x1eb5 },
22679172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_2_B, 0xf145 },
22779172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_2_C, 0xb75 },
22879172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_2_PG, 0x1c5 },
22979172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_3_A, 0x1c58 },
23079172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_3_B, 0xf373 },
23179172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_3_C, 0xa54 },
23279172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_3_PG, 0x558 },
23379172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_4_A, 0x168e },
23479172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_4_B, 0xf829 },
23579172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_4_C, 0x7ad },
23679172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_4_PG, 0x1103 },
23779172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_5_A, 0x564 },
23879172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_5_B, 0x559 },
23979172746SMark Brown 	{ WM8996_DSP1_RX_EQ_BAND_5_PG, 0x4000 },
24079172746SMark Brown 	{ WM8996_DSP2_TX_LEFT_VOLUME, 0xc0 },
24179172746SMark Brown 	{ WM8996_DSP2_TX_RIGHT_VOLUME, 0xc0 },
24279172746SMark Brown 	{ WM8996_DSP2_RX_LEFT_VOLUME, 0xc0 },
24379172746SMark Brown 	{ WM8996_DSP2_RX_RIGHT_VOLUME, 0xc0 },
24479172746SMark Brown 	{ WM8996_DSP2_TX_FILTERS, 0x2000 },
24579172746SMark Brown 	{ WM8996_DSP2_RX_FILTERS_1, 0x200 },
24679172746SMark Brown 	{ WM8996_DSP2_RX_FILTERS_2, 0x10 },
24779172746SMark Brown 	{ WM8996_DSP2_DRC_1, 0x98 },
24879172746SMark Brown 	{ WM8996_DSP2_DRC_2, 0x845 },
24979172746SMark Brown 	{ WM8996_DSP2_RX_EQ_GAINS_1, 0x6318 },
25079172746SMark Brown 	{ WM8996_DSP2_RX_EQ_GAINS_2, 0x6300 },
25179172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_1_A, 0xfca },
25279172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_1_B, 0x400 },
25379172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_1_PG, 0xd8 },
25479172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_2_A, 0x1eb5 },
25579172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_2_B, 0xf145 },
25679172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_2_C, 0xb75 },
25779172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_2_PG, 0x1c5 },
25879172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_3_A, 0x1c58 },
25979172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_3_B, 0xf373 },
26079172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_3_C, 0xa54 },
26179172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_3_PG, 0x558 },
26279172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_4_A, 0x168e },
26379172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_4_B, 0xf829 },
26479172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_4_C, 0x7ad },
26579172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_4_PG, 0x1103 },
26679172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_5_A, 0x564 },
26779172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_5_B, 0x559 },
26879172746SMark Brown 	{ WM8996_DSP2_RX_EQ_BAND_5_PG, 0x4000 },
26979172746SMark Brown 	{ WM8996_DAC1_MIXER_VOLUMES, 0x0 },
27079172746SMark Brown 	{ WM8996_DAC1_LEFT_MIXER_ROUTING, 0x0 },
27179172746SMark Brown 	{ WM8996_DAC1_RIGHT_MIXER_ROUTING, 0x0 },
27279172746SMark Brown 	{ WM8996_DAC2_MIXER_VOLUMES, 0x0 },
27379172746SMark Brown 	{ WM8996_DAC2_LEFT_MIXER_ROUTING, 0x0 },
27479172746SMark Brown 	{ WM8996_DAC2_RIGHT_MIXER_ROUTING, 0x0 },
27579172746SMark Brown 	{ WM8996_DSP1_TX_LEFT_MIXER_ROUTING, 0x0 },
27679172746SMark Brown 	{ WM8996_DSP1_TX_RIGHT_MIXER_ROUTING, 0x0 },
27779172746SMark Brown 	{ WM8996_DSP2_TX_LEFT_MIXER_ROUTING, 0x0 },
27879172746SMark Brown 	{ WM8996_DSP2_TX_RIGHT_MIXER_ROUTING, 0x0 },
27979172746SMark Brown 	{ WM8996_DSP_TX_MIXER_SELECT, 0x0 },
28079172746SMark Brown 	{ WM8996_DAC_SOFTMUTE, 0x0 },
28179172746SMark Brown 	{ WM8996_OVERSAMPLING, 0xd },
28279172746SMark Brown 	{ WM8996_SIDETONE, 0x1040 },
28379172746SMark Brown 	{ WM8996_GPIO_1, 0xa101 },
28479172746SMark Brown 	{ WM8996_GPIO_2, 0xa101 },
28579172746SMark Brown 	{ WM8996_GPIO_3, 0xa101 },
28679172746SMark Brown 	{ WM8996_GPIO_4, 0xa101 },
28779172746SMark Brown 	{ WM8996_GPIO_5, 0xa101 },
28879172746SMark Brown 	{ WM8996_PULL_CONTROL_1, 0x0 },
28979172746SMark Brown 	{ WM8996_PULL_CONTROL_2, 0x140 },
29079172746SMark Brown 	{ WM8996_INTERRUPT_STATUS_1_MASK, 0x1f },
29179172746SMark Brown 	{ WM8996_INTERRUPT_STATUS_2_MASK, 0x1ecf },
29279172746SMark Brown 	{ WM8996_LEFT_PDM_SPEAKER, 0x0 },
29379172746SMark Brown 	{ WM8996_RIGHT_PDM_SPEAKER, 0x1 },
29479172746SMark Brown 	{ WM8996_PDM_SPEAKER_MUTE_SEQUENCE, 0x69 },
29579172746SMark Brown 	{ WM8996_PDM_SPEAKER_VOLUME, 0x66 },
296a9ba6151SMark Brown };
297a9ba6151SMark Brown 
298a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(inpga_tlv, 0, 100, 0);
299a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 150, 0);
300a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1);
301a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(out_digital_tlv, -1200, 150, 0);
302a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(out_tlv, -900, 75, 0);
303a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(spk_tlv, -900, 150, 0);
304a9ba6151SMark Brown static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
30518a4eef3Ssusan gao static const DECLARE_TLV_DB_SCALE(threedstereo_tlv, -1600, 183, 1);
306a9ba6151SMark Brown 
307a9ba6151SMark Brown static const char *sidetone_hpf_text[] = {
308a9ba6151SMark Brown 	"2.9kHz", "1.5kHz", "735Hz", "403Hz", "196Hz", "98Hz", "49Hz"
309a9ba6151SMark Brown };
310a9ba6151SMark Brown 
3115cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(sidetone_hpf,
3125cca5a91STakashi Iwai 			    WM8996_SIDETONE, 7, sidetone_hpf_text);
313a9ba6151SMark Brown 
314a9ba6151SMark Brown static const char *hpf_mode_text[] = {
315a9ba6151SMark Brown 	"HiFi", "Custom", "Voice"
316a9ba6151SMark Brown };
317a9ba6151SMark Brown 
3185cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp1tx_hpf_mode,
3195cca5a91STakashi Iwai 			    WM8996_DSP1_TX_FILTERS, 3, hpf_mode_text);
320a9ba6151SMark Brown 
3215cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp2tx_hpf_mode,
3225cca5a91STakashi Iwai 			    WM8996_DSP2_TX_FILTERS, 3, hpf_mode_text);
323a9ba6151SMark Brown 
324a9ba6151SMark Brown static const char *hpf_cutoff_text[] = {
325a9ba6151SMark Brown 	"50Hz", "75Hz", "100Hz", "150Hz", "200Hz", "300Hz", "400Hz"
326a9ba6151SMark Brown };
327a9ba6151SMark Brown 
3285cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp1tx_hpf_cutoff,
3295cca5a91STakashi Iwai 			    WM8996_DSP1_TX_FILTERS, 0, hpf_cutoff_text);
330a9ba6151SMark Brown 
3315cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp2tx_hpf_cutoff,
3325cca5a91STakashi Iwai 			    WM8996_DSP2_TX_FILTERS, 0, hpf_cutoff_text);
333a9ba6151SMark Brown 
wm8996_set_retune_mobile(struct snd_soc_component * component,int block)3345d61ef8bSKuninori Morimoto static void wm8996_set_retune_mobile(struct snd_soc_component *component, int block)
335a9ba6151SMark Brown {
3365d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
337a9ba6151SMark Brown 	struct wm8996_pdata *pdata = &wm8996->pdata;
338a9ba6151SMark Brown 	int base, best, best_val, save, i, cfg, iface;
339a9ba6151SMark Brown 
340a9ba6151SMark Brown 	if (!wm8996->num_retune_mobile_texts)
341a9ba6151SMark Brown 		return;
342a9ba6151SMark Brown 
343a9ba6151SMark Brown 	switch (block) {
344a9ba6151SMark Brown 	case 0:
345a9ba6151SMark Brown 		base = WM8996_DSP1_RX_EQ_GAINS_1;
3466d75dfc3SKuninori Morimoto 		if (snd_soc_component_read(component, WM8996_POWER_MANAGEMENT_8) &
347a9ba6151SMark Brown 		    WM8996_DSP1RX_SRC)
348a9ba6151SMark Brown 			iface = 1;
349a9ba6151SMark Brown 		else
350a9ba6151SMark Brown 			iface = 0;
351a9ba6151SMark Brown 		break;
352a9ba6151SMark Brown 	case 1:
353a9ba6151SMark Brown 		base = WM8996_DSP1_RX_EQ_GAINS_2;
3546d75dfc3SKuninori Morimoto 		if (snd_soc_component_read(component, WM8996_POWER_MANAGEMENT_8) &
355a9ba6151SMark Brown 		    WM8996_DSP2RX_SRC)
356a9ba6151SMark Brown 			iface = 1;
357a9ba6151SMark Brown 		else
358a9ba6151SMark Brown 			iface = 0;
359a9ba6151SMark Brown 		break;
360a9ba6151SMark Brown 	default:
361a9ba6151SMark Brown 		return;
362a9ba6151SMark Brown 	}
363a9ba6151SMark Brown 
364a9ba6151SMark Brown 	/* Find the version of the currently selected configuration
365a9ba6151SMark Brown 	 * with the nearest sample rate. */
366a9ba6151SMark Brown 	cfg = wm8996->retune_mobile_cfg[block];
367a9ba6151SMark Brown 	best = 0;
368a9ba6151SMark Brown 	best_val = INT_MAX;
369a9ba6151SMark Brown 	for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
370a9ba6151SMark Brown 		if (strcmp(pdata->retune_mobile_cfgs[i].name,
371a9ba6151SMark Brown 			   wm8996->retune_mobile_texts[cfg]) == 0 &&
372a9ba6151SMark Brown 		    abs(pdata->retune_mobile_cfgs[i].rate
373a9ba6151SMark Brown 			- wm8996->rx_rate[iface]) < best_val) {
374a9ba6151SMark Brown 			best = i;
375a9ba6151SMark Brown 			best_val = abs(pdata->retune_mobile_cfgs[i].rate
376a9ba6151SMark Brown 				       - wm8996->rx_rate[iface]);
377a9ba6151SMark Brown 		}
378a9ba6151SMark Brown 	}
379a9ba6151SMark Brown 
3805d61ef8bSKuninori Morimoto 	dev_dbg(component->dev, "ReTune Mobile %d %s/%dHz for %dHz sample rate\n",
381a9ba6151SMark Brown 		block,
382a9ba6151SMark Brown 		pdata->retune_mobile_cfgs[best].name,
383a9ba6151SMark Brown 		pdata->retune_mobile_cfgs[best].rate,
384a9ba6151SMark Brown 		wm8996->rx_rate[iface]);
385a9ba6151SMark Brown 
386a9ba6151SMark Brown 	/* The EQ will be disabled while reconfiguring it, remember the
387a9ba6151SMark Brown 	 * current configuration.
388a9ba6151SMark Brown 	 */
3896d75dfc3SKuninori Morimoto 	save = snd_soc_component_read(component, base);
390a9ba6151SMark Brown 	save &= WM8996_DSP1RX_EQ_ENA;
391a9ba6151SMark Brown 
392a9ba6151SMark Brown 	for (i = 0; i < ARRAY_SIZE(pdata->retune_mobile_cfgs[best].regs); i++)
3935d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, base + i, 0xffff,
394a9ba6151SMark Brown 				    pdata->retune_mobile_cfgs[best].regs[i]);
395a9ba6151SMark Brown 
3965d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, base, WM8996_DSP1RX_EQ_ENA, save);
397a9ba6151SMark Brown }
398a9ba6151SMark Brown 
399a9ba6151SMark Brown /* Icky as hell but saves code duplication */
wm8996_get_retune_mobile_block(const char * name)400a9ba6151SMark Brown static int wm8996_get_retune_mobile_block(const char *name)
401a9ba6151SMark Brown {
402a9ba6151SMark Brown 	if (strcmp(name, "DSP1 EQ Mode") == 0)
403a9ba6151SMark Brown 		return 0;
404a9ba6151SMark Brown 	if (strcmp(name, "DSP2 EQ Mode") == 0)
405a9ba6151SMark Brown 		return 1;
406a9ba6151SMark Brown 	return -EINVAL;
407a9ba6151SMark Brown }
408a9ba6151SMark Brown 
wm8996_put_retune_mobile_enum(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)409a9ba6151SMark Brown static int wm8996_put_retune_mobile_enum(struct snd_kcontrol *kcontrol,
410a9ba6151SMark Brown 					 struct snd_ctl_elem_value *ucontrol)
411a9ba6151SMark Brown {
4125d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
4135d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
414a9ba6151SMark Brown 	struct wm8996_pdata *pdata = &wm8996->pdata;
415a9ba6151SMark Brown 	int block = wm8996_get_retune_mobile_block(kcontrol->id.name);
4168293004cSTakashi Iwai 	int value = ucontrol->value.enumerated.item[0];
417a9ba6151SMark Brown 
418a9ba6151SMark Brown 	if (block < 0)
419a9ba6151SMark Brown 		return block;
420a9ba6151SMark Brown 
421a9ba6151SMark Brown 	if (value >= pdata->num_retune_mobile_cfgs)
422a9ba6151SMark Brown 		return -EINVAL;
423a9ba6151SMark Brown 
424a9ba6151SMark Brown 	wm8996->retune_mobile_cfg[block] = value;
425a9ba6151SMark Brown 
4265d61ef8bSKuninori Morimoto 	wm8996_set_retune_mobile(component, block);
427a9ba6151SMark Brown 
428a9ba6151SMark Brown 	return 0;
429a9ba6151SMark Brown }
430a9ba6151SMark Brown 
wm8996_get_retune_mobile_enum(struct snd_kcontrol * kcontrol,struct snd_ctl_elem_value * ucontrol)431a9ba6151SMark Brown static int wm8996_get_retune_mobile_enum(struct snd_kcontrol *kcontrol,
432a9ba6151SMark Brown 					 struct snd_ctl_elem_value *ucontrol)
433a9ba6151SMark Brown {
4345d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
4355d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
436a9ba6151SMark Brown 	int block = wm8996_get_retune_mobile_block(kcontrol->id.name);
437a9ba6151SMark Brown 
438fe329a1aSTakashi Iwai 	if (block < 0)
439fe329a1aSTakashi Iwai 		return block;
440a9ba6151SMark Brown 	ucontrol->value.enumerated.item[0] = wm8996->retune_mobile_cfg[block];
441a9ba6151SMark Brown 
442a9ba6151SMark Brown 	return 0;
443a9ba6151SMark Brown }
444a9ba6151SMark Brown 
445a9ba6151SMark Brown static const struct snd_kcontrol_new wm8996_snd_controls[] = {
446a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Capture Volume", WM8996_LEFT_LINE_INPUT_VOLUME,
447a9ba6151SMark Brown 		 WM8996_RIGHT_LINE_INPUT_VOLUME, 0, 31, 0, inpga_tlv),
448a9ba6151SMark Brown SOC_DOUBLE_R("Capture ZC Switch", WM8996_LEFT_LINE_INPUT_VOLUME,
449a9ba6151SMark Brown 	     WM8996_RIGHT_LINE_INPUT_VOLUME, 5, 1, 0),
450a9ba6151SMark Brown 
451a9ba6151SMark Brown SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8996_DAC1_MIXER_VOLUMES,
452a9ba6151SMark Brown 	       0, 5, 24, 0, sidetone_tlv),
453a9ba6151SMark Brown SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8996_DAC2_MIXER_VOLUMES,
454a9ba6151SMark Brown 	       0, 5, 24, 0, sidetone_tlv),
455a9ba6151SMark Brown SOC_SINGLE("Sidetone LPF Switch", WM8996_SIDETONE, 12, 1, 0),
456a9ba6151SMark Brown SOC_ENUM("Sidetone HPF Cut-off", sidetone_hpf),
457a9ba6151SMark Brown SOC_SINGLE("Sidetone HPF Switch", WM8996_SIDETONE, 6, 1, 0),
458a9ba6151SMark Brown 
459a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP1 Capture Volume", WM8996_DSP1_TX_LEFT_VOLUME,
460a9ba6151SMark Brown 		 WM8996_DSP1_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
461a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP2 Capture Volume", WM8996_DSP2_TX_LEFT_VOLUME,
462a9ba6151SMark Brown 		 WM8996_DSP2_TX_RIGHT_VOLUME, 1, 96, 0, digital_tlv),
463a9ba6151SMark Brown 
464a9ba6151SMark Brown SOC_SINGLE("DSP1 Capture Notch Filter Switch", WM8996_DSP1_TX_FILTERS,
465a9ba6151SMark Brown 	   13, 1, 0),
466a9ba6151SMark Brown SOC_DOUBLE("DSP1 Capture HPF Switch", WM8996_DSP1_TX_FILTERS, 12, 11, 1, 0),
467a9ba6151SMark Brown SOC_ENUM("DSP1 Capture HPF Mode", dsp1tx_hpf_mode),
468a9ba6151SMark Brown SOC_ENUM("DSP1 Capture HPF Cutoff", dsp1tx_hpf_cutoff),
469a9ba6151SMark Brown 
470a9ba6151SMark Brown SOC_SINGLE("DSP2 Capture Notch Filter Switch", WM8996_DSP2_TX_FILTERS,
471a9ba6151SMark Brown 	   13, 1, 0),
472a9ba6151SMark Brown SOC_DOUBLE("DSP2 Capture HPF Switch", WM8996_DSP2_TX_FILTERS, 12, 11, 1, 0),
473a9ba6151SMark Brown SOC_ENUM("DSP2 Capture HPF Mode", dsp2tx_hpf_mode),
474a9ba6151SMark Brown SOC_ENUM("DSP2 Capture HPF Cutoff", dsp2tx_hpf_cutoff),
475a9ba6151SMark Brown 
476a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP1 Playback Volume", WM8996_DSP1_RX_LEFT_VOLUME,
477a9ba6151SMark Brown 		 WM8996_DSP1_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
478a9ba6151SMark Brown SOC_SINGLE("DSP1 Playback Switch", WM8996_DSP1_RX_FILTERS_1, 9, 1, 1),
479a9ba6151SMark Brown 
480a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DSP2 Playback Volume", WM8996_DSP2_RX_LEFT_VOLUME,
481a9ba6151SMark Brown 		 WM8996_DSP2_RX_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
482a9ba6151SMark Brown SOC_SINGLE("DSP2 Playback Switch", WM8996_DSP2_RX_FILTERS_1, 9, 1, 1),
483a9ba6151SMark Brown 
484a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DAC1 Volume", WM8996_DAC1_LEFT_VOLUME,
485a9ba6151SMark Brown 		 WM8996_DAC1_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
486a9ba6151SMark Brown SOC_DOUBLE_R("DAC1 Switch", WM8996_DAC1_LEFT_VOLUME,
487a9ba6151SMark Brown 	     WM8996_DAC1_RIGHT_VOLUME, 9, 1, 1),
488a9ba6151SMark Brown 
489a9ba6151SMark Brown SOC_DOUBLE_R_TLV("DAC2 Volume", WM8996_DAC2_LEFT_VOLUME,
490a9ba6151SMark Brown 		 WM8996_DAC2_RIGHT_VOLUME, 1, 112, 0, digital_tlv),
491a9ba6151SMark Brown SOC_DOUBLE_R("DAC2 Switch", WM8996_DAC2_LEFT_VOLUME,
492a9ba6151SMark Brown 	     WM8996_DAC2_RIGHT_VOLUME, 9, 1, 1),
493a9ba6151SMark Brown 
494a9ba6151SMark Brown SOC_SINGLE("Speaker High Performance Switch", WM8996_OVERSAMPLING, 3, 1, 0),
495a9ba6151SMark Brown SOC_SINGLE("DMIC High Performance Switch", WM8996_OVERSAMPLING, 2, 1, 0),
496a9ba6151SMark Brown SOC_SINGLE("ADC High Performance Switch", WM8996_OVERSAMPLING, 1, 1, 0),
497a9ba6151SMark Brown SOC_SINGLE("DAC High Performance Switch", WM8996_OVERSAMPLING, 0, 1, 0),
498a9ba6151SMark Brown 
499a9ba6151SMark Brown SOC_SINGLE("DAC Soft Mute Switch", WM8996_DAC_SOFTMUTE, 1, 1, 0),
500a9ba6151SMark Brown SOC_SINGLE("DAC Slow Soft Mute Switch", WM8996_DAC_SOFTMUTE, 0, 1, 0),
501a9ba6151SMark Brown 
50218a4eef3Ssusan gao SOC_SINGLE("DSP1 3D Stereo Switch", WM8996_DSP1_RX_FILTERS_2, 8, 1, 0),
50318a4eef3Ssusan gao SOC_SINGLE("DSP2 3D Stereo Switch", WM8996_DSP2_RX_FILTERS_2, 8, 1, 0),
50418a4eef3Ssusan gao 
50518a4eef3Ssusan gao SOC_SINGLE_TLV("DSP1 3D Stereo Volume", WM8996_DSP1_RX_FILTERS_2, 10, 15,
50618a4eef3Ssusan gao 		0, threedstereo_tlv),
50718a4eef3Ssusan gao SOC_SINGLE_TLV("DSP2 3D Stereo Volume", WM8996_DSP2_RX_FILTERS_2, 10, 15,
50818a4eef3Ssusan gao 		0, threedstereo_tlv),
50918a4eef3Ssusan gao 
510a9ba6151SMark Brown SOC_DOUBLE_TLV("Digital Output 1 Volume", WM8996_DAC1_HPOUT1_VOLUME, 0, 4,
511a9ba6151SMark Brown 	       8, 0, out_digital_tlv),
512a9ba6151SMark Brown SOC_DOUBLE_TLV("Digital Output 2 Volume", WM8996_DAC2_HPOUT2_VOLUME, 0, 4,
513a9ba6151SMark Brown 	       8, 0, out_digital_tlv),
514a9ba6151SMark Brown 
515a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Output 1 Volume", WM8996_OUTPUT1_LEFT_VOLUME,
516a9ba6151SMark Brown 		 WM8996_OUTPUT1_RIGHT_VOLUME, 0, 12, 0, out_tlv),
517a9ba6151SMark Brown SOC_DOUBLE_R("Output 1 ZC Switch",  WM8996_OUTPUT1_LEFT_VOLUME,
518a9ba6151SMark Brown 	     WM8996_OUTPUT1_RIGHT_VOLUME, 7, 1, 0),
519a9ba6151SMark Brown 
520a9ba6151SMark Brown SOC_DOUBLE_R_TLV("Output 2 Volume", WM8996_OUTPUT2_LEFT_VOLUME,
521a9ba6151SMark Brown 		 WM8996_OUTPUT2_RIGHT_VOLUME, 0, 12, 0, out_tlv),
522a9ba6151SMark Brown SOC_DOUBLE_R("Output 2 ZC Switch",  WM8996_OUTPUT2_LEFT_VOLUME,
523a9ba6151SMark Brown 	     WM8996_OUTPUT2_RIGHT_VOLUME, 7, 1, 0),
524a9ba6151SMark Brown 
525a9ba6151SMark Brown SOC_DOUBLE_TLV("Speaker Volume", WM8996_PDM_SPEAKER_VOLUME, 0, 4, 8, 0,
526a9ba6151SMark Brown 	       spk_tlv),
527a9ba6151SMark Brown SOC_DOUBLE_R("Speaker Switch", WM8996_LEFT_PDM_SPEAKER,
528a9ba6151SMark Brown 	     WM8996_RIGHT_PDM_SPEAKER, 3, 1, 1),
529a9ba6151SMark Brown SOC_DOUBLE_R("Speaker ZC Switch", WM8996_LEFT_PDM_SPEAKER,
530a9ba6151SMark Brown 	     WM8996_RIGHT_PDM_SPEAKER, 2, 1, 0),
531a9ba6151SMark Brown 
532a9ba6151SMark Brown SOC_SINGLE("DSP1 EQ Switch", WM8996_DSP1_RX_EQ_GAINS_1, 0, 1, 0),
533a9ba6151SMark Brown SOC_SINGLE("DSP2 EQ Switch", WM8996_DSP2_RX_EQ_GAINS_1, 0, 1, 0),
534bcec267aSKarl Tsou 
535bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC TXL Switch", WM8996_DSP1_DRC_1, 0, 1, 0),
536bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC TXR Switch", WM8996_DSP1_DRC_1, 1, 1, 0),
537bcec267aSKarl Tsou SOC_SINGLE("DSP1 DRC RX Switch", WM8996_DSP1_DRC_1, 2, 1, 0),
53829e3cc15SMark Brown SND_SOC_BYTES_MASK("DSP1 DRC", WM8996_DSP1_DRC_1, 5,
53929e3cc15SMark Brown 		   WM8996_DSP1RX_DRC_ENA | WM8996_DSP1TXL_DRC_ENA |
54029e3cc15SMark Brown 		   WM8996_DSP1TXR_DRC_ENA),
541bcec267aSKarl Tsou 
542bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC TXL Switch", WM8996_DSP2_DRC_1, 0, 1, 0),
543bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC TXR Switch", WM8996_DSP2_DRC_1, 1, 1, 0),
544bcec267aSKarl Tsou SOC_SINGLE("DSP2 DRC RX Switch", WM8996_DSP2_DRC_1, 2, 1, 0),
54529e3cc15SMark Brown SND_SOC_BYTES_MASK("DSP2 DRC", WM8996_DSP2_DRC_1, 5,
54629e3cc15SMark Brown 		   WM8996_DSP2RX_DRC_ENA | WM8996_DSP2TXL_DRC_ENA |
54729e3cc15SMark Brown 		   WM8996_DSP2TXR_DRC_ENA),
548a9ba6151SMark Brown };
549a9ba6151SMark Brown 
550a9ba6151SMark Brown static const struct snd_kcontrol_new wm8996_eq_controls[] = {
551a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B1 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 11, 31, 0,
552a9ba6151SMark Brown 	       eq_tlv),
553a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B2 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 6, 31, 0,
554a9ba6151SMark Brown 	       eq_tlv),
555a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B3 Volume", WM8996_DSP1_RX_EQ_GAINS_1, 1, 31, 0,
556a9ba6151SMark Brown 	       eq_tlv),
557a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B4 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 11, 31, 0,
558a9ba6151SMark Brown 	       eq_tlv),
559a9ba6151SMark Brown SOC_SINGLE_TLV("DSP1 EQ B5 Volume", WM8996_DSP1_RX_EQ_GAINS_2, 6, 31, 0,
560a9ba6151SMark Brown 	       eq_tlv),
561a9ba6151SMark Brown 
562a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B1 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 11, 31, 0,
563a9ba6151SMark Brown 	       eq_tlv),
564a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B2 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 6, 31, 0,
565a9ba6151SMark Brown 	       eq_tlv),
566a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B3 Volume", WM8996_DSP2_RX_EQ_GAINS_1, 1, 31, 0,
567a9ba6151SMark Brown 	       eq_tlv),
568a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B4 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 11, 31, 0,
569a9ba6151SMark Brown 	       eq_tlv),
570a9ba6151SMark Brown SOC_SINGLE_TLV("DSP2 EQ B5 Volume", WM8996_DSP2_RX_EQ_GAINS_2, 6, 31, 0,
571a9ba6151SMark Brown 	       eq_tlv),
572a9ba6151SMark Brown };
573a9ba6151SMark Brown 
wm8996_bg_enable(struct snd_soc_component * component)5745d61ef8bSKuninori Morimoto static void wm8996_bg_enable(struct snd_soc_component *component)
575ded71dcbSMark Brown {
5765d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
577ded71dcbSMark Brown 
578ded71dcbSMark Brown 	wm8996->bg_ena++;
579ded71dcbSMark Brown 	if (wm8996->bg_ena == 1) {
5805d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_POWER_MANAGEMENT_1,
581ded71dcbSMark Brown 				    WM8996_BG_ENA, WM8996_BG_ENA);
582ded71dcbSMark Brown 		msleep(2);
583ded71dcbSMark Brown 	}
584ded71dcbSMark Brown }
585ded71dcbSMark Brown 
wm8996_bg_disable(struct snd_soc_component * component)5865d61ef8bSKuninori Morimoto static void wm8996_bg_disable(struct snd_soc_component *component)
587ded71dcbSMark Brown {
5885d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
589ded71dcbSMark Brown 
590ded71dcbSMark Brown 	wm8996->bg_ena--;
591ded71dcbSMark Brown 	if (!wm8996->bg_ena)
5925d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_POWER_MANAGEMENT_1,
593ded71dcbSMark Brown 				    WM8996_BG_ENA, 0);
594ded71dcbSMark Brown }
595ded71dcbSMark Brown 
bg_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)5968259df12SMark Brown static int bg_event(struct snd_soc_dapm_widget *w,
5978259df12SMark Brown 		    struct snd_kcontrol *kcontrol, int event)
5988259df12SMark Brown {
5995d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
6008259df12SMark Brown 	int ret = 0;
6018259df12SMark Brown 
6028259df12SMark Brown 	switch (event) {
603ded71dcbSMark Brown 	case SND_SOC_DAPM_PRE_PMU:
6045d61ef8bSKuninori Morimoto 		wm8996_bg_enable(component);
605ded71dcbSMark Brown 		break;
606ded71dcbSMark Brown 	case SND_SOC_DAPM_POST_PMD:
6075d61ef8bSKuninori Morimoto 		wm8996_bg_disable(component);
6088259df12SMark Brown 		break;
6098259df12SMark Brown 	default:
610d8e9a544STakashi Iwai 		WARN(1, "Invalid event %d\n", event);
6118259df12SMark Brown 		ret = -EINVAL;
6128259df12SMark Brown 	}
6138259df12SMark Brown 
6148259df12SMark Brown 	return ret;
6158259df12SMark Brown }
6168259df12SMark Brown 
cp_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)617a9ba6151SMark Brown static int cp_event(struct snd_soc_dapm_widget *w,
618a9ba6151SMark Brown 		    struct snd_kcontrol *kcontrol, int event)
619a9ba6151SMark Brown {
620a9ba6151SMark Brown 	switch (event) {
621a9ba6151SMark Brown 	case SND_SOC_DAPM_POST_PMU:
622a9ba6151SMark Brown 		msleep(5);
623a9ba6151SMark Brown 		break;
624a9ba6151SMark Brown 	default:
625d8e9a544STakashi Iwai 		WARN(1, "Invalid event %d\n", event);
626a9ba6151SMark Brown 	}
627a9ba6151SMark Brown 
6284a086e4cSMark Brown 	return 0;
629a9ba6151SMark Brown }
630a9ba6151SMark Brown 
rmv_short_event(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)631a9ba6151SMark Brown static int rmv_short_event(struct snd_soc_dapm_widget *w,
632a9ba6151SMark Brown 			   struct snd_kcontrol *kcontrol, int event)
633a9ba6151SMark Brown {
6345d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
6355d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
636a9ba6151SMark Brown 
637a9ba6151SMark Brown 	/* Record which outputs we enabled */
638a9ba6151SMark Brown 	switch (event) {
639a9ba6151SMark Brown 	case SND_SOC_DAPM_PRE_PMD:
640a9ba6151SMark Brown 		wm8996->hpout_pending &= ~w->shift;
641a9ba6151SMark Brown 		break;
642a9ba6151SMark Brown 	case SND_SOC_DAPM_PRE_PMU:
643a9ba6151SMark Brown 		wm8996->hpout_pending |= w->shift;
644a9ba6151SMark Brown 		break;
645a9ba6151SMark Brown 	default:
646d8e9a544STakashi Iwai 		WARN(1, "Invalid event %d\n", event);
647a9ba6151SMark Brown 		return -EINVAL;
648a9ba6151SMark Brown 	}
649a9ba6151SMark Brown 
650a9ba6151SMark Brown 	return 0;
651a9ba6151SMark Brown }
652a9ba6151SMark Brown 
wait_for_dc_servo(struct snd_soc_component * component,u16 mask)6535d61ef8bSKuninori Morimoto static void wait_for_dc_servo(struct snd_soc_component *component, u16 mask)
654a9ba6151SMark Brown {
6555d61ef8bSKuninori Morimoto 	struct i2c_client *i2c = to_i2c_client(component->dev);
6565d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
657f998f257SMark Brown 	int ret;
658a9ba6151SMark Brown 	unsigned long timeout = 200;
659a9ba6151SMark Brown 
6605d61ef8bSKuninori Morimoto 	snd_soc_component_write(component, WM8996_DC_SERVO_2, mask);
661a9ba6151SMark Brown 
662a9ba6151SMark Brown 	/* Use the interrupt if possible */
663a9ba6151SMark Brown 	do {
664a9ba6151SMark Brown 		if (i2c->irq) {
665a9ba6151SMark Brown 			timeout = wait_for_completion_timeout(&wm8996->dcs_done,
666a9ba6151SMark Brown 							      msecs_to_jiffies(200));
667a9ba6151SMark Brown 			if (timeout == 0)
6685d61ef8bSKuninori Morimoto 				dev_err(component->dev, "DC servo timed out\n");
669a9ba6151SMark Brown 
670a9ba6151SMark Brown 		} else {
671a9ba6151SMark Brown 			msleep(1);
672f998f257SMark Brown 			timeout--;
673a9ba6151SMark Brown 		}
674a9ba6151SMark Brown 
6756d75dfc3SKuninori Morimoto 		ret = snd_soc_component_read(component, WM8996_DC_SERVO_2);
6765d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "DC servo state: %x\n", ret);
677f998f257SMark Brown 	} while (timeout && ret & mask);
678a9ba6151SMark Brown 
679a9ba6151SMark Brown 	if (timeout == 0)
6805d61ef8bSKuninori Morimoto 		dev_err(component->dev, "DC servo timed out for %x\n", mask);
681a9ba6151SMark Brown 	else
6825d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "DC servo complete for %x\n", mask);
683a9ba6151SMark Brown }
684a9ba6151SMark Brown 
wm8996_seq_notifier(struct snd_soc_component * component,enum snd_soc_dapm_type event,int subseq)6855d61ef8bSKuninori Morimoto static void wm8996_seq_notifier(struct snd_soc_component *component,
686a9ba6151SMark Brown 				enum snd_soc_dapm_type event, int subseq)
687a9ba6151SMark Brown {
6885d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
689a9ba6151SMark Brown 	u16 val, mask;
690a9ba6151SMark Brown 
691a9ba6151SMark Brown 	/* Complete any pending DC servo starts */
692a9ba6151SMark Brown 	if (wm8996->dcs_pending) {
6935d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "Starting DC servo for %x\n",
694a9ba6151SMark Brown 			wm8996->dcs_pending);
695a9ba6151SMark Brown 
696a9ba6151SMark Brown 		/* Trigger a startup sequence */
6975d61ef8bSKuninori Morimoto 		wait_for_dc_servo(component, wm8996->dcs_pending
698a9ba6151SMark Brown 				         << WM8996_DCS_TRIG_STARTUP_0_SHIFT);
699a9ba6151SMark Brown 
700a9ba6151SMark Brown 		wm8996->dcs_pending = 0;
701a9ba6151SMark Brown 	}
702a9ba6151SMark Brown 
703a9ba6151SMark Brown 	if (wm8996->hpout_pending != wm8996->hpout_ena) {
7045d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "Applying RMV_SHORTs %x->%x\n",
705a9ba6151SMark Brown 			wm8996->hpout_ena, wm8996->hpout_pending);
706a9ba6151SMark Brown 
707a9ba6151SMark Brown 		val = 0;
708a9ba6151SMark Brown 		mask = 0;
709a9ba6151SMark Brown 		if (wm8996->hpout_pending & HPOUT1L) {
7105b596483SMark Brown 			val |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP;
7115b596483SMark Brown 			mask |= WM8996_HPOUT1L_RMV_SHORT | WM8996_HPOUT1L_OUTP;
712a9ba6151SMark Brown 		} else {
713a9ba6151SMark Brown 			mask |= WM8996_HPOUT1L_RMV_SHORT |
714a9ba6151SMark Brown 				WM8996_HPOUT1L_OUTP |
715a9ba6151SMark Brown 				WM8996_HPOUT1L_DLY;
716a9ba6151SMark Brown 		}
717a9ba6151SMark Brown 
718a9ba6151SMark Brown 		if (wm8996->hpout_pending & HPOUT1R) {
7195b596483SMark Brown 			val |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP;
7205b596483SMark Brown 			mask |= WM8996_HPOUT1R_RMV_SHORT | WM8996_HPOUT1R_OUTP;
721a9ba6151SMark Brown 		} else {
722a9ba6151SMark Brown 			mask |= WM8996_HPOUT1R_RMV_SHORT |
723a9ba6151SMark Brown 				WM8996_HPOUT1R_OUTP |
724a9ba6151SMark Brown 				WM8996_HPOUT1R_DLY;
725a9ba6151SMark Brown 		}
726a9ba6151SMark Brown 
7275d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_ANALOGUE_HP_1, mask, val);
728a9ba6151SMark Brown 
729a9ba6151SMark Brown 		val = 0;
730a9ba6151SMark Brown 		mask = 0;
731a9ba6151SMark Brown 		if (wm8996->hpout_pending & HPOUT2L) {
7325b596483SMark Brown 			val |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP;
7335b596483SMark Brown 			mask |= WM8996_HPOUT2L_RMV_SHORT | WM8996_HPOUT2L_OUTP;
734a9ba6151SMark Brown 		} else {
735a9ba6151SMark Brown 			mask |= WM8996_HPOUT2L_RMV_SHORT |
736a9ba6151SMark Brown 				WM8996_HPOUT2L_OUTP |
737a9ba6151SMark Brown 				WM8996_HPOUT2L_DLY;
738a9ba6151SMark Brown 		}
739a9ba6151SMark Brown 
740a9ba6151SMark Brown 		if (wm8996->hpout_pending & HPOUT2R) {
7415b596483SMark Brown 			val |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP;
7425b596483SMark Brown 			mask |= WM8996_HPOUT2R_RMV_SHORT | WM8996_HPOUT2R_OUTP;
743a9ba6151SMark Brown 		} else {
744a9ba6151SMark Brown 			mask |= WM8996_HPOUT2R_RMV_SHORT |
745a9ba6151SMark Brown 				WM8996_HPOUT2R_OUTP |
746a9ba6151SMark Brown 				WM8996_HPOUT2R_DLY;
747a9ba6151SMark Brown 		}
748a9ba6151SMark Brown 
7495d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_ANALOGUE_HP_2, mask, val);
750a9ba6151SMark Brown 
751a9ba6151SMark Brown 		wm8996->hpout_ena = wm8996->hpout_pending;
752a9ba6151SMark Brown 	}
753a9ba6151SMark Brown }
754a9ba6151SMark Brown 
dcs_start(struct snd_soc_dapm_widget * w,struct snd_kcontrol * kcontrol,int event)755a9ba6151SMark Brown static int dcs_start(struct snd_soc_dapm_widget *w,
756a9ba6151SMark Brown 		     struct snd_kcontrol *kcontrol, int event)
757a9ba6151SMark Brown {
7585d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
7595d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
760a9ba6151SMark Brown 
761a9ba6151SMark Brown 	switch (event) {
762a9ba6151SMark Brown 	case SND_SOC_DAPM_POST_PMU:
763a9ba6151SMark Brown 		wm8996->dcs_pending |= 1 << w->shift;
764a9ba6151SMark Brown 		break;
765a9ba6151SMark Brown 	default:
766d8e9a544STakashi Iwai 		WARN(1, "Invalid event %d\n", event);
767a9ba6151SMark Brown 		return -EINVAL;
768a9ba6151SMark Brown 	}
769a9ba6151SMark Brown 
770a9ba6151SMark Brown 	return 0;
771a9ba6151SMark Brown }
772a9ba6151SMark Brown 
773a9ba6151SMark Brown static const char *sidetone_text[] = {
774a9ba6151SMark Brown 	"IN1", "IN2",
775a9ba6151SMark Brown };
776a9ba6151SMark Brown 
7775cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(left_sidetone_enum,
7785cca5a91STakashi Iwai 			    WM8996_SIDETONE, 0, sidetone_text);
779a9ba6151SMark Brown 
780a9ba6151SMark Brown static const struct snd_kcontrol_new left_sidetone =
781a9ba6151SMark Brown 	SOC_DAPM_ENUM("Left Sidetone", left_sidetone_enum);
782a9ba6151SMark Brown 
7835cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(right_sidetone_enum,
7845cca5a91STakashi Iwai 			    WM8996_SIDETONE, 1, sidetone_text);
785a9ba6151SMark Brown 
786a9ba6151SMark Brown static const struct snd_kcontrol_new right_sidetone =
787a9ba6151SMark Brown 	SOC_DAPM_ENUM("Right Sidetone", right_sidetone_enum);
788a9ba6151SMark Brown 
789a9ba6151SMark Brown static const char *spk_text[] = {
790a9ba6151SMark Brown 	"DAC1L", "DAC1R", "DAC2L", "DAC2R"
791a9ba6151SMark Brown };
792a9ba6151SMark Brown 
7935cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(spkl_enum,
7945cca5a91STakashi Iwai 			    WM8996_LEFT_PDM_SPEAKER, 0, spk_text);
795a9ba6151SMark Brown 
796a9ba6151SMark Brown static const struct snd_kcontrol_new spkl_mux =
797a9ba6151SMark Brown 	SOC_DAPM_ENUM("SPKL", spkl_enum);
798a9ba6151SMark Brown 
7995cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(spkr_enum,
8005cca5a91STakashi Iwai 			    WM8996_RIGHT_PDM_SPEAKER, 0, spk_text);
801a9ba6151SMark Brown 
802a9ba6151SMark Brown static const struct snd_kcontrol_new spkr_mux =
803a9ba6151SMark Brown 	SOC_DAPM_ENUM("SPKR", spkr_enum);
804a9ba6151SMark Brown 
805a9ba6151SMark Brown static const char *dsp1rx_text[] = {
806a9ba6151SMark Brown 	"AIF1", "AIF2"
807a9ba6151SMark Brown };
808a9ba6151SMark Brown 
8095cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp1rx_enum,
8105cca5a91STakashi Iwai 			    WM8996_POWER_MANAGEMENT_8, 0, dsp1rx_text);
811a9ba6151SMark Brown 
812a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1rx =
813a9ba6151SMark Brown 	SOC_DAPM_ENUM("DSP1RX", dsp1rx_enum);
814a9ba6151SMark Brown 
815a9ba6151SMark Brown static const char *dsp2rx_text[] = {
816a9ba6151SMark Brown 	 "AIF2", "AIF1"
817a9ba6151SMark Brown };
818a9ba6151SMark Brown 
8195cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(dsp2rx_enum,
8205cca5a91STakashi Iwai 			    WM8996_POWER_MANAGEMENT_8, 4, dsp2rx_text);
821a9ba6151SMark Brown 
822a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2rx =
823a9ba6151SMark Brown 	SOC_DAPM_ENUM("DSP2RX", dsp2rx_enum);
824a9ba6151SMark Brown 
825a9ba6151SMark Brown static const char *aif2tx_text[] = {
826a9ba6151SMark Brown 	"DSP2", "DSP1", "AIF1"
827a9ba6151SMark Brown };
828a9ba6151SMark Brown 
8295cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(aif2tx_enum,
8305cca5a91STakashi Iwai 			    WM8996_POWER_MANAGEMENT_8, 6, aif2tx_text);
831a9ba6151SMark Brown 
832a9ba6151SMark Brown static const struct snd_kcontrol_new aif2tx =
833a9ba6151SMark Brown 	SOC_DAPM_ENUM("AIF2TX", aif2tx_enum);
834a9ba6151SMark Brown 
835a9ba6151SMark Brown static const char *inmux_text[] = {
836a9ba6151SMark Brown 	"ADC", "DMIC1", "DMIC2"
837a9ba6151SMark Brown };
838a9ba6151SMark Brown 
8395cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(in1_enum,
8405cca5a91STakashi Iwai 			    WM8996_POWER_MANAGEMENT_7, 0, inmux_text);
841a9ba6151SMark Brown 
842a9ba6151SMark Brown static const struct snd_kcontrol_new in1_mux =
843a9ba6151SMark Brown 	SOC_DAPM_ENUM("IN1 Mux", in1_enum);
844a9ba6151SMark Brown 
8455cca5a91STakashi Iwai static SOC_ENUM_SINGLE_DECL(in2_enum,
8465cca5a91STakashi Iwai 			    WM8996_POWER_MANAGEMENT_7, 4, inmux_text);
847a9ba6151SMark Brown 
848a9ba6151SMark Brown static const struct snd_kcontrol_new in2_mux =
849a9ba6151SMark Brown 	SOC_DAPM_ENUM("IN2 Mux", in2_enum);
850a9ba6151SMark Brown 
851a9ba6151SMark Brown static const struct snd_kcontrol_new dac2r_mix[] = {
852a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING,
853a9ba6151SMark Brown 		5, 1, 0),
854a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING,
855a9ba6151SMark Brown 		4, 1, 0),
856a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 1, 1, 0),
857a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_RIGHT_MIXER_ROUTING, 0, 1, 0),
858a9ba6151SMark Brown };
859a9ba6151SMark Brown 
860a9ba6151SMark Brown static const struct snd_kcontrol_new dac2l_mix[] = {
861a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING,
862a9ba6151SMark Brown 		5, 1, 0),
863a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC2_LEFT_MIXER_ROUTING,
864a9ba6151SMark Brown 		4, 1, 0),
865a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 1, 1, 0),
866a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC2_LEFT_MIXER_ROUTING, 0, 1, 0),
867a9ba6151SMark Brown };
868a9ba6151SMark Brown 
869a9ba6151SMark Brown static const struct snd_kcontrol_new dac1r_mix[] = {
870a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING,
871a9ba6151SMark Brown 		5, 1, 0),
872a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING,
873a9ba6151SMark Brown 		4, 1, 0),
874a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 1, 1, 0),
875a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_RIGHT_MIXER_ROUTING, 0, 1, 0),
876a9ba6151SMark Brown };
877a9ba6151SMark Brown 
878a9ba6151SMark Brown static const struct snd_kcontrol_new dac1l_mix[] = {
879a9ba6151SMark Brown SOC_DAPM_SINGLE("Right Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING,
880a9ba6151SMark Brown 		5, 1, 0),
881a9ba6151SMark Brown SOC_DAPM_SINGLE("Left Sidetone Switch", WM8996_DAC1_LEFT_MIXER_ROUTING,
882a9ba6151SMark Brown 		4, 1, 0),
883a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP2 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 1, 1, 0),
884a9ba6151SMark Brown SOC_DAPM_SINGLE("DSP1 Switch", WM8996_DAC1_LEFT_MIXER_ROUTING, 0, 1, 0),
885a9ba6151SMark Brown };
886a9ba6151SMark Brown 
887a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1txl[] = {
888a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING,
889a9ba6151SMark Brown 		1, 1, 0),
890a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_LEFT_MIXER_ROUTING,
891a9ba6151SMark Brown 		0, 1, 0),
892a9ba6151SMark Brown };
893a9ba6151SMark Brown 
894a9ba6151SMark Brown static const struct snd_kcontrol_new dsp1txr[] = {
895a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING,
896a9ba6151SMark Brown 		1, 1, 0),
897a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP1_TX_RIGHT_MIXER_ROUTING,
898a9ba6151SMark Brown 		0, 1, 0),
899a9ba6151SMark Brown };
900a9ba6151SMark Brown 
901a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2txl[] = {
902a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING,
903a9ba6151SMark Brown 		1, 1, 0),
904a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_LEFT_MIXER_ROUTING,
905a9ba6151SMark Brown 		0, 1, 0),
906a9ba6151SMark Brown };
907a9ba6151SMark Brown 
908a9ba6151SMark Brown static const struct snd_kcontrol_new dsp2txr[] = {
909a9ba6151SMark Brown SOC_DAPM_SINGLE("IN1 Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING,
910a9ba6151SMark Brown 		1, 1, 0),
911a9ba6151SMark Brown SOC_DAPM_SINGLE("DAC Switch", WM8996_DSP2_TX_RIGHT_MIXER_ROUTING,
912a9ba6151SMark Brown 		0, 1, 0),
913a9ba6151SMark Brown };
914a9ba6151SMark Brown 
915a9ba6151SMark Brown 
916a9ba6151SMark Brown static const struct snd_soc_dapm_widget wm8996_dapm_widgets[] = {
917a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1LN"),
918a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1LP"),
919a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1RN"),
920a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN1RP"),
921a9ba6151SMark Brown 
922a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2LN"),
923a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2LP"),
924a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2RN"),
925a9ba6151SMark Brown SND_SOC_DAPM_INPUT("IN2RP"),
926a9ba6151SMark Brown 
927a9ba6151SMark Brown SND_SOC_DAPM_INPUT("DMIC1DAT"),
928a9ba6151SMark Brown SND_SOC_DAPM_INPUT("DMIC2DAT"),
929a9ba6151SMark Brown 
930822b4b8dSMark Brown SND_SOC_DAPM_REGULATOR_SUPPLY("CPVDD", 20, 0),
931a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("SYSCLK", 1, WM8996_AIF_CLOCKING_1, 0, 0, NULL, 0),
932a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("SYSDSPCLK", 2, WM8996_CLOCKING_1, 1, 0, NULL, 0),
933a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("AIFCLK", 2, WM8996_CLOCKING_1, 2, 0, NULL, 0),
934a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY_S("Charge Pump", 2, WM8996_CHARGE_PUMP_1, 15, 0, cp_event,
9354a086e4cSMark Brown 		      SND_SOC_DAPM_POST_PMU),
936ded71dcbSMark Brown SND_SOC_DAPM_SUPPLY("Bandgap", SND_SOC_NOPM, 0, 0, bg_event,
937ded71dcbSMark Brown 		    SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMD),
938a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("LDO2", WM8996_POWER_MANAGEMENT_2, 1, 0, NULL, 0),
939889c85c5SMark Brown SND_SOC_DAPM_SUPPLY("MICB1 Audio", WM8996_MICBIAS_1, 4, 1, NULL, 0),
940889c85c5SMark Brown SND_SOC_DAPM_SUPPLY("MICB2 Audio", WM8996_MICBIAS_2, 4, 1, NULL, 0),
941a9ba6151SMark Brown SND_SOC_DAPM_MICBIAS("MICB2", WM8996_POWER_MANAGEMENT_1, 9, 0),
942a9ba6151SMark Brown SND_SOC_DAPM_MICBIAS("MICB1", WM8996_POWER_MANAGEMENT_1, 8, 0),
943a9ba6151SMark Brown 
944a9ba6151SMark Brown SND_SOC_DAPM_PGA("IN1L PGA", WM8996_POWER_MANAGEMENT_2, 5, 0, NULL, 0),
945a9ba6151SMark Brown SND_SOC_DAPM_PGA("IN1R PGA", WM8996_POWER_MANAGEMENT_2, 4, 0, NULL, 0),
946a9ba6151SMark Brown 
9477691cd74SMark Brown SND_SOC_DAPM_MUX("IN1L Mux", WM8996_POWER_MANAGEMENT_7, 2, 0, &in1_mux),
9487691cd74SMark Brown SND_SOC_DAPM_MUX("IN1R Mux", WM8996_POWER_MANAGEMENT_7, 3, 0, &in1_mux),
9497691cd74SMark Brown SND_SOC_DAPM_MUX("IN2L Mux", WM8996_POWER_MANAGEMENT_7, 6, 0, &in2_mux),
9507691cd74SMark Brown SND_SOC_DAPM_MUX("IN2R Mux", WM8996_POWER_MANAGEMENT_7, 7, 0, &in2_mux),
951a9ba6151SMark Brown 
952a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("DMIC2", WM8996_POWER_MANAGEMENT_7, 9, 0, NULL, 0),
953a9ba6151SMark Brown SND_SOC_DAPM_SUPPLY("DMIC1", WM8996_POWER_MANAGEMENT_7, 8, 0, NULL, 0),
954a9ba6151SMark Brown 
955a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8996_POWER_MANAGEMENT_3, 5, 0),
956a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8996_POWER_MANAGEMENT_3, 4, 0),
957a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8996_POWER_MANAGEMENT_3, 3, 0),
958a9ba6151SMark Brown SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8996_POWER_MANAGEMENT_3, 2, 0),
959a9ba6151SMark Brown 
960a9ba6151SMark Brown SND_SOC_DAPM_ADC("ADCL", NULL, WM8996_POWER_MANAGEMENT_3, 1, 0),
961a9ba6151SMark Brown SND_SOC_DAPM_ADC("ADCR", NULL, WM8996_POWER_MANAGEMENT_3, 0, 0),
962a9ba6151SMark Brown 
963a9ba6151SMark Brown SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &left_sidetone),
964a9ba6151SMark Brown SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &right_sidetone),
965a9ba6151SMark Brown 
966a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP2RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 11, 0),
967a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP2RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 10, 0),
968a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP1RXL", NULL, 0, WM8996_POWER_MANAGEMENT_3, 9, 0),
969a9ba6151SMark Brown SND_SOC_DAPM_AIF_IN("DSP1RXR", NULL, 1, WM8996_POWER_MANAGEMENT_3, 8, 0),
970a9ba6151SMark Brown 
971a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP2TXL", WM8996_POWER_MANAGEMENT_5, 11, 0,
972a9ba6151SMark Brown 		   dsp2txl, ARRAY_SIZE(dsp2txl)),
973a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP2TXR", WM8996_POWER_MANAGEMENT_5, 10, 0,
974a9ba6151SMark Brown 		   dsp2txr, ARRAY_SIZE(dsp2txr)),
975a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP1TXL", WM8996_POWER_MANAGEMENT_5, 9, 0,
976a9ba6151SMark Brown 		   dsp1txl, ARRAY_SIZE(dsp1txl)),
977a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DSP1TXR", WM8996_POWER_MANAGEMENT_5, 8, 0,
978a9ba6151SMark Brown 		   dsp1txr, ARRAY_SIZE(dsp1txr)),
979a9ba6151SMark Brown 
980a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC2L Mixer", SND_SOC_NOPM, 0, 0,
981a9ba6151SMark Brown 		   dac2l_mix, ARRAY_SIZE(dac2l_mix)),
982a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC2R Mixer", SND_SOC_NOPM, 0, 0,
983a9ba6151SMark Brown 		   dac2r_mix, ARRAY_SIZE(dac2r_mix)),
984a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0,
985a9ba6151SMark Brown 		   dac1l_mix, ARRAY_SIZE(dac1l_mix)),
986a9ba6151SMark Brown SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0,
987a9ba6151SMark Brown 		   dac1r_mix, ARRAY_SIZE(dac1r_mix)),
988a9ba6151SMark Brown 
989a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC2L", NULL, WM8996_POWER_MANAGEMENT_5, 3, 0),
990a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC2R", NULL, WM8996_POWER_MANAGEMENT_5, 2, 0),
991a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC1L", NULL, WM8996_POWER_MANAGEMENT_5, 1, 0),
992a9ba6151SMark Brown SND_SOC_DAPM_DAC("DAC1R", NULL, WM8996_POWER_MANAGEMENT_5, 0, 0),
993a9ba6151SMark Brown 
9941ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF2RX1", NULL, 0, WM8996_POWER_MANAGEMENT_4, 9, 0),
9951ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF2RX0", NULL, 1, WM8996_POWER_MANAGEMENT_4, 8, 0),
996a9ba6151SMark Brown 
9971ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF2TX1", NULL, 0, WM8996_POWER_MANAGEMENT_6, 9, 0),
9981ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF2TX0", NULL, 1, WM8996_POWER_MANAGEMENT_6, 8, 0),
999a9ba6151SMark Brown 
10001ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX5", NULL, 5, WM8996_POWER_MANAGEMENT_4, 5, 0),
10011ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX4", NULL, 4, WM8996_POWER_MANAGEMENT_4, 4, 0),
10021ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX3", NULL, 3, WM8996_POWER_MANAGEMENT_4, 3, 0),
10031ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX2", NULL, 2, WM8996_POWER_MANAGEMENT_4, 2, 0),
10041ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX1", NULL, 1, WM8996_POWER_MANAGEMENT_4, 1, 0),
10051ec1cdfbSMark Brown SND_SOC_DAPM_AIF_IN("AIF1RX0", NULL, 0, WM8996_POWER_MANAGEMENT_4, 0, 0),
1006a9ba6151SMark Brown 
10071ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX5", NULL, 5, WM8996_POWER_MANAGEMENT_6, 5, 0),
10081ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX4", NULL, 4, WM8996_POWER_MANAGEMENT_6, 4, 0),
10091ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX3", NULL, 3, WM8996_POWER_MANAGEMENT_6, 3, 0),
10101ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX2", NULL, 2, WM8996_POWER_MANAGEMENT_6, 2, 0),
10111ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX1", NULL, 1, WM8996_POWER_MANAGEMENT_6, 1, 0),
10121ec1cdfbSMark Brown SND_SOC_DAPM_AIF_OUT("AIF1TX0", NULL, 0, WM8996_POWER_MANAGEMENT_6, 0, 0),
1013a9ba6151SMark Brown 
1014a9ba6151SMark Brown /* We route as stereo pairs so define some dummy widgets to squash
1015a9ba6151SMark Brown  * things down for now.  RXA = 0,1, RXB = 2,3 and so on */
1016a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXA", SND_SOC_NOPM, 0, 0, NULL, 0),
1017a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXB", SND_SOC_NOPM, 0, 0, NULL, 0),
1018a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF1RXC", SND_SOC_NOPM, 0, 0, NULL, 0),
1019a9ba6151SMark Brown SND_SOC_DAPM_PGA("AIF2RX", SND_SOC_NOPM, 0, 0, NULL, 0),
1020a9ba6151SMark Brown SND_SOC_DAPM_PGA("DSP2TX", SND_SOC_NOPM, 0, 0, NULL, 0),
1021a9ba6151SMark Brown 
1022a9ba6151SMark Brown SND_SOC_DAPM_MUX("DSP1RX", SND_SOC_NOPM, 0, 0, &dsp1rx),
1023a9ba6151SMark Brown SND_SOC_DAPM_MUX("DSP2RX", SND_SOC_NOPM, 0, 0, &dsp2rx),
1024a9ba6151SMark Brown SND_SOC_DAPM_MUX("AIF2TX", SND_SOC_NOPM, 0, 0, &aif2tx),
1025a9ba6151SMark Brown 
1026a9ba6151SMark Brown SND_SOC_DAPM_MUX("SPKL", SND_SOC_NOPM, 0, 0, &spkl_mux),
1027a9ba6151SMark Brown SND_SOC_DAPM_MUX("SPKR", SND_SOC_NOPM, 0, 0, &spkr_mux),
1028a9ba6151SMark Brown SND_SOC_DAPM_PGA("SPKL PGA", WM8996_LEFT_PDM_SPEAKER, 4, 0, NULL, 0),
1029a9ba6151SMark Brown SND_SOC_DAPM_PGA("SPKR PGA", WM8996_RIGHT_PDM_SPEAKER, 4, 0, NULL, 0),
1030a9ba6151SMark Brown 
1031a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L PGA", 0, WM8996_POWER_MANAGEMENT_1, 7, 0, NULL, 0),
1032a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_DLY", 1, WM8996_ANALOGUE_HP_2, 5, 0, NULL, 0),
1033a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_DCS", 2, WM8996_DC_SERVO_1, 2, 0, dcs_start,
1034a9ba6151SMark Brown 		   SND_SOC_DAPM_POST_PMU),
1035a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2L, 0,
1036a9ba6151SMark Brown 		   rmv_short_event,
1037a9ba6151SMark Brown 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1038a9ba6151SMark Brown 
1039a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R PGA", 0, WM8996_POWER_MANAGEMENT_1, 6, 0,NULL, 0),
1040a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_DLY", 1, WM8996_ANALOGUE_HP_2, 1, 0, NULL, 0),
1041a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_DCS", 2, WM8996_DC_SERVO_1, 3, 0, dcs_start,
1042a9ba6151SMark Brown 		   SND_SOC_DAPM_POST_PMU),
1043a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT2R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT2R, 0,
1044a9ba6151SMark Brown 		   rmv_short_event,
1045a9ba6151SMark Brown 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1046a9ba6151SMark Brown 
1047a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L PGA", 0, WM8996_POWER_MANAGEMENT_1, 5, 0, NULL, 0),
1048a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_DLY", 1, WM8996_ANALOGUE_HP_1, 5, 0, NULL, 0),
1049a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_DCS", 2, WM8996_DC_SERVO_1, 0, 0, dcs_start,
1050a9ba6151SMark Brown 		   SND_SOC_DAPM_POST_PMU),
1051a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1L_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1L, 0,
1052a9ba6151SMark Brown 		   rmv_short_event,
1053a9ba6151SMark Brown 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1054a9ba6151SMark Brown 
1055a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R PGA", 0, WM8996_POWER_MANAGEMENT_1, 4, 0, NULL, 0),
1056a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_DLY", 1, WM8996_ANALOGUE_HP_1, 1, 0, NULL, 0),
1057a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_DCS", 2, WM8996_DC_SERVO_1, 1, 0, dcs_start,
1058a9ba6151SMark Brown 		   SND_SOC_DAPM_POST_PMU),
1059a9ba6151SMark Brown SND_SOC_DAPM_PGA_S("HPOUT1R_RMV_SHORT", 3, SND_SOC_NOPM, HPOUT1R, 0,
1060a9ba6151SMark Brown 		   rmv_short_event,
1061a9ba6151SMark Brown 		   SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD),
1062a9ba6151SMark Brown 
1063a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT1L"),
1064a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT1R"),
1065a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT2L"),
1066a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("HPOUT2R"),
1067a9ba6151SMark Brown SND_SOC_DAPM_OUTPUT("SPKDAT"),
1068a9ba6151SMark Brown };
1069a9ba6151SMark Brown 
1070a9ba6151SMark Brown static const struct snd_soc_dapm_route wm8996_dapm_routes[] = {
1071a9ba6151SMark Brown 	{ "AIFCLK", NULL, "SYSCLK" },
1072a9ba6151SMark Brown 	{ "SYSDSPCLK", NULL, "SYSCLK" },
1073a9ba6151SMark Brown 	{ "Charge Pump", NULL, "SYSCLK" },
10744a086e4cSMark Brown 	{ "Charge Pump", NULL, "CPVDD" },
1075a9ba6151SMark Brown 
1076a9ba6151SMark Brown 	{ "MICB1", NULL, "LDO2" },
1077889c85c5SMark Brown 	{ "MICB1", NULL, "MICB1 Audio" },
10788259df12SMark Brown 	{ "MICB1", NULL, "Bandgap" },
1079a9ba6151SMark Brown 	{ "MICB2", NULL, "LDO2" },
1080889c85c5SMark Brown 	{ "MICB2", NULL, "MICB2 Audio" },
10818259df12SMark Brown 	{ "MICB2", NULL, "Bandgap" },
1082a9ba6151SMark Brown 
10831ec1cdfbSMark Brown 	{ "AIF1RX0", NULL, "AIF1 Playback" },
10841ec1cdfbSMark Brown 	{ "AIF1RX1", NULL, "AIF1 Playback" },
10851ec1cdfbSMark Brown 	{ "AIF1RX2", NULL, "AIF1 Playback" },
10861ec1cdfbSMark Brown 	{ "AIF1RX3", NULL, "AIF1 Playback" },
10871ec1cdfbSMark Brown 	{ "AIF1RX4", NULL, "AIF1 Playback" },
10881ec1cdfbSMark Brown 	{ "AIF1RX5", NULL, "AIF1 Playback" },
10891ec1cdfbSMark Brown 
10901ec1cdfbSMark Brown 	{ "AIF2RX0", NULL, "AIF2 Playback" },
10911ec1cdfbSMark Brown 	{ "AIF2RX1", NULL, "AIF2 Playback" },
10921ec1cdfbSMark Brown 
10931ec1cdfbSMark Brown 	{ "AIF1 Capture", NULL, "AIF1TX0" },
10941ec1cdfbSMark Brown 	{ "AIF1 Capture", NULL, "AIF1TX1" },
10951ec1cdfbSMark Brown 	{ "AIF1 Capture", NULL, "AIF1TX2" },
10961ec1cdfbSMark Brown 	{ "AIF1 Capture", NULL, "AIF1TX3" },
10971ec1cdfbSMark Brown 	{ "AIF1 Capture", NULL, "AIF1TX4" },
10981ec1cdfbSMark Brown 	{ "AIF1 Capture", NULL, "AIF1TX5" },
10991ec1cdfbSMark Brown 
11001ec1cdfbSMark Brown 	{ "AIF2 Capture", NULL, "AIF2TX0" },
11011ec1cdfbSMark Brown 	{ "AIF2 Capture", NULL, "AIF2TX1" },
11021ec1cdfbSMark Brown 
1103a9ba6151SMark Brown 	{ "IN1L PGA", NULL, "IN2LN" },
1104a9ba6151SMark Brown 	{ "IN1L PGA", NULL, "IN2LP" },
1105a9ba6151SMark Brown 	{ "IN1L PGA", NULL, "IN1LN" },
1106a9ba6151SMark Brown 	{ "IN1L PGA", NULL, "IN1LP" },
11078259df12SMark Brown 	{ "IN1L PGA", NULL, "Bandgap" },
1108a9ba6151SMark Brown 
1109a9ba6151SMark Brown 	{ "IN1R PGA", NULL, "IN2RN" },
1110a9ba6151SMark Brown 	{ "IN1R PGA", NULL, "IN2RP" },
1111a9ba6151SMark Brown 	{ "IN1R PGA", NULL, "IN1RN" },
1112a9ba6151SMark Brown 	{ "IN1R PGA", NULL, "IN1RP" },
11138259df12SMark Brown 	{ "IN1R PGA", NULL, "Bandgap" },
1114a9ba6151SMark Brown 
1115a9ba6151SMark Brown 	{ "ADCL", NULL, "IN1L PGA" },
1116a9ba6151SMark Brown 
1117a9ba6151SMark Brown 	{ "ADCR", NULL, "IN1R PGA" },
1118a9ba6151SMark Brown 
1119a9ba6151SMark Brown 	{ "DMIC1L", NULL, "DMIC1DAT" },
1120a9ba6151SMark Brown 	{ "DMIC1R", NULL, "DMIC1DAT" },
1121a9ba6151SMark Brown 	{ "DMIC2L", NULL, "DMIC2DAT" },
1122a9ba6151SMark Brown 	{ "DMIC2R", NULL, "DMIC2DAT" },
1123a9ba6151SMark Brown 
1124a9ba6151SMark Brown 	{ "DMIC2L", NULL, "DMIC2" },
1125a9ba6151SMark Brown 	{ "DMIC2R", NULL, "DMIC2" },
1126a9ba6151SMark Brown 	{ "DMIC1L", NULL, "DMIC1" },
1127a9ba6151SMark Brown 	{ "DMIC1R", NULL, "DMIC1" },
1128a9ba6151SMark Brown 
1129a9ba6151SMark Brown 	{ "IN1L Mux", "ADC", "ADCL" },
1130a9ba6151SMark Brown 	{ "IN1L Mux", "DMIC1", "DMIC1L" },
1131a9ba6151SMark Brown 	{ "IN1L Mux", "DMIC2", "DMIC2L" },
1132a9ba6151SMark Brown 
1133a9ba6151SMark Brown 	{ "IN1R Mux", "ADC", "ADCR" },
1134a9ba6151SMark Brown 	{ "IN1R Mux", "DMIC1", "DMIC1R" },
1135a9ba6151SMark Brown 	{ "IN1R Mux", "DMIC2", "DMIC2R" },
1136a9ba6151SMark Brown 
1137a9ba6151SMark Brown 	{ "IN2L Mux", "ADC", "ADCL" },
1138a9ba6151SMark Brown 	{ "IN2L Mux", "DMIC1", "DMIC1L" },
1139a9ba6151SMark Brown 	{ "IN2L Mux", "DMIC2", "DMIC2L" },
1140a9ba6151SMark Brown 
1141a9ba6151SMark Brown 	{ "IN2R Mux", "ADC", "ADCR" },
1142a9ba6151SMark Brown 	{ "IN2R Mux", "DMIC1", "DMIC1R" },
1143a9ba6151SMark Brown 	{ "IN2R Mux", "DMIC2", "DMIC2R" },
1144a9ba6151SMark Brown 
1145a9ba6151SMark Brown 	{ "Left Sidetone", "IN1", "IN1L Mux" },
1146a9ba6151SMark Brown 	{ "Left Sidetone", "IN2", "IN2L Mux" },
1147a9ba6151SMark Brown 
1148a9ba6151SMark Brown 	{ "Right Sidetone", "IN1", "IN1R Mux" },
1149a9ba6151SMark Brown 	{ "Right Sidetone", "IN2", "IN2R Mux" },
1150a9ba6151SMark Brown 
1151a9ba6151SMark Brown 	{ "DSP1TXL", "IN1 Switch", "IN1L Mux" },
1152a9ba6151SMark Brown 	{ "DSP1TXR", "IN1 Switch", "IN1R Mux" },
1153a9ba6151SMark Brown 
1154a9ba6151SMark Brown 	{ "DSP2TXL", "IN1 Switch", "IN2L Mux" },
1155a9ba6151SMark Brown 	{ "DSP2TXR", "IN1 Switch", "IN2R Mux" },
1156a9ba6151SMark Brown 
1157a9ba6151SMark Brown 	{ "AIF1TX0", NULL, "DSP1TXL" },
1158a9ba6151SMark Brown 	{ "AIF1TX1", NULL, "DSP1TXR" },
1159a9ba6151SMark Brown 	{ "AIF1TX2", NULL, "DSP2TXL" },
1160a9ba6151SMark Brown 	{ "AIF1TX3", NULL, "DSP2TXR" },
1161a9ba6151SMark Brown 	{ "AIF1TX4", NULL, "AIF2RX0" },
1162a9ba6151SMark Brown 	{ "AIF1TX5", NULL, "AIF2RX1" },
1163a9ba6151SMark Brown 
1164a9ba6151SMark Brown 	{ "AIF1RX0", NULL, "AIFCLK" },
1165a9ba6151SMark Brown 	{ "AIF1RX1", NULL, "AIFCLK" },
1166a9ba6151SMark Brown 	{ "AIF1RX2", NULL, "AIFCLK" },
1167a9ba6151SMark Brown 	{ "AIF1RX3", NULL, "AIFCLK" },
1168a9ba6151SMark Brown 	{ "AIF1RX4", NULL, "AIFCLK" },
1169a9ba6151SMark Brown 	{ "AIF1RX5", NULL, "AIFCLK" },
1170a9ba6151SMark Brown 
1171a9ba6151SMark Brown 	{ "AIF2RX0", NULL, "AIFCLK" },
1172a9ba6151SMark Brown 	{ "AIF2RX1", NULL, "AIFCLK" },
1173a9ba6151SMark Brown 
11744f41adfdSMark Brown 	{ "AIF1TX0", NULL, "AIFCLK" },
11754f41adfdSMark Brown 	{ "AIF1TX1", NULL, "AIFCLK" },
11764f41adfdSMark Brown 	{ "AIF1TX2", NULL, "AIFCLK" },
11774f41adfdSMark Brown 	{ "AIF1TX3", NULL, "AIFCLK" },
11784f41adfdSMark Brown 	{ "AIF1TX4", NULL, "AIFCLK" },
11794f41adfdSMark Brown 	{ "AIF1TX5", NULL, "AIFCLK" },
11804f41adfdSMark Brown 
11814f41adfdSMark Brown 	{ "AIF2TX0", NULL, "AIFCLK" },
11824f41adfdSMark Brown 	{ "AIF2TX1", NULL, "AIFCLK" },
11834f41adfdSMark Brown 
1184a9ba6151SMark Brown 	{ "DSP1RXL", NULL, "SYSDSPCLK" },
1185a9ba6151SMark Brown 	{ "DSP1RXR", NULL, "SYSDSPCLK" },
1186a9ba6151SMark Brown 	{ "DSP2RXL", NULL, "SYSDSPCLK" },
1187a9ba6151SMark Brown 	{ "DSP2RXR", NULL, "SYSDSPCLK" },
1188a9ba6151SMark Brown 	{ "DSP1TXL", NULL, "SYSDSPCLK" },
1189a9ba6151SMark Brown 	{ "DSP1TXR", NULL, "SYSDSPCLK" },
1190a9ba6151SMark Brown 	{ "DSP2TXL", NULL, "SYSDSPCLK" },
1191a9ba6151SMark Brown 	{ "DSP2TXR", NULL, "SYSDSPCLK" },
1192a9ba6151SMark Brown 
1193a9ba6151SMark Brown 	{ "AIF1RXA", NULL, "AIF1RX0" },
1194a9ba6151SMark Brown 	{ "AIF1RXA", NULL, "AIF1RX1" },
1195a9ba6151SMark Brown 	{ "AIF1RXB", NULL, "AIF1RX2" },
1196a9ba6151SMark Brown 	{ "AIF1RXB", NULL, "AIF1RX3" },
1197a9ba6151SMark Brown 	{ "AIF1RXC", NULL, "AIF1RX4" },
1198a9ba6151SMark Brown 	{ "AIF1RXC", NULL, "AIF1RX5" },
1199a9ba6151SMark Brown 
1200a9ba6151SMark Brown 	{ "AIF2RX", NULL, "AIF2RX0" },
1201a9ba6151SMark Brown 	{ "AIF2RX", NULL, "AIF2RX1" },
1202a9ba6151SMark Brown 
1203a9ba6151SMark Brown 	{ "AIF2TX", "DSP2", "DSP2TX" },
1204a9ba6151SMark Brown 	{ "AIF2TX", "DSP1", "DSP1RX" },
1205a9ba6151SMark Brown 	{ "AIF2TX", "AIF1", "AIF1RXC" },
1206a9ba6151SMark Brown 
1207a9ba6151SMark Brown 	{ "DSP1RXL", NULL, "DSP1RX" },
1208a9ba6151SMark Brown 	{ "DSP1RXR", NULL, "DSP1RX" },
1209a9ba6151SMark Brown 	{ "DSP2RXL", NULL, "DSP2RX" },
1210a9ba6151SMark Brown 	{ "DSP2RXR", NULL, "DSP2RX" },
1211a9ba6151SMark Brown 
1212a9ba6151SMark Brown 	{ "DSP2TX", NULL, "DSP2TXL" },
1213a9ba6151SMark Brown 	{ "DSP2TX", NULL, "DSP2TXR" },
1214a9ba6151SMark Brown 
1215a9ba6151SMark Brown 	{ "DSP1RX", "AIF1", "AIF1RXA" },
1216a9ba6151SMark Brown 	{ "DSP1RX", "AIF2", "AIF2RX" },
1217a9ba6151SMark Brown 
1218a9ba6151SMark Brown 	{ "DSP2RX", "AIF1", "AIF1RXB" },
1219a9ba6151SMark Brown 	{ "DSP2RX", "AIF2", "AIF2RX" },
1220a9ba6151SMark Brown 
1221a9ba6151SMark Brown 	{ "DAC2L Mixer", "DSP2 Switch", "DSP2RXL" },
1222a9ba6151SMark Brown 	{ "DAC2L Mixer", "DSP1 Switch", "DSP1RXL" },
1223a9ba6151SMark Brown 	{ "DAC2L Mixer", "Right Sidetone Switch", "Right Sidetone" },
1224a9ba6151SMark Brown 	{ "DAC2L Mixer", "Left Sidetone Switch", "Left Sidetone" },
1225a9ba6151SMark Brown 
1226a9ba6151SMark Brown 	{ "DAC2R Mixer", "DSP2 Switch", "DSP2RXR" },
1227a9ba6151SMark Brown 	{ "DAC2R Mixer", "DSP1 Switch", "DSP1RXR" },
1228a9ba6151SMark Brown 	{ "DAC2R Mixer", "Right Sidetone Switch", "Right Sidetone" },
1229a9ba6151SMark Brown 	{ "DAC2R Mixer", "Left Sidetone Switch", "Left Sidetone" },
1230a9ba6151SMark Brown 
1231a9ba6151SMark Brown 	{ "DAC1L Mixer", "DSP2 Switch", "DSP2RXL" },
1232a9ba6151SMark Brown 	{ "DAC1L Mixer", "DSP1 Switch", "DSP1RXL" },
1233a9ba6151SMark Brown 	{ "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" },
1234a9ba6151SMark Brown 	{ "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" },
1235a9ba6151SMark Brown 
1236a9ba6151SMark Brown 	{ "DAC1R Mixer", "DSP2 Switch", "DSP2RXR" },
1237a9ba6151SMark Brown 	{ "DAC1R Mixer", "DSP1 Switch", "DSP1RXR" },
1238a9ba6151SMark Brown 	{ "DAC1R Mixer", "Right Sidetone Switch", "Right Sidetone" },
1239a9ba6151SMark Brown 	{ "DAC1R Mixer", "Left Sidetone Switch", "Left Sidetone" },
1240a9ba6151SMark Brown 
1241a9ba6151SMark Brown 	{ "DAC1L", NULL, "DAC1L Mixer" },
1242a9ba6151SMark Brown 	{ "DAC1R", NULL, "DAC1R Mixer" },
1243a9ba6151SMark Brown 	{ "DAC2L", NULL, "DAC2L Mixer" },
1244a9ba6151SMark Brown 	{ "DAC2R", NULL, "DAC2R Mixer" },
1245a9ba6151SMark Brown 
1246a9ba6151SMark Brown 	{ "HPOUT2L PGA", NULL, "Charge Pump" },
12478259df12SMark Brown 	{ "HPOUT2L PGA", NULL, "Bandgap" },
1248a9ba6151SMark Brown 	{ "HPOUT2L PGA", NULL, "DAC2L" },
1249a9ba6151SMark Brown 	{ "HPOUT2L_DLY", NULL, "HPOUT2L PGA" },
1250a9ba6151SMark Brown 	{ "HPOUT2L_DCS", NULL, "HPOUT2L_DLY" },
12515b596483SMark Brown 	{ "HPOUT2L_RMV_SHORT", NULL, "HPOUT2L_DCS" },
1252a9ba6151SMark Brown 
1253a9ba6151SMark Brown 	{ "HPOUT2R PGA", NULL, "Charge Pump" },
12548259df12SMark Brown 	{ "HPOUT2R PGA", NULL, "Bandgap" },
1255a9ba6151SMark Brown 	{ "HPOUT2R PGA", NULL, "DAC2R" },
1256a9ba6151SMark Brown 	{ "HPOUT2R_DLY", NULL, "HPOUT2R PGA" },
1257a9ba6151SMark Brown 	{ "HPOUT2R_DCS", NULL, "HPOUT2R_DLY" },
12585b596483SMark Brown 	{ "HPOUT2R_RMV_SHORT", NULL, "HPOUT2R_DCS" },
1259a9ba6151SMark Brown 
1260a9ba6151SMark Brown 	{ "HPOUT1L PGA", NULL, "Charge Pump" },
12618259df12SMark Brown 	{ "HPOUT1L PGA", NULL, "Bandgap" },
1262a9ba6151SMark Brown 	{ "HPOUT1L PGA", NULL, "DAC1L" },
1263a9ba6151SMark Brown 	{ "HPOUT1L_DLY", NULL, "HPOUT1L PGA" },
1264a9ba6151SMark Brown 	{ "HPOUT1L_DCS", NULL, "HPOUT1L_DLY" },
12655b596483SMark Brown 	{ "HPOUT1L_RMV_SHORT", NULL, "HPOUT1L_DCS" },
1266a9ba6151SMark Brown 
1267a9ba6151SMark Brown 	{ "HPOUT1R PGA", NULL, "Charge Pump" },
12688259df12SMark Brown 	{ "HPOUT1R PGA", NULL, "Bandgap" },
1269a9ba6151SMark Brown 	{ "HPOUT1R PGA", NULL, "DAC1R" },
1270a9ba6151SMark Brown 	{ "HPOUT1R_DLY", NULL, "HPOUT1R PGA" },
1271a9ba6151SMark Brown 	{ "HPOUT1R_DCS", NULL, "HPOUT1R_DLY" },
12725b596483SMark Brown 	{ "HPOUT1R_RMV_SHORT", NULL, "HPOUT1R_DCS" },
1273a9ba6151SMark Brown 
1274a9ba6151SMark Brown 	{ "HPOUT2L", NULL, "HPOUT2L_RMV_SHORT" },
1275a9ba6151SMark Brown 	{ "HPOUT2R", NULL, "HPOUT2R_RMV_SHORT" },
1276a9ba6151SMark Brown 	{ "HPOUT1L", NULL, "HPOUT1L_RMV_SHORT" },
1277a9ba6151SMark Brown 	{ "HPOUT1R", NULL, "HPOUT1R_RMV_SHORT" },
1278a9ba6151SMark Brown 
1279a9ba6151SMark Brown 	{ "SPKL", "DAC1L", "DAC1L" },
1280a9ba6151SMark Brown 	{ "SPKL", "DAC1R", "DAC1R" },
1281a9ba6151SMark Brown 	{ "SPKL", "DAC2L", "DAC2L" },
1282a9ba6151SMark Brown 	{ "SPKL", "DAC2R", "DAC2R" },
1283a9ba6151SMark Brown 
1284a9ba6151SMark Brown 	{ "SPKR", "DAC1L", "DAC1L" },
1285a9ba6151SMark Brown 	{ "SPKR", "DAC1R", "DAC1R" },
1286a9ba6151SMark Brown 	{ "SPKR", "DAC2L", "DAC2L" },
1287a9ba6151SMark Brown 	{ "SPKR", "DAC2R", "DAC2R" },
1288a9ba6151SMark Brown 
1289a9ba6151SMark Brown 	{ "SPKL PGA", NULL, "SPKL" },
1290a9ba6151SMark Brown 	{ "SPKR PGA", NULL, "SPKR" },
1291a9ba6151SMark Brown 
1292a9ba6151SMark Brown 	{ "SPKDAT", NULL, "SPKL PGA" },
1293a9ba6151SMark Brown 	{ "SPKDAT", NULL, "SPKR PGA" },
1294a9ba6151SMark Brown };
1295a9ba6151SMark Brown 
wm8996_readable_register(struct device * dev,unsigned int reg)129679172746SMark Brown static bool wm8996_readable_register(struct device *dev, unsigned int reg)
1297a9ba6151SMark Brown {
1298a9ba6151SMark Brown 	/* Due to the sparseness of the register map the compiler
1299a9ba6151SMark Brown 	 * output from an explicit switch statement ends up being much
1300a9ba6151SMark Brown 	 * more efficient than a table.
1301a9ba6151SMark Brown 	 */
1302a9ba6151SMark Brown 	switch (reg) {
1303a9ba6151SMark Brown 	case WM8996_SOFTWARE_RESET:
1304a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_1:
1305a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_2:
1306a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_3:
1307a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_4:
1308a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_5:
1309a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_6:
1310a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_7:
1311a9ba6151SMark Brown 	case WM8996_POWER_MANAGEMENT_8:
1312a9ba6151SMark Brown 	case WM8996_LEFT_LINE_INPUT_VOLUME:
1313a9ba6151SMark Brown 	case WM8996_RIGHT_LINE_INPUT_VOLUME:
1314a9ba6151SMark Brown 	case WM8996_LINE_INPUT_CONTROL:
1315a9ba6151SMark Brown 	case WM8996_DAC1_HPOUT1_VOLUME:
1316a9ba6151SMark Brown 	case WM8996_DAC2_HPOUT2_VOLUME:
1317a9ba6151SMark Brown 	case WM8996_DAC1_LEFT_VOLUME:
1318a9ba6151SMark Brown 	case WM8996_DAC1_RIGHT_VOLUME:
1319a9ba6151SMark Brown 	case WM8996_DAC2_LEFT_VOLUME:
1320a9ba6151SMark Brown 	case WM8996_DAC2_RIGHT_VOLUME:
1321a9ba6151SMark Brown 	case WM8996_OUTPUT1_LEFT_VOLUME:
1322a9ba6151SMark Brown 	case WM8996_OUTPUT1_RIGHT_VOLUME:
1323a9ba6151SMark Brown 	case WM8996_OUTPUT2_LEFT_VOLUME:
1324a9ba6151SMark Brown 	case WM8996_OUTPUT2_RIGHT_VOLUME:
1325a9ba6151SMark Brown 	case WM8996_MICBIAS_1:
1326a9ba6151SMark Brown 	case WM8996_MICBIAS_2:
1327a9ba6151SMark Brown 	case WM8996_LDO_1:
1328a9ba6151SMark Brown 	case WM8996_LDO_2:
1329a9ba6151SMark Brown 	case WM8996_ACCESSORY_DETECT_MODE_1:
1330a9ba6151SMark Brown 	case WM8996_ACCESSORY_DETECT_MODE_2:
1331a9ba6151SMark Brown 	case WM8996_HEADPHONE_DETECT_1:
1332a9ba6151SMark Brown 	case WM8996_HEADPHONE_DETECT_2:
1333a9ba6151SMark Brown 	case WM8996_MIC_DETECT_1:
1334a9ba6151SMark Brown 	case WM8996_MIC_DETECT_2:
1335a9ba6151SMark Brown 	case WM8996_MIC_DETECT_3:
1336a9ba6151SMark Brown 	case WM8996_CHARGE_PUMP_1:
1337a9ba6151SMark Brown 	case WM8996_CHARGE_PUMP_2:
1338a9ba6151SMark Brown 	case WM8996_DC_SERVO_1:
1339a9ba6151SMark Brown 	case WM8996_DC_SERVO_2:
1340a9ba6151SMark Brown 	case WM8996_DC_SERVO_3:
1341a9ba6151SMark Brown 	case WM8996_DC_SERVO_5:
1342a9ba6151SMark Brown 	case WM8996_DC_SERVO_6:
1343a9ba6151SMark Brown 	case WM8996_DC_SERVO_7:
1344a9ba6151SMark Brown 	case WM8996_DC_SERVO_READBACK_0:
1345a9ba6151SMark Brown 	case WM8996_ANALOGUE_HP_1:
1346a9ba6151SMark Brown 	case WM8996_ANALOGUE_HP_2:
1347a9ba6151SMark Brown 	case WM8996_CHIP_REVISION:
1348a9ba6151SMark Brown 	case WM8996_CONTROL_INTERFACE_1:
1349a9ba6151SMark Brown 	case WM8996_WRITE_SEQUENCER_CTRL_1:
1350a9ba6151SMark Brown 	case WM8996_WRITE_SEQUENCER_CTRL_2:
1351a9ba6151SMark Brown 	case WM8996_AIF_CLOCKING_1:
1352a9ba6151SMark Brown 	case WM8996_AIF_CLOCKING_2:
1353a9ba6151SMark Brown 	case WM8996_CLOCKING_1:
1354a9ba6151SMark Brown 	case WM8996_CLOCKING_2:
1355a9ba6151SMark Brown 	case WM8996_AIF_RATE:
1356a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_1:
1357a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_2:
1358a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_3:
1359a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_4:
1360a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_5:
1361a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_6:
1362a9ba6151SMark Brown 	case WM8996_FLL_EFS_1:
1363a9ba6151SMark Brown 	case WM8996_FLL_EFS_2:
1364a9ba6151SMark Brown 	case WM8996_AIF1_CONTROL:
1365a9ba6151SMark Brown 	case WM8996_AIF1_BCLK:
1366a9ba6151SMark Brown 	case WM8996_AIF1_TX_LRCLK_1:
1367a9ba6151SMark Brown 	case WM8996_AIF1_TX_LRCLK_2:
1368a9ba6151SMark Brown 	case WM8996_AIF1_RX_LRCLK_1:
1369a9ba6151SMark Brown 	case WM8996_AIF1_RX_LRCLK_2:
1370a9ba6151SMark Brown 	case WM8996_AIF1TX_DATA_CONFIGURATION_1:
1371a9ba6151SMark Brown 	case WM8996_AIF1TX_DATA_CONFIGURATION_2:
1372a9ba6151SMark Brown 	case WM8996_AIF1RX_DATA_CONFIGURATION:
1373a9ba6151SMark Brown 	case WM8996_AIF1TX_CHANNEL_0_CONFIGURATION:
1374a9ba6151SMark Brown 	case WM8996_AIF1TX_CHANNEL_1_CONFIGURATION:
1375a9ba6151SMark Brown 	case WM8996_AIF1TX_CHANNEL_2_CONFIGURATION:
1376a9ba6151SMark Brown 	case WM8996_AIF1TX_CHANNEL_3_CONFIGURATION:
1377a9ba6151SMark Brown 	case WM8996_AIF1TX_CHANNEL_4_CONFIGURATION:
1378a9ba6151SMark Brown 	case WM8996_AIF1TX_CHANNEL_5_CONFIGURATION:
1379a9ba6151SMark Brown 	case WM8996_AIF1RX_CHANNEL_0_CONFIGURATION:
1380a9ba6151SMark Brown 	case WM8996_AIF1RX_CHANNEL_1_CONFIGURATION:
1381a9ba6151SMark Brown 	case WM8996_AIF1RX_CHANNEL_2_CONFIGURATION:
1382a9ba6151SMark Brown 	case WM8996_AIF1RX_CHANNEL_3_CONFIGURATION:
1383a9ba6151SMark Brown 	case WM8996_AIF1RX_CHANNEL_4_CONFIGURATION:
1384a9ba6151SMark Brown 	case WM8996_AIF1RX_CHANNEL_5_CONFIGURATION:
1385a9ba6151SMark Brown 	case WM8996_AIF1RX_MONO_CONFIGURATION:
1386a9ba6151SMark Brown 	case WM8996_AIF1TX_TEST:
1387a9ba6151SMark Brown 	case WM8996_AIF2_CONTROL:
1388a9ba6151SMark Brown 	case WM8996_AIF2_BCLK:
1389a9ba6151SMark Brown 	case WM8996_AIF2_TX_LRCLK_1:
1390a9ba6151SMark Brown 	case WM8996_AIF2_TX_LRCLK_2:
1391a9ba6151SMark Brown 	case WM8996_AIF2_RX_LRCLK_1:
1392a9ba6151SMark Brown 	case WM8996_AIF2_RX_LRCLK_2:
1393a9ba6151SMark Brown 	case WM8996_AIF2TX_DATA_CONFIGURATION_1:
1394a9ba6151SMark Brown 	case WM8996_AIF2TX_DATA_CONFIGURATION_2:
1395a9ba6151SMark Brown 	case WM8996_AIF2RX_DATA_CONFIGURATION:
1396a9ba6151SMark Brown 	case WM8996_AIF2TX_CHANNEL_0_CONFIGURATION:
1397a9ba6151SMark Brown 	case WM8996_AIF2TX_CHANNEL_1_CONFIGURATION:
1398a9ba6151SMark Brown 	case WM8996_AIF2RX_CHANNEL_0_CONFIGURATION:
1399a9ba6151SMark Brown 	case WM8996_AIF2RX_CHANNEL_1_CONFIGURATION:
1400a9ba6151SMark Brown 	case WM8996_AIF2RX_MONO_CONFIGURATION:
1401a9ba6151SMark Brown 	case WM8996_AIF2TX_TEST:
1402a9ba6151SMark Brown 	case WM8996_DSP1_TX_LEFT_VOLUME:
1403a9ba6151SMark Brown 	case WM8996_DSP1_TX_RIGHT_VOLUME:
1404a9ba6151SMark Brown 	case WM8996_DSP1_RX_LEFT_VOLUME:
1405a9ba6151SMark Brown 	case WM8996_DSP1_RX_RIGHT_VOLUME:
1406a9ba6151SMark Brown 	case WM8996_DSP1_TX_FILTERS:
1407a9ba6151SMark Brown 	case WM8996_DSP1_RX_FILTERS_1:
1408a9ba6151SMark Brown 	case WM8996_DSP1_RX_FILTERS_2:
1409a9ba6151SMark Brown 	case WM8996_DSP1_DRC_1:
1410a9ba6151SMark Brown 	case WM8996_DSP1_DRC_2:
1411a9ba6151SMark Brown 	case WM8996_DSP1_DRC_3:
1412a9ba6151SMark Brown 	case WM8996_DSP1_DRC_4:
1413a9ba6151SMark Brown 	case WM8996_DSP1_DRC_5:
1414a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_GAINS_1:
1415a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_GAINS_2:
1416a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_1_A:
1417a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_1_B:
1418a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_1_PG:
1419a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_2_A:
1420a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_2_B:
1421a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_2_C:
1422a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_2_PG:
1423a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_3_A:
1424a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_3_B:
1425a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_3_C:
1426a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_3_PG:
1427a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_4_A:
1428a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_4_B:
1429a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_4_C:
1430a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_4_PG:
1431a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_5_A:
1432a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_5_B:
1433a9ba6151SMark Brown 	case WM8996_DSP1_RX_EQ_BAND_5_PG:
1434a9ba6151SMark Brown 	case WM8996_DSP2_TX_LEFT_VOLUME:
1435a9ba6151SMark Brown 	case WM8996_DSP2_TX_RIGHT_VOLUME:
1436a9ba6151SMark Brown 	case WM8996_DSP2_RX_LEFT_VOLUME:
1437a9ba6151SMark Brown 	case WM8996_DSP2_RX_RIGHT_VOLUME:
1438a9ba6151SMark Brown 	case WM8996_DSP2_TX_FILTERS:
1439a9ba6151SMark Brown 	case WM8996_DSP2_RX_FILTERS_1:
1440a9ba6151SMark Brown 	case WM8996_DSP2_RX_FILTERS_2:
1441a9ba6151SMark Brown 	case WM8996_DSP2_DRC_1:
1442a9ba6151SMark Brown 	case WM8996_DSP2_DRC_2:
1443a9ba6151SMark Brown 	case WM8996_DSP2_DRC_3:
1444a9ba6151SMark Brown 	case WM8996_DSP2_DRC_4:
1445a9ba6151SMark Brown 	case WM8996_DSP2_DRC_5:
1446a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_GAINS_1:
1447a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_GAINS_2:
1448a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_1_A:
1449a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_1_B:
1450a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_1_PG:
1451a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_2_A:
1452a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_2_B:
1453a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_2_C:
1454a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_2_PG:
1455a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_3_A:
1456a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_3_B:
1457a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_3_C:
1458a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_3_PG:
1459a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_4_A:
1460a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_4_B:
1461a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_4_C:
1462a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_4_PG:
1463a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_5_A:
1464a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_5_B:
1465a9ba6151SMark Brown 	case WM8996_DSP2_RX_EQ_BAND_5_PG:
1466a9ba6151SMark Brown 	case WM8996_DAC1_MIXER_VOLUMES:
1467a9ba6151SMark Brown 	case WM8996_DAC1_LEFT_MIXER_ROUTING:
1468a9ba6151SMark Brown 	case WM8996_DAC1_RIGHT_MIXER_ROUTING:
1469a9ba6151SMark Brown 	case WM8996_DAC2_MIXER_VOLUMES:
1470a9ba6151SMark Brown 	case WM8996_DAC2_LEFT_MIXER_ROUTING:
1471a9ba6151SMark Brown 	case WM8996_DAC2_RIGHT_MIXER_ROUTING:
1472a9ba6151SMark Brown 	case WM8996_DSP1_TX_LEFT_MIXER_ROUTING:
1473a9ba6151SMark Brown 	case WM8996_DSP1_TX_RIGHT_MIXER_ROUTING:
1474a9ba6151SMark Brown 	case WM8996_DSP2_TX_LEFT_MIXER_ROUTING:
1475a9ba6151SMark Brown 	case WM8996_DSP2_TX_RIGHT_MIXER_ROUTING:
1476a9ba6151SMark Brown 	case WM8996_DSP_TX_MIXER_SELECT:
1477a9ba6151SMark Brown 	case WM8996_DAC_SOFTMUTE:
1478a9ba6151SMark Brown 	case WM8996_OVERSAMPLING:
1479a9ba6151SMark Brown 	case WM8996_SIDETONE:
1480a9ba6151SMark Brown 	case WM8996_GPIO_1:
1481a9ba6151SMark Brown 	case WM8996_GPIO_2:
1482a9ba6151SMark Brown 	case WM8996_GPIO_3:
1483a9ba6151SMark Brown 	case WM8996_GPIO_4:
1484a9ba6151SMark Brown 	case WM8996_GPIO_5:
1485a9ba6151SMark Brown 	case WM8996_PULL_CONTROL_1:
1486a9ba6151SMark Brown 	case WM8996_PULL_CONTROL_2:
1487a9ba6151SMark Brown 	case WM8996_INTERRUPT_STATUS_1:
1488a9ba6151SMark Brown 	case WM8996_INTERRUPT_STATUS_2:
1489a9ba6151SMark Brown 	case WM8996_INTERRUPT_RAW_STATUS_2:
1490a9ba6151SMark Brown 	case WM8996_INTERRUPT_STATUS_1_MASK:
1491a9ba6151SMark Brown 	case WM8996_INTERRUPT_STATUS_2_MASK:
1492a9ba6151SMark Brown 	case WM8996_INTERRUPT_CONTROL:
1493a9ba6151SMark Brown 	case WM8996_LEFT_PDM_SPEAKER:
1494a9ba6151SMark Brown 	case WM8996_RIGHT_PDM_SPEAKER:
1495a9ba6151SMark Brown 	case WM8996_PDM_SPEAKER_MUTE_SEQUENCE:
1496a9ba6151SMark Brown 	case WM8996_PDM_SPEAKER_VOLUME:
1497eb086306SGustavo A. R. Silva 		return true;
1498a9ba6151SMark Brown 	default:
1499eb086306SGustavo A. R. Silva 		return false;
1500a9ba6151SMark Brown 	}
1501a9ba6151SMark Brown }
1502a9ba6151SMark Brown 
wm8996_volatile_register(struct device * dev,unsigned int reg)150379172746SMark Brown static bool wm8996_volatile_register(struct device *dev, unsigned int reg)
1504a9ba6151SMark Brown {
1505a9ba6151SMark Brown 	switch (reg) {
1506a9ba6151SMark Brown 	case WM8996_SOFTWARE_RESET:
1507a9ba6151SMark Brown 	case WM8996_CHIP_REVISION:
1508a9ba6151SMark Brown 	case WM8996_LDO_1:
1509a9ba6151SMark Brown 	case WM8996_LDO_2:
1510a9ba6151SMark Brown 	case WM8996_INTERRUPT_STATUS_1:
1511a9ba6151SMark Brown 	case WM8996_INTERRUPT_STATUS_2:
1512a9ba6151SMark Brown 	case WM8996_INTERRUPT_RAW_STATUS_2:
1513a9ba6151SMark Brown 	case WM8996_DC_SERVO_READBACK_0:
1514a9ba6151SMark Brown 	case WM8996_DC_SERVO_2:
1515a9ba6151SMark Brown 	case WM8996_DC_SERVO_6:
1516a9ba6151SMark Brown 	case WM8996_DC_SERVO_7:
1517a9ba6151SMark Brown 	case WM8996_FLL_CONTROL_6:
1518a9ba6151SMark Brown 	case WM8996_MIC_DETECT_3:
1519a9ba6151SMark Brown 	case WM8996_HEADPHONE_DETECT_1:
1520a9ba6151SMark Brown 	case WM8996_HEADPHONE_DETECT_2:
1521eb086306SGustavo A. R. Silva 		return true;
1522a9ba6151SMark Brown 	default:
1523eb086306SGustavo A. R. Silva 		return false;
1524a9ba6151SMark Brown 	}
1525a9ba6151SMark Brown }
1526a9ba6151SMark Brown 
1527a9ba6151SMark Brown static const int bclk_divs[] = {
1528a9ba6151SMark Brown 	1, 2, 3, 4, 6, 8, 12, 16, 24, 32, 48, 64, 96
1529a9ba6151SMark Brown };
1530a9ba6151SMark Brown 
wm8996_update_bclk(struct snd_soc_component * component)15315d61ef8bSKuninori Morimoto static void wm8996_update_bclk(struct snd_soc_component *component)
1532a9ba6151SMark Brown {
15335d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
1534a9ba6151SMark Brown 	int aif, best, cur_val, bclk_rate, bclk_reg, i;
1535a9ba6151SMark Brown 
1536a9ba6151SMark Brown 	/* Don't bother if we're in a low frequency idle mode that
1537a9ba6151SMark Brown 	 * can't support audio.
1538a9ba6151SMark Brown 	 */
1539a9ba6151SMark Brown 	if (wm8996->sysclk < 64000)
1540a9ba6151SMark Brown 		return;
1541a9ba6151SMark Brown 
1542a9ba6151SMark Brown 	for (aif = 0; aif < WM8996_AIFS; aif++) {
1543a9ba6151SMark Brown 		switch (aif) {
1544a9ba6151SMark Brown 		case 0:
1545a9ba6151SMark Brown 			bclk_reg = WM8996_AIF1_BCLK;
1546a9ba6151SMark Brown 			break;
1547a9ba6151SMark Brown 		case 1:
1548a9ba6151SMark Brown 			bclk_reg = WM8996_AIF2_BCLK;
1549a9ba6151SMark Brown 			break;
1550a9ba6151SMark Brown 		}
1551a9ba6151SMark Brown 
1552a9ba6151SMark Brown 		bclk_rate = wm8996->bclk_rate[aif];
1553a9ba6151SMark Brown 
1554a9ba6151SMark Brown 		/* Pick a divisor for BCLK as close as we can get to ideal */
1555a9ba6151SMark Brown 		best = 0;
1556a9ba6151SMark Brown 		for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) {
1557a9ba6151SMark Brown 			cur_val = (wm8996->sysclk / bclk_divs[i]) - bclk_rate;
1558a9ba6151SMark Brown 			if (cur_val < 0) /* BCLK table is sorted */
1559a9ba6151SMark Brown 				break;
1560a9ba6151SMark Brown 			best = i;
1561a9ba6151SMark Brown 		}
1562a9ba6151SMark Brown 		bclk_rate = wm8996->sysclk / bclk_divs[best];
15635d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n",
1564a9ba6151SMark Brown 			bclk_divs[best], bclk_rate);
1565a9ba6151SMark Brown 
15665d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, bclk_reg,
1567a9ba6151SMark Brown 				    WM8996_AIF1_BCLK_DIV_MASK, best);
1568a9ba6151SMark Brown 	}
1569a9ba6151SMark Brown }
1570a9ba6151SMark Brown 
wm8996_set_bias_level(struct snd_soc_component * component,enum snd_soc_bias_level level)15715d61ef8bSKuninori Morimoto static int wm8996_set_bias_level(struct snd_soc_component *component,
1572a9ba6151SMark Brown 				 enum snd_soc_bias_level level)
1573a9ba6151SMark Brown {
15745d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
1575a9ba6151SMark Brown 	int ret;
1576a9ba6151SMark Brown 
1577a9ba6151SMark Brown 	switch (level) {
1578a9ba6151SMark Brown 	case SND_SOC_BIAS_ON:
1579501bf035SMark Brown 		break;
1580a9ba6151SMark Brown 	case SND_SOC_BIAS_PREPARE:
1581501bf035SMark Brown 		/* Put the MICBIASes into regulating mode */
15825d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_MICBIAS_1,
1583501bf035SMark Brown 				    WM8996_MICB1_MODE, 0);
15845d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_MICBIAS_2,
1585501bf035SMark Brown 				    WM8996_MICB2_MODE, 0);
1586a9ba6151SMark Brown 		break;
1587a9ba6151SMark Brown 
1588a9ba6151SMark Brown 	case SND_SOC_BIAS_STANDBY:
15895d61ef8bSKuninori Morimoto 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
1590a9ba6151SMark Brown 			ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies),
1591a9ba6151SMark Brown 						    wm8996->supplies);
1592a9ba6151SMark Brown 			if (ret != 0) {
15935d61ef8bSKuninori Morimoto 				dev_err(component->dev,
1594a9ba6151SMark Brown 					"Failed to enable supplies: %d\n",
1595a9ba6151SMark Brown 					ret);
1596a9ba6151SMark Brown 				return ret;
1597a9ba6151SMark Brown 			}
1598a9ba6151SMark Brown 
1599a9ba6151SMark Brown 			if (wm8996->pdata.ldo_ena >= 0) {
1600a9ba6151SMark Brown 				gpio_set_value_cansleep(wm8996->pdata.ldo_ena,
1601a9ba6151SMark Brown 							1);
1602a9ba6151SMark Brown 				msleep(5);
1603a9ba6151SMark Brown 			}
1604a9ba6151SMark Brown 
1605b7c1b730SLars-Peter Clausen 			regcache_cache_only(wm8996->regmap, false);
1606b7c1b730SLars-Peter Clausen 			regcache_sync(wm8996->regmap);
1607a9ba6151SMark Brown 		}
1608501bf035SMark Brown 
1609501bf035SMark Brown 		/* Bypass the MICBIASes for lowest power */
16105d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_MICBIAS_1,
1611501bf035SMark Brown 				    WM8996_MICB1_MODE, WM8996_MICB1_MODE);
16125d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_MICBIAS_2,
1613501bf035SMark Brown 				    WM8996_MICB2_MODE, WM8996_MICB2_MODE);
1614a9ba6151SMark Brown 		break;
1615a9ba6151SMark Brown 
1616a9ba6151SMark Brown 	case SND_SOC_BIAS_OFF:
1617b7c1b730SLars-Peter Clausen 		regcache_cache_only(wm8996->regmap, true);
1618d4b3d0fbSMark Brown 		if (wm8996->pdata.ldo_ena >= 0) {
1619a9ba6151SMark Brown 			gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
1620b7c1b730SLars-Peter Clausen 			regcache_cache_only(wm8996->regmap, true);
1621d4b3d0fbSMark Brown 		}
1622a9ba6151SMark Brown 		regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies),
1623a9ba6151SMark Brown 				       wm8996->supplies);
1624a9ba6151SMark Brown 		break;
1625a9ba6151SMark Brown 	}
1626a9ba6151SMark Brown 
1627a9ba6151SMark Brown 	return 0;
1628a9ba6151SMark Brown }
1629a9ba6151SMark Brown 
wm8996_set_fmt(struct snd_soc_dai * dai,unsigned int fmt)1630a9ba6151SMark Brown static int wm8996_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1631a9ba6151SMark Brown {
16325d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = dai->component;
1633a9ba6151SMark Brown 	int aifctrl = 0;
1634a9ba6151SMark Brown 	int bclk = 0;
1635a9ba6151SMark Brown 	int lrclk_tx = 0;
1636a9ba6151SMark Brown 	int lrclk_rx = 0;
1637a9ba6151SMark Brown 	int aifctrl_reg, bclk_reg, lrclk_tx_reg, lrclk_rx_reg;
1638a9ba6151SMark Brown 
1639a9ba6151SMark Brown 	switch (dai->id) {
1640a9ba6151SMark Brown 	case 0:
1641a9ba6151SMark Brown 		aifctrl_reg = WM8996_AIF1_CONTROL;
1642a9ba6151SMark Brown 		bclk_reg = WM8996_AIF1_BCLK;
1643a9ba6151SMark Brown 		lrclk_tx_reg = WM8996_AIF1_TX_LRCLK_2;
1644a9ba6151SMark Brown 		lrclk_rx_reg = WM8996_AIF1_RX_LRCLK_2;
1645a9ba6151SMark Brown 		break;
1646a9ba6151SMark Brown 	case 1:
1647a9ba6151SMark Brown 		aifctrl_reg = WM8996_AIF2_CONTROL;
1648a9ba6151SMark Brown 		bclk_reg = WM8996_AIF2_BCLK;
1649a9ba6151SMark Brown 		lrclk_tx_reg = WM8996_AIF2_TX_LRCLK_2;
1650a9ba6151SMark Brown 		lrclk_rx_reg = WM8996_AIF2_RX_LRCLK_2;
1651a9ba6151SMark Brown 		break;
1652a9ba6151SMark Brown 	default:
1653d8e9a544STakashi Iwai 		WARN(1, "Invalid dai id %d\n", dai->id);
1654a9ba6151SMark Brown 		return -EINVAL;
1655a9ba6151SMark Brown 	}
1656a9ba6151SMark Brown 
1657a9ba6151SMark Brown 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1658a9ba6151SMark Brown 	case SND_SOC_DAIFMT_NB_NF:
1659a9ba6151SMark Brown 		break;
1660a9ba6151SMark Brown 	case SND_SOC_DAIFMT_IB_NF:
1661a9ba6151SMark Brown 		bclk |= WM8996_AIF1_BCLK_INV;
1662a9ba6151SMark Brown 		break;
1663a9ba6151SMark Brown 	case SND_SOC_DAIFMT_NB_IF:
1664a9ba6151SMark Brown 		lrclk_tx |= WM8996_AIF1TX_LRCLK_INV;
1665a9ba6151SMark Brown 		lrclk_rx |= WM8996_AIF1RX_LRCLK_INV;
1666a9ba6151SMark Brown 		break;
1667a9ba6151SMark Brown 	case SND_SOC_DAIFMT_IB_IF:
1668a9ba6151SMark Brown 		bclk |= WM8996_AIF1_BCLK_INV;
1669a9ba6151SMark Brown 		lrclk_tx |= WM8996_AIF1TX_LRCLK_INV;
1670a9ba6151SMark Brown 		lrclk_rx |= WM8996_AIF1RX_LRCLK_INV;
1671a9ba6151SMark Brown 		break;
1672a9ba6151SMark Brown 	}
1673a9ba6151SMark Brown 
1674a9ba6151SMark Brown 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1675a9ba6151SMark Brown 	case SND_SOC_DAIFMT_CBS_CFS:
1676a9ba6151SMark Brown 		break;
1677a9ba6151SMark Brown 	case SND_SOC_DAIFMT_CBS_CFM:
1678a9ba6151SMark Brown 		lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR;
1679a9ba6151SMark Brown 		lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR;
1680a9ba6151SMark Brown 		break;
1681a9ba6151SMark Brown 	case SND_SOC_DAIFMT_CBM_CFS:
1682a9ba6151SMark Brown 		bclk |= WM8996_AIF1_BCLK_MSTR;
1683a9ba6151SMark Brown 		break;
1684a9ba6151SMark Brown 	case SND_SOC_DAIFMT_CBM_CFM:
1685a9ba6151SMark Brown 		bclk |= WM8996_AIF1_BCLK_MSTR;
1686a9ba6151SMark Brown 		lrclk_tx |= WM8996_AIF1TX_LRCLK_MSTR;
1687a9ba6151SMark Brown 		lrclk_rx |= WM8996_AIF1RX_LRCLK_MSTR;
1688a9ba6151SMark Brown 		break;
1689a9ba6151SMark Brown 	default:
1690a9ba6151SMark Brown 		return -EINVAL;
1691a9ba6151SMark Brown 	}
1692a9ba6151SMark Brown 
1693a9ba6151SMark Brown 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1694a9ba6151SMark Brown 	case SND_SOC_DAIFMT_DSP_A:
1695a9ba6151SMark Brown 		break;
1696a9ba6151SMark Brown 	case SND_SOC_DAIFMT_DSP_B:
1697a9ba6151SMark Brown 		aifctrl |= 1;
1698a9ba6151SMark Brown 		break;
1699a9ba6151SMark Brown 	case SND_SOC_DAIFMT_I2S:
1700a9ba6151SMark Brown 		aifctrl |= 2;
1701a9ba6151SMark Brown 		break;
1702a9ba6151SMark Brown 	case SND_SOC_DAIFMT_LEFT_J:
1703a9ba6151SMark Brown 		aifctrl |= 3;
1704a9ba6151SMark Brown 		break;
1705a9ba6151SMark Brown 	default:
1706a9ba6151SMark Brown 		return -EINVAL;
1707a9ba6151SMark Brown 	}
1708a9ba6151SMark Brown 
17095d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, aifctrl_reg, WM8996_AIF1_FMT_MASK, aifctrl);
17105d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, bclk_reg,
1711a9ba6151SMark Brown 			    WM8996_AIF1_BCLK_INV | WM8996_AIF1_BCLK_MSTR,
1712a9ba6151SMark Brown 			    bclk);
17135d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, lrclk_tx_reg,
1714a9ba6151SMark Brown 			    WM8996_AIF1TX_LRCLK_INV |
1715a9ba6151SMark Brown 			    WM8996_AIF1TX_LRCLK_MSTR,
1716a9ba6151SMark Brown 			    lrclk_tx);
17175d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, lrclk_rx_reg,
1718a9ba6151SMark Brown 			    WM8996_AIF1RX_LRCLK_INV |
1719a9ba6151SMark Brown 			    WM8996_AIF1RX_LRCLK_MSTR,
1720a9ba6151SMark Brown 			    lrclk_rx);
1721a9ba6151SMark Brown 
1722a9ba6151SMark Brown 	return 0;
1723a9ba6151SMark Brown }
1724a9ba6151SMark Brown 
1725a9ba6151SMark Brown static const int dsp_divs[] = {
1726a9ba6151SMark Brown 	48000, 32000, 16000, 8000
1727a9ba6151SMark Brown };
1728a9ba6151SMark Brown 
wm8996_hw_params(struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)1729a9ba6151SMark Brown static int wm8996_hw_params(struct snd_pcm_substream *substream,
1730a9ba6151SMark Brown 			    struct snd_pcm_hw_params *params,
1731a9ba6151SMark Brown 			    struct snd_soc_dai *dai)
1732a9ba6151SMark Brown {
17335d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = dai->component;
17345d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
17354eb98f45SMark Brown 	int bits, i, bclk_rate, best;
1736a9ba6151SMark Brown 	int aifdata = 0;
1737a9ba6151SMark Brown 	int lrclk = 0;
1738a9ba6151SMark Brown 	int dsp = 0;
1739a9ba6151SMark Brown 	int aifdata_reg, lrclk_reg, dsp_shift;
1740a9ba6151SMark Brown 
1741a9ba6151SMark Brown 	switch (dai->id) {
1742a9ba6151SMark Brown 	case 0:
1743a9ba6151SMark Brown 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
17446d75dfc3SKuninori Morimoto 		    (snd_soc_component_read(component, WM8996_GPIO_1)) & WM8996_GP1_FN_MASK) {
1745a9ba6151SMark Brown 			aifdata_reg = WM8996_AIF1RX_DATA_CONFIGURATION;
1746a9ba6151SMark Brown 			lrclk_reg = WM8996_AIF1_RX_LRCLK_1;
1747a9ba6151SMark Brown 		} else {
1748a9ba6151SMark Brown 			aifdata_reg = WM8996_AIF1TX_DATA_CONFIGURATION_1;
1749a9ba6151SMark Brown 			lrclk_reg = WM8996_AIF1_TX_LRCLK_1;
1750a9ba6151SMark Brown 		}
1751a9ba6151SMark Brown 		dsp_shift = 0;
1752a9ba6151SMark Brown 		break;
1753a9ba6151SMark Brown 	case 1:
1754a9ba6151SMark Brown 		if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK ||
17556d75dfc3SKuninori Morimoto 		    (snd_soc_component_read(component, WM8996_GPIO_2)) & WM8996_GP2_FN_MASK) {
1756a9ba6151SMark Brown 			aifdata_reg = WM8996_AIF2RX_DATA_CONFIGURATION;
1757a9ba6151SMark Brown 			lrclk_reg = WM8996_AIF2_RX_LRCLK_1;
1758a9ba6151SMark Brown 		} else {
1759a9ba6151SMark Brown 			aifdata_reg = WM8996_AIF2TX_DATA_CONFIGURATION_1;
1760a9ba6151SMark Brown 			lrclk_reg = WM8996_AIF2_TX_LRCLK_1;
1761a9ba6151SMark Brown 		}
1762a9ba6151SMark Brown 		dsp_shift = WM8996_DSP2_DIV_SHIFT;
1763a9ba6151SMark Brown 		break;
1764a9ba6151SMark Brown 	default:
1765d8e9a544STakashi Iwai 		WARN(1, "Invalid dai id %d\n", dai->id);
1766a9ba6151SMark Brown 		return -EINVAL;
1767a9ba6151SMark Brown 	}
1768a9ba6151SMark Brown 
1769a9ba6151SMark Brown 	bclk_rate = snd_soc_params_to_bclk(params);
1770a9ba6151SMark Brown 	if (bclk_rate < 0) {
17715d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Unsupported BCLK rate: %d\n", bclk_rate);
1772a9ba6151SMark Brown 		return bclk_rate;
1773a9ba6151SMark Brown 	}
1774a9ba6151SMark Brown 
1775a9ba6151SMark Brown 	wm8996->bclk_rate[dai->id] = bclk_rate;
1776a9ba6151SMark Brown 	wm8996->rx_rate[dai->id] = params_rate(params);
1777a9ba6151SMark Brown 
1778a9ba6151SMark Brown 	/* Needs looking at for TDM */
17790a3dcb50SAxel Lin 	bits = params_width(params);
1780a9ba6151SMark Brown 	if (bits < 0)
1781a9ba6151SMark Brown 		return bits;
1782a9ba6151SMark Brown 	aifdata |= (bits << WM8996_AIF1TX_WL_SHIFT) | bits;
1783a9ba6151SMark Brown 
17844eb98f45SMark Brown 	best = 0;
1785a9ba6151SMark Brown 	for (i = 0; i < ARRAY_SIZE(dsp_divs); i++) {
17864eb98f45SMark Brown 		if (abs(dsp_divs[i] - params_rate(params)) <
17874eb98f45SMark Brown 		    abs(dsp_divs[best] - params_rate(params)))
17884eb98f45SMark Brown 			best = i;
1789a9ba6151SMark Brown 	}
1790a9ba6151SMark Brown 	dsp |= i << dsp_shift;
1791a9ba6151SMark Brown 
17925d61ef8bSKuninori Morimoto 	wm8996_update_bclk(component);
1793a9ba6151SMark Brown 
1794a9ba6151SMark Brown 	lrclk = bclk_rate / params_rate(params);
1795a9ba6151SMark Brown 	dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n",
1796a9ba6151SMark Brown 		lrclk, bclk_rate / lrclk);
1797a9ba6151SMark Brown 
17985d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, aifdata_reg,
1799a9ba6151SMark Brown 			    WM8996_AIF1TX_WL_MASK |
1800a9ba6151SMark Brown 			    WM8996_AIF1TX_SLOT_LEN_MASK,
1801a9ba6151SMark Brown 			    aifdata);
18025d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, lrclk_reg, WM8996_AIF1RX_RATE_MASK,
1803a9ba6151SMark Brown 			    lrclk);
18045d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_AIF_CLOCKING_2,
18053205e662SAxel Lin 			    WM8996_DSP1_DIV_MASK << dsp_shift, dsp);
1806a9ba6151SMark Brown 
1807a9ba6151SMark Brown 	return 0;
1808a9ba6151SMark Brown }
1809a9ba6151SMark Brown 
wm8996_set_sysclk(struct snd_soc_dai * dai,int clk_id,unsigned int freq,int dir)1810a9ba6151SMark Brown static int wm8996_set_sysclk(struct snd_soc_dai *dai,
1811a9ba6151SMark Brown 		int clk_id, unsigned int freq, int dir)
1812a9ba6151SMark Brown {
18135d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = dai->component;
18145d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
1815a9ba6151SMark Brown 	int lfclk = 0;
1816a9ba6151SMark Brown 	int ratediv = 0;
1817fed22007SMark Brown 	int sync = WM8996_REG_SYNC;
1818a9ba6151SMark Brown 	int src;
1819a9ba6151SMark Brown 	int old;
1820a9ba6151SMark Brown 
1821a9ba6151SMark Brown 	if (freq == wm8996->sysclk && clk_id == wm8996->sysclk_src)
1822a9ba6151SMark Brown 		return 0;
1823a9ba6151SMark Brown 
1824a9ba6151SMark Brown 	/* Disable SYSCLK while we reconfigure */
18256d75dfc3SKuninori Morimoto 	old = snd_soc_component_read(component, WM8996_AIF_CLOCKING_1) & WM8996_SYSCLK_ENA;
18265d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_AIF_CLOCKING_1,
1827a9ba6151SMark Brown 			    WM8996_SYSCLK_ENA, 0);
1828a9ba6151SMark Brown 
1829a9ba6151SMark Brown 	switch (clk_id) {
1830a9ba6151SMark Brown 	case WM8996_SYSCLK_MCLK1:
1831a9ba6151SMark Brown 		wm8996->sysclk = freq;
1832a9ba6151SMark Brown 		src = 0;
1833a9ba6151SMark Brown 		break;
1834a9ba6151SMark Brown 	case WM8996_SYSCLK_MCLK2:
1835a9ba6151SMark Brown 		wm8996->sysclk = freq;
1836a9ba6151SMark Brown 		src = 1;
1837a9ba6151SMark Brown 		break;
1838a9ba6151SMark Brown 	case WM8996_SYSCLK_FLL:
1839a9ba6151SMark Brown 		wm8996->sysclk = freq;
1840a9ba6151SMark Brown 		src = 2;
1841a9ba6151SMark Brown 		break;
1842a9ba6151SMark Brown 	default:
18435d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Unsupported clock source %d\n", clk_id);
1844a9ba6151SMark Brown 		return -EINVAL;
1845a9ba6151SMark Brown 	}
1846a9ba6151SMark Brown 
1847a9ba6151SMark Brown 	switch (wm8996->sysclk) {
18484eb98f45SMark Brown 	case 5644800:
1849a9ba6151SMark Brown 	case 6144000:
18505d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_AIF_RATE,
1851a9ba6151SMark Brown 				    WM8996_SYSCLK_RATE, 0);
1852a9ba6151SMark Brown 		break;
18534eb98f45SMark Brown 	case 22579200:
1854a9ba6151SMark Brown 	case 24576000:
1855a9ba6151SMark Brown 		ratediv = WM8996_SYSCLK_DIV;
185637d5993cSMark Brown 		wm8996->sysclk /= 2;
18573e146b55SGustavo A. R. Silva 		fallthrough;
18584eb98f45SMark Brown 	case 11289600:
1859a9ba6151SMark Brown 	case 12288000:
18605d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_AIF_RATE,
1861a9ba6151SMark Brown 				    WM8996_SYSCLK_RATE, WM8996_SYSCLK_RATE);
1862a9ba6151SMark Brown 		break;
1863a9ba6151SMark Brown 	case 32000:
1864a9ba6151SMark Brown 	case 32768:
1865a9ba6151SMark Brown 		lfclk = WM8996_LFCLK_ENA;
1866fed22007SMark Brown 		sync = 0;
1867a9ba6151SMark Brown 		break;
1868a9ba6151SMark Brown 	default:
18695d61ef8bSKuninori Morimoto 		dev_warn(component->dev, "Unsupported clock rate %dHz\n",
1870a9ba6151SMark Brown 			 wm8996->sysclk);
1871a9ba6151SMark Brown 		return -EINVAL;
1872a9ba6151SMark Brown 	}
1873a9ba6151SMark Brown 
18745d61ef8bSKuninori Morimoto 	wm8996_update_bclk(component);
1875a9ba6151SMark Brown 
18765d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_AIF_CLOCKING_1,
1877a9ba6151SMark Brown 			    WM8996_SYSCLK_SRC_MASK | WM8996_SYSCLK_DIV_MASK,
1878a9ba6151SMark Brown 			    src << WM8996_SYSCLK_SRC_SHIFT | ratediv);
18795d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_CLOCKING_1, WM8996_LFCLK_ENA, lfclk);
18805d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_CONTROL_INTERFACE_1,
1881fed22007SMark Brown 			    WM8996_REG_SYNC, sync);
18825d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_AIF_CLOCKING_1,
1883a9ba6151SMark Brown 			    WM8996_SYSCLK_ENA, old);
1884a9ba6151SMark Brown 
1885a9ba6151SMark Brown 	wm8996->sysclk_src = clk_id;
1886a9ba6151SMark Brown 
1887a9ba6151SMark Brown 	return 0;
1888a9ba6151SMark Brown }
1889a9ba6151SMark Brown 
1890a9ba6151SMark Brown struct _fll_div {
1891a9ba6151SMark Brown 	u16 fll_fratio;
1892a9ba6151SMark Brown 	u16 fll_outdiv;
1893a9ba6151SMark Brown 	u16 fll_refclk_div;
1894a9ba6151SMark Brown 	u16 fll_loop_gain;
1895a9ba6151SMark Brown 	u16 fll_ref_freq;
1896a9ba6151SMark Brown 	u16 n;
1897a9ba6151SMark Brown 	u16 theta;
1898a9ba6151SMark Brown 	u16 lambda;
1899a9ba6151SMark Brown };
1900a9ba6151SMark Brown 
1901a9ba6151SMark Brown static struct {
1902a9ba6151SMark Brown 	unsigned int min;
1903a9ba6151SMark Brown 	unsigned int max;
1904a9ba6151SMark Brown 	u16 fll_fratio;
1905a9ba6151SMark Brown 	int ratio;
1906a9ba6151SMark Brown } fll_fratios[] = {
1907a9ba6151SMark Brown 	{       0,    64000, 4, 16 },
1908a9ba6151SMark Brown 	{   64000,   128000, 3,  8 },
1909a9ba6151SMark Brown 	{  128000,   256000, 2,  4 },
1910a9ba6151SMark Brown 	{  256000,  1000000, 1,  2 },
1911a9ba6151SMark Brown 	{ 1000000, 13500000, 0,  1 },
1912a9ba6151SMark Brown };
1913a9ba6151SMark Brown 
fll_factors(struct _fll_div * fll_div,unsigned int Fref,unsigned int Fout)1914a9ba6151SMark Brown static int fll_factors(struct _fll_div *fll_div, unsigned int Fref,
1915a9ba6151SMark Brown 		       unsigned int Fout)
1916a9ba6151SMark Brown {
1917a9ba6151SMark Brown 	unsigned int target;
1918a9ba6151SMark Brown 	unsigned int div;
1919a9ba6151SMark Brown 	unsigned int fratio, gcd_fll;
1920a9ba6151SMark Brown 	int i;
1921a9ba6151SMark Brown 
1922a9ba6151SMark Brown 	/* Fref must be <=13.5MHz */
1923a9ba6151SMark Brown 	div = 1;
1924a9ba6151SMark Brown 	fll_div->fll_refclk_div = 0;
1925a9ba6151SMark Brown 	while ((Fref / div) > 13500000) {
1926a9ba6151SMark Brown 		div *= 2;
1927a9ba6151SMark Brown 		fll_div->fll_refclk_div++;
1928a9ba6151SMark Brown 
1929a9ba6151SMark Brown 		if (div > 8) {
1930a9ba6151SMark Brown 			pr_err("Can't scale %dMHz input down to <=13.5MHz\n",
1931a9ba6151SMark Brown 			       Fref);
1932a9ba6151SMark Brown 			return -EINVAL;
1933a9ba6151SMark Brown 		}
1934a9ba6151SMark Brown 	}
1935a9ba6151SMark Brown 
1936a9ba6151SMark Brown 	pr_debug("FLL Fref=%u Fout=%u\n", Fref, Fout);
1937a9ba6151SMark Brown 
1938a9ba6151SMark Brown 	/* Apply the division for our remaining calculations */
1939a9ba6151SMark Brown 	Fref /= div;
1940a9ba6151SMark Brown 
1941a9ba6151SMark Brown 	if (Fref >= 3000000)
1942a9ba6151SMark Brown 		fll_div->fll_loop_gain = 5;
1943a9ba6151SMark Brown 	else
1944a9ba6151SMark Brown 		fll_div->fll_loop_gain = 0;
1945a9ba6151SMark Brown 
1946a9ba6151SMark Brown 	if (Fref >= 48000)
1947a9ba6151SMark Brown 		fll_div->fll_ref_freq = 0;
1948a9ba6151SMark Brown 	else
1949a9ba6151SMark Brown 		fll_div->fll_ref_freq = 1;
1950a9ba6151SMark Brown 
1951a9ba6151SMark Brown 	/* Fvco should be 90-100MHz; don't check the upper bound */
1952a9ba6151SMark Brown 	div = 2;
1953a9ba6151SMark Brown 	while (Fout * div < 90000000) {
1954a9ba6151SMark Brown 		div++;
1955a9ba6151SMark Brown 		if (div > 64) {
1956a9ba6151SMark Brown 			pr_err("Unable to find FLL_OUTDIV for Fout=%uHz\n",
1957a9ba6151SMark Brown 			       Fout);
1958a9ba6151SMark Brown 			return -EINVAL;
1959a9ba6151SMark Brown 		}
1960a9ba6151SMark Brown 	}
1961a9ba6151SMark Brown 	target = Fout * div;
1962a9ba6151SMark Brown 	fll_div->fll_outdiv = div - 1;
1963a9ba6151SMark Brown 
1964a9ba6151SMark Brown 	pr_debug("FLL Fvco=%dHz\n", target);
1965a9ba6151SMark Brown 
1966a9ba6151SMark Brown 	/* Find an appropraite FLL_FRATIO and factor it out of the target */
1967a9ba6151SMark Brown 	for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
1968a9ba6151SMark Brown 		if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
1969a9ba6151SMark Brown 			fll_div->fll_fratio = fll_fratios[i].fll_fratio;
1970a9ba6151SMark Brown 			fratio = fll_fratios[i].ratio;
1971a9ba6151SMark Brown 			break;
1972a9ba6151SMark Brown 		}
1973a9ba6151SMark Brown 	}
1974a9ba6151SMark Brown 	if (i == ARRAY_SIZE(fll_fratios)) {
1975a9ba6151SMark Brown 		pr_err("Unable to find FLL_FRATIO for Fref=%uHz\n", Fref);
1976a9ba6151SMark Brown 		return -EINVAL;
1977a9ba6151SMark Brown 	}
1978a9ba6151SMark Brown 
1979a9ba6151SMark Brown 	fll_div->n = target / (fratio * Fref);
1980a9ba6151SMark Brown 
1981a9ba6151SMark Brown 	if (target % Fref == 0) {
1982a9ba6151SMark Brown 		fll_div->theta = 0;
1983a9ba6151SMark Brown 		fll_div->lambda = 0;
1984a9ba6151SMark Brown 	} else {
1985a9ba6151SMark Brown 		gcd_fll = gcd(target, fratio * Fref);
1986a9ba6151SMark Brown 
1987a9ba6151SMark Brown 		fll_div->theta = (target - (fll_div->n * fratio * Fref))
1988a9ba6151SMark Brown 			/ gcd_fll;
1989a9ba6151SMark Brown 		fll_div->lambda = (fratio * Fref) / gcd_fll;
1990a9ba6151SMark Brown 	}
1991a9ba6151SMark Brown 
1992a9ba6151SMark Brown 	pr_debug("FLL N=%x THETA=%x LAMBDA=%x\n",
1993a9ba6151SMark Brown 		 fll_div->n, fll_div->theta, fll_div->lambda);
1994a9ba6151SMark Brown 	pr_debug("FLL_FRATIO=%x FLL_OUTDIV=%x FLL_REFCLK_DIV=%x\n",
1995a9ba6151SMark Brown 		 fll_div->fll_fratio, fll_div->fll_outdiv,
1996a9ba6151SMark Brown 		 fll_div->fll_refclk_div);
1997a9ba6151SMark Brown 
1998a9ba6151SMark Brown 	return 0;
1999a9ba6151SMark Brown }
2000a9ba6151SMark Brown 
wm8996_set_fll(struct snd_soc_component * component,int fll_id,int source,unsigned int Fref,unsigned int Fout)20015d61ef8bSKuninori Morimoto static int wm8996_set_fll(struct snd_soc_component *component, int fll_id, int source,
2002a9ba6151SMark Brown 			  unsigned int Fref, unsigned int Fout)
2003a9ba6151SMark Brown {
20045d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
20055d61ef8bSKuninori Morimoto 	struct i2c_client *i2c = to_i2c_client(component->dev);
2006a9ba6151SMark Brown 	struct _fll_div fll_div;
200762c76fe2SNicholas Mc Guire 	unsigned long timeout, time_left;
200827b6d92aSMark Brown 	int ret, reg, retry;
2009a9ba6151SMark Brown 
2010a9ba6151SMark Brown 	/* Any change? */
2011a9ba6151SMark Brown 	if (source == wm8996->fll_src && Fref == wm8996->fll_fref &&
2012a9ba6151SMark Brown 	    Fout == wm8996->fll_fout)
2013a9ba6151SMark Brown 		return 0;
2014a9ba6151SMark Brown 
2015a9ba6151SMark Brown 	if (Fout == 0) {
20165d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "FLL disabled\n");
2017a9ba6151SMark Brown 
2018a9ba6151SMark Brown 		wm8996->fll_fref = 0;
2019a9ba6151SMark Brown 		wm8996->fll_fout = 0;
2020a9ba6151SMark Brown 
20215d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_FLL_CONTROL_1,
2022a9ba6151SMark Brown 				    WM8996_FLL_ENA, 0);
2023a9ba6151SMark Brown 
20245d61ef8bSKuninori Morimoto 		wm8996_bg_disable(component);
2025ded71dcbSMark Brown 
2026a9ba6151SMark Brown 		return 0;
2027a9ba6151SMark Brown 	}
2028a9ba6151SMark Brown 
2029a9ba6151SMark Brown 	ret = fll_factors(&fll_div, Fref, Fout);
2030a9ba6151SMark Brown 	if (ret != 0)
2031a9ba6151SMark Brown 		return ret;
2032a9ba6151SMark Brown 
2033a9ba6151SMark Brown 	switch (source) {
2034a9ba6151SMark Brown 	case WM8996_FLL_MCLK1:
2035a9ba6151SMark Brown 		reg = 0;
2036a9ba6151SMark Brown 		break;
2037a9ba6151SMark Brown 	case WM8996_FLL_MCLK2:
2038a9ba6151SMark Brown 		reg = 1;
2039a9ba6151SMark Brown 		break;
2040a9ba6151SMark Brown 	case WM8996_FLL_DACLRCLK1:
2041a9ba6151SMark Brown 		reg = 2;
2042a9ba6151SMark Brown 		break;
2043a9ba6151SMark Brown 	case WM8996_FLL_BCLK1:
2044a9ba6151SMark Brown 		reg = 3;
2045a9ba6151SMark Brown 		break;
2046a9ba6151SMark Brown 	default:
20475d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Unknown FLL source %d\n", ret);
2048a9ba6151SMark Brown 		return -EINVAL;
2049a9ba6151SMark Brown 	}
2050a9ba6151SMark Brown 
2051a9ba6151SMark Brown 	reg |= fll_div.fll_refclk_div << WM8996_FLL_REFCLK_DIV_SHIFT;
2052a9ba6151SMark Brown 	reg |= fll_div.fll_ref_freq << WM8996_FLL_REF_FREQ_SHIFT;
2053a9ba6151SMark Brown 
20545d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_FLL_CONTROL_5,
2055a9ba6151SMark Brown 			    WM8996_FLL_REFCLK_DIV_MASK | WM8996_FLL_REF_FREQ |
2056a9ba6151SMark Brown 			    WM8996_FLL_REFCLK_SRC_MASK, reg);
2057a9ba6151SMark Brown 
2058a9ba6151SMark Brown 	reg = 0;
2059a9ba6151SMark Brown 	if (fll_div.theta || fll_div.lambda)
2060a9ba6151SMark Brown 		reg |= WM8996_FLL_EFS_ENA | (3 << WM8996_FLL_LFSR_SEL_SHIFT);
2061a9ba6151SMark Brown 	else
2062a9ba6151SMark Brown 		reg |= 1 << WM8996_FLL_LFSR_SEL_SHIFT;
20635d61ef8bSKuninori Morimoto 	snd_soc_component_write(component, WM8996_FLL_EFS_2, reg);
2064a9ba6151SMark Brown 
20655d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_FLL_CONTROL_2,
2066a9ba6151SMark Brown 			    WM8996_FLL_OUTDIV_MASK |
2067a9ba6151SMark Brown 			    WM8996_FLL_FRATIO_MASK,
2068a9ba6151SMark Brown 			    (fll_div.fll_outdiv << WM8996_FLL_OUTDIV_SHIFT) |
2069a9ba6151SMark Brown 			    (fll_div.fll_fratio));
2070a9ba6151SMark Brown 
20715d61ef8bSKuninori Morimoto 	snd_soc_component_write(component, WM8996_FLL_CONTROL_3, fll_div.theta);
2072a9ba6151SMark Brown 
20735d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_FLL_CONTROL_4,
2074a9ba6151SMark Brown 			    WM8996_FLL_N_MASK | WM8996_FLL_LOOP_GAIN_MASK,
2075a9ba6151SMark Brown 			    (fll_div.n << WM8996_FLL_N_SHIFT) |
2076a9ba6151SMark Brown 			    fll_div.fll_loop_gain);
2077a9ba6151SMark Brown 
20785d61ef8bSKuninori Morimoto 	snd_soc_component_write(component, WM8996_FLL_EFS_1, fll_div.lambda);
2079a9ba6151SMark Brown 
2080ded71dcbSMark Brown 	/* Enable the bandgap if it's not already enabled */
20816d75dfc3SKuninori Morimoto 	ret = snd_soc_component_read(component, WM8996_FLL_CONTROL_1);
2082ded71dcbSMark Brown 	if (!(ret & WM8996_FLL_ENA))
20835d61ef8bSKuninori Morimoto 		wm8996_bg_enable(component);
2084ded71dcbSMark Brown 
2085a4161945SMark Brown 	/* Clear any pending completions (eg, from failed startups) */
2086a4161945SMark Brown 	try_wait_for_completion(&wm8996->fll_lock);
2087a4161945SMark Brown 
20885d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_FLL_CONTROL_1,
2089a9ba6151SMark Brown 			    WM8996_FLL_ENA, WM8996_FLL_ENA);
2090a9ba6151SMark Brown 
2091a9ba6151SMark Brown 	/* The FLL supports live reconfiguration - kick that in case we were
2092a9ba6151SMark Brown 	 * already enabled.
2093a9ba6151SMark Brown 	 */
20945d61ef8bSKuninori Morimoto 	snd_soc_component_write(component, WM8996_FLL_CONTROL_6, WM8996_FLL_SWITCH_CLK);
2095a9ba6151SMark Brown 
2096a9ba6151SMark Brown 	/* Wait for the FLL to lock, using the interrupt if possible */
2097a9ba6151SMark Brown 	if (Fref > 1000000)
2098a9ba6151SMark Brown 		timeout = usecs_to_jiffies(300);
2099a9ba6151SMark Brown 	else
2100a9ba6151SMark Brown 		timeout = msecs_to_jiffies(2);
2101a9ba6151SMark Brown 
210227b6d92aSMark Brown 	/* Allow substantially longer if we've actually got the IRQ, poll
210327b6d92aSMark Brown 	 * at a slightly higher rate if we don't.
210427b6d92aSMark Brown 	 */
2105a9ba6151SMark Brown 	if (i2c->irq)
210627b6d92aSMark Brown 		timeout *= 10;
210727b6d92aSMark Brown 	else
2108159366eaSNicholas Mc Guire 		/* ensure timeout of atleast 1 jiffies */
2109ea80d499SPierre-Louis Bossart 		timeout = (timeout/2) ? : 1;
2110a9ba6151SMark Brown 
211127b6d92aSMark Brown 	for (retry = 0; retry < 10; retry++) {
211262c76fe2SNicholas Mc Guire 		time_left = wait_for_completion_timeout(&wm8996->fll_lock,
211327b6d92aSMark Brown 							timeout);
211462c76fe2SNicholas Mc Guire 		if (time_left != 0) {
211527b6d92aSMark Brown 			WARN_ON(!i2c->irq);
211662c76fe2SNicholas Mc Guire 			ret = 1;
211727b6d92aSMark Brown 			break;
211827b6d92aSMark Brown 		}
2119a9ba6151SMark Brown 
21206d75dfc3SKuninori Morimoto 		ret = snd_soc_component_read(component, WM8996_INTERRUPT_RAW_STATUS_2);
212127b6d92aSMark Brown 		if (ret & WM8996_FLL_LOCK_STS)
212227b6d92aSMark Brown 			break;
212327b6d92aSMark Brown 	}
212427b6d92aSMark Brown 	if (retry == 10) {
21255d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Timed out waiting for FLL\n");
2126a9ba6151SMark Brown 		ret = -ETIMEDOUT;
2127a9ba6151SMark Brown 	}
2128a9ba6151SMark Brown 
21295d61ef8bSKuninori Morimoto 	dev_dbg(component->dev, "FLL configured for %dHz->%dHz\n", Fref, Fout);
2130a9ba6151SMark Brown 
2131a9ba6151SMark Brown 	wm8996->fll_fref = Fref;
2132a9ba6151SMark Brown 	wm8996->fll_fout = Fout;
2133a9ba6151SMark Brown 	wm8996->fll_src = source;
2134a9ba6151SMark Brown 
2135a9ba6151SMark Brown 	return ret;
2136a9ba6151SMark Brown }
2137a9ba6151SMark Brown 
2138a9ba6151SMark Brown #ifdef CONFIG_GPIOLIB
wm8996_gpio_set(struct gpio_chip * chip,unsigned offset,int value)2139a9ba6151SMark Brown static void wm8996_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
2140a9ba6151SMark Brown {
2141c2aea142SLinus Walleij 	struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2142a9ba6151SMark Brown 
2143b2d1e233SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset,
2144a9ba6151SMark Brown 			   WM8996_GP1_LVL, !!value << WM8996_GP1_LVL_SHIFT);
2145a9ba6151SMark Brown }
2146a9ba6151SMark Brown 
wm8996_gpio_direction_out(struct gpio_chip * chip,unsigned offset,int value)2147a9ba6151SMark Brown static int wm8996_gpio_direction_out(struct gpio_chip *chip,
2148a9ba6151SMark Brown 				     unsigned offset, int value)
2149a9ba6151SMark Brown {
2150c2aea142SLinus Walleij 	struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2151a9ba6151SMark Brown 	int val;
2152a9ba6151SMark Brown 
2153a9ba6151SMark Brown 	val = (1 << WM8996_GP1_FN_SHIFT) | (!!value << WM8996_GP1_LVL_SHIFT);
2154a9ba6151SMark Brown 
2155b2d1e233SMark Brown 	return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset,
2156a9ba6151SMark Brown 				  WM8996_GP1_FN_MASK | WM8996_GP1_DIR |
2157a9ba6151SMark Brown 				  WM8996_GP1_LVL, val);
2158a9ba6151SMark Brown }
2159a9ba6151SMark Brown 
wm8996_gpio_get(struct gpio_chip * chip,unsigned offset)2160a9ba6151SMark Brown static int wm8996_gpio_get(struct gpio_chip *chip, unsigned offset)
2161a9ba6151SMark Brown {
2162c2aea142SLinus Walleij 	struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2163b2d1e233SMark Brown 	unsigned int reg;
2164a9ba6151SMark Brown 	int ret;
2165a9ba6151SMark Brown 
2166b2d1e233SMark Brown 	ret = regmap_read(wm8996->regmap, WM8996_GPIO_1 + offset, &reg);
2167a9ba6151SMark Brown 	if (ret < 0)
2168a9ba6151SMark Brown 		return ret;
2169a9ba6151SMark Brown 
2170b2d1e233SMark Brown 	return (reg & WM8996_GP1_LVL) != 0;
2171a9ba6151SMark Brown }
2172a9ba6151SMark Brown 
wm8996_gpio_direction_in(struct gpio_chip * chip,unsigned offset)2173a9ba6151SMark Brown static int wm8996_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
2174a9ba6151SMark Brown {
2175c2aea142SLinus Walleij 	struct wm8996_priv *wm8996 = gpiochip_get_data(chip);
2176a9ba6151SMark Brown 
2177b2d1e233SMark Brown 	return regmap_update_bits(wm8996->regmap, WM8996_GPIO_1 + offset,
2178a9ba6151SMark Brown 				  WM8996_GP1_FN_MASK | WM8996_GP1_DIR,
2179a9ba6151SMark Brown 				  (1 << WM8996_GP1_FN_SHIFT) |
2180a9ba6151SMark Brown 				  (1 << WM8996_GP1_DIR_SHIFT));
2181a9ba6151SMark Brown }
2182a9ba6151SMark Brown 
2183c59b24f8SJulia Lawall static const struct gpio_chip wm8996_template_chip = {
2184a9ba6151SMark Brown 	.label			= "wm8996",
2185a9ba6151SMark Brown 	.owner			= THIS_MODULE,
2186a9ba6151SMark Brown 	.direction_output	= wm8996_gpio_direction_out,
2187a9ba6151SMark Brown 	.set			= wm8996_gpio_set,
2188a9ba6151SMark Brown 	.direction_input	= wm8996_gpio_direction_in,
2189a9ba6151SMark Brown 	.get			= wm8996_gpio_get,
2190a9ba6151SMark Brown 	.can_sleep		= 1,
2191a9ba6151SMark Brown };
2192a9ba6151SMark Brown 
wm8996_init_gpio(struct wm8996_priv * wm8996)2193b2d1e233SMark Brown static void wm8996_init_gpio(struct wm8996_priv *wm8996)
2194a9ba6151SMark Brown {
2195a9ba6151SMark Brown 	int ret;
2196a9ba6151SMark Brown 
2197a9ba6151SMark Brown 	wm8996->gpio_chip = wm8996_template_chip;
2198a9ba6151SMark Brown 	wm8996->gpio_chip.ngpio = 5;
219958383c78SLinus Walleij 	wm8996->gpio_chip.parent = wm8996->dev;
2200a9ba6151SMark Brown 
2201a9ba6151SMark Brown 	if (wm8996->pdata.gpio_base)
2202a9ba6151SMark Brown 		wm8996->gpio_chip.base = wm8996->pdata.gpio_base;
2203a9ba6151SMark Brown 	else
2204a9ba6151SMark Brown 		wm8996->gpio_chip.base = -1;
2205a9ba6151SMark Brown 
2206c2aea142SLinus Walleij 	ret = gpiochip_add_data(&wm8996->gpio_chip, wm8996);
2207a9ba6151SMark Brown 	if (ret != 0)
2208b2d1e233SMark Brown 		dev_err(wm8996->dev, "Failed to add GPIOs: %d\n", ret);
2209a9ba6151SMark Brown }
2210a9ba6151SMark Brown 
wm8996_free_gpio(struct wm8996_priv * wm8996)2211b2d1e233SMark Brown static void wm8996_free_gpio(struct wm8996_priv *wm8996)
2212a9ba6151SMark Brown {
221388d5e520Sabdoulaye berthe 	gpiochip_remove(&wm8996->gpio_chip);
2214a9ba6151SMark Brown }
2215a9ba6151SMark Brown #else
wm8996_init_gpio(struct wm8996_priv * wm8996)2216b2d1e233SMark Brown static void wm8996_init_gpio(struct wm8996_priv *wm8996)
2217a9ba6151SMark Brown {
2218a9ba6151SMark Brown }
2219a9ba6151SMark Brown 
wm8996_free_gpio(struct wm8996_priv * wm8996)2220b2d1e233SMark Brown static void wm8996_free_gpio(struct wm8996_priv *wm8996)
2221a9ba6151SMark Brown {
2222a9ba6151SMark Brown }
2223a9ba6151SMark Brown #endif
2224a9ba6151SMark Brown 
2225a9ba6151SMark Brown /**
2226a9ba6151SMark Brown  * wm8996_detect - Enable default WM8996 jack detection
2227824186fbSPierre-Louis Bossart  * @component: ASoC component
2228824186fbSPierre-Louis Bossart  * @jack: jack pointer
2229824186fbSPierre-Louis Bossart  * @polarity_cb: polarity callback
2230a9ba6151SMark Brown  *
2231a9ba6151SMark Brown  * The WM8996 has advanced accessory detection support for headsets.
2232a9ba6151SMark Brown  * This function provides a default implementation which integrates
2233a9ba6151SMark Brown  * the majority of this functionality with minimal user configuration.
2234a9ba6151SMark Brown  *
2235a9ba6151SMark Brown  * This will detect headset, headphone and short circuit button and
2236a9ba6151SMark Brown  * will also detect inverted microphone ground connections and update
2237a9ba6151SMark Brown  * the polarity of the connections.
2238a9ba6151SMark Brown  */
wm8996_detect(struct snd_soc_component * component,struct snd_soc_jack * jack,wm8996_polarity_fn polarity_cb)22395d61ef8bSKuninori Morimoto int wm8996_detect(struct snd_soc_component *component, struct snd_soc_jack *jack,
2240a9ba6151SMark Brown 		  wm8996_polarity_fn polarity_cb)
2241a9ba6151SMark Brown {
22425d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
22435d61ef8bSKuninori Morimoto 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
2244a9ba6151SMark Brown 
2245a9ba6151SMark Brown 	wm8996->jack = jack;
2246a9ba6151SMark Brown 	wm8996->detecting = true;
2247a9ba6151SMark Brown 	wm8996->polarity_cb = polarity_cb;
2248d7b35570SMark Brown 	wm8996->jack_flips = 0;
2249a9ba6151SMark Brown 
2250a9ba6151SMark Brown 	if (wm8996->polarity_cb)
22515d61ef8bSKuninori Morimoto 		wm8996->polarity_cb(component, 0);
2252a9ba6151SMark Brown 
2253a9ba6151SMark Brown 	/* Clear discarge to avoid noise during detection */
22545d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MICBIAS_1,
2255a9ba6151SMark Brown 			    WM8996_MICB1_DISCH, 0);
22565d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MICBIAS_2,
2257a9ba6151SMark Brown 			    WM8996_MICB2_DISCH, 0);
2258a9ba6151SMark Brown 
2259a9ba6151SMark Brown 	/* LDO2 powers the microphones, SYSCLK clocks detection */
226002afc6a2SCharles Keepax 	snd_soc_dapm_mutex_lock(dapm);
226102afc6a2SCharles Keepax 
226202afc6a2SCharles Keepax 	snd_soc_dapm_force_enable_pin_unlocked(dapm, "LDO2");
226302afc6a2SCharles Keepax 	snd_soc_dapm_force_enable_pin_unlocked(dapm, "SYSCLK");
226402afc6a2SCharles Keepax 
226502afc6a2SCharles Keepax 	snd_soc_dapm_mutex_unlock(dapm);
2266a9ba6151SMark Brown 
2267a9ba6151SMark Brown 	/* We start off just enabling microphone detection - even a
2268a9ba6151SMark Brown 	 * plain headphone will trigger detection.
2269a9ba6151SMark Brown 	 */
22705d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1,
2271a9ba6151SMark Brown 			    WM8996_MICD_ENA, WM8996_MICD_ENA);
2272a9ba6151SMark Brown 
2273a9ba6151SMark Brown 	/* Slowest detection rate, gives debounce for initial detection */
22745d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1,
2275a9ba6151SMark Brown 			    WM8996_MICD_RATE_MASK,
2276a9ba6151SMark Brown 			    WM8996_MICD_RATE_MASK);
2277a9ba6151SMark Brown 
2278a9ba6151SMark Brown 	/* Enable interrupts and we're off */
22795d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_INTERRUPT_STATUS_2_MASK,
22800b684cc1SMark Brown 			    WM8996_IM_MICD_EINT | WM8996_HP_DONE_EINT, 0);
2281a9ba6151SMark Brown 
2282a9ba6151SMark Brown 	return 0;
2283a9ba6151SMark Brown }
2284a9ba6151SMark Brown EXPORT_SYMBOL_GPL(wm8996_detect);
2285a9ba6151SMark Brown 
wm8996_hpdet_irq(struct snd_soc_component * component)22865d61ef8bSKuninori Morimoto static void wm8996_hpdet_irq(struct snd_soc_component *component)
22870b684cc1SMark Brown {
22885d61ef8bSKuninori Morimoto 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
22895d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
22900b684cc1SMark Brown 	int val, reg, report;
22910b684cc1SMark Brown 
22920b684cc1SMark Brown 	/* Assume headphone in error conditions; we need to report
22930b684cc1SMark Brown 	 * something or we stall our state machine.
22940b684cc1SMark Brown 	 */
22950b684cc1SMark Brown 	report = SND_JACK_HEADPHONE;
22960b684cc1SMark Brown 
22976d75dfc3SKuninori Morimoto 	reg = snd_soc_component_read(component, WM8996_HEADPHONE_DETECT_2);
22980b684cc1SMark Brown 	if (reg < 0) {
22995d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Failed to read HPDET status\n");
23000b684cc1SMark Brown 		goto out;
23010b684cc1SMark Brown 	}
23020b684cc1SMark Brown 
23030b684cc1SMark Brown 	if (!(reg & WM8996_HP_DONE)) {
23045d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Got HPDET IRQ but HPDET is busy\n");
23050b684cc1SMark Brown 		goto out;
23060b684cc1SMark Brown 	}
23070b684cc1SMark Brown 
23080b684cc1SMark Brown 	val = reg & WM8996_HP_LVL_MASK;
23090b684cc1SMark Brown 
23105d61ef8bSKuninori Morimoto 	dev_dbg(component->dev, "HPDET measured %d ohms\n", val);
23110b684cc1SMark Brown 
23120b684cc1SMark Brown 	/* If we've got high enough impedence then report as line,
23130b684cc1SMark Brown 	 * otherwise assume headphone.
23140b684cc1SMark Brown 	 */
23150b684cc1SMark Brown 	if (val >= 126)
23160b684cc1SMark Brown 		report = SND_JACK_LINEOUT;
23170b684cc1SMark Brown 	else
23180b684cc1SMark Brown 		report = SND_JACK_HEADPHONE;
23190b684cc1SMark Brown 
23200b684cc1SMark Brown out:
23210b684cc1SMark Brown 	if (wm8996->jack_mic)
23220b684cc1SMark Brown 		report |= SND_JACK_MICROPHONE;
23230b684cc1SMark Brown 
23240b684cc1SMark Brown 	snd_soc_jack_report(wm8996->jack, report,
23250b684cc1SMark Brown 			    SND_JACK_LINEOUT | SND_JACK_HEADSET);
23260b684cc1SMark Brown 
23270b684cc1SMark Brown 	wm8996->detecting = false;
23280b684cc1SMark Brown 
23290b684cc1SMark Brown 	/* If the output isn't running re-clamp it */
23306d75dfc3SKuninori Morimoto 	if (!(snd_soc_component_read(component, WM8996_POWER_MANAGEMENT_1) &
23310b684cc1SMark Brown 	      (WM8996_HPOUT1L_ENA | WM8996_HPOUT1R_RMV_SHORT)))
23325d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_ANALOGUE_HP_1,
23330b684cc1SMark Brown 				    WM8996_HPOUT1L_RMV_SHORT |
23340b684cc1SMark Brown 				    WM8996_HPOUT1R_RMV_SHORT, 0);
23350b684cc1SMark Brown 
23360b684cc1SMark Brown 	/* Go back to looking at the microphone */
23375d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_ACCESSORY_DETECT_MODE_1,
23380b684cc1SMark Brown 			    WM8996_JD_MODE_MASK, 0);
23395d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1, WM8996_MICD_ENA,
23400b684cc1SMark Brown 			    WM8996_MICD_ENA);
23410b684cc1SMark Brown 
23426a141e46SLars-Peter Clausen 	snd_soc_dapm_disable_pin(dapm, "Bandgap");
23436a141e46SLars-Peter Clausen 	snd_soc_dapm_sync(dapm);
23440b684cc1SMark Brown }
23450b684cc1SMark Brown 
wm8996_hpdet_start(struct snd_soc_component * component)23465d61ef8bSKuninori Morimoto static void wm8996_hpdet_start(struct snd_soc_component *component)
23470b684cc1SMark Brown {
23485d61ef8bSKuninori Morimoto 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
23496a141e46SLars-Peter Clausen 
23500b684cc1SMark Brown 	/* Unclamp the output, we can't measure while we're shorting it */
23515d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_ANALOGUE_HP_1,
23520b684cc1SMark Brown 			    WM8996_HPOUT1L_RMV_SHORT |
23530b684cc1SMark Brown 			    WM8996_HPOUT1R_RMV_SHORT,
23540b684cc1SMark Brown 			    WM8996_HPOUT1L_RMV_SHORT |
23550b684cc1SMark Brown 			    WM8996_HPOUT1R_RMV_SHORT);
23560b684cc1SMark Brown 
23570b684cc1SMark Brown 	/* We need bandgap for HPDET */
23586a141e46SLars-Peter Clausen 	snd_soc_dapm_force_enable_pin(dapm, "Bandgap");
23596a141e46SLars-Peter Clausen 	snd_soc_dapm_sync(dapm);
23600b684cc1SMark Brown 
23610b684cc1SMark Brown 	/* Go into headphone detect left mode */
23625d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1, WM8996_MICD_ENA, 0);
23635d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_ACCESSORY_DETECT_MODE_1,
23640b684cc1SMark Brown 			    WM8996_JD_MODE_MASK, 1);
23650b684cc1SMark Brown 
23660b684cc1SMark Brown 	/* Trigger a measurement */
23675d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_HEADPHONE_DETECT_1,
23680b684cc1SMark Brown 			    WM8996_HP_POLL, WM8996_HP_POLL);
23690b684cc1SMark Brown }
23700b684cc1SMark Brown 
wm8996_report_headphone(struct snd_soc_component * component)23715d61ef8bSKuninori Morimoto static void wm8996_report_headphone(struct snd_soc_component *component)
2372d7b35570SMark Brown {
23735d61ef8bSKuninori Morimoto 	dev_dbg(component->dev, "Headphone detected\n");
23745d61ef8bSKuninori Morimoto 	wm8996_hpdet_start(component);
2375d7b35570SMark Brown 
2376d7b35570SMark Brown 	/* Increase the detection rate a bit for responsiveness. */
23775d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1,
2378d7b35570SMark Brown 			    WM8996_MICD_RATE_MASK |
2379d7b35570SMark Brown 			    WM8996_MICD_BIAS_STARTTIME_MASK,
2380d7b35570SMark Brown 			    7 << WM8996_MICD_RATE_SHIFT |
2381d7b35570SMark Brown 			    7 << WM8996_MICD_BIAS_STARTTIME_SHIFT);
2382d7b35570SMark Brown }
2383d7b35570SMark Brown 
wm8996_micd(struct snd_soc_component * component)23845d61ef8bSKuninori Morimoto static void wm8996_micd(struct snd_soc_component *component)
2385a9ba6151SMark Brown {
23865d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
2387a9ba6151SMark Brown 	int val, reg;
2388a9ba6151SMark Brown 
23896d75dfc3SKuninori Morimoto 	val = snd_soc_component_read(component, WM8996_MIC_DETECT_3);
2390a9ba6151SMark Brown 
23915d61ef8bSKuninori Morimoto 	dev_dbg(component->dev, "Microphone event: %x\n", val);
2392a9ba6151SMark Brown 
2393a9ba6151SMark Brown 	if (!(val & WM8996_MICD_VALID)) {
23945d61ef8bSKuninori Morimoto 		dev_warn(component->dev, "Microphone detection state invalid\n");
2395a9ba6151SMark Brown 		return;
2396a9ba6151SMark Brown 	}
2397a9ba6151SMark Brown 
2398a9ba6151SMark Brown 	/* No accessory, reset everything and report removal */
2399a9ba6151SMark Brown 	if (!(val & WM8996_MICD_STS)) {
24005d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "Jack removal detected\n");
2401a9ba6151SMark Brown 		wm8996->jack_mic = false;
2402a9ba6151SMark Brown 		wm8996->detecting = true;
2403d7b35570SMark Brown 		wm8996->jack_flips = 0;
2404a9ba6151SMark Brown 		snd_soc_jack_report(wm8996->jack, 0,
24050b684cc1SMark Brown 				    SND_JACK_LINEOUT | SND_JACK_HEADSET |
24060b684cc1SMark Brown 				    SND_JACK_BTN_0);
24070b684cc1SMark Brown 
24085d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1,
240945ba82d8SMark Brown 				    WM8996_MICD_RATE_MASK |
241045ba82d8SMark Brown 				    WM8996_MICD_BIAS_STARTTIME_MASK,
241145ba82d8SMark Brown 				    WM8996_MICD_RATE_MASK |
241245ba82d8SMark Brown 				    9 << WM8996_MICD_BIAS_STARTTIME_SHIFT);
2413a9ba6151SMark Brown 		return;
2414a9ba6151SMark Brown 	}
2415a9ba6151SMark Brown 
24160b684cc1SMark Brown 	/* If the measurement is very high we've got a microphone,
24170b684cc1SMark Brown 	 * either we just detected one or if we already reported then
24180b684cc1SMark Brown 	 * we've got a button release event.
2419a9ba6151SMark Brown 	 */
2420a9ba6151SMark Brown 	if (val & 0x400) {
24210b684cc1SMark Brown 		if (wm8996->detecting) {
24225d61ef8bSKuninori Morimoto 			dev_dbg(component->dev, "Microphone detected\n");
2423a9ba6151SMark Brown 			wm8996->jack_mic = true;
24245d61ef8bSKuninori Morimoto 			wm8996_hpdet_start(component);
2425a9ba6151SMark Brown 
2426a9ba6151SMark Brown 			/* Increase poll rate to give better responsiveness
2427a9ba6151SMark Brown 			 * for buttons */
24285d61ef8bSKuninori Morimoto 			snd_soc_component_update_bits(component, WM8996_MIC_DETECT_1,
242945ba82d8SMark Brown 					    WM8996_MICD_RATE_MASK |
243045ba82d8SMark Brown 					    WM8996_MICD_BIAS_STARTTIME_MASK,
243145ba82d8SMark Brown 					    5 << WM8996_MICD_RATE_SHIFT |
243245ba82d8SMark Brown 					    7 << WM8996_MICD_BIAS_STARTTIME_SHIFT);
24330b684cc1SMark Brown 		} else {
24345d61ef8bSKuninori Morimoto 			dev_dbg(component->dev, "Mic button up\n");
24350b684cc1SMark Brown 			snd_soc_jack_report(wm8996->jack, 0, SND_JACK_BTN_0);
24360b684cc1SMark Brown 		}
24370b684cc1SMark Brown 
24380b684cc1SMark Brown 		return;
2439a9ba6151SMark Brown 	}
2440a9ba6151SMark Brown 
2441a9ba6151SMark Brown 	/* If we detected a lower impedence during initial startup
2442a9ba6151SMark Brown 	 * then we probably have the wrong polarity, flip it.  Don't
2443a9ba6151SMark Brown 	 * do this for the lowest impedences to speed up detection of
2444d7b35570SMark Brown 	 * plain headphones.  If both polarities report a low
2445d7b35570SMark Brown 	 * impedence then give up and report headphones.
2446a9ba6151SMark Brown 	 */
2447a9ba6151SMark Brown 	if (wm8996->detecting && (val & 0x3f0)) {
2448d7b35570SMark Brown 		wm8996->jack_flips++;
2449d7b35570SMark Brown 
2450d7b35570SMark Brown 		if (wm8996->jack_flips > 1) {
24515d61ef8bSKuninori Morimoto 			wm8996_report_headphone(component);
2452d7b35570SMark Brown 			return;
2453d7b35570SMark Brown 		}
2454d7b35570SMark Brown 
24556d75dfc3SKuninori Morimoto 		reg = snd_soc_component_read(component, WM8996_ACCESSORY_DETECT_MODE_2);
2456a9ba6151SMark Brown 		reg ^= WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC |
2457a9ba6151SMark Brown 			WM8996_MICD_BIAS_SRC;
24585d61ef8bSKuninori Morimoto 		snd_soc_component_update_bits(component, WM8996_ACCESSORY_DETECT_MODE_2,
2459a9ba6151SMark Brown 				    WM8996_HPOUT1FB_SRC | WM8996_MICD_SRC |
2460a9ba6151SMark Brown 				    WM8996_MICD_BIAS_SRC, reg);
2461a9ba6151SMark Brown 
2462a9ba6151SMark Brown 		if (wm8996->polarity_cb)
24635d61ef8bSKuninori Morimoto 			wm8996->polarity_cb(component,
2464a9ba6151SMark Brown 					    (reg & WM8996_MICD_SRC) != 0);
2465a9ba6151SMark Brown 
24665d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "Set microphone polarity to %d\n",
2467a9ba6151SMark Brown 			(reg & WM8996_MICD_SRC) != 0);
2468a9ba6151SMark Brown 
2469a9ba6151SMark Brown 		return;
2470a9ba6151SMark Brown 	}
2471a9ba6151SMark Brown 
2472a9ba6151SMark Brown 	/* Don't distinguish between buttons, just report any low
2473a9ba6151SMark Brown 	 * impedence as BTN_0.
2474a9ba6151SMark Brown 	 */
2475a9ba6151SMark Brown 	if (val & 0x3fc) {
2476a9ba6151SMark Brown 		if (wm8996->jack_mic) {
24775d61ef8bSKuninori Morimoto 			dev_dbg(component->dev, "Mic button detected\n");
24780b684cc1SMark Brown 			snd_soc_jack_report(wm8996->jack, SND_JACK_BTN_0,
2479a9ba6151SMark Brown 					    SND_JACK_BTN_0);
24800b684cc1SMark Brown 		} else if (wm8996->detecting) {
24815d61ef8bSKuninori Morimoto 			wm8996_report_headphone(component);
2482a9ba6151SMark Brown 		}
2483a9ba6151SMark Brown 	}
2484a9ba6151SMark Brown }
2485a9ba6151SMark Brown 
wm8996_irq(int irq,void * data)2486a9ba6151SMark Brown static irqreturn_t wm8996_irq(int irq, void *data)
2487a9ba6151SMark Brown {
24885d61ef8bSKuninori Morimoto 	struct snd_soc_component *component = data;
24895d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
2490a9ba6151SMark Brown 	int irq_val;
2491a9ba6151SMark Brown 
24926d75dfc3SKuninori Morimoto 	irq_val = snd_soc_component_read(component, WM8996_INTERRUPT_STATUS_2);
2493a9ba6151SMark Brown 	if (irq_val < 0) {
24945d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Failed to read IRQ status: %d\n",
2495a9ba6151SMark Brown 			irq_val);
2496a9ba6151SMark Brown 		return IRQ_NONE;
2497a9ba6151SMark Brown 	}
24986d75dfc3SKuninori Morimoto 	irq_val &= ~snd_soc_component_read(component, WM8996_INTERRUPT_STATUS_2_MASK);
2499a9ba6151SMark Brown 
25002fde6e80SMark Brown 	if (!irq_val)
25012fde6e80SMark Brown 		return IRQ_NONE;
25022fde6e80SMark Brown 
25035d61ef8bSKuninori Morimoto 	snd_soc_component_write(component, WM8996_INTERRUPT_STATUS_2, irq_val);
250484497091SMark Brown 
2505a9ba6151SMark Brown 	if (irq_val & (WM8996_DCS_DONE_01_EINT | WM8996_DCS_DONE_23_EINT)) {
25065d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "DC servo IRQ\n");
2507a9ba6151SMark Brown 		complete(&wm8996->dcs_done);
2508a9ba6151SMark Brown 	}
2509a9ba6151SMark Brown 
2510a9ba6151SMark Brown 	if (irq_val & WM8996_FIFOS_ERR_EINT)
25115d61ef8bSKuninori Morimoto 		dev_err(component->dev, "Digital core FIFO error\n");
2512a9ba6151SMark Brown 
2513a9ba6151SMark Brown 	if (irq_val & WM8996_FLL_LOCK_EINT) {
25145d61ef8bSKuninori Morimoto 		dev_dbg(component->dev, "FLL locked\n");
2515a9ba6151SMark Brown 		complete(&wm8996->fll_lock);
2516a9ba6151SMark Brown 	}
2517a9ba6151SMark Brown 
2518a9ba6151SMark Brown 	if (irq_val & WM8996_MICD_EINT)
25195d61ef8bSKuninori Morimoto 		wm8996_micd(component);
2520a9ba6151SMark Brown 
25210b684cc1SMark Brown 	if (irq_val & WM8996_HP_DONE_EINT)
25225d61ef8bSKuninori Morimoto 		wm8996_hpdet_irq(component);
25230b684cc1SMark Brown 
2524a9ba6151SMark Brown 	return IRQ_HANDLED;
2525a9ba6151SMark Brown }
2526a9ba6151SMark Brown 
wm8996_edge_irq(int irq,void * data)2527a9ba6151SMark Brown static irqreturn_t wm8996_edge_irq(int irq, void *data)
2528a9ba6151SMark Brown {
2529a9ba6151SMark Brown 	irqreturn_t ret = IRQ_NONE;
2530a9ba6151SMark Brown 	irqreturn_t val;
2531a9ba6151SMark Brown 
2532a9ba6151SMark Brown 	do {
2533a9ba6151SMark Brown 		val = wm8996_irq(irq, data);
2534a9ba6151SMark Brown 		if (val != IRQ_NONE)
2535a9ba6151SMark Brown 			ret = val;
2536a9ba6151SMark Brown 	} while (val != IRQ_NONE);
2537a9ba6151SMark Brown 
2538a9ba6151SMark Brown 	return ret;
2539a9ba6151SMark Brown }
2540a9ba6151SMark Brown 
wm8996_retune_mobile_pdata(struct snd_soc_component * component)25415d61ef8bSKuninori Morimoto static void wm8996_retune_mobile_pdata(struct snd_soc_component *component)
2542a9ba6151SMark Brown {
25435d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
2544a9ba6151SMark Brown 	struct wm8996_pdata *pdata = &wm8996->pdata;
2545a9ba6151SMark Brown 
2546a9ba6151SMark Brown 	struct snd_kcontrol_new controls[] = {
2547a9ba6151SMark Brown 		SOC_ENUM_EXT("DSP1 EQ Mode",
2548a9ba6151SMark Brown 			     wm8996->retune_mobile_enum,
2549a9ba6151SMark Brown 			     wm8996_get_retune_mobile_enum,
2550a9ba6151SMark Brown 			     wm8996_put_retune_mobile_enum),
2551a9ba6151SMark Brown 		SOC_ENUM_EXT("DSP2 EQ Mode",
2552a9ba6151SMark Brown 			     wm8996->retune_mobile_enum,
2553a9ba6151SMark Brown 			     wm8996_get_retune_mobile_enum,
2554a9ba6151SMark Brown 			     wm8996_put_retune_mobile_enum),
2555a9ba6151SMark Brown 	};
2556a9ba6151SMark Brown 	int ret, i, j;
2557a9ba6151SMark Brown 	const char **t;
2558a9ba6151SMark Brown 
2559a9ba6151SMark Brown 	/* We need an array of texts for the enum API but the number
2560a9ba6151SMark Brown 	 * of texts is likely to be less than the number of
2561a9ba6151SMark Brown 	 * configurations due to the sample rate dependency of the
2562a9ba6151SMark Brown 	 * configurations. */
2563a9ba6151SMark Brown 	wm8996->num_retune_mobile_texts = 0;
2564a9ba6151SMark Brown 	wm8996->retune_mobile_texts = NULL;
2565a9ba6151SMark Brown 	for (i = 0; i < pdata->num_retune_mobile_cfgs; i++) {
2566a9ba6151SMark Brown 		for (j = 0; j < wm8996->num_retune_mobile_texts; j++) {
2567a9ba6151SMark Brown 			if (strcmp(pdata->retune_mobile_cfgs[i].name,
2568a9ba6151SMark Brown 				   wm8996->retune_mobile_texts[j]) == 0)
2569a9ba6151SMark Brown 				break;
2570a9ba6151SMark Brown 		}
2571a9ba6151SMark Brown 
2572a9ba6151SMark Brown 		if (j != wm8996->num_retune_mobile_texts)
2573a9ba6151SMark Brown 			continue;
2574a9ba6151SMark Brown 
2575a9ba6151SMark Brown 		/* Expand the array... */
2576a9ba6151SMark Brown 		t = krealloc(wm8996->retune_mobile_texts,
2577a9ba6151SMark Brown 			     sizeof(char *) *
2578a9ba6151SMark Brown 			     (wm8996->num_retune_mobile_texts + 1),
2579a9ba6151SMark Brown 			     GFP_KERNEL);
2580a9ba6151SMark Brown 		if (t == NULL)
2581a9ba6151SMark Brown 			continue;
2582a9ba6151SMark Brown 
2583a9ba6151SMark Brown 		/* ...store the new entry... */
2584a9ba6151SMark Brown 		t[wm8996->num_retune_mobile_texts] =
2585a9ba6151SMark Brown 			pdata->retune_mobile_cfgs[i].name;
2586a9ba6151SMark Brown 
2587a9ba6151SMark Brown 		/* ...and remember the new version. */
2588a9ba6151SMark Brown 		wm8996->num_retune_mobile_texts++;
2589a9ba6151SMark Brown 		wm8996->retune_mobile_texts = t;
2590a9ba6151SMark Brown 	}
2591a9ba6151SMark Brown 
25925d61ef8bSKuninori Morimoto 	dev_dbg(component->dev, "Allocated %d unique ReTune Mobile names\n",
2593a9ba6151SMark Brown 		wm8996->num_retune_mobile_texts);
2594a9ba6151SMark Brown 
25959a8d38dbSTakashi Iwai 	wm8996->retune_mobile_enum.items = wm8996->num_retune_mobile_texts;
2596a9ba6151SMark Brown 	wm8996->retune_mobile_enum.texts = wm8996->retune_mobile_texts;
2597a9ba6151SMark Brown 
25985d61ef8bSKuninori Morimoto 	ret = snd_soc_add_component_controls(component, controls, ARRAY_SIZE(controls));
2599a9ba6151SMark Brown 	if (ret != 0)
26005d61ef8bSKuninori Morimoto 		dev_err(component->dev,
2601a9ba6151SMark Brown 			"Failed to add ReTune Mobile controls: %d\n", ret);
2602a9ba6151SMark Brown }
2603a9ba6151SMark Brown 
260479172746SMark Brown static const struct regmap_config wm8996_regmap = {
260579172746SMark Brown 	.reg_bits = 16,
260679172746SMark Brown 	.val_bits = 16,
260779172746SMark Brown 
260879172746SMark Brown 	.max_register = WM8996_MAX_REGISTER,
260979172746SMark Brown 	.reg_defaults = wm8996_reg,
261079172746SMark Brown 	.num_reg_defaults = ARRAY_SIZE(wm8996_reg),
261179172746SMark Brown 	.volatile_reg = wm8996_volatile_register,
261279172746SMark Brown 	.readable_reg = wm8996_readable_register,
2613*a4b6c6ecSMark Brown 	.cache_type = REGCACHE_MAPLE,
261479172746SMark Brown };
261579172746SMark Brown 
wm8996_probe(struct snd_soc_component * component)26165d61ef8bSKuninori Morimoto static int wm8996_probe(struct snd_soc_component *component)
2617a9ba6151SMark Brown {
2618a9ba6151SMark Brown 	int ret;
26195d61ef8bSKuninori Morimoto 	struct wm8996_priv *wm8996 = snd_soc_component_get_drvdata(component);
26205d61ef8bSKuninori Morimoto 	struct i2c_client *i2c = to_i2c_client(component->dev);
2621ec8ffe18SMark Brown 	int irq_flags;
2622a9ba6151SMark Brown 
26235d61ef8bSKuninori Morimoto 	wm8996->component = component;
2624a9ba6151SMark Brown 
2625a9ba6151SMark Brown 	init_completion(&wm8996->dcs_done);
2626a9ba6151SMark Brown 	init_completion(&wm8996->fll_lock);
2627a9ba6151SMark Brown 
2628a9ba6151SMark Brown 	if (wm8996->pdata.num_retune_mobile_cfgs)
26295d61ef8bSKuninori Morimoto 		wm8996_retune_mobile_pdata(component);
2630a9ba6151SMark Brown 	else
26315d61ef8bSKuninori Morimoto 		snd_soc_add_component_controls(component, wm8996_eq_controls,
2632a9ba6151SMark Brown 				     ARRAY_SIZE(wm8996_eq_controls));
2633a9ba6151SMark Brown 
2634a9ba6151SMark Brown 	if (i2c->irq) {
2635a9ba6151SMark Brown 		if (wm8996->pdata.irq_flags)
2636a9ba6151SMark Brown 			irq_flags = wm8996->pdata.irq_flags;
2637a9ba6151SMark Brown 		else
2638a9ba6151SMark Brown 			irq_flags = IRQF_TRIGGER_LOW;
2639a9ba6151SMark Brown 
2640a9ba6151SMark Brown 		irq_flags |= IRQF_ONESHOT;
2641a9ba6151SMark Brown 
2642a9ba6151SMark Brown 		if (irq_flags & (IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING))
2643a9ba6151SMark Brown 			ret = request_threaded_irq(i2c->irq, NULL,
2644a9ba6151SMark Brown 						   wm8996_edge_irq,
26455d61ef8bSKuninori Morimoto 						   irq_flags, "wm8996", component);
2646a9ba6151SMark Brown 		else
2647a9ba6151SMark Brown 			ret = request_threaded_irq(i2c->irq, NULL, wm8996_irq,
26485d61ef8bSKuninori Morimoto 						   irq_flags, "wm8996", component);
2649a9ba6151SMark Brown 
2650a9ba6151SMark Brown 		if (ret == 0) {
2651a9ba6151SMark Brown 			/* Unmask the interrupt */
26525d61ef8bSKuninori Morimoto 			snd_soc_component_update_bits(component, WM8996_INTERRUPT_CONTROL,
2653a9ba6151SMark Brown 					    WM8996_IM_IRQ, 0);
2654a9ba6151SMark Brown 
2655a9ba6151SMark Brown 			/* Enable error reporting and DC servo status */
26565d61ef8bSKuninori Morimoto 			snd_soc_component_update_bits(component,
2657a9ba6151SMark Brown 					    WM8996_INTERRUPT_STATUS_2_MASK,
2658a9ba6151SMark Brown 					    WM8996_IM_DCS_DONE_23_EINT |
2659a9ba6151SMark Brown 					    WM8996_IM_DCS_DONE_01_EINT |
2660a9ba6151SMark Brown 					    WM8996_IM_FLL_LOCK_EINT |
2661a9ba6151SMark Brown 					    WM8996_IM_FIFOS_ERR_EINT,
2662a9ba6151SMark Brown 					    0);
2663a9ba6151SMark Brown 		} else {
26645d61ef8bSKuninori Morimoto 			dev_err(component->dev, "Failed to request IRQ: %d\n",
2665a9ba6151SMark Brown 				ret);
26665d6be5aaSXiubo Li 			return ret;
2667a9ba6151SMark Brown 		}
2668a9ba6151SMark Brown 	}
2669a9ba6151SMark Brown 
2670a9ba6151SMark Brown 	return 0;
2671a9ba6151SMark Brown }
2672a9ba6151SMark Brown 
wm8996_remove(struct snd_soc_component * component)26735d61ef8bSKuninori Morimoto static void wm8996_remove(struct snd_soc_component *component)
2674a9ba6151SMark Brown {
26755d61ef8bSKuninori Morimoto 	struct i2c_client *i2c = to_i2c_client(component->dev);
2676a9ba6151SMark Brown 
26775d61ef8bSKuninori Morimoto 	snd_soc_component_update_bits(component, WM8996_INTERRUPT_CONTROL,
2678a9ba6151SMark Brown 			    WM8996_IM_IRQ, WM8996_IM_IRQ);
2679a9ba6151SMark Brown 
2680a9ba6151SMark Brown 	if (i2c->irq)
26815d61ef8bSKuninori Morimoto 		free_irq(i2c->irq, component);
2682a9ba6151SMark Brown }
2683a9ba6151SMark Brown 
26845d61ef8bSKuninori Morimoto static const struct snd_soc_component_driver soc_component_dev_wm8996 = {
2685a9ba6151SMark Brown 	.probe			= wm8996_probe,
2686a9ba6151SMark Brown 	.remove			= wm8996_remove,
2687a9ba6151SMark Brown 	.set_bias_level		= wm8996_set_bias_level,
2688a9ba6151SMark Brown 	.seq_notifier		= wm8996_seq_notifier,
2689a9ba6151SMark Brown 	.controls		= wm8996_snd_controls,
2690a9ba6151SMark Brown 	.num_controls		= ARRAY_SIZE(wm8996_snd_controls),
2691a9ba6151SMark Brown 	.dapm_widgets		= wm8996_dapm_widgets,
2692a9ba6151SMark Brown 	.num_dapm_widgets	= ARRAY_SIZE(wm8996_dapm_widgets),
2693a9ba6151SMark Brown 	.dapm_routes		= wm8996_dapm_routes,
2694a9ba6151SMark Brown 	.num_dapm_routes	= ARRAY_SIZE(wm8996_dapm_routes),
2695a9ba6151SMark Brown 	.set_pll		= wm8996_set_fll,
26965d61ef8bSKuninori Morimoto 	.use_pmdown_time	= 1,
26975d61ef8bSKuninori Morimoto 	.endianness		= 1,
2698a9ba6151SMark Brown };
2699a9ba6151SMark Brown 
2700a9ba6151SMark Brown #define WM8996_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000 |\
27014eb98f45SMark Brown 		      SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
27024eb98f45SMark Brown 		      SNDRV_PCM_RATE_48000)
2703a9ba6151SMark Brown #define WM8996_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE |\
2704a9ba6151SMark Brown 			SNDRV_PCM_FMTBIT_S20_3LE | SNDRV_PCM_FMTBIT_S24_LE |\
2705a9ba6151SMark Brown 			SNDRV_PCM_FMTBIT_S32_LE)
2706a9ba6151SMark Brown 
270785e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8996_dai_ops = {
2708a9ba6151SMark Brown 	.set_fmt = wm8996_set_fmt,
2709a9ba6151SMark Brown 	.hw_params = wm8996_hw_params,
2710a9ba6151SMark Brown 	.set_sysclk = wm8996_set_sysclk,
2711a9ba6151SMark Brown };
2712a9ba6151SMark Brown 
2713a9ba6151SMark Brown static struct snd_soc_dai_driver wm8996_dai[] = {
2714a9ba6151SMark Brown 	{
2715a9ba6151SMark Brown 		.name = "wm8996-aif1",
2716a9ba6151SMark Brown 		.playback = {
2717a9ba6151SMark Brown 			.stream_name = "AIF1 Playback",
2718a9ba6151SMark Brown 			.channels_min = 1,
2719a9ba6151SMark Brown 			.channels_max = 6,
2720a9ba6151SMark Brown 			.rates = WM8996_RATES,
2721a9ba6151SMark Brown 			.formats = WM8996_FORMATS,
2722a4b52337SMark Brown 			.sig_bits = 24,
2723a9ba6151SMark Brown 		},
2724a9ba6151SMark Brown 		.capture = {
2725a9ba6151SMark Brown 			 .stream_name = "AIF1 Capture",
2726a9ba6151SMark Brown 			 .channels_min = 1,
2727a9ba6151SMark Brown 			 .channels_max = 6,
2728a9ba6151SMark Brown 			 .rates = WM8996_RATES,
2729a9ba6151SMark Brown 			 .formats = WM8996_FORMATS,
2730a4b52337SMark Brown 			 .sig_bits = 24,
2731a9ba6151SMark Brown 		 },
2732a9ba6151SMark Brown 		.ops = &wm8996_dai_ops,
2733a9ba6151SMark Brown 	},
2734a9ba6151SMark Brown 	{
2735a9ba6151SMark Brown 		.name = "wm8996-aif2",
2736a9ba6151SMark Brown 		.playback = {
2737a9ba6151SMark Brown 			.stream_name = "AIF2 Playback",
2738a9ba6151SMark Brown 			.channels_min = 1,
2739a9ba6151SMark Brown 			.channels_max = 2,
2740a9ba6151SMark Brown 			.rates = WM8996_RATES,
2741a9ba6151SMark Brown 			.formats = WM8996_FORMATS,
2742a4b52337SMark Brown 			.sig_bits = 24,
2743a9ba6151SMark Brown 		},
2744a9ba6151SMark Brown 		.capture = {
2745a9ba6151SMark Brown 			 .stream_name = "AIF2 Capture",
2746a9ba6151SMark Brown 			 .channels_min = 1,
2747a9ba6151SMark Brown 			 .channels_max = 2,
2748a9ba6151SMark Brown 			 .rates = WM8996_RATES,
2749a9ba6151SMark Brown 			 .formats = WM8996_FORMATS,
2750a4b52337SMark Brown 			.sig_bits = 24,
2751a9ba6151SMark Brown 		 },
2752a9ba6151SMark Brown 		.ops = &wm8996_dai_ops,
2753a9ba6151SMark Brown 	},
2754a9ba6151SMark Brown };
2755a9ba6151SMark Brown 
wm8996_i2c_probe(struct i2c_client * i2c)275697b0b6e3SStephen Kitt static int wm8996_i2c_probe(struct i2c_client *i2c)
2757a9ba6151SMark Brown {
2758a9ba6151SMark Brown 	struct wm8996_priv *wm8996;
2759ee5f3872SMark Brown 	int ret, i;
2760ee5f3872SMark Brown 	unsigned int reg;
2761a9ba6151SMark Brown 
2762a290986bSMark Brown 	wm8996 = devm_kzalloc(&i2c->dev, sizeof(struct wm8996_priv),
2763a290986bSMark Brown 			      GFP_KERNEL);
2764a9ba6151SMark Brown 	if (wm8996 == NULL)
2765a9ba6151SMark Brown 		return -ENOMEM;
2766a9ba6151SMark Brown 
2767a9ba6151SMark Brown 	i2c_set_clientdata(i2c, wm8996);
2768b2d1e233SMark Brown 	wm8996->dev = &i2c->dev;
2769a9ba6151SMark Brown 
2770a9ba6151SMark Brown 	if (dev_get_platdata(&i2c->dev))
2771a9ba6151SMark Brown 		memcpy(&wm8996->pdata, dev_get_platdata(&i2c->dev),
2772a9ba6151SMark Brown 		       sizeof(wm8996->pdata));
2773a9ba6151SMark Brown 
2774a9ba6151SMark Brown 	if (wm8996->pdata.ldo_ena > 0) {
2775a9ba6151SMark Brown 		ret = gpio_request_one(wm8996->pdata.ldo_ena,
2776a9ba6151SMark Brown 				       GPIOF_OUT_INIT_LOW, "WM8996 ENA");
2777a9ba6151SMark Brown 		if (ret < 0) {
2778a9ba6151SMark Brown 			dev_err(&i2c->dev, "Failed to request GPIO %d: %d\n",
2779a9ba6151SMark Brown 				wm8996->pdata.ldo_ena, ret);
2780a9ba6151SMark Brown 			goto err;
2781a9ba6151SMark Brown 		}
2782a9ba6151SMark Brown 	}
2783a9ba6151SMark Brown 
2784ee5f3872SMark Brown 	for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++)
2785ee5f3872SMark Brown 		wm8996->supplies[i].supply = wm8996_supply_names[i];
2786ee5f3872SMark Brown 
278724e0c57bSMark Brown 	ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8996->supplies),
2788ee5f3872SMark Brown 				      wm8996->supplies);
2789ee5f3872SMark Brown 	if (ret != 0) {
2790ee5f3872SMark Brown 		dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
2791ee5f3872SMark Brown 		goto err_gpio;
2792ee5f3872SMark Brown 	}
2793ee5f3872SMark Brown 
2794625c4888SMark Brown 	wm8996->disable_nb[0].notifier_call = wm8996_regulator_event_0;
2795625c4888SMark Brown 	wm8996->disable_nb[1].notifier_call = wm8996_regulator_event_1;
2796625c4888SMark Brown 	wm8996->disable_nb[2].notifier_call = wm8996_regulator_event_2;
2797625c4888SMark Brown 
2798625c4888SMark Brown 	/* This should really be moved into the regulator core */
2799625c4888SMark Brown 	for (i = 0; i < ARRAY_SIZE(wm8996->supplies); i++) {
28000bb423f2SGuennadi Liakhovetski 		ret = devm_regulator_register_notifier(
28010bb423f2SGuennadi Liakhovetski 						wm8996->supplies[i].consumer,
2802625c4888SMark Brown 						&wm8996->disable_nb[i]);
2803625c4888SMark Brown 		if (ret != 0) {
2804625c4888SMark Brown 			dev_err(&i2c->dev,
2805625c4888SMark Brown 				"Failed to register regulator notifier: %d\n",
2806625c4888SMark Brown 				ret);
2807625c4888SMark Brown 		}
2808625c4888SMark Brown 	}
2809625c4888SMark Brown 
2810ee5f3872SMark Brown 	ret = regulator_bulk_enable(ARRAY_SIZE(wm8996->supplies),
2811ee5f3872SMark Brown 				    wm8996->supplies);
2812ee5f3872SMark Brown 	if (ret != 0) {
2813ee5f3872SMark Brown 		dev_err(&i2c->dev, "Failed to enable supplies: %d\n", ret);
281424e0c57bSMark Brown 		goto err_gpio;
2815ee5f3872SMark Brown 	}
2816ee5f3872SMark Brown 
2817ee5f3872SMark Brown 	if (wm8996->pdata.ldo_ena > 0) {
2818ee5f3872SMark Brown 		gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 1);
2819ee5f3872SMark Brown 		msleep(5);
2820ee5f3872SMark Brown 	}
2821ee5f3872SMark Brown 
2822af691fb6SMark Brown 	wm8996->regmap = devm_regmap_init_i2c(i2c, &wm8996_regmap);
2823ee5f3872SMark Brown 	if (IS_ERR(wm8996->regmap)) {
2824ee5f3872SMark Brown 		ret = PTR_ERR(wm8996->regmap);
2825ee5f3872SMark Brown 		dev_err(&i2c->dev, "regmap_init() failed: %d\n", ret);
2826ee5f3872SMark Brown 		goto err_enable;
2827ee5f3872SMark Brown 	}
2828ee5f3872SMark Brown 
2829ee5f3872SMark Brown 	ret = regmap_read(wm8996->regmap, WM8996_SOFTWARE_RESET, &reg);
2830ee5f3872SMark Brown 	if (ret < 0) {
2831ee5f3872SMark Brown 		dev_err(&i2c->dev, "Failed to read ID register: %d\n", ret);
2832ee5f3872SMark Brown 		goto err_regmap;
2833ee5f3872SMark Brown 	}
2834ee5f3872SMark Brown 	if (reg != 0x8915) {
2835905b4195SAxel Lin 		dev_err(&i2c->dev, "Device is not a WM8996, ID %x\n", reg);
2836ee5f3872SMark Brown 		ret = -EINVAL;
2837ee5f3872SMark Brown 		goto err_regmap;
2838ee5f3872SMark Brown 	}
2839ee5f3872SMark Brown 
2840ee5f3872SMark Brown 	ret = regmap_read(wm8996->regmap, WM8996_CHIP_REVISION, &reg);
2841ee5f3872SMark Brown 	if (ret < 0) {
2842ee5f3872SMark Brown 		dev_err(&i2c->dev, "Failed to read device revision: %d\n",
2843ee5f3872SMark Brown 			ret);
2844ee5f3872SMark Brown 		goto err_regmap;
2845ee5f3872SMark Brown 	}
2846ee5f3872SMark Brown 
2847ee5f3872SMark Brown 	dev_info(&i2c->dev, "revision %c\n",
2848ee5f3872SMark Brown 		 (reg & WM8996_CHIP_REV_MASK) + 'A');
2849ee5f3872SMark Brown 
2850d4b3d0fbSMark Brown 	if (wm8996->pdata.ldo_ena > 0) {
2851d4b3d0fbSMark Brown 		gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
2852d4b3d0fbSMark Brown 		regcache_cache_only(wm8996->regmap, true);
2853d4b3d0fbSMark Brown 	} else {
2854d4b3d0fbSMark Brown 		ret = regmap_write(wm8996->regmap, WM8996_SOFTWARE_RESET,
2855d4b3d0fbSMark Brown 				   0x8915);
2856d4b3d0fbSMark Brown 		if (ret != 0) {
2857d4b3d0fbSMark Brown 			dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret);
2858ee5f3872SMark Brown 			goto err_regmap;
2859ee5f3872SMark Brown 		}
2860d4b3d0fbSMark Brown 	}
2861ee5f3872SMark Brown 
2862db133409SMark Brown 	regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
2863db133409SMark Brown 
2864ec8ffe18SMark Brown 	/* Apply platform data settings */
2865ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_LINE_INPUT_CONTROL,
2866ec8ffe18SMark Brown 			   WM8996_INL_MODE_MASK | WM8996_INR_MODE_MASK,
2867ec8ffe18SMark Brown 			   wm8996->pdata.inl_mode << WM8996_INL_MODE_SHIFT |
2868ec8ffe18SMark Brown 			   wm8996->pdata.inr_mode);
2869ec8ffe18SMark Brown 
2870ec8ffe18SMark Brown 	for (i = 0; i < ARRAY_SIZE(wm8996->pdata.gpio_default); i++) {
2871ec8ffe18SMark Brown 		if (!wm8996->pdata.gpio_default[i])
2872ec8ffe18SMark Brown 			continue;
2873ec8ffe18SMark Brown 
2874ec8ffe18SMark Brown 		regmap_write(wm8996->regmap, WM8996_GPIO_1 + i,
2875ec8ffe18SMark Brown 			     wm8996->pdata.gpio_default[i] & 0xffff);
2876ec8ffe18SMark Brown 	}
2877ec8ffe18SMark Brown 
2878ec8ffe18SMark Brown 	if (wm8996->pdata.spkmute_seq)
2879ec8ffe18SMark Brown 		regmap_update_bits(wm8996->regmap,
2880ec8ffe18SMark Brown 				   WM8996_PDM_SPEAKER_MUTE_SEQUENCE,
2881ec8ffe18SMark Brown 				   WM8996_SPK_MUTE_ENDIAN |
2882ec8ffe18SMark Brown 				   WM8996_SPK_MUTE_SEQ1_MASK,
2883ec8ffe18SMark Brown 				   wm8996->pdata.spkmute_seq);
2884ec8ffe18SMark Brown 
2885ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_ACCESSORY_DETECT_MODE_2,
2886ec8ffe18SMark Brown 			   WM8996_MICD_BIAS_SRC | WM8996_HPOUT1FB_SRC |
2887ec8ffe18SMark Brown 			   WM8996_MICD_SRC, wm8996->pdata.micdet_def);
2888ec8ffe18SMark Brown 
2889ec8ffe18SMark Brown 	/* Latch volume update bits */
2890ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_LEFT_LINE_INPUT_VOLUME,
2891ec8ffe18SMark Brown 			   WM8996_IN1_VU, WM8996_IN1_VU);
2892ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_RIGHT_LINE_INPUT_VOLUME,
2893ec8ffe18SMark Brown 			   WM8996_IN1_VU, WM8996_IN1_VU);
2894ec8ffe18SMark Brown 
2895ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DAC1_LEFT_VOLUME,
2896ec8ffe18SMark Brown 			   WM8996_DAC1_VU, WM8996_DAC1_VU);
2897ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DAC1_RIGHT_VOLUME,
2898ec8ffe18SMark Brown 			   WM8996_DAC1_VU, WM8996_DAC1_VU);
2899ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DAC2_LEFT_VOLUME,
2900ec8ffe18SMark Brown 			   WM8996_DAC2_VU, WM8996_DAC2_VU);
2901ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DAC2_RIGHT_VOLUME,
2902ec8ffe18SMark Brown 			   WM8996_DAC2_VU, WM8996_DAC2_VU);
2903ec8ffe18SMark Brown 
2904ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_OUTPUT1_LEFT_VOLUME,
2905ec8ffe18SMark Brown 			   WM8996_DAC1_VU, WM8996_DAC1_VU);
2906ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_OUTPUT1_RIGHT_VOLUME,
2907ec8ffe18SMark Brown 			   WM8996_DAC1_VU, WM8996_DAC1_VU);
2908ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_OUTPUT2_LEFT_VOLUME,
2909ec8ffe18SMark Brown 			   WM8996_DAC2_VU, WM8996_DAC2_VU);
2910ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_OUTPUT2_RIGHT_VOLUME,
2911ec8ffe18SMark Brown 			   WM8996_DAC2_VU, WM8996_DAC2_VU);
2912ec8ffe18SMark Brown 
2913ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP1_TX_LEFT_VOLUME,
2914ec8ffe18SMark Brown 			   WM8996_DSP1TX_VU, WM8996_DSP1TX_VU);
2915ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP1_TX_RIGHT_VOLUME,
2916ec8ffe18SMark Brown 			   WM8996_DSP1TX_VU, WM8996_DSP1TX_VU);
2917ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP2_TX_LEFT_VOLUME,
2918ec8ffe18SMark Brown 			   WM8996_DSP2TX_VU, WM8996_DSP2TX_VU);
2919ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP2_TX_RIGHT_VOLUME,
2920ec8ffe18SMark Brown 			   WM8996_DSP2TX_VU, WM8996_DSP2TX_VU);
2921ec8ffe18SMark Brown 
2922ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP1_RX_LEFT_VOLUME,
2923ec8ffe18SMark Brown 			   WM8996_DSP1RX_VU, WM8996_DSP1RX_VU);
2924ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP1_RX_RIGHT_VOLUME,
2925ec8ffe18SMark Brown 			   WM8996_DSP1RX_VU, WM8996_DSP1RX_VU);
2926ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP2_RX_LEFT_VOLUME,
2927ec8ffe18SMark Brown 			   WM8996_DSP2RX_VU, WM8996_DSP2RX_VU);
2928ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap, WM8996_DSP2_RX_RIGHT_VOLUME,
2929ec8ffe18SMark Brown 			   WM8996_DSP2RX_VU, WM8996_DSP2RX_VU);
2930ec8ffe18SMark Brown 
2931ec8ffe18SMark Brown 	/* No support currently for the underclocked TDM modes and
2932ec8ffe18SMark Brown 	 * pick a default TDM layout with each channel pair working with
2933ec8ffe18SMark Brown 	 * slots 0 and 1. */
2934ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2935ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHANNEL_0_CONFIGURATION,
2936ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN0_SLOTS_MASK |
2937ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
2938ec8ffe18SMark Brown 			   1 << WM8996_AIF1RX_CHAN0_SLOTS_SHIFT | 0);
2939ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2940ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHANNEL_1_CONFIGURATION,
2941ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN1_SLOTS_MASK |
2942ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN1_START_SLOT_MASK,
2943ec8ffe18SMark Brown 			   1 << WM8996_AIF1RX_CHAN1_SLOTS_SHIFT | 1);
2944ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2945ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHANNEL_2_CONFIGURATION,
2946ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN2_SLOTS_MASK |
2947ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN2_START_SLOT_MASK,
2948ec8ffe18SMark Brown 			   1 << WM8996_AIF1RX_CHAN2_SLOTS_SHIFT | 0);
2949ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2950ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHANNEL_3_CONFIGURATION,
2951ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN3_SLOTS_MASK |
2952ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
2953ec8ffe18SMark Brown 			   1 << WM8996_AIF1RX_CHAN3_SLOTS_SHIFT | 1);
2954ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2955ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHANNEL_4_CONFIGURATION,
2956ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN4_SLOTS_MASK |
2957ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
2958ec8ffe18SMark Brown 			   1 << WM8996_AIF1RX_CHAN4_SLOTS_SHIFT | 0);
2959ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2960ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHANNEL_5_CONFIGURATION,
2961ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN5_SLOTS_MASK |
2962ec8ffe18SMark Brown 			   WM8996_AIF1RX_CHAN0_START_SLOT_MASK,
2963ec8ffe18SMark Brown 			   1 << WM8996_AIF1RX_CHAN5_SLOTS_SHIFT | 1);
2964ec8ffe18SMark Brown 
2965ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2966ec8ffe18SMark Brown 			   WM8996_AIF2RX_CHANNEL_0_CONFIGURATION,
2967ec8ffe18SMark Brown 			   WM8996_AIF2RX_CHAN0_SLOTS_MASK |
2968ec8ffe18SMark Brown 			   WM8996_AIF2RX_CHAN0_START_SLOT_MASK,
2969ec8ffe18SMark Brown 			   1 << WM8996_AIF2RX_CHAN0_SLOTS_SHIFT | 0);
2970ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2971ec8ffe18SMark Brown 			   WM8996_AIF2RX_CHANNEL_1_CONFIGURATION,
2972ec8ffe18SMark Brown 			   WM8996_AIF2RX_CHAN1_SLOTS_MASK |
2973ec8ffe18SMark Brown 			   WM8996_AIF2RX_CHAN1_START_SLOT_MASK,
2974ec8ffe18SMark Brown 			   1 << WM8996_AIF2RX_CHAN1_SLOTS_SHIFT | 1);
2975ec8ffe18SMark Brown 
2976ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2977ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_0_CONFIGURATION,
2978ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_SLOTS_MASK |
2979ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
2980ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN0_SLOTS_SHIFT | 0);
2981ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2982ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_1_CONFIGURATION,
2983ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN1_SLOTS_MASK |
2984ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
2985ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1);
2986ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2987ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_2_CONFIGURATION,
2988ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN2_SLOTS_MASK |
2989ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
2990ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN2_SLOTS_SHIFT | 0);
2991ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2992ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_3_CONFIGURATION,
2993ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN3_SLOTS_MASK |
2994ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
2995ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN3_SLOTS_SHIFT | 1);
2996ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
2997ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_4_CONFIGURATION,
2998ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN4_SLOTS_MASK |
2999ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
3000ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN4_SLOTS_SHIFT | 0);
3001ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
3002ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_5_CONFIGURATION,
3003ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN5_SLOTS_MASK |
3004ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHAN0_START_SLOT_MASK,
3005ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN5_SLOTS_SHIFT | 1);
3006ec8ffe18SMark Brown 
3007ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
3008ec8ffe18SMark Brown 			   WM8996_AIF2TX_CHANNEL_0_CONFIGURATION,
3009ec8ffe18SMark Brown 			   WM8996_AIF2TX_CHAN0_SLOTS_MASK |
3010ec8ffe18SMark Brown 			   WM8996_AIF2TX_CHAN0_START_SLOT_MASK,
3011ec8ffe18SMark Brown 			   1 << WM8996_AIF2TX_CHAN0_SLOTS_SHIFT | 0);
3012ec8ffe18SMark Brown 	regmap_update_bits(wm8996->regmap,
3013ec8ffe18SMark Brown 			   WM8996_AIF1TX_CHANNEL_1_CONFIGURATION,
3014ec8ffe18SMark Brown 			   WM8996_AIF2TX_CHAN1_SLOTS_MASK |
3015ec8ffe18SMark Brown 			   WM8996_AIF2TX_CHAN1_START_SLOT_MASK,
3016ec8ffe18SMark Brown 			   1 << WM8996_AIF1TX_CHAN1_SLOTS_SHIFT | 1);
3017ec8ffe18SMark Brown 
3018ec8ffe18SMark Brown 	/* If the TX LRCLK pins are not in LRCLK mode configure the
3019ec8ffe18SMark Brown 	 * AIFs to source their clocks from the RX LRCLKs.
3020ec8ffe18SMark Brown 	 */
3021ec8ffe18SMark Brown 	ret = regmap_read(wm8996->regmap, WM8996_GPIO_1, &reg);
3022ec8ffe18SMark Brown 	if (ret != 0) {
3023ec8ffe18SMark Brown 		dev_err(&i2c->dev, "Failed to read GPIO1: %d\n", ret);
3024ec8ffe18SMark Brown 		goto err_regmap;
3025ec8ffe18SMark Brown 	}
3026ec8ffe18SMark Brown 
3027ec8ffe18SMark Brown 	if (reg & WM8996_GP1_FN_MASK)
3028ec8ffe18SMark Brown 		regmap_update_bits(wm8996->regmap, WM8996_AIF1_TX_LRCLK_2,
3029ec8ffe18SMark Brown 				   WM8996_AIF1TX_LRCLK_MODE,
3030ec8ffe18SMark Brown 				   WM8996_AIF1TX_LRCLK_MODE);
3031ec8ffe18SMark Brown 
3032ec8ffe18SMark Brown 	ret = regmap_read(wm8996->regmap, WM8996_GPIO_2, &reg);
3033ec8ffe18SMark Brown 	if (ret != 0) {
3034ec8ffe18SMark Brown 		dev_err(&i2c->dev, "Failed to read GPIO2: %d\n", ret);
3035ec8ffe18SMark Brown 		goto err_regmap;
3036ec8ffe18SMark Brown 	}
3037ec8ffe18SMark Brown 
3038ec8ffe18SMark Brown 	if (reg & WM8996_GP2_FN_MASK)
3039ec8ffe18SMark Brown 		regmap_update_bits(wm8996->regmap, WM8996_AIF2_TX_LRCLK_2,
3040ec8ffe18SMark Brown 				   WM8996_AIF2TX_LRCLK_MODE,
3041ec8ffe18SMark Brown 				   WM8996_AIF2TX_LRCLK_MODE);
3042ec8ffe18SMark Brown 
3043b2d1e233SMark Brown 	wm8996_init_gpio(wm8996);
3044b2d1e233SMark Brown 
30455d61ef8bSKuninori Morimoto 	ret = devm_snd_soc_register_component(&i2c->dev,
30465d61ef8bSKuninori Morimoto 				     &soc_component_dev_wm8996, wm8996_dai,
3047a9ba6151SMark Brown 				     ARRAY_SIZE(wm8996_dai));
3048a9ba6151SMark Brown 	if (ret < 0)
3049b2d1e233SMark Brown 		goto err_gpiolib;
3050a9ba6151SMark Brown 
3051a9ba6151SMark Brown 	return ret;
3052a9ba6151SMark Brown 
3053b2d1e233SMark Brown err_gpiolib:
3054b2d1e233SMark Brown 	wm8996_free_gpio(wm8996);
3055ee5f3872SMark Brown err_regmap:
3056ee5f3872SMark Brown err_enable:
3057ee5f3872SMark Brown 	if (wm8996->pdata.ldo_ena > 0)
3058ee5f3872SMark Brown 		gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
3059ee5f3872SMark Brown 	regulator_bulk_disable(ARRAY_SIZE(wm8996->supplies), wm8996->supplies);
3060a9ba6151SMark Brown err_gpio:
3061a9ba6151SMark Brown 	if (wm8996->pdata.ldo_ena > 0)
3062a9ba6151SMark Brown 		gpio_free(wm8996->pdata.ldo_ena);
3063a9ba6151SMark Brown err:
3064a9ba6151SMark Brown 
3065a9ba6151SMark Brown 	return ret;
3066a9ba6151SMark Brown }
3067a9ba6151SMark Brown 
wm8996_i2c_remove(struct i2c_client * client)3068ed5c2f5fSUwe Kleine-König static void wm8996_i2c_remove(struct i2c_client *client)
3069a9ba6151SMark Brown {
3070a9ba6151SMark Brown 	struct wm8996_priv *wm8996 = i2c_get_clientdata(client);
3071a9ba6151SMark Brown 
3072b2d1e233SMark Brown 	wm8996_free_gpio(wm8996);
3073ee5f3872SMark Brown 	if (wm8996->pdata.ldo_ena > 0) {
3074ee5f3872SMark Brown 		gpio_set_value_cansleep(wm8996->pdata.ldo_ena, 0);
3075a9ba6151SMark Brown 		gpio_free(wm8996->pdata.ldo_ena);
3076ee5f3872SMark Brown 	}
3077a9ba6151SMark Brown }
3078a9ba6151SMark Brown 
3079a9ba6151SMark Brown static const struct i2c_device_id wm8996_i2c_id[] = {
3080a9ba6151SMark Brown 	{ "wm8996", 0 },
3081a9ba6151SMark Brown 	{ }
3082a9ba6151SMark Brown };
3083a9ba6151SMark Brown MODULE_DEVICE_TABLE(i2c, wm8996_i2c_id);
3084a9ba6151SMark Brown 
3085a9ba6151SMark Brown static struct i2c_driver wm8996_i2c_driver = {
3086a9ba6151SMark Brown 	.driver = {
3087a9ba6151SMark Brown 		.name = "wm8996",
3088a9ba6151SMark Brown 	},
30899abcd240SUwe Kleine-König 	.probe =    wm8996_i2c_probe,
30907a79e94eSBill Pemberton 	.remove =   wm8996_i2c_remove,
3091a9ba6151SMark Brown 	.id_table = wm8996_i2c_id,
3092a9ba6151SMark Brown };
3093a9ba6151SMark Brown 
30948005f394SMark Brown module_i2c_driver(wm8996_i2c_driver);
3095a9ba6151SMark Brown 
3096a9ba6151SMark Brown MODULE_DESCRIPTION("ASoC WM8996 driver");
3097a9ba6151SMark Brown MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
3098a9ba6151SMark Brown MODULE_LICENSE("GPL");
3099