16a504a75SDimitris Papastamos /* 26a504a75SDimitris Papastamos * wm8995.c -- WM8995 ALSA SoC Audio driver 36a504a75SDimitris Papastamos * 46a504a75SDimitris Papastamos * Copyright 2010 Wolfson Microelectronics plc 56a504a75SDimitris Papastamos * 66a504a75SDimitris Papastamos * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> 76a504a75SDimitris Papastamos * 86a504a75SDimitris Papastamos * Based on wm8994.c and wm_hubs.c by Mark Brown 96a504a75SDimitris Papastamos * 106a504a75SDimitris Papastamos * This program is free software; you can redistribute it and/or modify 116a504a75SDimitris Papastamos * it under the terms of the GNU General Public License version 2 as 126a504a75SDimitris Papastamos * published by the Free Software Foundation. 136a504a75SDimitris Papastamos */ 146a504a75SDimitris Papastamos 156a504a75SDimitris Papastamos #include <linux/module.h> 166a504a75SDimitris Papastamos #include <linux/moduleparam.h> 176a504a75SDimitris Papastamos #include <linux/init.h> 186a504a75SDimitris Papastamos #include <linux/delay.h> 196a504a75SDimitris Papastamos #include <linux/pm.h> 206a504a75SDimitris Papastamos #include <linux/i2c.h> 21c42da642SMark Brown #include <linux/regmap.h> 226a504a75SDimitris Papastamos #include <linux/spi/spi.h> 23219d8df8SDimitris Papastamos #include <linux/regulator/consumer.h> 246a504a75SDimitris Papastamos #include <linux/slab.h> 256a504a75SDimitris Papastamos #include <sound/core.h> 266a504a75SDimitris Papastamos #include <sound/pcm.h> 276a504a75SDimitris Papastamos #include <sound/pcm_params.h> 286a504a75SDimitris Papastamos #include <sound/soc.h> 296a504a75SDimitris Papastamos #include <sound/soc-dapm.h> 306a504a75SDimitris Papastamos #include <sound/initval.h> 316a504a75SDimitris Papastamos #include <sound/tlv.h> 326a504a75SDimitris Papastamos 336a504a75SDimitris Papastamos #include "wm8995.h" 346a504a75SDimitris Papastamos 35219d8df8SDimitris Papastamos #define WM8995_NUM_SUPPLIES 8 36219d8df8SDimitris Papastamos static const char *wm8995_supply_names[WM8995_NUM_SUPPLIES] = { 37219d8df8SDimitris Papastamos "DCVDD", 38219d8df8SDimitris Papastamos "DBVDD1", 39219d8df8SDimitris Papastamos "DBVDD2", 40219d8df8SDimitris Papastamos "DBVDD3", 41219d8df8SDimitris Papastamos "AVDD1", 42219d8df8SDimitris Papastamos "AVDD2", 43219d8df8SDimitris Papastamos "CPVDD", 44219d8df8SDimitris Papastamos "MICVDD" 45219d8df8SDimitris Papastamos }; 46219d8df8SDimitris Papastamos 47c42da642SMark Brown static struct reg_default wm8995_reg_defaults[] = { 48c42da642SMark Brown { 0, 0x8995 }, 49c42da642SMark Brown { 5, 0x0100 }, 50c42da642SMark Brown { 16, 0x000b }, 51c42da642SMark Brown { 17, 0x000b }, 52c42da642SMark Brown { 24, 0x02c0 }, 53c42da642SMark Brown { 25, 0x02c0 }, 54c42da642SMark Brown { 26, 0x02c0 }, 55c42da642SMark Brown { 27, 0x02c0 }, 56c42da642SMark Brown { 28, 0x000f }, 57c42da642SMark Brown { 32, 0x0005 }, 58c42da642SMark Brown { 33, 0x0005 }, 59c42da642SMark Brown { 40, 0x0003 }, 60c42da642SMark Brown { 41, 0x0013 }, 61c42da642SMark Brown { 48, 0x0004 }, 62c42da642SMark Brown { 56, 0x09f8 }, 63c42da642SMark Brown { 64, 0x1f25 }, 64c42da642SMark Brown { 69, 0x0004 }, 65c42da642SMark Brown { 82, 0xaaaa }, 66c42da642SMark Brown { 84, 0x2a2a }, 67c42da642SMark Brown { 146, 0x0060 }, 68c42da642SMark Brown { 256, 0x0002 }, 69c42da642SMark Brown { 257, 0x8004 }, 70c42da642SMark Brown { 520, 0x0010 }, 71c42da642SMark Brown { 528, 0x0083 }, 72c42da642SMark Brown { 529, 0x0083 }, 73c42da642SMark Brown { 548, 0x0c80 }, 74c42da642SMark Brown { 580, 0x0c80 }, 75c42da642SMark Brown { 768, 0x4050 }, 76c42da642SMark Brown { 769, 0x4000 }, 77c42da642SMark Brown { 771, 0x0040 }, 78c42da642SMark Brown { 772, 0x0040 }, 79c42da642SMark Brown { 773, 0x0040 }, 80c42da642SMark Brown { 774, 0x0004 }, 81c42da642SMark Brown { 775, 0x0100 }, 82c42da642SMark Brown { 784, 0x4050 }, 83c42da642SMark Brown { 785, 0x4000 }, 84c42da642SMark Brown { 787, 0x0040 }, 85c42da642SMark Brown { 788, 0x0040 }, 86c42da642SMark Brown { 789, 0x0040 }, 87c42da642SMark Brown { 1024, 0x00c0 }, 88c42da642SMark Brown { 1025, 0x00c0 }, 89c42da642SMark Brown { 1026, 0x00c0 }, 90c42da642SMark Brown { 1027, 0x00c0 }, 91c42da642SMark Brown { 1028, 0x00c0 }, 92c42da642SMark Brown { 1029, 0x00c0 }, 93c42da642SMark Brown { 1030, 0x00c0 }, 94c42da642SMark Brown { 1031, 0x00c0 }, 95c42da642SMark Brown { 1056, 0x0200 }, 96c42da642SMark Brown { 1057, 0x0010 }, 97c42da642SMark Brown { 1058, 0x0200 }, 98c42da642SMark Brown { 1059, 0x0010 }, 99c42da642SMark Brown { 1088, 0x0098 }, 100c42da642SMark Brown { 1089, 0x0845 }, 101c42da642SMark Brown { 1104, 0x0098 }, 102c42da642SMark Brown { 1105, 0x0845 }, 103c42da642SMark Brown { 1152, 0x6318 }, 104c42da642SMark Brown { 1153, 0x6300 }, 105c42da642SMark Brown { 1154, 0x0fca }, 106c42da642SMark Brown { 1155, 0x0400 }, 107c42da642SMark Brown { 1156, 0x00d8 }, 108c42da642SMark Brown { 1157, 0x1eb5 }, 109c42da642SMark Brown { 1158, 0xf145 }, 110c42da642SMark Brown { 1159, 0x0b75 }, 111c42da642SMark Brown { 1160, 0x01c5 }, 112c42da642SMark Brown { 1161, 0x1c58 }, 113c42da642SMark Brown { 1162, 0xf373 }, 114c42da642SMark Brown { 1163, 0x0a54 }, 115c42da642SMark Brown { 1164, 0x0558 }, 116c42da642SMark Brown { 1165, 0x168e }, 117c42da642SMark Brown { 1166, 0xf829 }, 118c42da642SMark Brown { 1167, 0x07ad }, 119c42da642SMark Brown { 1168, 0x1103 }, 120c42da642SMark Brown { 1169, 0x0564 }, 121c42da642SMark Brown { 1170, 0x0559 }, 122c42da642SMark Brown { 1171, 0x4000 }, 123c42da642SMark Brown { 1184, 0x6318 }, 124c42da642SMark Brown { 1185, 0x6300 }, 125c42da642SMark Brown { 1186, 0x0fca }, 126c42da642SMark Brown { 1187, 0x0400 }, 127c42da642SMark Brown { 1188, 0x00d8 }, 128c42da642SMark Brown { 1189, 0x1eb5 }, 129c42da642SMark Brown { 1190, 0xf145 }, 130c42da642SMark Brown { 1191, 0x0b75 }, 131c42da642SMark Brown { 1192, 0x01c5 }, 132c42da642SMark Brown { 1193, 0x1c58 }, 133c42da642SMark Brown { 1194, 0xf373 }, 134c42da642SMark Brown { 1195, 0x0a54 }, 135c42da642SMark Brown { 1196, 0x0558 }, 136c42da642SMark Brown { 1197, 0x168e }, 137c42da642SMark Brown { 1198, 0xf829 }, 138c42da642SMark Brown { 1199, 0x07ad }, 139c42da642SMark Brown { 1200, 0x1103 }, 140c42da642SMark Brown { 1201, 0x0564 }, 141c42da642SMark Brown { 1202, 0x0559 }, 142c42da642SMark Brown { 1203, 0x4000 }, 143c42da642SMark Brown { 1280, 0x00c0 }, 144c42da642SMark Brown { 1281, 0x00c0 }, 145c42da642SMark Brown { 1282, 0x00c0 }, 146c42da642SMark Brown { 1283, 0x00c0 }, 147c42da642SMark Brown { 1312, 0x0200 }, 148c42da642SMark Brown { 1313, 0x0010 }, 149c42da642SMark Brown { 1344, 0x0098 }, 150c42da642SMark Brown { 1345, 0x0845 }, 151c42da642SMark Brown { 1408, 0x6318 }, 152c42da642SMark Brown { 1409, 0x6300 }, 153c42da642SMark Brown { 1410, 0x0fca }, 154c42da642SMark Brown { 1411, 0x0400 }, 155c42da642SMark Brown { 1412, 0x00d8 }, 156c42da642SMark Brown { 1413, 0x1eb5 }, 157c42da642SMark Brown { 1414, 0xf145 }, 158c42da642SMark Brown { 1415, 0x0b75 }, 159c42da642SMark Brown { 1416, 0x01c5 }, 160c42da642SMark Brown { 1417, 0x1c58 }, 161c42da642SMark Brown { 1418, 0xf373 }, 162c42da642SMark Brown { 1419, 0x0a54 }, 163c42da642SMark Brown { 1420, 0x0558 }, 164c42da642SMark Brown { 1421, 0x168e }, 165c42da642SMark Brown { 1422, 0xf829 }, 166c42da642SMark Brown { 1423, 0x07ad }, 167c42da642SMark Brown { 1424, 0x1103 }, 168c42da642SMark Brown { 1425, 0x0564 }, 169c42da642SMark Brown { 1426, 0x0559 }, 170c42da642SMark Brown { 1427, 0x4000 }, 171c42da642SMark Brown { 1568, 0x0002 }, 172c42da642SMark Brown { 1792, 0xa100 }, 173c42da642SMark Brown { 1793, 0xa101 }, 174c42da642SMark Brown { 1794, 0xa101 }, 175c42da642SMark Brown { 1795, 0xa101 }, 176c42da642SMark Brown { 1796, 0xa101 }, 177c42da642SMark Brown { 1797, 0xa101 }, 178c42da642SMark Brown { 1798, 0xa101 }, 179c42da642SMark Brown { 1799, 0xa101 }, 180c42da642SMark Brown { 1800, 0xa101 }, 181c42da642SMark Brown { 1801, 0xa101 }, 182c42da642SMark Brown { 1802, 0xa101 }, 183c42da642SMark Brown { 1803, 0xa101 }, 184c42da642SMark Brown { 1804, 0xa101 }, 185c42da642SMark Brown { 1805, 0xa101 }, 186c42da642SMark Brown { 1825, 0x0055 }, 187c42da642SMark Brown { 1848, 0x3fff }, 188c42da642SMark Brown { 1849, 0x1fff }, 189c42da642SMark Brown { 2049, 0x0001 }, 190c42da642SMark Brown { 2050, 0x0069 }, 191c42da642SMark Brown { 2056, 0x0002 }, 192c42da642SMark Brown { 2057, 0x0003 }, 193c42da642SMark Brown { 2058, 0x0069 }, 194c42da642SMark Brown { 12288, 0x0001 }, 195c42da642SMark Brown { 12289, 0x0001 }, 196c42da642SMark Brown { 12291, 0x0006 }, 197c42da642SMark Brown { 12292, 0x0040 }, 198c42da642SMark Brown { 12293, 0x0001 }, 199c42da642SMark Brown { 12294, 0x000f }, 200c42da642SMark Brown { 12295, 0x0006 }, 201c42da642SMark Brown { 12296, 0x0001 }, 202c42da642SMark Brown { 12297, 0x0003 }, 203c42da642SMark Brown { 12298, 0x0104 }, 204c42da642SMark Brown { 12300, 0x0060 }, 205c42da642SMark Brown { 12301, 0x0011 }, 206c42da642SMark Brown { 12302, 0x0401 }, 207c42da642SMark Brown { 12304, 0x0050 }, 208c42da642SMark Brown { 12305, 0x0003 }, 209c42da642SMark Brown { 12306, 0x0100 }, 210c42da642SMark Brown { 12308, 0x0051 }, 211c42da642SMark Brown { 12309, 0x0003 }, 212c42da642SMark Brown { 12310, 0x0104 }, 213c42da642SMark Brown { 12311, 0x000a }, 214c42da642SMark Brown { 12312, 0x0060 }, 215c42da642SMark Brown { 12313, 0x003b }, 216c42da642SMark Brown { 12314, 0x0502 }, 217c42da642SMark Brown { 12315, 0x0100 }, 218c42da642SMark Brown { 12316, 0x2fff }, 219c42da642SMark Brown { 12320, 0x2fff }, 220c42da642SMark Brown { 12324, 0x2fff }, 221c42da642SMark Brown { 12328, 0x2fff }, 222c42da642SMark Brown { 12332, 0x2fff }, 223c42da642SMark Brown { 12336, 0x2fff }, 224c42da642SMark Brown { 12340, 0x2fff }, 225c42da642SMark Brown { 12344, 0x2fff }, 226c42da642SMark Brown { 12348, 0x2fff }, 227c42da642SMark Brown { 12352, 0x0001 }, 228c42da642SMark Brown { 12353, 0x0001 }, 229c42da642SMark Brown { 12355, 0x0006 }, 230c42da642SMark Brown { 12356, 0x0040 }, 231c42da642SMark Brown { 12357, 0x0001 }, 232c42da642SMark Brown { 12358, 0x000f }, 233c42da642SMark Brown { 12359, 0x0006 }, 234c42da642SMark Brown { 12360, 0x0001 }, 235c42da642SMark Brown { 12361, 0x0003 }, 236c42da642SMark Brown { 12362, 0x0104 }, 237c42da642SMark Brown { 12364, 0x0060 }, 238c42da642SMark Brown { 12365, 0x0011 }, 239c42da642SMark Brown { 12366, 0x0401 }, 240c42da642SMark Brown { 12368, 0x0050 }, 241c42da642SMark Brown { 12369, 0x0003 }, 242c42da642SMark Brown { 12370, 0x0100 }, 243c42da642SMark Brown { 12372, 0x0060 }, 244c42da642SMark Brown { 12373, 0x003b }, 245c42da642SMark Brown { 12374, 0x0502 }, 246c42da642SMark Brown { 12375, 0x0100 }, 247c42da642SMark Brown { 12376, 0x2fff }, 248c42da642SMark Brown { 12380, 0x2fff }, 249c42da642SMark Brown { 12384, 0x2fff }, 250c42da642SMark Brown { 12388, 0x2fff }, 251c42da642SMark Brown { 12392, 0x2fff }, 252c42da642SMark Brown { 12396, 0x2fff }, 253c42da642SMark Brown { 12400, 0x2fff }, 254c42da642SMark Brown { 12404, 0x2fff }, 255c42da642SMark Brown { 12408, 0x2fff }, 256c42da642SMark Brown { 12412, 0x2fff }, 257c42da642SMark Brown { 12416, 0x0001 }, 258c42da642SMark Brown { 12417, 0x0001 }, 259c42da642SMark Brown { 12419, 0x0006 }, 260c42da642SMark Brown { 12420, 0x0040 }, 261c42da642SMark Brown { 12421, 0x0001 }, 262c42da642SMark Brown { 12422, 0x000f }, 263c42da642SMark Brown { 12423, 0x0006 }, 264c42da642SMark Brown { 12424, 0x0001 }, 265c42da642SMark Brown { 12425, 0x0003 }, 266c42da642SMark Brown { 12426, 0x0106 }, 267c42da642SMark Brown { 12428, 0x0061 }, 268c42da642SMark Brown { 12429, 0x0011 }, 269c42da642SMark Brown { 12430, 0x0401 }, 270c42da642SMark Brown { 12432, 0x0050 }, 271c42da642SMark Brown { 12433, 0x0003 }, 272c42da642SMark Brown { 12434, 0x0102 }, 273c42da642SMark Brown { 12436, 0x0051 }, 274c42da642SMark Brown { 12437, 0x0003 }, 275c42da642SMark Brown { 12438, 0x0106 }, 276c42da642SMark Brown { 12439, 0x000a }, 277c42da642SMark Brown { 12440, 0x0061 }, 278c42da642SMark Brown { 12441, 0x003b }, 279c42da642SMark Brown { 12442, 0x0502 }, 280c42da642SMark Brown { 12443, 0x0100 }, 281c42da642SMark Brown { 12444, 0x2fff }, 282c42da642SMark Brown { 12448, 0x2fff }, 283c42da642SMark Brown { 12452, 0x2fff }, 284c42da642SMark Brown { 12456, 0x2fff }, 285c42da642SMark Brown { 12460, 0x2fff }, 286c42da642SMark Brown { 12464, 0x2fff }, 287c42da642SMark Brown { 12468, 0x2fff }, 288c42da642SMark Brown { 12472, 0x2fff }, 289c42da642SMark Brown { 12476, 0x2fff }, 290c42da642SMark Brown { 12480, 0x0001 }, 291c42da642SMark Brown { 12481, 0x0001 }, 292c42da642SMark Brown { 12483, 0x0006 }, 293c42da642SMark Brown { 12484, 0x0040 }, 294c42da642SMark Brown { 12485, 0x0001 }, 295c42da642SMark Brown { 12486, 0x000f }, 296c42da642SMark Brown { 12487, 0x0006 }, 297c42da642SMark Brown { 12488, 0x0001 }, 298c42da642SMark Brown { 12489, 0x0003 }, 299c42da642SMark Brown { 12490, 0x0106 }, 300c42da642SMark Brown { 12492, 0x0061 }, 301c42da642SMark Brown { 12493, 0x0011 }, 302c42da642SMark Brown { 12494, 0x0401 }, 303c42da642SMark Brown { 12496, 0x0050 }, 304c42da642SMark Brown { 12497, 0x0003 }, 305c42da642SMark Brown { 12498, 0x0102 }, 306c42da642SMark Brown { 12500, 0x0061 }, 307c42da642SMark Brown { 12501, 0x003b }, 308c42da642SMark Brown { 12502, 0x0502 }, 309c42da642SMark Brown { 12503, 0x0100 }, 310c42da642SMark Brown { 12504, 0x2fff }, 311c42da642SMark Brown { 12508, 0x2fff }, 312c42da642SMark Brown { 12512, 0x2fff }, 313c42da642SMark Brown { 12516, 0x2fff }, 314c42da642SMark Brown { 12520, 0x2fff }, 315c42da642SMark Brown { 12524, 0x2fff }, 316c42da642SMark Brown { 12528, 0x2fff }, 317c42da642SMark Brown { 12532, 0x2fff }, 318c42da642SMark Brown { 12536, 0x2fff }, 319c42da642SMark Brown { 12540, 0x2fff }, 320c42da642SMark Brown { 12544, 0x0060 }, 321c42da642SMark Brown { 12546, 0x0601 }, 322c42da642SMark Brown { 12548, 0x0050 }, 323c42da642SMark Brown { 12550, 0x0100 }, 324c42da642SMark Brown { 12552, 0x0001 }, 325c42da642SMark Brown { 12554, 0x0104 }, 326c42da642SMark Brown { 12555, 0x0100 }, 327c42da642SMark Brown { 12556, 0x2fff }, 328c42da642SMark Brown { 12560, 0x2fff }, 329c42da642SMark Brown { 12564, 0x2fff }, 330c42da642SMark Brown { 12568, 0x2fff }, 331c42da642SMark Brown { 12572, 0x2fff }, 332c42da642SMark Brown { 12576, 0x2fff }, 333c42da642SMark Brown { 12580, 0x2fff }, 334c42da642SMark Brown { 12584, 0x2fff }, 335c42da642SMark Brown { 12588, 0x2fff }, 336c42da642SMark Brown { 12592, 0x2fff }, 337c42da642SMark Brown { 12596, 0x2fff }, 338c42da642SMark Brown { 12600, 0x2fff }, 339c42da642SMark Brown { 12604, 0x2fff }, 340c42da642SMark Brown { 12608, 0x0061 }, 341c42da642SMark Brown { 12610, 0x0601 }, 342c42da642SMark Brown { 12612, 0x0050 }, 343c42da642SMark Brown { 12614, 0x0102 }, 344c42da642SMark Brown { 12616, 0x0001 }, 345c42da642SMark Brown { 12618, 0x0106 }, 346c42da642SMark Brown { 12619, 0x0100 }, 347c42da642SMark Brown { 12620, 0x2fff }, 348c42da642SMark Brown { 12624, 0x2fff }, 349c42da642SMark Brown { 12628, 0x2fff }, 350c42da642SMark Brown { 12632, 0x2fff }, 351c42da642SMark Brown { 12636, 0x2fff }, 352c42da642SMark Brown { 12640, 0x2fff }, 353c42da642SMark Brown { 12644, 0x2fff }, 354c42da642SMark Brown { 12648, 0x2fff }, 355c42da642SMark Brown { 12652, 0x2fff }, 356c42da642SMark Brown { 12656, 0x2fff }, 357c42da642SMark Brown { 12660, 0x2fff }, 358c42da642SMark Brown { 12664, 0x2fff }, 359c42da642SMark Brown { 12668, 0x2fff }, 360c42da642SMark Brown { 12672, 0x0060 }, 361c42da642SMark Brown { 12674, 0x0601 }, 362c42da642SMark Brown { 12676, 0x0061 }, 363c42da642SMark Brown { 12678, 0x0601 }, 364c42da642SMark Brown { 12680, 0x0050 }, 365c42da642SMark Brown { 12682, 0x0300 }, 366c42da642SMark Brown { 12684, 0x0001 }, 367c42da642SMark Brown { 12686, 0x0304 }, 368c42da642SMark Brown { 12688, 0x0040 }, 369c42da642SMark Brown { 12690, 0x000f }, 370c42da642SMark Brown { 12692, 0x0001 }, 371c42da642SMark Brown { 12695, 0x0100 }, 3726a504a75SDimitris Papastamos }; 3736a504a75SDimitris Papastamos 3746a504a75SDimitris Papastamos struct fll_config { 3756a504a75SDimitris Papastamos int src; 3766a504a75SDimitris Papastamos int in; 3776a504a75SDimitris Papastamos int out; 3786a504a75SDimitris Papastamos }; 3796a504a75SDimitris Papastamos 3806a504a75SDimitris Papastamos struct wm8995_priv { 381c42da642SMark Brown struct regmap *regmap; 3826a504a75SDimitris Papastamos int sysclk[2]; 3836a504a75SDimitris Papastamos int mclk[2]; 3846a504a75SDimitris Papastamos int aifclk[2]; 3856a504a75SDimitris Papastamos struct fll_config fll[2], fll_suspend[2]; 386219d8df8SDimitris Papastamos struct regulator_bulk_data supplies[WM8995_NUM_SUPPLIES]; 387219d8df8SDimitris Papastamos struct notifier_block disable_nb[WM8995_NUM_SUPPLIES]; 388219d8df8SDimitris Papastamos struct snd_soc_codec *codec; 3896a504a75SDimitris Papastamos }; 3906a504a75SDimitris Papastamos 391219d8df8SDimitris Papastamos /* 392219d8df8SDimitris Papastamos * We can't use the same notifier block for more than one supply and 393219d8df8SDimitris Papastamos * there's no way I can see to get from a callback to the caller 394219d8df8SDimitris Papastamos * except container_of(). 395219d8df8SDimitris Papastamos */ 396219d8df8SDimitris Papastamos #define WM8995_REGULATOR_EVENT(n) \ 397219d8df8SDimitris Papastamos static int wm8995_regulator_event_##n(struct notifier_block *nb, \ 398219d8df8SDimitris Papastamos unsigned long event, void *data) \ 399219d8df8SDimitris Papastamos { \ 400219d8df8SDimitris Papastamos struct wm8995_priv *wm8995 = container_of(nb, struct wm8995_priv, \ 401219d8df8SDimitris Papastamos disable_nb[n]); \ 402219d8df8SDimitris Papastamos if (event & REGULATOR_EVENT_DISABLE) { \ 403c42da642SMark Brown regcache_mark_dirty(wm8995->regmap); \ 404219d8df8SDimitris Papastamos } \ 405219d8df8SDimitris Papastamos return 0; \ 406219d8df8SDimitris Papastamos } 407219d8df8SDimitris Papastamos 408219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(0) 409219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(1) 410219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(2) 411219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(3) 412219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(4) 413219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(5) 414219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(6) 415219d8df8SDimitris Papastamos WM8995_REGULATOR_EVENT(7) 416219d8df8SDimitris Papastamos 4176a504a75SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(digital_tlv, -7200, 75, 1); 4186a504a75SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(in1lr_pga_tlv, -1650, 150, 0); 4196a504a75SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(in1l_boost_tlv, 0, 600, 0); 4206a504a75SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(sidetone_tlv, -3600, 150, 0); 4216a504a75SDimitris Papastamos 4226a504a75SDimitris Papastamos static const char *in1l_text[] = { 4236a504a75SDimitris Papastamos "Differential", "Single-ended IN1LN", "Single-ended IN1LP" 4246a504a75SDimitris Papastamos }; 4256a504a75SDimitris Papastamos 4266a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(in1l_enum, WM8995_LEFT_LINE_INPUT_CONTROL, 4276a504a75SDimitris Papastamos 2, in1l_text); 4286a504a75SDimitris Papastamos 4296a504a75SDimitris Papastamos static const char *in1r_text[] = { 4306a504a75SDimitris Papastamos "Differential", "Single-ended IN1RN", "Single-ended IN1RP" 4316a504a75SDimitris Papastamos }; 4326a504a75SDimitris Papastamos 4336a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(in1r_enum, WM8995_LEFT_LINE_INPUT_CONTROL, 4346a504a75SDimitris Papastamos 0, in1r_text); 4356a504a75SDimitris Papastamos 4366a504a75SDimitris Papastamos static const char *dmic_src_text[] = { 4376a504a75SDimitris Papastamos "DMICDAT1", "DMICDAT2", "DMICDAT3" 4386a504a75SDimitris Papastamos }; 4396a504a75SDimitris Papastamos 4406a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(dmic_src1_enum, WM8995_POWER_MANAGEMENT_5, 4416a504a75SDimitris Papastamos 8, dmic_src_text); 4426a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(dmic_src2_enum, WM8995_POWER_MANAGEMENT_5, 4436a504a75SDimitris Papastamos 6, dmic_src_text); 4446a504a75SDimitris Papastamos 4456a504a75SDimitris Papastamos static const struct snd_kcontrol_new wm8995_snd_controls[] = { 4466a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("DAC1 Volume", WM8995_DAC1_LEFT_VOLUME, 4476a504a75SDimitris Papastamos WM8995_DAC1_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4486a504a75SDimitris Papastamos SOC_DOUBLE_R("DAC1 Switch", WM8995_DAC1_LEFT_VOLUME, 4496a504a75SDimitris Papastamos WM8995_DAC1_RIGHT_VOLUME, 9, 1, 1), 4506a504a75SDimitris Papastamos 4516a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("DAC2 Volume", WM8995_DAC2_LEFT_VOLUME, 4526a504a75SDimitris Papastamos WM8995_DAC2_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4536a504a75SDimitris Papastamos SOC_DOUBLE_R("DAC2 Switch", WM8995_DAC2_LEFT_VOLUME, 4546a504a75SDimitris Papastamos WM8995_DAC2_RIGHT_VOLUME, 9, 1, 1), 4556a504a75SDimitris Papastamos 4566a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("AIF1DAC1 Volume", WM8995_AIF1_DAC1_LEFT_VOLUME, 4576a504a75SDimitris Papastamos WM8995_AIF1_DAC1_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4586a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("AIF1DAC2 Volume", WM8995_AIF1_DAC2_LEFT_VOLUME, 4596a504a75SDimitris Papastamos WM8995_AIF1_DAC2_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4606a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("AIF2DAC Volume", WM8995_AIF2_DAC_LEFT_VOLUME, 4616a504a75SDimitris Papastamos WM8995_AIF2_DAC_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4626a504a75SDimitris Papastamos 4636a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("IN1LR Volume", WM8995_LEFT_LINE_INPUT_1_VOLUME, 4646a504a75SDimitris Papastamos WM8995_RIGHT_LINE_INPUT_1_VOLUME, 0, 31, 0, in1lr_pga_tlv), 4656a504a75SDimitris Papastamos 4666a504a75SDimitris Papastamos SOC_SINGLE_TLV("IN1L Boost", WM8995_LEFT_LINE_INPUT_CONTROL, 4676a504a75SDimitris Papastamos 4, 3, 0, in1l_boost_tlv), 4686a504a75SDimitris Papastamos 4696a504a75SDimitris Papastamos SOC_ENUM("IN1L Mode", in1l_enum), 4706a504a75SDimitris Papastamos SOC_ENUM("IN1R Mode", in1r_enum), 4716a504a75SDimitris Papastamos 4726a504a75SDimitris Papastamos SOC_ENUM("DMIC1 SRC", dmic_src1_enum), 4736a504a75SDimitris Papastamos SOC_ENUM("DMIC2 SRC", dmic_src2_enum), 4746a504a75SDimitris Papastamos 4756a504a75SDimitris Papastamos SOC_DOUBLE_TLV("DAC1 Sidetone Volume", WM8995_DAC1_MIXER_VOLUMES, 0, 5, 4766a504a75SDimitris Papastamos 24, 0, sidetone_tlv), 4776a504a75SDimitris Papastamos SOC_DOUBLE_TLV("DAC2 Sidetone Volume", WM8995_DAC2_MIXER_VOLUMES, 0, 5, 4786a504a75SDimitris Papastamos 24, 0, sidetone_tlv), 4796a504a75SDimitris Papastamos 4806a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("AIF1ADC1 Volume", WM8995_AIF1_ADC1_LEFT_VOLUME, 4816a504a75SDimitris Papastamos WM8995_AIF1_ADC1_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4826a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("AIF1ADC2 Volume", WM8995_AIF1_ADC2_LEFT_VOLUME, 4836a504a75SDimitris Papastamos WM8995_AIF1_ADC2_RIGHT_VOLUME, 0, 96, 0, digital_tlv), 4846a504a75SDimitris Papastamos SOC_DOUBLE_R_TLV("AIF2ADC Volume", WM8995_AIF2_ADC_LEFT_VOLUME, 4856a504a75SDimitris Papastamos WM8995_AIF2_ADC_RIGHT_VOLUME, 0, 96, 0, digital_tlv) 4866a504a75SDimitris Papastamos }; 4876a504a75SDimitris Papastamos 4886a504a75SDimitris Papastamos static void wm8995_update_class_w(struct snd_soc_codec *codec) 4896a504a75SDimitris Papastamos { 4906a504a75SDimitris Papastamos int enable = 1; 4916a504a75SDimitris Papastamos int source = 0; /* GCC flow analysis can't track enable */ 4926a504a75SDimitris Papastamos int reg, reg_r; 4936a504a75SDimitris Papastamos 4946a504a75SDimitris Papastamos /* We also need the same setting for L/R and only one path */ 4956a504a75SDimitris Papastamos reg = snd_soc_read(codec, WM8995_DAC1_LEFT_MIXER_ROUTING); 4966a504a75SDimitris Papastamos switch (reg) { 4976a504a75SDimitris Papastamos case WM8995_AIF2DACL_TO_DAC1L: 4986a504a75SDimitris Papastamos dev_dbg(codec->dev, "Class W source AIF2DAC\n"); 4996a504a75SDimitris Papastamos source = 2 << WM8995_CP_DYN_SRC_SEL_SHIFT; 5006a504a75SDimitris Papastamos break; 5016a504a75SDimitris Papastamos case WM8995_AIF1DAC2L_TO_DAC1L: 5026a504a75SDimitris Papastamos dev_dbg(codec->dev, "Class W source AIF1DAC2\n"); 5036a504a75SDimitris Papastamos source = 1 << WM8995_CP_DYN_SRC_SEL_SHIFT; 5046a504a75SDimitris Papastamos break; 5056a504a75SDimitris Papastamos case WM8995_AIF1DAC1L_TO_DAC1L: 5066a504a75SDimitris Papastamos dev_dbg(codec->dev, "Class W source AIF1DAC1\n"); 5076a504a75SDimitris Papastamos source = 0 << WM8995_CP_DYN_SRC_SEL_SHIFT; 5086a504a75SDimitris Papastamos break; 5096a504a75SDimitris Papastamos default: 5106a504a75SDimitris Papastamos dev_dbg(codec->dev, "DAC mixer setting: %x\n", reg); 5116a504a75SDimitris Papastamos enable = 0; 5126a504a75SDimitris Papastamos break; 5136a504a75SDimitris Papastamos } 5146a504a75SDimitris Papastamos 5156a504a75SDimitris Papastamos reg_r = snd_soc_read(codec, WM8995_DAC1_RIGHT_MIXER_ROUTING); 5166a504a75SDimitris Papastamos if (reg_r != reg) { 5176a504a75SDimitris Papastamos dev_dbg(codec->dev, "Left and right DAC mixers different\n"); 5186a504a75SDimitris Papastamos enable = 0; 5196a504a75SDimitris Papastamos } 5206a504a75SDimitris Papastamos 5216a504a75SDimitris Papastamos if (enable) { 5226a504a75SDimitris Papastamos dev_dbg(codec->dev, "Class W enabled\n"); 5236a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_CLASS_W_1, 5246a504a75SDimitris Papastamos WM8995_CP_DYN_PWR_MASK | 5256a504a75SDimitris Papastamos WM8995_CP_DYN_SRC_SEL_MASK, 5266a504a75SDimitris Papastamos source | WM8995_CP_DYN_PWR); 5276a504a75SDimitris Papastamos } else { 5286a504a75SDimitris Papastamos dev_dbg(codec->dev, "Class W disabled\n"); 5296a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_CLASS_W_1, 5306a504a75SDimitris Papastamos WM8995_CP_DYN_PWR_MASK, 0); 5316a504a75SDimitris Papastamos } 5326a504a75SDimitris Papastamos } 5336a504a75SDimitris Papastamos 5346a504a75SDimitris Papastamos static int check_clk_sys(struct snd_soc_dapm_widget *source, 5356a504a75SDimitris Papastamos struct snd_soc_dapm_widget *sink) 5366a504a75SDimitris Papastamos { 5376a504a75SDimitris Papastamos unsigned int reg; 5386a504a75SDimitris Papastamos const char *clk; 5396a504a75SDimitris Papastamos 5406a504a75SDimitris Papastamos reg = snd_soc_read(source->codec, WM8995_CLOCKING_1); 5416a504a75SDimitris Papastamos /* Check what we're currently using for CLK_SYS */ 5426a504a75SDimitris Papastamos if (reg & WM8995_SYSCLK_SRC) 5436a504a75SDimitris Papastamos clk = "AIF2CLK"; 5446a504a75SDimitris Papastamos else 5456a504a75SDimitris Papastamos clk = "AIF1CLK"; 5466a504a75SDimitris Papastamos return !strcmp(source->name, clk); 5476a504a75SDimitris Papastamos } 5486a504a75SDimitris Papastamos 5496a504a75SDimitris Papastamos static int wm8995_put_class_w(struct snd_kcontrol *kcontrol, 5506a504a75SDimitris Papastamos struct snd_ctl_elem_value *ucontrol) 5516a504a75SDimitris Papastamos { 5529d03545dSJarkko Nikula struct snd_soc_dapm_widget_list *wlist = snd_kcontrol_chip(kcontrol); 5539d03545dSJarkko Nikula struct snd_soc_dapm_widget *w = wlist->widgets[0]; 5546a504a75SDimitris Papastamos struct snd_soc_codec *codec; 5556a504a75SDimitris Papastamos int ret; 5566a504a75SDimitris Papastamos 5576a504a75SDimitris Papastamos codec = w->codec; 5586a504a75SDimitris Papastamos ret = snd_soc_dapm_put_volsw(kcontrol, ucontrol); 5596a504a75SDimitris Papastamos wm8995_update_class_w(codec); 5606a504a75SDimitris Papastamos return ret; 5616a504a75SDimitris Papastamos } 5626a504a75SDimitris Papastamos 5636a504a75SDimitris Papastamos static int hp_supply_event(struct snd_soc_dapm_widget *w, 5646a504a75SDimitris Papastamos struct snd_kcontrol *kcontrol, int event) 5656a504a75SDimitris Papastamos { 5666a504a75SDimitris Papastamos struct snd_soc_codec *codec; 5676a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 5686a504a75SDimitris Papastamos 5696a504a75SDimitris Papastamos codec = w->codec; 5706a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 5716a504a75SDimitris Papastamos 5726a504a75SDimitris Papastamos switch (event) { 5736a504a75SDimitris Papastamos case SND_SOC_DAPM_PRE_PMU: 5746a504a75SDimitris Papastamos /* Enable the headphone amp */ 5756a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, 5766a504a75SDimitris Papastamos WM8995_HPOUT1L_ENA_MASK | 5776a504a75SDimitris Papastamos WM8995_HPOUT1R_ENA_MASK, 5786a504a75SDimitris Papastamos WM8995_HPOUT1L_ENA | 5796a504a75SDimitris Papastamos WM8995_HPOUT1R_ENA); 5806a504a75SDimitris Papastamos 5816a504a75SDimitris Papastamos /* Enable the second stage */ 5826a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1, 5836a504a75SDimitris Papastamos WM8995_HPOUT1L_DLY_MASK | 5846a504a75SDimitris Papastamos WM8995_HPOUT1R_DLY_MASK, 5856a504a75SDimitris Papastamos WM8995_HPOUT1L_DLY | 5866a504a75SDimitris Papastamos WM8995_HPOUT1R_DLY); 5876a504a75SDimitris Papastamos break; 5886a504a75SDimitris Papastamos case SND_SOC_DAPM_PRE_PMD: 5896a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_CHARGE_PUMP_1, 5906a504a75SDimitris Papastamos WM8995_CP_ENA_MASK, 0); 5916a504a75SDimitris Papastamos break; 5926a504a75SDimitris Papastamos } 5936a504a75SDimitris Papastamos 5946a504a75SDimitris Papastamos return 0; 5956a504a75SDimitris Papastamos } 5966a504a75SDimitris Papastamos 5976a504a75SDimitris Papastamos static void dc_servo_cmd(struct snd_soc_codec *codec, 5986a504a75SDimitris Papastamos unsigned int reg, unsigned int val, unsigned int mask) 5996a504a75SDimitris Papastamos { 6006a504a75SDimitris Papastamos int timeout = 10; 6016a504a75SDimitris Papastamos 6026a504a75SDimitris Papastamos dev_dbg(codec->dev, "%s: reg = %#x, val = %#x, mask = %#x\n", 6036a504a75SDimitris Papastamos __func__, reg, val, mask); 6046a504a75SDimitris Papastamos 6056a504a75SDimitris Papastamos snd_soc_write(codec, reg, val); 6066a504a75SDimitris Papastamos while (timeout--) { 6076a504a75SDimitris Papastamos msleep(10); 6086a504a75SDimitris Papastamos val = snd_soc_read(codec, WM8995_DC_SERVO_READBACK_0); 6096a504a75SDimitris Papastamos if ((val & mask) == mask) 6106a504a75SDimitris Papastamos return; 6116a504a75SDimitris Papastamos } 6126a504a75SDimitris Papastamos 6136a504a75SDimitris Papastamos dev_err(codec->dev, "Timed out waiting for DC Servo\n"); 6146a504a75SDimitris Papastamos } 6156a504a75SDimitris Papastamos 6166a504a75SDimitris Papastamos static int hp_event(struct snd_soc_dapm_widget *w, 6176a504a75SDimitris Papastamos struct snd_kcontrol *kcontrol, int event) 6186a504a75SDimitris Papastamos { 6196a504a75SDimitris Papastamos struct snd_soc_codec *codec; 6206a504a75SDimitris Papastamos unsigned int reg; 6216a504a75SDimitris Papastamos 6226a504a75SDimitris Papastamos codec = w->codec; 6236a504a75SDimitris Papastamos reg = snd_soc_read(codec, WM8995_ANALOGUE_HP_1); 6246a504a75SDimitris Papastamos 6256a504a75SDimitris Papastamos switch (event) { 6266a504a75SDimitris Papastamos case SND_SOC_DAPM_POST_PMU: 6276a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_CHARGE_PUMP_1, 6286a504a75SDimitris Papastamos WM8995_CP_ENA_MASK, WM8995_CP_ENA); 6296a504a75SDimitris Papastamos 6306a504a75SDimitris Papastamos msleep(5); 6316a504a75SDimitris Papastamos 6326a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, 6336a504a75SDimitris Papastamos WM8995_HPOUT1L_ENA_MASK | 6346a504a75SDimitris Papastamos WM8995_HPOUT1R_ENA_MASK, 6356a504a75SDimitris Papastamos WM8995_HPOUT1L_ENA | WM8995_HPOUT1R_ENA); 6366a504a75SDimitris Papastamos 6376a504a75SDimitris Papastamos udelay(20); 6386a504a75SDimitris Papastamos 6396a504a75SDimitris Papastamos reg |= WM8995_HPOUT1L_DLY | WM8995_HPOUT1R_DLY; 6406a504a75SDimitris Papastamos snd_soc_write(codec, WM8995_ANALOGUE_HP_1, reg); 6416a504a75SDimitris Papastamos 6426a504a75SDimitris Papastamos snd_soc_write(codec, WM8995_DC_SERVO_1, WM8995_DCS_ENA_CHAN_0 | 6436a504a75SDimitris Papastamos WM8995_DCS_ENA_CHAN_1); 6446a504a75SDimitris Papastamos 6456a504a75SDimitris Papastamos dc_servo_cmd(codec, WM8995_DC_SERVO_2, 6466a504a75SDimitris Papastamos WM8995_DCS_TRIG_STARTUP_0 | 6476a504a75SDimitris Papastamos WM8995_DCS_TRIG_STARTUP_1, 6486a504a75SDimitris Papastamos WM8995_DCS_TRIG_DAC_WR_0 | 6496a504a75SDimitris Papastamos WM8995_DCS_TRIG_DAC_WR_1); 6506a504a75SDimitris Papastamos 6516a504a75SDimitris Papastamos reg |= WM8995_HPOUT1R_OUTP | WM8995_HPOUT1R_RMV_SHORT | 6526a504a75SDimitris Papastamos WM8995_HPOUT1L_OUTP | WM8995_HPOUT1L_RMV_SHORT; 6536a504a75SDimitris Papastamos snd_soc_write(codec, WM8995_ANALOGUE_HP_1, reg); 6546a504a75SDimitris Papastamos 6556a504a75SDimitris Papastamos break; 6566a504a75SDimitris Papastamos case SND_SOC_DAPM_PRE_PMD: 6576a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1, 6586a504a75SDimitris Papastamos WM8995_HPOUT1L_OUTP_MASK | 6596a504a75SDimitris Papastamos WM8995_HPOUT1R_OUTP_MASK | 6606a504a75SDimitris Papastamos WM8995_HPOUT1L_RMV_SHORT_MASK | 6616a504a75SDimitris Papastamos WM8995_HPOUT1R_RMV_SHORT_MASK, 0); 6626a504a75SDimitris Papastamos 6636a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_ANALOGUE_HP_1, 6646a504a75SDimitris Papastamos WM8995_HPOUT1L_DLY_MASK | 6656a504a75SDimitris Papastamos WM8995_HPOUT1R_DLY_MASK, 0); 6666a504a75SDimitris Papastamos 6676a504a75SDimitris Papastamos snd_soc_write(codec, WM8995_DC_SERVO_1, 0); 6686a504a75SDimitris Papastamos 6696a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, 6706a504a75SDimitris Papastamos WM8995_HPOUT1L_ENA_MASK | 6716a504a75SDimitris Papastamos WM8995_HPOUT1R_ENA_MASK, 6726a504a75SDimitris Papastamos 0); 6736a504a75SDimitris Papastamos break; 6746a504a75SDimitris Papastamos } 6756a504a75SDimitris Papastamos 6766a504a75SDimitris Papastamos return 0; 6776a504a75SDimitris Papastamos } 6786a504a75SDimitris Papastamos 6796a504a75SDimitris Papastamos static int configure_aif_clock(struct snd_soc_codec *codec, int aif) 6806a504a75SDimitris Papastamos { 6816a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 6826a504a75SDimitris Papastamos int rate; 6836a504a75SDimitris Papastamos int reg1 = 0; 6846a504a75SDimitris Papastamos int offset; 6856a504a75SDimitris Papastamos 6866a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 6876a504a75SDimitris Papastamos 6886a504a75SDimitris Papastamos if (aif) 6896a504a75SDimitris Papastamos offset = 4; 6906a504a75SDimitris Papastamos else 6916a504a75SDimitris Papastamos offset = 0; 6926a504a75SDimitris Papastamos 6936a504a75SDimitris Papastamos switch (wm8995->sysclk[aif]) { 6946a504a75SDimitris Papastamos case WM8995_SYSCLK_MCLK1: 6956a504a75SDimitris Papastamos rate = wm8995->mclk[0]; 6966a504a75SDimitris Papastamos break; 6976a504a75SDimitris Papastamos case WM8995_SYSCLK_MCLK2: 6986a504a75SDimitris Papastamos reg1 |= 0x8; 6996a504a75SDimitris Papastamos rate = wm8995->mclk[1]; 7006a504a75SDimitris Papastamos break; 7016a504a75SDimitris Papastamos case WM8995_SYSCLK_FLL1: 7026a504a75SDimitris Papastamos reg1 |= 0x10; 7036a504a75SDimitris Papastamos rate = wm8995->fll[0].out; 7046a504a75SDimitris Papastamos break; 7056a504a75SDimitris Papastamos case WM8995_SYSCLK_FLL2: 7066a504a75SDimitris Papastamos reg1 |= 0x18; 7076a504a75SDimitris Papastamos rate = wm8995->fll[1].out; 7086a504a75SDimitris Papastamos break; 7096a504a75SDimitris Papastamos default: 7106a504a75SDimitris Papastamos return -EINVAL; 7116a504a75SDimitris Papastamos } 7126a504a75SDimitris Papastamos 7136a504a75SDimitris Papastamos if (rate >= 13500000) { 7146a504a75SDimitris Papastamos rate /= 2; 7156a504a75SDimitris Papastamos reg1 |= WM8995_AIF1CLK_DIV; 7166a504a75SDimitris Papastamos 7176a504a75SDimitris Papastamos dev_dbg(codec->dev, "Dividing AIF%d clock to %dHz\n", 7186a504a75SDimitris Papastamos aif + 1, rate); 7196a504a75SDimitris Papastamos } 7206a504a75SDimitris Papastamos 7216a504a75SDimitris Papastamos wm8995->aifclk[aif] = rate; 7226a504a75SDimitris Papastamos 7236a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1 + offset, 7246a504a75SDimitris Papastamos WM8995_AIF1CLK_SRC_MASK | WM8995_AIF1CLK_DIV_MASK, 7256a504a75SDimitris Papastamos reg1); 7266a504a75SDimitris Papastamos return 0; 7276a504a75SDimitris Papastamos } 7286a504a75SDimitris Papastamos 7296a504a75SDimitris Papastamos static int configure_clock(struct snd_soc_codec *codec) 7306a504a75SDimitris Papastamos { 7316a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 73273478755SAxel Lin int change, new; 7336a504a75SDimitris Papastamos 7346a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 7356a504a75SDimitris Papastamos 7366a504a75SDimitris Papastamos /* Bring up the AIF clocks first */ 7376a504a75SDimitris Papastamos configure_aif_clock(codec, 0); 7386a504a75SDimitris Papastamos configure_aif_clock(codec, 1); 7396a504a75SDimitris Papastamos 7406a504a75SDimitris Papastamos /* 7416a504a75SDimitris Papastamos * Then switch CLK_SYS over to the higher of them; a change 7426a504a75SDimitris Papastamos * can only happen as a result of a clocking change which can 7436a504a75SDimitris Papastamos * only be made outside of DAPM so we can safely redo the 7446a504a75SDimitris Papastamos * clocking. 7456a504a75SDimitris Papastamos */ 7466a504a75SDimitris Papastamos 7476a504a75SDimitris Papastamos /* If they're equal it doesn't matter which is used */ 7486a504a75SDimitris Papastamos if (wm8995->aifclk[0] == wm8995->aifclk[1]) 7496a504a75SDimitris Papastamos return 0; 7506a504a75SDimitris Papastamos 7516a504a75SDimitris Papastamos if (wm8995->aifclk[0] < wm8995->aifclk[1]) 7526a504a75SDimitris Papastamos new = WM8995_SYSCLK_SRC; 7536a504a75SDimitris Papastamos else 7546a504a75SDimitris Papastamos new = 0; 7556a504a75SDimitris Papastamos 75673478755SAxel Lin change = snd_soc_update_bits(codec, WM8995_CLOCKING_1, 7576a504a75SDimitris Papastamos WM8995_SYSCLK_SRC_MASK, new); 75873478755SAxel Lin if (!change) 75973478755SAxel Lin return 0; 7606a504a75SDimitris Papastamos 7616a504a75SDimitris Papastamos snd_soc_dapm_sync(&codec->dapm); 7626a504a75SDimitris Papastamos 7636a504a75SDimitris Papastamos return 0; 7646a504a75SDimitris Papastamos } 7656a504a75SDimitris Papastamos 7666a504a75SDimitris Papastamos static int clk_sys_event(struct snd_soc_dapm_widget *w, 7676a504a75SDimitris Papastamos struct snd_kcontrol *kcontrol, int event) 7686a504a75SDimitris Papastamos { 7696a504a75SDimitris Papastamos struct snd_soc_codec *codec; 7706a504a75SDimitris Papastamos 7716a504a75SDimitris Papastamos codec = w->codec; 7726a504a75SDimitris Papastamos 7736a504a75SDimitris Papastamos switch (event) { 7746a504a75SDimitris Papastamos case SND_SOC_DAPM_PRE_PMU: 7756a504a75SDimitris Papastamos return configure_clock(codec); 7766a504a75SDimitris Papastamos 7776a504a75SDimitris Papastamos case SND_SOC_DAPM_POST_PMD: 7786a504a75SDimitris Papastamos configure_clock(codec); 7796a504a75SDimitris Papastamos break; 7806a504a75SDimitris Papastamos } 7816a504a75SDimitris Papastamos 7826a504a75SDimitris Papastamos return 0; 7836a504a75SDimitris Papastamos } 7846a504a75SDimitris Papastamos 7856a504a75SDimitris Papastamos static const char *sidetone_text[] = { 7866a504a75SDimitris Papastamos "ADC/DMIC1", "DMIC2", 7876a504a75SDimitris Papastamos }; 7886a504a75SDimitris Papastamos 7896a504a75SDimitris Papastamos static const struct soc_enum sidetone1_enum = 7906a504a75SDimitris Papastamos SOC_ENUM_SINGLE(WM8995_SIDETONE, 0, 2, sidetone_text); 7916a504a75SDimitris Papastamos 7926a504a75SDimitris Papastamos static const struct snd_kcontrol_new sidetone1_mux = 7936a504a75SDimitris Papastamos SOC_DAPM_ENUM("Left Sidetone Mux", sidetone1_enum); 7946a504a75SDimitris Papastamos 7956a504a75SDimitris Papastamos static const struct soc_enum sidetone2_enum = 7966a504a75SDimitris Papastamos SOC_ENUM_SINGLE(WM8995_SIDETONE, 1, 2, sidetone_text); 7976a504a75SDimitris Papastamos 7986a504a75SDimitris Papastamos static const struct snd_kcontrol_new sidetone2_mux = 7996a504a75SDimitris Papastamos SOC_DAPM_ENUM("Right Sidetone Mux", sidetone2_enum); 8006a504a75SDimitris Papastamos 8016a504a75SDimitris Papastamos static const struct snd_kcontrol_new aif1adc1l_mix[] = { 8026a504a75SDimitris Papastamos SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8995_AIF1_ADC1_LEFT_MIXER_ROUTING, 8036a504a75SDimitris Papastamos 1, 1, 0), 8046a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC1_LEFT_MIXER_ROUTING, 8056a504a75SDimitris Papastamos 0, 1, 0), 8066a504a75SDimitris Papastamos }; 8076a504a75SDimitris Papastamos 8086a504a75SDimitris Papastamos static const struct snd_kcontrol_new aif1adc1r_mix[] = { 8096a504a75SDimitris Papastamos SOC_DAPM_SINGLE("ADC/DMIC Switch", WM8995_AIF1_ADC1_RIGHT_MIXER_ROUTING, 8106a504a75SDimitris Papastamos 1, 1, 0), 8116a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC1_RIGHT_MIXER_ROUTING, 8126a504a75SDimitris Papastamos 0, 1, 0), 8136a504a75SDimitris Papastamos }; 8146a504a75SDimitris Papastamos 8156a504a75SDimitris Papastamos static const struct snd_kcontrol_new aif1adc2l_mix[] = { 8166a504a75SDimitris Papastamos SOC_DAPM_SINGLE("DMIC Switch", WM8995_AIF1_ADC2_LEFT_MIXER_ROUTING, 8176a504a75SDimitris Papastamos 1, 1, 0), 8186a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC2_LEFT_MIXER_ROUTING, 8196a504a75SDimitris Papastamos 0, 1, 0), 8206a504a75SDimitris Papastamos }; 8216a504a75SDimitris Papastamos 8226a504a75SDimitris Papastamos static const struct snd_kcontrol_new aif1adc2r_mix[] = { 8236a504a75SDimitris Papastamos SOC_DAPM_SINGLE("DMIC Switch", WM8995_AIF1_ADC2_RIGHT_MIXER_ROUTING, 8246a504a75SDimitris Papastamos 1, 1, 0), 8256a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF2 Switch", WM8995_AIF1_ADC2_RIGHT_MIXER_ROUTING, 8266a504a75SDimitris Papastamos 0, 1, 0), 8276a504a75SDimitris Papastamos }; 8286a504a75SDimitris Papastamos 8296a504a75SDimitris Papastamos static const struct snd_kcontrol_new dac1l_mix[] = { 8306a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("Right Sidetone Switch", WM8995_DAC1_LEFT_MIXER_ROUTING, 8316a504a75SDimitris Papastamos 5, 1, 0), 8326a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("Left Sidetone Switch", WM8995_DAC1_LEFT_MIXER_ROUTING, 8336a504a75SDimitris Papastamos 4, 1, 0), 8346a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("AIF2 Switch", WM8995_DAC1_LEFT_MIXER_ROUTING, 8356a504a75SDimitris Papastamos 2, 1, 0), 8366a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("AIF1.2 Switch", WM8995_DAC1_LEFT_MIXER_ROUTING, 8376a504a75SDimitris Papastamos 1, 1, 0), 8386a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("AIF1.1 Switch", WM8995_DAC1_LEFT_MIXER_ROUTING, 8396a504a75SDimitris Papastamos 0, 1, 0), 8406a504a75SDimitris Papastamos }; 8416a504a75SDimitris Papastamos 8426a504a75SDimitris Papastamos static const struct snd_kcontrol_new dac1r_mix[] = { 8436a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("Right Sidetone Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING, 8446a504a75SDimitris Papastamos 5, 1, 0), 8456a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("Left Sidetone Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING, 8466a504a75SDimitris Papastamos 4, 1, 0), 8476a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("AIF2 Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING, 8486a504a75SDimitris Papastamos 2, 1, 0), 8496a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("AIF1.2 Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING, 8506a504a75SDimitris Papastamos 1, 1, 0), 8516a504a75SDimitris Papastamos WM8995_CLASS_W_SWITCH("AIF1.1 Switch", WM8995_DAC1_RIGHT_MIXER_ROUTING, 8526a504a75SDimitris Papastamos 0, 1, 0), 8536a504a75SDimitris Papastamos }; 8546a504a75SDimitris Papastamos 8556a504a75SDimitris Papastamos static const struct snd_kcontrol_new aif2dac2l_mix[] = { 8566a504a75SDimitris Papastamos SOC_DAPM_SINGLE("Right Sidetone Switch", WM8995_DAC2_LEFT_MIXER_ROUTING, 8576a504a75SDimitris Papastamos 5, 1, 0), 8586a504a75SDimitris Papastamos SOC_DAPM_SINGLE("Left Sidetone Switch", WM8995_DAC2_LEFT_MIXER_ROUTING, 8596a504a75SDimitris Papastamos 4, 1, 0), 8606a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF2 Switch", WM8995_DAC2_LEFT_MIXER_ROUTING, 8616a504a75SDimitris Papastamos 2, 1, 0), 8626a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF1.2 Switch", WM8995_DAC2_LEFT_MIXER_ROUTING, 8636a504a75SDimitris Papastamos 1, 1, 0), 8646a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF1.1 Switch", WM8995_DAC2_LEFT_MIXER_ROUTING, 8656a504a75SDimitris Papastamos 0, 1, 0), 8666a504a75SDimitris Papastamos }; 8676a504a75SDimitris Papastamos 8686a504a75SDimitris Papastamos static const struct snd_kcontrol_new aif2dac2r_mix[] = { 8696a504a75SDimitris Papastamos SOC_DAPM_SINGLE("Right Sidetone Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING, 8706a504a75SDimitris Papastamos 5, 1, 0), 8716a504a75SDimitris Papastamos SOC_DAPM_SINGLE("Left Sidetone Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING, 8726a504a75SDimitris Papastamos 4, 1, 0), 8736a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF2 Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING, 8746a504a75SDimitris Papastamos 2, 1, 0), 8756a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF1.2 Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING, 8766a504a75SDimitris Papastamos 1, 1, 0), 8776a504a75SDimitris Papastamos SOC_DAPM_SINGLE("AIF1.1 Switch", WM8995_DAC2_RIGHT_MIXER_ROUTING, 8786a504a75SDimitris Papastamos 0, 1, 0), 8796a504a75SDimitris Papastamos }; 8806a504a75SDimitris Papastamos 8816a504a75SDimitris Papastamos static const struct snd_kcontrol_new in1l_pga = 8826a504a75SDimitris Papastamos SOC_DAPM_SINGLE("IN1L Switch", WM8995_POWER_MANAGEMENT_2, 5, 1, 0); 8836a504a75SDimitris Papastamos 8846a504a75SDimitris Papastamos static const struct snd_kcontrol_new in1r_pga = 8856a504a75SDimitris Papastamos SOC_DAPM_SINGLE("IN1R Switch", WM8995_POWER_MANAGEMENT_2, 4, 1, 0); 8866a504a75SDimitris Papastamos 8876a504a75SDimitris Papastamos static const char *adc_mux_text[] = { 8886a504a75SDimitris Papastamos "ADC", 8896a504a75SDimitris Papastamos "DMIC", 8906a504a75SDimitris Papastamos }; 8916a504a75SDimitris Papastamos 8926a504a75SDimitris Papastamos static const struct soc_enum adc_enum = 8936a504a75SDimitris Papastamos SOC_ENUM_SINGLE(0, 0, 2, adc_mux_text); 8946a504a75SDimitris Papastamos 8956a504a75SDimitris Papastamos static const struct snd_kcontrol_new adcl_mux = 8966a504a75SDimitris Papastamos SOC_DAPM_ENUM_VIRT("ADCL Mux", adc_enum); 8976a504a75SDimitris Papastamos 8986a504a75SDimitris Papastamos static const struct snd_kcontrol_new adcr_mux = 8996a504a75SDimitris Papastamos SOC_DAPM_ENUM_VIRT("ADCR Mux", adc_enum); 9006a504a75SDimitris Papastamos 9016a504a75SDimitris Papastamos static const char *spk_src_text[] = { 9026a504a75SDimitris Papastamos "DAC1L", "DAC1R", "DAC2L", "DAC2R" 9036a504a75SDimitris Papastamos }; 9046a504a75SDimitris Papastamos 9056a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(spk1l_src_enum, WM8995_LEFT_PDM_SPEAKER_1, 9066a504a75SDimitris Papastamos 0, spk_src_text); 9076a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(spk1r_src_enum, WM8995_RIGHT_PDM_SPEAKER_1, 9086a504a75SDimitris Papastamos 0, spk_src_text); 9096a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(spk2l_src_enum, WM8995_LEFT_PDM_SPEAKER_2, 9106a504a75SDimitris Papastamos 0, spk_src_text); 9116a504a75SDimitris Papastamos static const SOC_ENUM_SINGLE_DECL(spk2r_src_enum, WM8995_RIGHT_PDM_SPEAKER_2, 9126a504a75SDimitris Papastamos 0, spk_src_text); 9136a504a75SDimitris Papastamos 9146a504a75SDimitris Papastamos static const struct snd_kcontrol_new spk1l_mux = 9156a504a75SDimitris Papastamos SOC_DAPM_ENUM("SPK1L SRC", spk1l_src_enum); 9166a504a75SDimitris Papastamos static const struct snd_kcontrol_new spk1r_mux = 9176a504a75SDimitris Papastamos SOC_DAPM_ENUM("SPK1R SRC", spk1r_src_enum); 9186a504a75SDimitris Papastamos static const struct snd_kcontrol_new spk2l_mux = 9196a504a75SDimitris Papastamos SOC_DAPM_ENUM("SPK2L SRC", spk2l_src_enum); 9206a504a75SDimitris Papastamos static const struct snd_kcontrol_new spk2r_mux = 9216a504a75SDimitris Papastamos SOC_DAPM_ENUM("SPK2R SRC", spk2r_src_enum); 9226a504a75SDimitris Papastamos 9236a504a75SDimitris Papastamos static const struct snd_soc_dapm_widget wm8995_dapm_widgets[] = { 9246a504a75SDimitris Papastamos SND_SOC_DAPM_INPUT("DMIC1DAT"), 9256a504a75SDimitris Papastamos SND_SOC_DAPM_INPUT("DMIC2DAT"), 9266a504a75SDimitris Papastamos 9276a504a75SDimitris Papastamos SND_SOC_DAPM_INPUT("IN1L"), 9286a504a75SDimitris Papastamos SND_SOC_DAPM_INPUT("IN1R"), 9296a504a75SDimitris Papastamos 9306a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("IN1L PGA", SND_SOC_NOPM, 0, 0, 9316a504a75SDimitris Papastamos &in1l_pga, 1), 9326a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("IN1R PGA", SND_SOC_NOPM, 0, 0, 9336a504a75SDimitris Papastamos &in1r_pga, 1), 9346a504a75SDimitris Papastamos 9359ce31623SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS1", WM8995_POWER_MANAGEMENT_1, 8, 0, 9369ce31623SMark Brown NULL, 0), 9379ce31623SMark Brown SND_SOC_DAPM_SUPPLY("MICBIAS2", WM8995_POWER_MANAGEMENT_1, 9, 0, 9389ce31623SMark Brown NULL, 0), 9396a504a75SDimitris Papastamos 9406a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("AIF1CLK", WM8995_AIF1_CLOCKING_1, 0, 0, NULL, 0), 9416a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("AIF2CLK", WM8995_AIF2_CLOCKING_1, 0, 0, NULL, 0), 9426a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("DSP1CLK", WM8995_CLOCKING_1, 3, 0, NULL, 0), 9436a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("DSP2CLK", WM8995_CLOCKING_1, 2, 0, NULL, 0), 9446a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("SYSDSPCLK", WM8995_CLOCKING_1, 1, 0, NULL, 0), 9456a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("CLK_SYS", SND_SOC_NOPM, 0, 0, clk_sys_event, 9466a504a75SDimitris Papastamos SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 9476a504a75SDimitris Papastamos 9486a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_OUT("AIF1ADC1L", "AIF1 Capture", 0, 9496a504a75SDimitris Papastamos WM8995_POWER_MANAGEMENT_3, 9, 0), 9506a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_OUT("AIF1ADC1R", "AIF1 Capture", 0, 9516a504a75SDimitris Papastamos WM8995_POWER_MANAGEMENT_3, 8, 0), 9526a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_OUT("AIF1ADCDAT", "AIF1 Capture", 0, 9536a504a75SDimitris Papastamos SND_SOC_NOPM, 0, 0), 9546a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_OUT("AIF1ADC2L", "AIF1 Capture", 9556a504a75SDimitris Papastamos 0, WM8995_POWER_MANAGEMENT_3, 11, 0), 9566a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_OUT("AIF1ADC2R", "AIF1 Capture", 9576a504a75SDimitris Papastamos 0, WM8995_POWER_MANAGEMENT_3, 10, 0), 9586a504a75SDimitris Papastamos 9596a504a75SDimitris Papastamos SND_SOC_DAPM_VIRT_MUX("ADCL Mux", SND_SOC_NOPM, 1, 0, 9606a504a75SDimitris Papastamos &adcl_mux), 9616a504a75SDimitris Papastamos SND_SOC_DAPM_VIRT_MUX("ADCR Mux", SND_SOC_NOPM, 0, 0, 9626a504a75SDimitris Papastamos &adcr_mux), 9636a504a75SDimitris Papastamos 9646a504a75SDimitris Papastamos SND_SOC_DAPM_ADC("DMIC2L", NULL, WM8995_POWER_MANAGEMENT_3, 5, 0), 9656a504a75SDimitris Papastamos SND_SOC_DAPM_ADC("DMIC2R", NULL, WM8995_POWER_MANAGEMENT_3, 4, 0), 9666a504a75SDimitris Papastamos SND_SOC_DAPM_ADC("DMIC1L", NULL, WM8995_POWER_MANAGEMENT_3, 3, 0), 9676a504a75SDimitris Papastamos SND_SOC_DAPM_ADC("DMIC1R", NULL, WM8995_POWER_MANAGEMENT_3, 2, 0), 9686a504a75SDimitris Papastamos 9696a504a75SDimitris Papastamos SND_SOC_DAPM_ADC("ADCL", NULL, WM8995_POWER_MANAGEMENT_3, 1, 0), 9706a504a75SDimitris Papastamos SND_SOC_DAPM_ADC("ADCR", NULL, WM8995_POWER_MANAGEMENT_3, 0, 0), 9716a504a75SDimitris Papastamos 9726a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("AIF1ADC1L Mixer", SND_SOC_NOPM, 0, 0, 9736a504a75SDimitris Papastamos aif1adc1l_mix, ARRAY_SIZE(aif1adc1l_mix)), 9746a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("AIF1ADC1R Mixer", SND_SOC_NOPM, 0, 0, 9756a504a75SDimitris Papastamos aif1adc1r_mix, ARRAY_SIZE(aif1adc1r_mix)), 9766a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("AIF1ADC2L Mixer", SND_SOC_NOPM, 0, 0, 9776a504a75SDimitris Papastamos aif1adc2l_mix, ARRAY_SIZE(aif1adc2l_mix)), 9786a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("AIF1ADC2R Mixer", SND_SOC_NOPM, 0, 0, 9796a504a75SDimitris Papastamos aif1adc2r_mix, ARRAY_SIZE(aif1adc2r_mix)), 9806a504a75SDimitris Papastamos 9816a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_IN("AIF1DAC1L", NULL, 0, WM8995_POWER_MANAGEMENT_4, 9826a504a75SDimitris Papastamos 9, 0), 9836a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_IN("AIF1DAC1R", NULL, 0, WM8995_POWER_MANAGEMENT_4, 9846a504a75SDimitris Papastamos 8, 0), 9856a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_IN("AIF1DACDAT", "AIF1 Playback", 0, SND_SOC_NOPM, 9866a504a75SDimitris Papastamos 0, 0), 9876a504a75SDimitris Papastamos 9886a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_IN("AIF1DAC2L", NULL, 0, WM8995_POWER_MANAGEMENT_4, 9896a504a75SDimitris Papastamos 11, 0), 9906a504a75SDimitris Papastamos SND_SOC_DAPM_AIF_IN("AIF1DAC2R", NULL, 0, WM8995_POWER_MANAGEMENT_4, 9916a504a75SDimitris Papastamos 10, 0), 9926a504a75SDimitris Papastamos 9936a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("AIF2DAC2L Mixer", SND_SOC_NOPM, 0, 0, 9946a504a75SDimitris Papastamos aif2dac2l_mix, ARRAY_SIZE(aif2dac2l_mix)), 9956a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("AIF2DAC2R Mixer", SND_SOC_NOPM, 0, 0, 9966a504a75SDimitris Papastamos aif2dac2r_mix, ARRAY_SIZE(aif2dac2r_mix)), 9976a504a75SDimitris Papastamos 9986a504a75SDimitris Papastamos SND_SOC_DAPM_DAC("DAC2L", NULL, WM8995_POWER_MANAGEMENT_4, 3, 0), 9996a504a75SDimitris Papastamos SND_SOC_DAPM_DAC("DAC2R", NULL, WM8995_POWER_MANAGEMENT_4, 2, 0), 10006a504a75SDimitris Papastamos SND_SOC_DAPM_DAC("DAC1L", NULL, WM8995_POWER_MANAGEMENT_4, 1, 0), 10016a504a75SDimitris Papastamos SND_SOC_DAPM_DAC("DAC1R", NULL, WM8995_POWER_MANAGEMENT_4, 0, 0), 10026a504a75SDimitris Papastamos 10036a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("DAC1L Mixer", SND_SOC_NOPM, 0, 0, dac1l_mix, 10046a504a75SDimitris Papastamos ARRAY_SIZE(dac1l_mix)), 10056a504a75SDimitris Papastamos SND_SOC_DAPM_MIXER("DAC1R Mixer", SND_SOC_NOPM, 0, 0, dac1r_mix, 10066a504a75SDimitris Papastamos ARRAY_SIZE(dac1r_mix)), 10076a504a75SDimitris Papastamos 10086a504a75SDimitris Papastamos SND_SOC_DAPM_MUX("Left Sidetone", SND_SOC_NOPM, 0, 0, &sidetone1_mux), 10096a504a75SDimitris Papastamos SND_SOC_DAPM_MUX("Right Sidetone", SND_SOC_NOPM, 0, 0, &sidetone2_mux), 10106a504a75SDimitris Papastamos 10116a504a75SDimitris Papastamos SND_SOC_DAPM_PGA_E("Headphone PGA", SND_SOC_NOPM, 0, 0, NULL, 0, 10126a504a75SDimitris Papastamos hp_event, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), 10136a504a75SDimitris Papastamos 10146a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("Headphone Supply", SND_SOC_NOPM, 0, 0, 10156a504a75SDimitris Papastamos hp_supply_event, SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_PRE_PMD), 10166a504a75SDimitris Papastamos 10176a504a75SDimitris Papastamos SND_SOC_DAPM_MUX("SPK1L Driver", WM8995_LEFT_PDM_SPEAKER_1, 10186a504a75SDimitris Papastamos 4, 0, &spk1l_mux), 10196a504a75SDimitris Papastamos SND_SOC_DAPM_MUX("SPK1R Driver", WM8995_RIGHT_PDM_SPEAKER_1, 10206a504a75SDimitris Papastamos 4, 0, &spk1r_mux), 10216a504a75SDimitris Papastamos SND_SOC_DAPM_MUX("SPK2L Driver", WM8995_LEFT_PDM_SPEAKER_2, 10226a504a75SDimitris Papastamos 4, 0, &spk2l_mux), 10236a504a75SDimitris Papastamos SND_SOC_DAPM_MUX("SPK2R Driver", WM8995_RIGHT_PDM_SPEAKER_2, 10246a504a75SDimitris Papastamos 4, 0, &spk2r_mux), 10256a504a75SDimitris Papastamos 10266a504a75SDimitris Papastamos SND_SOC_DAPM_SUPPLY("LDO2", WM8995_POWER_MANAGEMENT_2, 1, 0, NULL, 0), 10276a504a75SDimitris Papastamos 10286a504a75SDimitris Papastamos SND_SOC_DAPM_OUTPUT("HP1L"), 10296a504a75SDimitris Papastamos SND_SOC_DAPM_OUTPUT("HP1R"), 10306a504a75SDimitris Papastamos SND_SOC_DAPM_OUTPUT("SPK1L"), 10316a504a75SDimitris Papastamos SND_SOC_DAPM_OUTPUT("SPK1R"), 10326a504a75SDimitris Papastamos SND_SOC_DAPM_OUTPUT("SPK2L"), 10336a504a75SDimitris Papastamos SND_SOC_DAPM_OUTPUT("SPK2R") 10346a504a75SDimitris Papastamos }; 10356a504a75SDimitris Papastamos 10366a504a75SDimitris Papastamos static const struct snd_soc_dapm_route wm8995_intercon[] = { 10376a504a75SDimitris Papastamos { "CLK_SYS", NULL, "AIF1CLK", check_clk_sys }, 10386a504a75SDimitris Papastamos { "CLK_SYS", NULL, "AIF2CLK", check_clk_sys }, 10396a504a75SDimitris Papastamos 10406a504a75SDimitris Papastamos { "DSP1CLK", NULL, "CLK_SYS" }, 10416a504a75SDimitris Papastamos { "DSP2CLK", NULL, "CLK_SYS" }, 10426a504a75SDimitris Papastamos { "SYSDSPCLK", NULL, "CLK_SYS" }, 10436a504a75SDimitris Papastamos 10446a504a75SDimitris Papastamos { "AIF1ADC1L", NULL, "AIF1CLK" }, 10456a504a75SDimitris Papastamos { "AIF1ADC1L", NULL, "DSP1CLK" }, 10466a504a75SDimitris Papastamos { "AIF1ADC1R", NULL, "AIF1CLK" }, 10476a504a75SDimitris Papastamos { "AIF1ADC1R", NULL, "DSP1CLK" }, 10486a504a75SDimitris Papastamos { "AIF1ADC1R", NULL, "SYSDSPCLK" }, 10496a504a75SDimitris Papastamos 10506a504a75SDimitris Papastamos { "AIF1ADC2L", NULL, "AIF1CLK" }, 10516a504a75SDimitris Papastamos { "AIF1ADC2L", NULL, "DSP1CLK" }, 10526a504a75SDimitris Papastamos { "AIF1ADC2R", NULL, "AIF1CLK" }, 10536a504a75SDimitris Papastamos { "AIF1ADC2R", NULL, "DSP1CLK" }, 10546a504a75SDimitris Papastamos { "AIF1ADC2R", NULL, "SYSDSPCLK" }, 10556a504a75SDimitris Papastamos 10566a504a75SDimitris Papastamos { "DMIC1L", NULL, "DMIC1DAT" }, 10576a504a75SDimitris Papastamos { "DMIC1L", NULL, "CLK_SYS" }, 10586a504a75SDimitris Papastamos { "DMIC1R", NULL, "DMIC1DAT" }, 10596a504a75SDimitris Papastamos { "DMIC1R", NULL, "CLK_SYS" }, 10606a504a75SDimitris Papastamos { "DMIC2L", NULL, "DMIC2DAT" }, 10616a504a75SDimitris Papastamos { "DMIC2L", NULL, "CLK_SYS" }, 10626a504a75SDimitris Papastamos { "DMIC2R", NULL, "DMIC2DAT" }, 10636a504a75SDimitris Papastamos { "DMIC2R", NULL, "CLK_SYS" }, 10646a504a75SDimitris Papastamos 10656a504a75SDimitris Papastamos { "ADCL", NULL, "AIF1CLK" }, 10666a504a75SDimitris Papastamos { "ADCL", NULL, "DSP1CLK" }, 10676a504a75SDimitris Papastamos { "ADCL", NULL, "SYSDSPCLK" }, 10686a504a75SDimitris Papastamos 10696a504a75SDimitris Papastamos { "ADCR", NULL, "AIF1CLK" }, 10706a504a75SDimitris Papastamos { "ADCR", NULL, "DSP1CLK" }, 10716a504a75SDimitris Papastamos { "ADCR", NULL, "SYSDSPCLK" }, 10726a504a75SDimitris Papastamos 10736a504a75SDimitris Papastamos { "IN1L PGA", "IN1L Switch", "IN1L" }, 10746a504a75SDimitris Papastamos { "IN1R PGA", "IN1R Switch", "IN1R" }, 10756a504a75SDimitris Papastamos { "IN1L PGA", NULL, "LDO2" }, 10766a504a75SDimitris Papastamos { "IN1R PGA", NULL, "LDO2" }, 10776a504a75SDimitris Papastamos 10786a504a75SDimitris Papastamos { "ADCL", NULL, "IN1L PGA" }, 10796a504a75SDimitris Papastamos { "ADCR", NULL, "IN1R PGA" }, 10806a504a75SDimitris Papastamos 10816a504a75SDimitris Papastamos { "ADCL Mux", "ADC", "ADCL" }, 10826a504a75SDimitris Papastamos { "ADCL Mux", "DMIC", "DMIC1L" }, 10836a504a75SDimitris Papastamos { "ADCR Mux", "ADC", "ADCR" }, 10846a504a75SDimitris Papastamos { "ADCR Mux", "DMIC", "DMIC1R" }, 10856a504a75SDimitris Papastamos 10866a504a75SDimitris Papastamos /* AIF1 outputs */ 10876a504a75SDimitris Papastamos { "AIF1ADC1L", NULL, "AIF1ADC1L Mixer" }, 10886a504a75SDimitris Papastamos { "AIF1ADC1L Mixer", "ADC/DMIC Switch", "ADCL Mux" }, 10896a504a75SDimitris Papastamos 10906a504a75SDimitris Papastamos { "AIF1ADC1R", NULL, "AIF1ADC1R Mixer" }, 10916a504a75SDimitris Papastamos { "AIF1ADC1R Mixer", "ADC/DMIC Switch", "ADCR Mux" }, 10926a504a75SDimitris Papastamos 10936a504a75SDimitris Papastamos { "AIF1ADC2L", NULL, "AIF1ADC2L Mixer" }, 10946a504a75SDimitris Papastamos { "AIF1ADC2L Mixer", "DMIC Switch", "DMIC2L" }, 10956a504a75SDimitris Papastamos 10966a504a75SDimitris Papastamos { "AIF1ADC2R", NULL, "AIF1ADC2R Mixer" }, 10976a504a75SDimitris Papastamos { "AIF1ADC2R Mixer", "DMIC Switch", "DMIC2R" }, 10986a504a75SDimitris Papastamos 10996a504a75SDimitris Papastamos /* Sidetone */ 11006a504a75SDimitris Papastamos { "Left Sidetone", "ADC/DMIC1", "AIF1ADC1L" }, 11016a504a75SDimitris Papastamos { "Left Sidetone", "DMIC2", "AIF1ADC2L" }, 11026a504a75SDimitris Papastamos { "Right Sidetone", "ADC/DMIC1", "AIF1ADC1R" }, 11036a504a75SDimitris Papastamos { "Right Sidetone", "DMIC2", "AIF1ADC2R" }, 11046a504a75SDimitris Papastamos 11056a504a75SDimitris Papastamos { "AIF1DAC1L", NULL, "AIF1CLK" }, 11066a504a75SDimitris Papastamos { "AIF1DAC1L", NULL, "DSP1CLK" }, 11076a504a75SDimitris Papastamos { "AIF1DAC1R", NULL, "AIF1CLK" }, 11086a504a75SDimitris Papastamos { "AIF1DAC1R", NULL, "DSP1CLK" }, 11096a504a75SDimitris Papastamos { "AIF1DAC1R", NULL, "SYSDSPCLK" }, 11106a504a75SDimitris Papastamos 11116a504a75SDimitris Papastamos { "AIF1DAC2L", NULL, "AIF1CLK" }, 11126a504a75SDimitris Papastamos { "AIF1DAC2L", NULL, "DSP1CLK" }, 11136a504a75SDimitris Papastamos { "AIF1DAC2R", NULL, "AIF1CLK" }, 11146a504a75SDimitris Papastamos { "AIF1DAC2R", NULL, "DSP1CLK" }, 11156a504a75SDimitris Papastamos { "AIF1DAC2R", NULL, "SYSDSPCLK" }, 11166a504a75SDimitris Papastamos 11176a504a75SDimitris Papastamos { "DAC1L", NULL, "AIF1CLK" }, 11186a504a75SDimitris Papastamos { "DAC1L", NULL, "DSP1CLK" }, 11196a504a75SDimitris Papastamos { "DAC1L", NULL, "SYSDSPCLK" }, 11206a504a75SDimitris Papastamos 11216a504a75SDimitris Papastamos { "DAC1R", NULL, "AIF1CLK" }, 11226a504a75SDimitris Papastamos { "DAC1R", NULL, "DSP1CLK" }, 11236a504a75SDimitris Papastamos { "DAC1R", NULL, "SYSDSPCLK" }, 11246a504a75SDimitris Papastamos 11256a504a75SDimitris Papastamos { "AIF1DAC1L", NULL, "AIF1DACDAT" }, 11266a504a75SDimitris Papastamos { "AIF1DAC1R", NULL, "AIF1DACDAT" }, 11276a504a75SDimitris Papastamos { "AIF1DAC2L", NULL, "AIF1DACDAT" }, 11286a504a75SDimitris Papastamos { "AIF1DAC2R", NULL, "AIF1DACDAT" }, 11296a504a75SDimitris Papastamos 11306a504a75SDimitris Papastamos /* DAC1 inputs */ 11316a504a75SDimitris Papastamos { "DAC1L", NULL, "DAC1L Mixer" }, 11326a504a75SDimitris Papastamos { "DAC1L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, 11336a504a75SDimitris Papastamos { "DAC1L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, 11346a504a75SDimitris Papastamos { "DAC1L Mixer", "Left Sidetone Switch", "Left Sidetone" }, 11356a504a75SDimitris Papastamos { "DAC1L Mixer", "Right Sidetone Switch", "Right Sidetone" }, 11366a504a75SDimitris Papastamos 11376a504a75SDimitris Papastamos { "DAC1R", NULL, "DAC1R Mixer" }, 11386a504a75SDimitris Papastamos { "DAC1R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, 11396a504a75SDimitris Papastamos { "DAC1R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, 11406a504a75SDimitris Papastamos { "DAC1R Mixer", "Left Sidetone Switch", "Left Sidetone" }, 11416a504a75SDimitris Papastamos { "DAC1R Mixer", "Right Sidetone Switch", "Right Sidetone" }, 11426a504a75SDimitris Papastamos 11436a504a75SDimitris Papastamos /* DAC2/AIF2 outputs */ 11446a504a75SDimitris Papastamos { "DAC2L", NULL, "AIF2DAC2L Mixer" }, 11456a504a75SDimitris Papastamos { "AIF2DAC2L Mixer", "AIF1.2 Switch", "AIF1DAC2L" }, 11466a504a75SDimitris Papastamos { "AIF2DAC2L Mixer", "AIF1.1 Switch", "AIF1DAC1L" }, 11476a504a75SDimitris Papastamos 11486a504a75SDimitris Papastamos { "DAC2R", NULL, "AIF2DAC2R Mixer" }, 11496a504a75SDimitris Papastamos { "AIF2DAC2R Mixer", "AIF1.2 Switch", "AIF1DAC2R" }, 11506a504a75SDimitris Papastamos { "AIF2DAC2R Mixer", "AIF1.1 Switch", "AIF1DAC1R" }, 11516a504a75SDimitris Papastamos 11526a504a75SDimitris Papastamos /* Output stages */ 11536a504a75SDimitris Papastamos { "Headphone PGA", NULL, "DAC1L" }, 11546a504a75SDimitris Papastamos { "Headphone PGA", NULL, "DAC1R" }, 11556a504a75SDimitris Papastamos 11566a504a75SDimitris Papastamos { "Headphone PGA", NULL, "DAC2L" }, 11576a504a75SDimitris Papastamos { "Headphone PGA", NULL, "DAC2R" }, 11586a504a75SDimitris Papastamos 11596a504a75SDimitris Papastamos { "Headphone PGA", NULL, "Headphone Supply" }, 11606a504a75SDimitris Papastamos { "Headphone PGA", NULL, "CLK_SYS" }, 11616a504a75SDimitris Papastamos { "Headphone PGA", NULL, "LDO2" }, 11626a504a75SDimitris Papastamos 11636a504a75SDimitris Papastamos { "HP1L", NULL, "Headphone PGA" }, 11646a504a75SDimitris Papastamos { "HP1R", NULL, "Headphone PGA" }, 11656a504a75SDimitris Papastamos 11666a504a75SDimitris Papastamos { "SPK1L Driver", "DAC1L", "DAC1L" }, 11676a504a75SDimitris Papastamos { "SPK1L Driver", "DAC1R", "DAC1R" }, 11686a504a75SDimitris Papastamos { "SPK1L Driver", "DAC2L", "DAC2L" }, 11696a504a75SDimitris Papastamos { "SPK1L Driver", "DAC2R", "DAC2R" }, 11706a504a75SDimitris Papastamos { "SPK1L Driver", NULL, "CLK_SYS" }, 11716a504a75SDimitris Papastamos 11726a504a75SDimitris Papastamos { "SPK1R Driver", "DAC1L", "DAC1L" }, 11736a504a75SDimitris Papastamos { "SPK1R Driver", "DAC1R", "DAC1R" }, 11746a504a75SDimitris Papastamos { "SPK1R Driver", "DAC2L", "DAC2L" }, 11756a504a75SDimitris Papastamos { "SPK1R Driver", "DAC2R", "DAC2R" }, 11766a504a75SDimitris Papastamos { "SPK1R Driver", NULL, "CLK_SYS" }, 11776a504a75SDimitris Papastamos 11786a504a75SDimitris Papastamos { "SPK2L Driver", "DAC1L", "DAC1L" }, 11796a504a75SDimitris Papastamos { "SPK2L Driver", "DAC1R", "DAC1R" }, 11806a504a75SDimitris Papastamos { "SPK2L Driver", "DAC2L", "DAC2L" }, 11816a504a75SDimitris Papastamos { "SPK2L Driver", "DAC2R", "DAC2R" }, 11826a504a75SDimitris Papastamos { "SPK2L Driver", NULL, "CLK_SYS" }, 11836a504a75SDimitris Papastamos 11846a504a75SDimitris Papastamos { "SPK2R Driver", "DAC1L", "DAC1L" }, 11856a504a75SDimitris Papastamos { "SPK2R Driver", "DAC1R", "DAC1R" }, 11866a504a75SDimitris Papastamos { "SPK2R Driver", "DAC2L", "DAC2L" }, 11876a504a75SDimitris Papastamos { "SPK2R Driver", "DAC2R", "DAC2R" }, 11886a504a75SDimitris Papastamos { "SPK2R Driver", NULL, "CLK_SYS" }, 11896a504a75SDimitris Papastamos 11906a504a75SDimitris Papastamos { "SPK1L", NULL, "SPK1L Driver" }, 11916a504a75SDimitris Papastamos { "SPK1R", NULL, "SPK1R Driver" }, 11926a504a75SDimitris Papastamos { "SPK2L", NULL, "SPK2L Driver" }, 11936a504a75SDimitris Papastamos { "SPK2R", NULL, "SPK2R Driver" } 11946a504a75SDimitris Papastamos }; 11956a504a75SDimitris Papastamos 1196c42da642SMark Brown static bool wm8995_readable(struct device *dev, unsigned int reg) 11976a504a75SDimitris Papastamos { 1198c42da642SMark Brown switch (reg) { 1199c42da642SMark Brown case WM8995_SOFTWARE_RESET: 1200c42da642SMark Brown case WM8995_POWER_MANAGEMENT_1: 1201c42da642SMark Brown case WM8995_POWER_MANAGEMENT_2: 1202c42da642SMark Brown case WM8995_POWER_MANAGEMENT_3: 1203c42da642SMark Brown case WM8995_POWER_MANAGEMENT_4: 1204c42da642SMark Brown case WM8995_POWER_MANAGEMENT_5: 1205c42da642SMark Brown case WM8995_LEFT_LINE_INPUT_1_VOLUME: 1206c42da642SMark Brown case WM8995_RIGHT_LINE_INPUT_1_VOLUME: 1207c42da642SMark Brown case WM8995_LEFT_LINE_INPUT_CONTROL: 1208c42da642SMark Brown case WM8995_DAC1_LEFT_VOLUME: 1209c42da642SMark Brown case WM8995_DAC1_RIGHT_VOLUME: 1210c42da642SMark Brown case WM8995_DAC2_LEFT_VOLUME: 1211c42da642SMark Brown case WM8995_DAC2_RIGHT_VOLUME: 1212c42da642SMark Brown case WM8995_OUTPUT_VOLUME_ZC_1: 1213c42da642SMark Brown case WM8995_MICBIAS_1: 1214c42da642SMark Brown case WM8995_MICBIAS_2: 1215c42da642SMark Brown case WM8995_LDO_1: 1216c42da642SMark Brown case WM8995_LDO_2: 1217c42da642SMark Brown case WM8995_ACCESSORY_DETECT_MODE1: 1218c42da642SMark Brown case WM8995_ACCESSORY_DETECT_MODE2: 1219c42da642SMark Brown case WM8995_HEADPHONE_DETECT1: 1220c42da642SMark Brown case WM8995_HEADPHONE_DETECT2: 1221c42da642SMark Brown case WM8995_MIC_DETECT_1: 1222c42da642SMark Brown case WM8995_MIC_DETECT_2: 1223c42da642SMark Brown case WM8995_CHARGE_PUMP_1: 1224c42da642SMark Brown case WM8995_CLASS_W_1: 1225c42da642SMark Brown case WM8995_DC_SERVO_1: 1226c42da642SMark Brown case WM8995_DC_SERVO_2: 1227c42da642SMark Brown case WM8995_DC_SERVO_3: 1228c42da642SMark Brown case WM8995_DC_SERVO_5: 1229c42da642SMark Brown case WM8995_DC_SERVO_6: 1230c42da642SMark Brown case WM8995_DC_SERVO_7: 1231c42da642SMark Brown case WM8995_DC_SERVO_READBACK_0: 1232c42da642SMark Brown case WM8995_ANALOGUE_HP_1: 1233c42da642SMark Brown case WM8995_ANALOGUE_HP_2: 1234c42da642SMark Brown case WM8995_CHIP_REVISION: 1235c42da642SMark Brown case WM8995_CONTROL_INTERFACE_1: 1236c42da642SMark Brown case WM8995_CONTROL_INTERFACE_2: 1237c42da642SMark Brown case WM8995_WRITE_SEQUENCER_CTRL_1: 1238c42da642SMark Brown case WM8995_WRITE_SEQUENCER_CTRL_2: 1239c42da642SMark Brown case WM8995_AIF1_CLOCKING_1: 1240c42da642SMark Brown case WM8995_AIF1_CLOCKING_2: 1241c42da642SMark Brown case WM8995_AIF2_CLOCKING_1: 1242c42da642SMark Brown case WM8995_AIF2_CLOCKING_2: 1243c42da642SMark Brown case WM8995_CLOCKING_1: 1244c42da642SMark Brown case WM8995_CLOCKING_2: 1245c42da642SMark Brown case WM8995_AIF1_RATE: 1246c42da642SMark Brown case WM8995_AIF2_RATE: 1247c42da642SMark Brown case WM8995_RATE_STATUS: 1248c42da642SMark Brown case WM8995_FLL1_CONTROL_1: 1249c42da642SMark Brown case WM8995_FLL1_CONTROL_2: 1250c42da642SMark Brown case WM8995_FLL1_CONTROL_3: 1251c42da642SMark Brown case WM8995_FLL1_CONTROL_4: 1252c42da642SMark Brown case WM8995_FLL1_CONTROL_5: 1253c42da642SMark Brown case WM8995_FLL2_CONTROL_1: 1254c42da642SMark Brown case WM8995_FLL2_CONTROL_2: 1255c42da642SMark Brown case WM8995_FLL2_CONTROL_3: 1256c42da642SMark Brown case WM8995_FLL2_CONTROL_4: 1257c42da642SMark Brown case WM8995_FLL2_CONTROL_5: 1258c42da642SMark Brown case WM8995_AIF1_CONTROL_1: 1259c42da642SMark Brown case WM8995_AIF1_CONTROL_2: 1260c42da642SMark Brown case WM8995_AIF1_MASTER_SLAVE: 1261c42da642SMark Brown case WM8995_AIF1_BCLK: 1262c42da642SMark Brown case WM8995_AIF1ADC_LRCLK: 1263c42da642SMark Brown case WM8995_AIF1DAC_LRCLK: 1264c42da642SMark Brown case WM8995_AIF1DAC_DATA: 1265c42da642SMark Brown case WM8995_AIF1ADC_DATA: 1266c42da642SMark Brown case WM8995_AIF2_CONTROL_1: 1267c42da642SMark Brown case WM8995_AIF2_CONTROL_2: 1268c42da642SMark Brown case WM8995_AIF2_MASTER_SLAVE: 1269c42da642SMark Brown case WM8995_AIF2_BCLK: 1270c42da642SMark Brown case WM8995_AIF2ADC_LRCLK: 1271c42da642SMark Brown case WM8995_AIF2DAC_LRCLK: 1272c42da642SMark Brown case WM8995_AIF2DAC_DATA: 1273c42da642SMark Brown case WM8995_AIF2ADC_DATA: 1274c42da642SMark Brown case WM8995_AIF1_ADC1_LEFT_VOLUME: 1275c42da642SMark Brown case WM8995_AIF1_ADC1_RIGHT_VOLUME: 1276c42da642SMark Brown case WM8995_AIF1_DAC1_LEFT_VOLUME: 1277c42da642SMark Brown case WM8995_AIF1_DAC1_RIGHT_VOLUME: 1278c42da642SMark Brown case WM8995_AIF1_ADC2_LEFT_VOLUME: 1279c42da642SMark Brown case WM8995_AIF1_ADC2_RIGHT_VOLUME: 1280c42da642SMark Brown case WM8995_AIF1_DAC2_LEFT_VOLUME: 1281c42da642SMark Brown case WM8995_AIF1_DAC2_RIGHT_VOLUME: 1282c42da642SMark Brown case WM8995_AIF1_ADC1_FILTERS: 1283c42da642SMark Brown case WM8995_AIF1_ADC2_FILTERS: 1284c42da642SMark Brown case WM8995_AIF1_DAC1_FILTERS_1: 1285c42da642SMark Brown case WM8995_AIF1_DAC1_FILTERS_2: 1286c42da642SMark Brown case WM8995_AIF1_DAC2_FILTERS_1: 1287c42da642SMark Brown case WM8995_AIF1_DAC2_FILTERS_2: 1288c42da642SMark Brown case WM8995_AIF1_DRC1_1: 1289c42da642SMark Brown case WM8995_AIF1_DRC1_2: 1290c42da642SMark Brown case WM8995_AIF1_DRC1_3: 1291c42da642SMark Brown case WM8995_AIF1_DRC1_4: 1292c42da642SMark Brown case WM8995_AIF1_DRC1_5: 1293c42da642SMark Brown case WM8995_AIF1_DRC2_1: 1294c42da642SMark Brown case WM8995_AIF1_DRC2_2: 1295c42da642SMark Brown case WM8995_AIF1_DRC2_3: 1296c42da642SMark Brown case WM8995_AIF1_DRC2_4: 1297c42da642SMark Brown case WM8995_AIF1_DRC2_5: 1298c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_GAINS_1: 1299c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_GAINS_2: 1300c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_1_A: 1301c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_1_B: 1302c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_1_PG: 1303c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_2_A: 1304c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_2_B: 1305c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_2_C: 1306c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_2_PG: 1307c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_3_A: 1308c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_3_B: 1309c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_3_C: 1310c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_3_PG: 1311c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_4_A: 1312c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_4_B: 1313c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_4_C: 1314c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_4_PG: 1315c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_5_A: 1316c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_5_B: 1317c42da642SMark Brown case WM8995_AIF1_DAC1_EQ_BAND_5_PG: 1318c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_GAINS_1: 1319c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_GAINS_2: 1320c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_1_A: 1321c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_1_B: 1322c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_1_PG: 1323c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_2_A: 1324c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_2_B: 1325c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_2_C: 1326c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_2_PG: 1327c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_3_A: 1328c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_3_B: 1329c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_3_C: 1330c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_3_PG: 1331c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_4_A: 1332c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_4_B: 1333c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_4_C: 1334c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_4_PG: 1335c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_5_A: 1336c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_5_B: 1337c42da642SMark Brown case WM8995_AIF1_DAC2_EQ_BAND_5_PG: 1338c42da642SMark Brown case WM8995_AIF2_ADC_LEFT_VOLUME: 1339c42da642SMark Brown case WM8995_AIF2_ADC_RIGHT_VOLUME: 1340c42da642SMark Brown case WM8995_AIF2_DAC_LEFT_VOLUME: 1341c42da642SMark Brown case WM8995_AIF2_DAC_RIGHT_VOLUME: 1342c42da642SMark Brown case WM8995_AIF2_ADC_FILTERS: 1343c42da642SMark Brown case WM8995_AIF2_DAC_FILTERS_1: 1344c42da642SMark Brown case WM8995_AIF2_DAC_FILTERS_2: 1345c42da642SMark Brown case WM8995_AIF2_DRC_1: 1346c42da642SMark Brown case WM8995_AIF2_DRC_2: 1347c42da642SMark Brown case WM8995_AIF2_DRC_3: 1348c42da642SMark Brown case WM8995_AIF2_DRC_4: 1349c42da642SMark Brown case WM8995_AIF2_DRC_5: 1350c42da642SMark Brown case WM8995_AIF2_EQ_GAINS_1: 1351c42da642SMark Brown case WM8995_AIF2_EQ_GAINS_2: 1352c42da642SMark Brown case WM8995_AIF2_EQ_BAND_1_A: 1353c42da642SMark Brown case WM8995_AIF2_EQ_BAND_1_B: 1354c42da642SMark Brown case WM8995_AIF2_EQ_BAND_1_PG: 1355c42da642SMark Brown case WM8995_AIF2_EQ_BAND_2_A: 1356c42da642SMark Brown case WM8995_AIF2_EQ_BAND_2_B: 1357c42da642SMark Brown case WM8995_AIF2_EQ_BAND_2_C: 1358c42da642SMark Brown case WM8995_AIF2_EQ_BAND_2_PG: 1359c42da642SMark Brown case WM8995_AIF2_EQ_BAND_3_A: 1360c42da642SMark Brown case WM8995_AIF2_EQ_BAND_3_B: 1361c42da642SMark Brown case WM8995_AIF2_EQ_BAND_3_C: 1362c42da642SMark Brown case WM8995_AIF2_EQ_BAND_3_PG: 1363c42da642SMark Brown case WM8995_AIF2_EQ_BAND_4_A: 1364c42da642SMark Brown case WM8995_AIF2_EQ_BAND_4_B: 1365c42da642SMark Brown case WM8995_AIF2_EQ_BAND_4_C: 1366c42da642SMark Brown case WM8995_AIF2_EQ_BAND_4_PG: 1367c42da642SMark Brown case WM8995_AIF2_EQ_BAND_5_A: 1368c42da642SMark Brown case WM8995_AIF2_EQ_BAND_5_B: 1369c42da642SMark Brown case WM8995_AIF2_EQ_BAND_5_PG: 1370c42da642SMark Brown case WM8995_DAC1_MIXER_VOLUMES: 1371c42da642SMark Brown case WM8995_DAC1_LEFT_MIXER_ROUTING: 1372c42da642SMark Brown case WM8995_DAC1_RIGHT_MIXER_ROUTING: 1373c42da642SMark Brown case WM8995_DAC2_MIXER_VOLUMES: 1374c42da642SMark Brown case WM8995_DAC2_LEFT_MIXER_ROUTING: 1375c42da642SMark Brown case WM8995_DAC2_RIGHT_MIXER_ROUTING: 1376c42da642SMark Brown case WM8995_AIF1_ADC1_LEFT_MIXER_ROUTING: 1377c42da642SMark Brown case WM8995_AIF1_ADC1_RIGHT_MIXER_ROUTING: 1378c42da642SMark Brown case WM8995_AIF1_ADC2_LEFT_MIXER_ROUTING: 1379c42da642SMark Brown case WM8995_AIF1_ADC2_RIGHT_MIXER_ROUTING: 1380c42da642SMark Brown case WM8995_DAC_SOFTMUTE: 1381c42da642SMark Brown case WM8995_OVERSAMPLING: 1382c42da642SMark Brown case WM8995_SIDETONE: 1383c42da642SMark Brown case WM8995_GPIO_1: 1384c42da642SMark Brown case WM8995_GPIO_2: 1385c42da642SMark Brown case WM8995_GPIO_3: 1386c42da642SMark Brown case WM8995_GPIO_4: 1387c42da642SMark Brown case WM8995_GPIO_5: 1388c42da642SMark Brown case WM8995_GPIO_6: 1389c42da642SMark Brown case WM8995_GPIO_7: 1390c42da642SMark Brown case WM8995_GPIO_8: 1391c42da642SMark Brown case WM8995_GPIO_9: 1392c42da642SMark Brown case WM8995_GPIO_10: 1393c42da642SMark Brown case WM8995_GPIO_11: 1394c42da642SMark Brown case WM8995_GPIO_12: 1395c42da642SMark Brown case WM8995_GPIO_13: 1396c42da642SMark Brown case WM8995_GPIO_14: 1397c42da642SMark Brown case WM8995_PULL_CONTROL_1: 1398c42da642SMark Brown case WM8995_PULL_CONTROL_2: 1399c42da642SMark Brown case WM8995_INTERRUPT_STATUS_1: 1400c42da642SMark Brown case WM8995_INTERRUPT_STATUS_2: 1401c42da642SMark Brown case WM8995_INTERRUPT_RAW_STATUS_2: 1402c42da642SMark Brown case WM8995_INTERRUPT_STATUS_1_MASK: 1403c42da642SMark Brown case WM8995_INTERRUPT_STATUS_2_MASK: 1404c42da642SMark Brown case WM8995_INTERRUPT_CONTROL: 1405c42da642SMark Brown case WM8995_LEFT_PDM_SPEAKER_1: 1406c42da642SMark Brown case WM8995_RIGHT_PDM_SPEAKER_1: 1407c42da642SMark Brown case WM8995_PDM_SPEAKER_1_MUTE_SEQUENCE: 1408c42da642SMark Brown case WM8995_LEFT_PDM_SPEAKER_2: 1409c42da642SMark Brown case WM8995_RIGHT_PDM_SPEAKER_2: 1410c42da642SMark Brown case WM8995_PDM_SPEAKER_2_MUTE_SEQUENCE: 1411c42da642SMark Brown return true; 1412c42da642SMark Brown default: 1413c42da642SMark Brown return false; 1414c42da642SMark Brown } 1415c42da642SMark Brown } 14166a504a75SDimitris Papastamos 1417c42da642SMark Brown static bool wm8995_volatile(struct device *dev, unsigned int reg) 1418c42da642SMark Brown { 14196a504a75SDimitris Papastamos switch (reg) { 14206a504a75SDimitris Papastamos case WM8995_SOFTWARE_RESET: 14216a504a75SDimitris Papastamos case WM8995_DC_SERVO_READBACK_0: 14226a504a75SDimitris Papastamos case WM8995_INTERRUPT_STATUS_1: 14236a504a75SDimitris Papastamos case WM8995_INTERRUPT_STATUS_2: 14246a504a75SDimitris Papastamos case WM8995_INTERRUPT_CONTROL: 14256a504a75SDimitris Papastamos case WM8995_ACCESSORY_DETECT_MODE1: 14266a504a75SDimitris Papastamos case WM8995_ACCESSORY_DETECT_MODE2: 14276a504a75SDimitris Papastamos case WM8995_HEADPHONE_DETECT1: 14286a504a75SDimitris Papastamos case WM8995_HEADPHONE_DETECT2: 1429c42da642SMark Brown case WM8995_RATE_STATUS: 1430c42da642SMark Brown return true; 1431c42da642SMark Brown default: 1432c42da642SMark Brown return false; 14336a504a75SDimitris Papastamos } 14346a504a75SDimitris Papastamos } 14356a504a75SDimitris Papastamos 14366a504a75SDimitris Papastamos static int wm8995_aif_mute(struct snd_soc_dai *dai, int mute) 14376a504a75SDimitris Papastamos { 14386a504a75SDimitris Papastamos struct snd_soc_codec *codec = dai->codec; 14396a504a75SDimitris Papastamos int mute_reg; 14406a504a75SDimitris Papastamos 14416a504a75SDimitris Papastamos switch (dai->id) { 14426a504a75SDimitris Papastamos case 0: 14436a504a75SDimitris Papastamos mute_reg = WM8995_AIF1_DAC1_FILTERS_1; 14446a504a75SDimitris Papastamos break; 14456a504a75SDimitris Papastamos case 1: 14466a504a75SDimitris Papastamos mute_reg = WM8995_AIF2_DAC_FILTERS_1; 14476a504a75SDimitris Papastamos break; 14486a504a75SDimitris Papastamos default: 14496a504a75SDimitris Papastamos return -EINVAL; 14506a504a75SDimitris Papastamos } 14516a504a75SDimitris Papastamos 14526a504a75SDimitris Papastamos snd_soc_update_bits(codec, mute_reg, WM8995_AIF1DAC1_MUTE_MASK, 14536a504a75SDimitris Papastamos !!mute << WM8995_AIF1DAC1_MUTE_SHIFT); 14546a504a75SDimitris Papastamos return 0; 14556a504a75SDimitris Papastamos } 14566a504a75SDimitris Papastamos 14576a504a75SDimitris Papastamos static int wm8995_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt) 14586a504a75SDimitris Papastamos { 14596a504a75SDimitris Papastamos struct snd_soc_codec *codec; 14606a504a75SDimitris Papastamos int master; 14616a504a75SDimitris Papastamos int aif; 14626a504a75SDimitris Papastamos 14636a504a75SDimitris Papastamos codec = dai->codec; 14646a504a75SDimitris Papastamos 14656a504a75SDimitris Papastamos master = 0; 14666a504a75SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 14676a504a75SDimitris Papastamos case SND_SOC_DAIFMT_CBS_CFS: 14686a504a75SDimitris Papastamos break; 14696a504a75SDimitris Papastamos case SND_SOC_DAIFMT_CBM_CFM: 14706a504a75SDimitris Papastamos master = WM8995_AIF1_MSTR; 14716a504a75SDimitris Papastamos break; 14726a504a75SDimitris Papastamos default: 14736a504a75SDimitris Papastamos dev_err(dai->dev, "Unknown master/slave configuration\n"); 14746a504a75SDimitris Papastamos return -EINVAL; 14756a504a75SDimitris Papastamos } 14766a504a75SDimitris Papastamos 14776a504a75SDimitris Papastamos aif = 0; 14786a504a75SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 14796a504a75SDimitris Papastamos case SND_SOC_DAIFMT_DSP_B: 14806a504a75SDimitris Papastamos aif |= WM8995_AIF1_LRCLK_INV; 14816a504a75SDimitris Papastamos case SND_SOC_DAIFMT_DSP_A: 14826a504a75SDimitris Papastamos aif |= (0x3 << WM8995_AIF1_FMT_SHIFT); 14836a504a75SDimitris Papastamos break; 14846a504a75SDimitris Papastamos case SND_SOC_DAIFMT_I2S: 14856a504a75SDimitris Papastamos aif |= (0x2 << WM8995_AIF1_FMT_SHIFT); 14866a504a75SDimitris Papastamos break; 14876a504a75SDimitris Papastamos case SND_SOC_DAIFMT_RIGHT_J: 14886a504a75SDimitris Papastamos break; 14896a504a75SDimitris Papastamos case SND_SOC_DAIFMT_LEFT_J: 14906a504a75SDimitris Papastamos aif |= (0x1 << WM8995_AIF1_FMT_SHIFT); 14916a504a75SDimitris Papastamos break; 14926a504a75SDimitris Papastamos default: 14936a504a75SDimitris Papastamos dev_err(dai->dev, "Unknown dai format\n"); 14946a504a75SDimitris Papastamos return -EINVAL; 14956a504a75SDimitris Papastamos } 14966a504a75SDimitris Papastamos 14976a504a75SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 14986a504a75SDimitris Papastamos case SND_SOC_DAIFMT_DSP_A: 14996a504a75SDimitris Papastamos case SND_SOC_DAIFMT_DSP_B: 15006a504a75SDimitris Papastamos /* frame inversion not valid for DSP modes */ 15016a504a75SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 15026a504a75SDimitris Papastamos case SND_SOC_DAIFMT_NB_NF: 15036a504a75SDimitris Papastamos break; 15046a504a75SDimitris Papastamos case SND_SOC_DAIFMT_IB_NF: 15056a504a75SDimitris Papastamos aif |= WM8995_AIF1_BCLK_INV; 15066a504a75SDimitris Papastamos break; 15076a504a75SDimitris Papastamos default: 15086a504a75SDimitris Papastamos return -EINVAL; 15096a504a75SDimitris Papastamos } 15106a504a75SDimitris Papastamos break; 15116a504a75SDimitris Papastamos 15126a504a75SDimitris Papastamos case SND_SOC_DAIFMT_I2S: 15136a504a75SDimitris Papastamos case SND_SOC_DAIFMT_RIGHT_J: 15146a504a75SDimitris Papastamos case SND_SOC_DAIFMT_LEFT_J: 15156a504a75SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 15166a504a75SDimitris Papastamos case SND_SOC_DAIFMT_NB_NF: 15176a504a75SDimitris Papastamos break; 15186a504a75SDimitris Papastamos case SND_SOC_DAIFMT_IB_IF: 15196a504a75SDimitris Papastamos aif |= WM8995_AIF1_BCLK_INV | WM8995_AIF1_LRCLK_INV; 15206a504a75SDimitris Papastamos break; 15216a504a75SDimitris Papastamos case SND_SOC_DAIFMT_IB_NF: 15226a504a75SDimitris Papastamos aif |= WM8995_AIF1_BCLK_INV; 15236a504a75SDimitris Papastamos break; 15246a504a75SDimitris Papastamos case SND_SOC_DAIFMT_NB_IF: 15256a504a75SDimitris Papastamos aif |= WM8995_AIF1_LRCLK_INV; 15266a504a75SDimitris Papastamos break; 15276a504a75SDimitris Papastamos default: 15286a504a75SDimitris Papastamos return -EINVAL; 15296a504a75SDimitris Papastamos } 15306a504a75SDimitris Papastamos break; 15316a504a75SDimitris Papastamos default: 15326a504a75SDimitris Papastamos return -EINVAL; 15336a504a75SDimitris Papastamos } 15346a504a75SDimitris Papastamos 15356a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_CONTROL_1, 15366a504a75SDimitris Papastamos WM8995_AIF1_BCLK_INV_MASK | 15376a504a75SDimitris Papastamos WM8995_AIF1_LRCLK_INV_MASK | 15386a504a75SDimitris Papastamos WM8995_AIF1_FMT_MASK, aif); 15396a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_MASTER_SLAVE, 15406a504a75SDimitris Papastamos WM8995_AIF1_MSTR_MASK, master); 15416a504a75SDimitris Papastamos return 0; 15426a504a75SDimitris Papastamos } 15436a504a75SDimitris Papastamos 15446a504a75SDimitris Papastamos static const int srs[] = { 15456a504a75SDimitris Papastamos 8000, 11025, 12000, 16000, 22050, 24000, 32000, 44100, 15466a504a75SDimitris Papastamos 48000, 88200, 96000 15476a504a75SDimitris Papastamos }; 15486a504a75SDimitris Papastamos 15496a504a75SDimitris Papastamos static const int fs_ratios[] = { 15506a504a75SDimitris Papastamos -1 /* reserved */, 15516a504a75SDimitris Papastamos 128, 192, 256, 384, 512, 768, 1024, 1408, 1536 15526a504a75SDimitris Papastamos }; 15536a504a75SDimitris Papastamos 15546a504a75SDimitris Papastamos static const int bclk_divs[] = { 15556a504a75SDimitris Papastamos 10, 15, 20, 30, 40, 55, 60, 80, 110, 120, 160, 220, 240, 320, 440, 480 15566a504a75SDimitris Papastamos }; 15576a504a75SDimitris Papastamos 15586a504a75SDimitris Papastamos static int wm8995_hw_params(struct snd_pcm_substream *substream, 15596a504a75SDimitris Papastamos struct snd_pcm_hw_params *params, 15606a504a75SDimitris Papastamos struct snd_soc_dai *dai) 15616a504a75SDimitris Papastamos { 15626a504a75SDimitris Papastamos struct snd_soc_codec *codec; 15636a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 15646a504a75SDimitris Papastamos int aif1_reg; 15656a504a75SDimitris Papastamos int bclk_reg; 15666a504a75SDimitris Papastamos int lrclk_reg; 15676a504a75SDimitris Papastamos int rate_reg; 15686a504a75SDimitris Papastamos int bclk_rate; 15696a504a75SDimitris Papastamos int aif1; 15706a504a75SDimitris Papastamos int lrclk, bclk; 15716a504a75SDimitris Papastamos int i, rate_val, best, best_val, cur_val; 15726a504a75SDimitris Papastamos 15736a504a75SDimitris Papastamos codec = dai->codec; 15746a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 15756a504a75SDimitris Papastamos 15766a504a75SDimitris Papastamos switch (dai->id) { 15776a504a75SDimitris Papastamos case 0: 15786a504a75SDimitris Papastamos aif1_reg = WM8995_AIF1_CONTROL_1; 15796a504a75SDimitris Papastamos bclk_reg = WM8995_AIF1_BCLK; 15806a504a75SDimitris Papastamos rate_reg = WM8995_AIF1_RATE; 15816a504a75SDimitris Papastamos if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK /* || 15826a504a75SDimitris Papastamos wm8995->lrclk_shared[0] */) { 15836a504a75SDimitris Papastamos lrclk_reg = WM8995_AIF1DAC_LRCLK; 15846a504a75SDimitris Papastamos } else { 15856a504a75SDimitris Papastamos lrclk_reg = WM8995_AIF1ADC_LRCLK; 15866a504a75SDimitris Papastamos dev_dbg(codec->dev, "AIF1 using split LRCLK\n"); 15876a504a75SDimitris Papastamos } 15886a504a75SDimitris Papastamos break; 15896a504a75SDimitris Papastamos case 1: 15906a504a75SDimitris Papastamos aif1_reg = WM8995_AIF2_CONTROL_1; 15916a504a75SDimitris Papastamos bclk_reg = WM8995_AIF2_BCLK; 15926a504a75SDimitris Papastamos rate_reg = WM8995_AIF2_RATE; 15936a504a75SDimitris Papastamos if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK /* || 15946a504a75SDimitris Papastamos wm8995->lrclk_shared[1] */) { 15956a504a75SDimitris Papastamos lrclk_reg = WM8995_AIF2DAC_LRCLK; 15966a504a75SDimitris Papastamos } else { 15976a504a75SDimitris Papastamos lrclk_reg = WM8995_AIF2ADC_LRCLK; 15986a504a75SDimitris Papastamos dev_dbg(codec->dev, "AIF2 using split LRCLK\n"); 15996a504a75SDimitris Papastamos } 16006a504a75SDimitris Papastamos break; 16016a504a75SDimitris Papastamos default: 16026a504a75SDimitris Papastamos return -EINVAL; 16036a504a75SDimitris Papastamos } 16046a504a75SDimitris Papastamos 16056a504a75SDimitris Papastamos bclk_rate = snd_soc_params_to_bclk(params); 16066a504a75SDimitris Papastamos if (bclk_rate < 0) 16076a504a75SDimitris Papastamos return bclk_rate; 16086a504a75SDimitris Papastamos 16096a504a75SDimitris Papastamos aif1 = 0; 16106a504a75SDimitris Papastamos switch (params_format(params)) { 16116a504a75SDimitris Papastamos case SNDRV_PCM_FORMAT_S16_LE: 16126a504a75SDimitris Papastamos break; 16136a504a75SDimitris Papastamos case SNDRV_PCM_FORMAT_S20_3LE: 16146a504a75SDimitris Papastamos aif1 |= (0x1 << WM8995_AIF1_WL_SHIFT); 16156a504a75SDimitris Papastamos break; 16166a504a75SDimitris Papastamos case SNDRV_PCM_FORMAT_S24_LE: 16176a504a75SDimitris Papastamos aif1 |= (0x2 << WM8995_AIF1_WL_SHIFT); 16186a504a75SDimitris Papastamos break; 16196a504a75SDimitris Papastamos case SNDRV_PCM_FORMAT_S32_LE: 16206a504a75SDimitris Papastamos aif1 |= (0x3 << WM8995_AIF1_WL_SHIFT); 16216a504a75SDimitris Papastamos break; 16226a504a75SDimitris Papastamos default: 16236a504a75SDimitris Papastamos dev_err(dai->dev, "Unsupported word length %u\n", 16246a504a75SDimitris Papastamos params_format(params)); 16256a504a75SDimitris Papastamos return -EINVAL; 16266a504a75SDimitris Papastamos } 16276a504a75SDimitris Papastamos 16286a504a75SDimitris Papastamos /* try to find a suitable sample rate */ 16296a504a75SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(srs); ++i) 16306a504a75SDimitris Papastamos if (srs[i] == params_rate(params)) 16316a504a75SDimitris Papastamos break; 16326a504a75SDimitris Papastamos if (i == ARRAY_SIZE(srs)) { 16336a504a75SDimitris Papastamos dev_err(dai->dev, "Sample rate %d is not supported\n", 16346a504a75SDimitris Papastamos params_rate(params)); 16356a504a75SDimitris Papastamos return -EINVAL; 16366a504a75SDimitris Papastamos } 16376a504a75SDimitris Papastamos rate_val = i << WM8995_AIF1_SR_SHIFT; 16386a504a75SDimitris Papastamos 16396a504a75SDimitris Papastamos dev_dbg(dai->dev, "Sample rate is %dHz\n", srs[i]); 16406a504a75SDimitris Papastamos dev_dbg(dai->dev, "AIF%dCLK is %dHz, target BCLK %dHz\n", 16416a504a75SDimitris Papastamos dai->id + 1, wm8995->aifclk[dai->id], bclk_rate); 16426a504a75SDimitris Papastamos 16436a504a75SDimitris Papastamos /* AIFCLK/fs ratio; look for a close match in either direction */ 16446a504a75SDimitris Papastamos best = 1; 16456a504a75SDimitris Papastamos best_val = abs((fs_ratios[1] * params_rate(params)) 16466a504a75SDimitris Papastamos - wm8995->aifclk[dai->id]); 16476a504a75SDimitris Papastamos for (i = 2; i < ARRAY_SIZE(fs_ratios); i++) { 16486a504a75SDimitris Papastamos cur_val = abs((fs_ratios[i] * params_rate(params)) 16496a504a75SDimitris Papastamos - wm8995->aifclk[dai->id]); 16506a504a75SDimitris Papastamos if (cur_val >= best_val) 16516a504a75SDimitris Papastamos continue; 16526a504a75SDimitris Papastamos best = i; 16536a504a75SDimitris Papastamos best_val = cur_val; 16546a504a75SDimitris Papastamos } 16556a504a75SDimitris Papastamos rate_val |= best; 16566a504a75SDimitris Papastamos 16576a504a75SDimitris Papastamos dev_dbg(dai->dev, "Selected AIF%dCLK/fs = %d\n", 16586a504a75SDimitris Papastamos dai->id + 1, fs_ratios[best]); 16596a504a75SDimitris Papastamos 16606a504a75SDimitris Papastamos /* 16616a504a75SDimitris Papastamos * We may not get quite the right frequency if using 16626a504a75SDimitris Papastamos * approximate clocks so look for the closest match that is 16636a504a75SDimitris Papastamos * higher than the target (we need to ensure that there enough 16646a504a75SDimitris Papastamos * BCLKs to clock out the samples). 16656a504a75SDimitris Papastamos */ 16666a504a75SDimitris Papastamos best = 0; 16676a504a75SDimitris Papastamos bclk = 0; 16686a504a75SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(bclk_divs); i++) { 16696a504a75SDimitris Papastamos cur_val = (wm8995->aifclk[dai->id] * 10 / bclk_divs[i]) - bclk_rate; 16706a504a75SDimitris Papastamos if (cur_val < 0) /* BCLK table is sorted */ 16716a504a75SDimitris Papastamos break; 16726a504a75SDimitris Papastamos best = i; 16736a504a75SDimitris Papastamos } 16746a504a75SDimitris Papastamos bclk |= best << WM8995_AIF1_BCLK_DIV_SHIFT; 16756a504a75SDimitris Papastamos 16766a504a75SDimitris Papastamos bclk_rate = wm8995->aifclk[dai->id] * 10 / bclk_divs[best]; 16776a504a75SDimitris Papastamos dev_dbg(dai->dev, "Using BCLK_DIV %d for actual BCLK %dHz\n", 16786a504a75SDimitris Papastamos bclk_divs[best], bclk_rate); 16796a504a75SDimitris Papastamos 16806a504a75SDimitris Papastamos lrclk = bclk_rate / params_rate(params); 16816a504a75SDimitris Papastamos dev_dbg(dai->dev, "Using LRCLK rate %d for actual LRCLK %dHz\n", 16826a504a75SDimitris Papastamos lrclk, bclk_rate / lrclk); 16836a504a75SDimitris Papastamos 16846a504a75SDimitris Papastamos snd_soc_update_bits(codec, aif1_reg, 16856a504a75SDimitris Papastamos WM8995_AIF1_WL_MASK, aif1); 16866a504a75SDimitris Papastamos snd_soc_update_bits(codec, bclk_reg, 16876a504a75SDimitris Papastamos WM8995_AIF1_BCLK_DIV_MASK, bclk); 16886a504a75SDimitris Papastamos snd_soc_update_bits(codec, lrclk_reg, 16896a504a75SDimitris Papastamos WM8995_AIF1DAC_RATE_MASK, lrclk); 16906a504a75SDimitris Papastamos snd_soc_update_bits(codec, rate_reg, 16916a504a75SDimitris Papastamos WM8995_AIF1_SR_MASK | 16926a504a75SDimitris Papastamos WM8995_AIF1CLK_RATE_MASK, rate_val); 16936a504a75SDimitris Papastamos return 0; 16946a504a75SDimitris Papastamos } 16956a504a75SDimitris Papastamos 16966a504a75SDimitris Papastamos static int wm8995_set_tristate(struct snd_soc_dai *codec_dai, int tristate) 16976a504a75SDimitris Papastamos { 16986a504a75SDimitris Papastamos struct snd_soc_codec *codec = codec_dai->codec; 16996a504a75SDimitris Papastamos int reg, val, mask; 17006a504a75SDimitris Papastamos 17016a504a75SDimitris Papastamos switch (codec_dai->id) { 17026a504a75SDimitris Papastamos case 0: 17036a504a75SDimitris Papastamos reg = WM8995_AIF1_MASTER_SLAVE; 17046a504a75SDimitris Papastamos mask = WM8995_AIF1_TRI; 17056a504a75SDimitris Papastamos break; 17066a504a75SDimitris Papastamos case 1: 17076a504a75SDimitris Papastamos reg = WM8995_AIF2_MASTER_SLAVE; 17086a504a75SDimitris Papastamos mask = WM8995_AIF2_TRI; 17096a504a75SDimitris Papastamos break; 17106a504a75SDimitris Papastamos case 2: 17116a504a75SDimitris Papastamos reg = WM8995_POWER_MANAGEMENT_5; 17126a504a75SDimitris Papastamos mask = WM8995_AIF3_TRI; 17136a504a75SDimitris Papastamos break; 17146a504a75SDimitris Papastamos default: 17156a504a75SDimitris Papastamos return -EINVAL; 17166a504a75SDimitris Papastamos } 17176a504a75SDimitris Papastamos 17186a504a75SDimitris Papastamos if (tristate) 17196a504a75SDimitris Papastamos val = mask; 17206a504a75SDimitris Papastamos else 17216a504a75SDimitris Papastamos val = 0; 17226a504a75SDimitris Papastamos 1723a2828792SDimitris Papastamos return snd_soc_update_bits(codec, reg, mask, val); 17246a504a75SDimitris Papastamos } 17256a504a75SDimitris Papastamos 17266a504a75SDimitris Papastamos /* The size in bits of the FLL divide multiplied by 10 17276a504a75SDimitris Papastamos * to allow rounding later */ 17286a504a75SDimitris Papastamos #define FIXED_FLL_SIZE ((1 << 16) * 10) 17296a504a75SDimitris Papastamos 17306a504a75SDimitris Papastamos struct fll_div { 17316a504a75SDimitris Papastamos u16 outdiv; 17326a504a75SDimitris Papastamos u16 n; 17336a504a75SDimitris Papastamos u16 k; 17346a504a75SDimitris Papastamos u16 clk_ref_div; 17356a504a75SDimitris Papastamos u16 fll_fratio; 17366a504a75SDimitris Papastamos }; 17376a504a75SDimitris Papastamos 17386a504a75SDimitris Papastamos static int wm8995_get_fll_config(struct fll_div *fll, 17396a504a75SDimitris Papastamos int freq_in, int freq_out) 17406a504a75SDimitris Papastamos { 17416a504a75SDimitris Papastamos u64 Kpart; 17426a504a75SDimitris Papastamos unsigned int K, Ndiv, Nmod; 17436a504a75SDimitris Papastamos 17446a504a75SDimitris Papastamos pr_debug("FLL input=%dHz, output=%dHz\n", freq_in, freq_out); 17456a504a75SDimitris Papastamos 17466a504a75SDimitris Papastamos /* Scale the input frequency down to <= 13.5MHz */ 17476a504a75SDimitris Papastamos fll->clk_ref_div = 0; 17486a504a75SDimitris Papastamos while (freq_in > 13500000) { 17496a504a75SDimitris Papastamos fll->clk_ref_div++; 17506a504a75SDimitris Papastamos freq_in /= 2; 17516a504a75SDimitris Papastamos 17526a504a75SDimitris Papastamos if (fll->clk_ref_div > 3) 17536a504a75SDimitris Papastamos return -EINVAL; 17546a504a75SDimitris Papastamos } 17556a504a75SDimitris Papastamos pr_debug("CLK_REF_DIV=%d, Fref=%dHz\n", fll->clk_ref_div, freq_in); 17566a504a75SDimitris Papastamos 17576a504a75SDimitris Papastamos /* Scale the output to give 90MHz<=Fvco<=100MHz */ 17586a504a75SDimitris Papastamos fll->outdiv = 3; 17596a504a75SDimitris Papastamos while (freq_out * (fll->outdiv + 1) < 90000000) { 17606a504a75SDimitris Papastamos fll->outdiv++; 17616a504a75SDimitris Papastamos if (fll->outdiv > 63) 17626a504a75SDimitris Papastamos return -EINVAL; 17636a504a75SDimitris Papastamos } 17646a504a75SDimitris Papastamos freq_out *= fll->outdiv + 1; 17656a504a75SDimitris Papastamos pr_debug("OUTDIV=%d, Fvco=%dHz\n", fll->outdiv, freq_out); 17666a504a75SDimitris Papastamos 17676a504a75SDimitris Papastamos if (freq_in > 1000000) { 17686a504a75SDimitris Papastamos fll->fll_fratio = 0; 17696a504a75SDimitris Papastamos } else if (freq_in > 256000) { 17706a504a75SDimitris Papastamos fll->fll_fratio = 1; 17716a504a75SDimitris Papastamos freq_in *= 2; 17726a504a75SDimitris Papastamos } else if (freq_in > 128000) { 17736a504a75SDimitris Papastamos fll->fll_fratio = 2; 17746a504a75SDimitris Papastamos freq_in *= 4; 17756a504a75SDimitris Papastamos } else if (freq_in > 64000) { 17766a504a75SDimitris Papastamos fll->fll_fratio = 3; 17776a504a75SDimitris Papastamos freq_in *= 8; 17786a504a75SDimitris Papastamos } else { 17796a504a75SDimitris Papastamos fll->fll_fratio = 4; 17806a504a75SDimitris Papastamos freq_in *= 16; 17816a504a75SDimitris Papastamos } 17826a504a75SDimitris Papastamos pr_debug("FLL_FRATIO=%d, Fref=%dHz\n", fll->fll_fratio, freq_in); 17836a504a75SDimitris Papastamos 17846a504a75SDimitris Papastamos /* Now, calculate N.K */ 17856a504a75SDimitris Papastamos Ndiv = freq_out / freq_in; 17866a504a75SDimitris Papastamos 17876a504a75SDimitris Papastamos fll->n = Ndiv; 17886a504a75SDimitris Papastamos Nmod = freq_out % freq_in; 17896a504a75SDimitris Papastamos pr_debug("Nmod=%d\n", Nmod); 17906a504a75SDimitris Papastamos 17916a504a75SDimitris Papastamos /* Calculate fractional part - scale up so we can round. */ 17926a504a75SDimitris Papastamos Kpart = FIXED_FLL_SIZE * (long long)Nmod; 17936a504a75SDimitris Papastamos 17946a504a75SDimitris Papastamos do_div(Kpart, freq_in); 17956a504a75SDimitris Papastamos 17966a504a75SDimitris Papastamos K = Kpart & 0xFFFFFFFF; 17976a504a75SDimitris Papastamos 17986a504a75SDimitris Papastamos if ((K % 10) >= 5) 17996a504a75SDimitris Papastamos K += 5; 18006a504a75SDimitris Papastamos 18016a504a75SDimitris Papastamos /* Move down to proper range now rounding is done */ 18026a504a75SDimitris Papastamos fll->k = K / 10; 18036a504a75SDimitris Papastamos 18046a504a75SDimitris Papastamos pr_debug("N=%x K=%x\n", fll->n, fll->k); 18056a504a75SDimitris Papastamos 18066a504a75SDimitris Papastamos return 0; 18076a504a75SDimitris Papastamos } 18086a504a75SDimitris Papastamos 18096a504a75SDimitris Papastamos static int wm8995_set_fll(struct snd_soc_dai *dai, int id, 18106a504a75SDimitris Papastamos int src, unsigned int freq_in, 18116a504a75SDimitris Papastamos unsigned int freq_out) 18126a504a75SDimitris Papastamos { 18136a504a75SDimitris Papastamos struct snd_soc_codec *codec; 18146a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 18156a504a75SDimitris Papastamos int reg_offset, ret; 18166a504a75SDimitris Papastamos struct fll_div fll; 18176a504a75SDimitris Papastamos u16 reg, aif1, aif2; 18186a504a75SDimitris Papastamos 18196a504a75SDimitris Papastamos codec = dai->codec; 18206a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 18216a504a75SDimitris Papastamos 18226a504a75SDimitris Papastamos aif1 = snd_soc_read(codec, WM8995_AIF1_CLOCKING_1) 18236a504a75SDimitris Papastamos & WM8995_AIF1CLK_ENA; 18246a504a75SDimitris Papastamos 18256a504a75SDimitris Papastamos aif2 = snd_soc_read(codec, WM8995_AIF2_CLOCKING_1) 18266a504a75SDimitris Papastamos & WM8995_AIF2CLK_ENA; 18276a504a75SDimitris Papastamos 18286a504a75SDimitris Papastamos switch (id) { 18296a504a75SDimitris Papastamos case WM8995_FLL1: 18306a504a75SDimitris Papastamos reg_offset = 0; 18316a504a75SDimitris Papastamos id = 0; 18326a504a75SDimitris Papastamos break; 18336a504a75SDimitris Papastamos case WM8995_FLL2: 18346a504a75SDimitris Papastamos reg_offset = 0x20; 18356a504a75SDimitris Papastamos id = 1; 18366a504a75SDimitris Papastamos break; 18376a504a75SDimitris Papastamos default: 18386a504a75SDimitris Papastamos return -EINVAL; 18396a504a75SDimitris Papastamos } 18406a504a75SDimitris Papastamos 18416a504a75SDimitris Papastamos switch (src) { 18426a504a75SDimitris Papastamos case 0: 18436a504a75SDimitris Papastamos /* Allow no source specification when stopping */ 18446a504a75SDimitris Papastamos if (freq_out) 18456a504a75SDimitris Papastamos return -EINVAL; 18466a504a75SDimitris Papastamos break; 18476a504a75SDimitris Papastamos case WM8995_FLL_SRC_MCLK1: 18486a504a75SDimitris Papastamos case WM8995_FLL_SRC_MCLK2: 18496a504a75SDimitris Papastamos case WM8995_FLL_SRC_LRCLK: 18506a504a75SDimitris Papastamos case WM8995_FLL_SRC_BCLK: 18516a504a75SDimitris Papastamos break; 18526a504a75SDimitris Papastamos default: 18536a504a75SDimitris Papastamos return -EINVAL; 18546a504a75SDimitris Papastamos } 18556a504a75SDimitris Papastamos 18566a504a75SDimitris Papastamos /* Are we changing anything? */ 18576a504a75SDimitris Papastamos if (wm8995->fll[id].src == src && 18586a504a75SDimitris Papastamos wm8995->fll[id].in == freq_in && wm8995->fll[id].out == freq_out) 18596a504a75SDimitris Papastamos return 0; 18606a504a75SDimitris Papastamos 18616a504a75SDimitris Papastamos /* If we're stopping the FLL redo the old config - no 18626a504a75SDimitris Papastamos * registers will actually be written but we avoid GCC flow 18636a504a75SDimitris Papastamos * analysis bugs spewing warnings. 18646a504a75SDimitris Papastamos */ 18656a504a75SDimitris Papastamos if (freq_out) 18666a504a75SDimitris Papastamos ret = wm8995_get_fll_config(&fll, freq_in, freq_out); 18676a504a75SDimitris Papastamos else 18686a504a75SDimitris Papastamos ret = wm8995_get_fll_config(&fll, wm8995->fll[id].in, 18696a504a75SDimitris Papastamos wm8995->fll[id].out); 18706a504a75SDimitris Papastamos if (ret < 0) 18716a504a75SDimitris Papastamos return ret; 18726a504a75SDimitris Papastamos 18736a504a75SDimitris Papastamos /* Gate the AIF clocks while we reclock */ 18746a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1, 18756a504a75SDimitris Papastamos WM8995_AIF1CLK_ENA_MASK, 0); 18766a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF2_CLOCKING_1, 18776a504a75SDimitris Papastamos WM8995_AIF2CLK_ENA_MASK, 0); 18786a504a75SDimitris Papastamos 18796a504a75SDimitris Papastamos /* We always need to disable the FLL while reconfiguring */ 18806a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_1 + reg_offset, 18816a504a75SDimitris Papastamos WM8995_FLL1_ENA_MASK, 0); 18826a504a75SDimitris Papastamos 18836a504a75SDimitris Papastamos reg = (fll.outdiv << WM8995_FLL1_OUTDIV_SHIFT) | 18846a504a75SDimitris Papastamos (fll.fll_fratio << WM8995_FLL1_FRATIO_SHIFT); 18856a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_2 + reg_offset, 18866a504a75SDimitris Papastamos WM8995_FLL1_OUTDIV_MASK | 18876a504a75SDimitris Papastamos WM8995_FLL1_FRATIO_MASK, reg); 18886a504a75SDimitris Papastamos 18896a504a75SDimitris Papastamos snd_soc_write(codec, WM8995_FLL1_CONTROL_3 + reg_offset, fll.k); 18906a504a75SDimitris Papastamos 18916a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_4 + reg_offset, 18926a504a75SDimitris Papastamos WM8995_FLL1_N_MASK, 18936a504a75SDimitris Papastamos fll.n << WM8995_FLL1_N_SHIFT); 18946a504a75SDimitris Papastamos 18956a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_5 + reg_offset, 18966a504a75SDimitris Papastamos WM8995_FLL1_REFCLK_DIV_MASK | 18976a504a75SDimitris Papastamos WM8995_FLL1_REFCLK_SRC_MASK, 18986a504a75SDimitris Papastamos (fll.clk_ref_div << WM8995_FLL1_REFCLK_DIV_SHIFT) | 18996a504a75SDimitris Papastamos (src - 1)); 19006a504a75SDimitris Papastamos 19016a504a75SDimitris Papastamos if (freq_out) 19026a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_FLL1_CONTROL_1 + reg_offset, 19036a504a75SDimitris Papastamos WM8995_FLL1_ENA_MASK, WM8995_FLL1_ENA); 19046a504a75SDimitris Papastamos 19056a504a75SDimitris Papastamos wm8995->fll[id].in = freq_in; 19066a504a75SDimitris Papastamos wm8995->fll[id].out = freq_out; 19076a504a75SDimitris Papastamos wm8995->fll[id].src = src; 19086a504a75SDimitris Papastamos 19096a504a75SDimitris Papastamos /* Enable any gated AIF clocks */ 19106a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_CLOCKING_1, 19116a504a75SDimitris Papastamos WM8995_AIF1CLK_ENA_MASK, aif1); 19126a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF2_CLOCKING_1, 19136a504a75SDimitris Papastamos WM8995_AIF2CLK_ENA_MASK, aif2); 19146a504a75SDimitris Papastamos 19156a504a75SDimitris Papastamos configure_clock(codec); 19166a504a75SDimitris Papastamos 19176a504a75SDimitris Papastamos return 0; 19186a504a75SDimitris Papastamos } 19196a504a75SDimitris Papastamos 19206a504a75SDimitris Papastamos static int wm8995_set_dai_sysclk(struct snd_soc_dai *dai, 19216a504a75SDimitris Papastamos int clk_id, unsigned int freq, int dir) 19226a504a75SDimitris Papastamos { 19236a504a75SDimitris Papastamos struct snd_soc_codec *codec; 19246a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 19256a504a75SDimitris Papastamos 19266a504a75SDimitris Papastamos codec = dai->codec; 19276a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 19286a504a75SDimitris Papastamos 19296a504a75SDimitris Papastamos switch (dai->id) { 19306a504a75SDimitris Papastamos case 0: 19316a504a75SDimitris Papastamos case 1: 19326a504a75SDimitris Papastamos break; 19336a504a75SDimitris Papastamos default: 19346a504a75SDimitris Papastamos /* AIF3 shares clocking with AIF1/2 */ 19356a504a75SDimitris Papastamos return -EINVAL; 19366a504a75SDimitris Papastamos } 19376a504a75SDimitris Papastamos 19386a504a75SDimitris Papastamos switch (clk_id) { 19396a504a75SDimitris Papastamos case WM8995_SYSCLK_MCLK1: 19406a504a75SDimitris Papastamos wm8995->sysclk[dai->id] = WM8995_SYSCLK_MCLK1; 19416a504a75SDimitris Papastamos wm8995->mclk[0] = freq; 19426a504a75SDimitris Papastamos dev_dbg(dai->dev, "AIF%d using MCLK1 at %uHz\n", 19436a504a75SDimitris Papastamos dai->id + 1, freq); 19446a504a75SDimitris Papastamos break; 19456a504a75SDimitris Papastamos case WM8995_SYSCLK_MCLK2: 19466a504a75SDimitris Papastamos wm8995->sysclk[dai->id] = WM8995_SYSCLK_MCLK1; 19476a504a75SDimitris Papastamos wm8995->mclk[1] = freq; 19486a504a75SDimitris Papastamos dev_dbg(dai->dev, "AIF%d using MCLK2 at %uHz\n", 19496a504a75SDimitris Papastamos dai->id + 1, freq); 19506a504a75SDimitris Papastamos break; 19516a504a75SDimitris Papastamos case WM8995_SYSCLK_FLL1: 19526a504a75SDimitris Papastamos wm8995->sysclk[dai->id] = WM8995_SYSCLK_FLL1; 19536a504a75SDimitris Papastamos dev_dbg(dai->dev, "AIF%d using FLL1\n", dai->id + 1); 19546a504a75SDimitris Papastamos break; 19556a504a75SDimitris Papastamos case WM8995_SYSCLK_FLL2: 19566a504a75SDimitris Papastamos wm8995->sysclk[dai->id] = WM8995_SYSCLK_FLL2; 19576a504a75SDimitris Papastamos dev_dbg(dai->dev, "AIF%d using FLL2\n", dai->id + 1); 19586a504a75SDimitris Papastamos break; 19596a504a75SDimitris Papastamos case WM8995_SYSCLK_OPCLK: 19606a504a75SDimitris Papastamos default: 19616a504a75SDimitris Papastamos dev_err(dai->dev, "Unknown clock source %d\n", clk_id); 19626a504a75SDimitris Papastamos return -EINVAL; 19636a504a75SDimitris Papastamos } 19646a504a75SDimitris Papastamos 19656a504a75SDimitris Papastamos configure_clock(codec); 19666a504a75SDimitris Papastamos 19676a504a75SDimitris Papastamos return 0; 19686a504a75SDimitris Papastamos } 19696a504a75SDimitris Papastamos 19706a504a75SDimitris Papastamos static int wm8995_set_bias_level(struct snd_soc_codec *codec, 19716a504a75SDimitris Papastamos enum snd_soc_bias_level level) 19726a504a75SDimitris Papastamos { 19736a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 19746a504a75SDimitris Papastamos int ret; 19756a504a75SDimitris Papastamos 19766a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 19776a504a75SDimitris Papastamos switch (level) { 19786a504a75SDimitris Papastamos case SND_SOC_BIAS_ON: 19796a504a75SDimitris Papastamos case SND_SOC_BIAS_PREPARE: 19806a504a75SDimitris Papastamos break; 19816a504a75SDimitris Papastamos case SND_SOC_BIAS_STANDBY: 19826a504a75SDimitris Papastamos if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1983219d8df8SDimitris Papastamos ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies), 1984219d8df8SDimitris Papastamos wm8995->supplies); 1985219d8df8SDimitris Papastamos if (ret) 1986219d8df8SDimitris Papastamos return ret; 1987219d8df8SDimitris Papastamos 1988c42da642SMark Brown ret = regcache_sync(wm8995->regmap); 19896a504a75SDimitris Papastamos if (ret) { 19906a504a75SDimitris Papastamos dev_err(codec->dev, 19916a504a75SDimitris Papastamos "Failed to sync cache: %d\n", ret); 19926a504a75SDimitris Papastamos return ret; 19936a504a75SDimitris Papastamos } 19946a504a75SDimitris Papastamos 19956a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, 19966a504a75SDimitris Papastamos WM8995_BG_ENA_MASK, WM8995_BG_ENA); 19976a504a75SDimitris Papastamos } 19986a504a75SDimitris Papastamos break; 19996a504a75SDimitris Papastamos case SND_SOC_BIAS_OFF: 20006a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_POWER_MANAGEMENT_1, 20016a504a75SDimitris Papastamos WM8995_BG_ENA_MASK, 0); 2002219d8df8SDimitris Papastamos regulator_bulk_disable(ARRAY_SIZE(wm8995->supplies), 2003219d8df8SDimitris Papastamos wm8995->supplies); 20046a504a75SDimitris Papastamos break; 20056a504a75SDimitris Papastamos } 20066a504a75SDimitris Papastamos 20076a504a75SDimitris Papastamos codec->dapm.bias_level = level; 20086a504a75SDimitris Papastamos return 0; 20096a504a75SDimitris Papastamos } 20106a504a75SDimitris Papastamos 20116a504a75SDimitris Papastamos #ifdef CONFIG_PM 201284b315eeSLars-Peter Clausen static int wm8995_suspend(struct snd_soc_codec *codec) 20136a504a75SDimitris Papastamos { 20146a504a75SDimitris Papastamos wm8995_set_bias_level(codec, SND_SOC_BIAS_OFF); 20156a504a75SDimitris Papastamos return 0; 20166a504a75SDimitris Papastamos } 20176a504a75SDimitris Papastamos 20186a504a75SDimitris Papastamos static int wm8995_resume(struct snd_soc_codec *codec) 20196a504a75SDimitris Papastamos { 20206a504a75SDimitris Papastamos wm8995_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 20216a504a75SDimitris Papastamos return 0; 20226a504a75SDimitris Papastamos } 20236a504a75SDimitris Papastamos #else 20246a504a75SDimitris Papastamos #define wm8995_suspend NULL 20256a504a75SDimitris Papastamos #define wm8995_resume NULL 20266a504a75SDimitris Papastamos #endif 20276a504a75SDimitris Papastamos 20286a504a75SDimitris Papastamos static int wm8995_remove(struct snd_soc_codec *codec) 20296a504a75SDimitris Papastamos { 20306a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 20315992c587SAxel Lin int i; 20326a504a75SDimitris Papastamos 20336a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 20346a504a75SDimitris Papastamos wm8995_set_bias_level(codec, SND_SOC_BIAS_OFF); 20355992c587SAxel Lin 20365992c587SAxel Lin for (i = 0; i < ARRAY_SIZE(wm8995->supplies); ++i) 20375992c587SAxel Lin regulator_unregister_notifier(wm8995->supplies[i].consumer, 20385992c587SAxel Lin &wm8995->disable_nb[i]); 20395992c587SAxel Lin 20405992c587SAxel Lin regulator_bulk_free(ARRAY_SIZE(wm8995->supplies), wm8995->supplies); 20416a504a75SDimitris Papastamos return 0; 20426a504a75SDimitris Papastamos } 20436a504a75SDimitris Papastamos 20446a504a75SDimitris Papastamos static int wm8995_probe(struct snd_soc_codec *codec) 20456a504a75SDimitris Papastamos { 20466a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 2047219d8df8SDimitris Papastamos int i; 20486a504a75SDimitris Papastamos int ret; 20496a504a75SDimitris Papastamos 20506a504a75SDimitris Papastamos wm8995 = snd_soc_codec_get_drvdata(codec); 2051219d8df8SDimitris Papastamos wm8995->codec = codec; 20526a504a75SDimitris Papastamos 20536f8d272aSMark Brown codec->control_data = wm8995->regmap; 2054c42da642SMark Brown ret = snd_soc_codec_set_cache_io(codec, 16, 16, SND_SOC_REGMAP); 20556a504a75SDimitris Papastamos if (ret < 0) { 20566a504a75SDimitris Papastamos dev_err(codec->dev, "Failed to set cache i/o: %d\n", ret); 20576a504a75SDimitris Papastamos return ret; 20586a504a75SDimitris Papastamos } 20596a504a75SDimitris Papastamos 2060219d8df8SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(wm8995->supplies); i++) 2061219d8df8SDimitris Papastamos wm8995->supplies[i].supply = wm8995_supply_names[i]; 2062219d8df8SDimitris Papastamos 2063219d8df8SDimitris Papastamos ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8995->supplies), 2064219d8df8SDimitris Papastamos wm8995->supplies); 2065219d8df8SDimitris Papastamos if (ret) { 2066219d8df8SDimitris Papastamos dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 2067219d8df8SDimitris Papastamos return ret; 2068219d8df8SDimitris Papastamos } 2069219d8df8SDimitris Papastamos 2070219d8df8SDimitris Papastamos wm8995->disable_nb[0].notifier_call = wm8995_regulator_event_0; 2071219d8df8SDimitris Papastamos wm8995->disable_nb[1].notifier_call = wm8995_regulator_event_1; 2072219d8df8SDimitris Papastamos wm8995->disable_nb[2].notifier_call = wm8995_regulator_event_2; 2073219d8df8SDimitris Papastamos wm8995->disable_nb[3].notifier_call = wm8995_regulator_event_3; 2074219d8df8SDimitris Papastamos wm8995->disable_nb[4].notifier_call = wm8995_regulator_event_4; 2075219d8df8SDimitris Papastamos wm8995->disable_nb[5].notifier_call = wm8995_regulator_event_5; 2076219d8df8SDimitris Papastamos wm8995->disable_nb[6].notifier_call = wm8995_regulator_event_6; 2077219d8df8SDimitris Papastamos wm8995->disable_nb[7].notifier_call = wm8995_regulator_event_7; 2078219d8df8SDimitris Papastamos 2079219d8df8SDimitris Papastamos /* This should really be moved into the regulator core */ 2080219d8df8SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(wm8995->supplies); i++) { 2081219d8df8SDimitris Papastamos ret = regulator_register_notifier(wm8995->supplies[i].consumer, 2082219d8df8SDimitris Papastamos &wm8995->disable_nb[i]); 2083219d8df8SDimitris Papastamos if (ret) { 2084219d8df8SDimitris Papastamos dev_err(codec->dev, 2085219d8df8SDimitris Papastamos "Failed to register regulator notifier: %d\n", 2086219d8df8SDimitris Papastamos ret); 2087219d8df8SDimitris Papastamos } 2088219d8df8SDimitris Papastamos } 2089219d8df8SDimitris Papastamos 2090219d8df8SDimitris Papastamos ret = regulator_bulk_enable(ARRAY_SIZE(wm8995->supplies), 2091219d8df8SDimitris Papastamos wm8995->supplies); 2092219d8df8SDimitris Papastamos if (ret) { 2093219d8df8SDimitris Papastamos dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 2094219d8df8SDimitris Papastamos goto err_reg_get; 2095219d8df8SDimitris Papastamos } 2096219d8df8SDimitris Papastamos 20976a504a75SDimitris Papastamos ret = snd_soc_read(codec, WM8995_SOFTWARE_RESET); 20986a504a75SDimitris Papastamos if (ret < 0) { 20996a504a75SDimitris Papastamos dev_err(codec->dev, "Failed to read device ID: %d\n", ret); 2100219d8df8SDimitris Papastamos goto err_reg_enable; 21016a504a75SDimitris Papastamos } 21026a504a75SDimitris Papastamos 21036a504a75SDimitris Papastamos if (ret != 0x8995) { 21046a504a75SDimitris Papastamos dev_err(codec->dev, "Invalid device ID: %#x\n", ret); 21056fa0c25bSAxel Lin ret = -EINVAL; 2106219d8df8SDimitris Papastamos goto err_reg_enable; 21076a504a75SDimitris Papastamos } 21086a504a75SDimitris Papastamos 21096a504a75SDimitris Papastamos ret = snd_soc_write(codec, WM8995_SOFTWARE_RESET, 0); 21106a504a75SDimitris Papastamos if (ret < 0) { 21116a504a75SDimitris Papastamos dev_err(codec->dev, "Failed to issue reset: %d\n", ret); 2112219d8df8SDimitris Papastamos goto err_reg_enable; 21136a504a75SDimitris Papastamos } 21146a504a75SDimitris Papastamos 21156a504a75SDimitris Papastamos wm8995_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 21166a504a75SDimitris Papastamos 21176a504a75SDimitris Papastamos /* Latch volume updates (right only; we always do left then right). */ 21186a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_DAC1_RIGHT_VOLUME, 21196a504a75SDimitris Papastamos WM8995_AIF1DAC1_VU_MASK, WM8995_AIF1DAC1_VU); 21206a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_DAC2_RIGHT_VOLUME, 21216a504a75SDimitris Papastamos WM8995_AIF1DAC2_VU_MASK, WM8995_AIF1DAC2_VU); 21226a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF2_DAC_RIGHT_VOLUME, 21236a504a75SDimitris Papastamos WM8995_AIF2DAC_VU_MASK, WM8995_AIF2DAC_VU); 21246a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_ADC1_RIGHT_VOLUME, 21256a504a75SDimitris Papastamos WM8995_AIF1ADC1_VU_MASK, WM8995_AIF1ADC1_VU); 21266a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF1_ADC2_RIGHT_VOLUME, 21276a504a75SDimitris Papastamos WM8995_AIF1ADC2_VU_MASK, WM8995_AIF1ADC2_VU); 21286a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_AIF2_ADC_RIGHT_VOLUME, 21296a504a75SDimitris Papastamos WM8995_AIF2ADC_VU_MASK, WM8995_AIF1ADC2_VU); 21306a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_DAC1_RIGHT_VOLUME, 21316a504a75SDimitris Papastamos WM8995_DAC1_VU_MASK, WM8995_DAC1_VU); 21326a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_DAC2_RIGHT_VOLUME, 21336a504a75SDimitris Papastamos WM8995_DAC2_VU_MASK, WM8995_DAC2_VU); 21346a504a75SDimitris Papastamos snd_soc_update_bits(codec, WM8995_RIGHT_LINE_INPUT_1_VOLUME, 21356a504a75SDimitris Papastamos WM8995_IN1_VU_MASK, WM8995_IN1_VU); 21366a504a75SDimitris Papastamos 21376a504a75SDimitris Papastamos wm8995_update_class_w(codec); 21386a504a75SDimitris Papastamos 2139022658beSLiam Girdwood snd_soc_add_codec_controls(codec, wm8995_snd_controls, 21406a504a75SDimitris Papastamos ARRAY_SIZE(wm8995_snd_controls)); 21416a504a75SDimitris Papastamos snd_soc_dapm_new_controls(&codec->dapm, wm8995_dapm_widgets, 21426a504a75SDimitris Papastamos ARRAY_SIZE(wm8995_dapm_widgets)); 21436a504a75SDimitris Papastamos snd_soc_dapm_add_routes(&codec->dapm, wm8995_intercon, 21446a504a75SDimitris Papastamos ARRAY_SIZE(wm8995_intercon)); 21456a504a75SDimitris Papastamos 21466a504a75SDimitris Papastamos return 0; 2147219d8df8SDimitris Papastamos 2148219d8df8SDimitris Papastamos err_reg_enable: 2149219d8df8SDimitris Papastamos regulator_bulk_disable(ARRAY_SIZE(wm8995->supplies), wm8995->supplies); 2150219d8df8SDimitris Papastamos err_reg_get: 2151219d8df8SDimitris Papastamos regulator_bulk_free(ARRAY_SIZE(wm8995->supplies), wm8995->supplies); 2152219d8df8SDimitris Papastamos return ret; 21536a504a75SDimitris Papastamos } 21546a504a75SDimitris Papastamos 21556a504a75SDimitris Papastamos #define WM8995_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 21566a504a75SDimitris Papastamos SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 21576a504a75SDimitris Papastamos 215885e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8995_aif1_dai_ops = { 21596a504a75SDimitris Papastamos .set_sysclk = wm8995_set_dai_sysclk, 21606a504a75SDimitris Papastamos .set_fmt = wm8995_set_dai_fmt, 21616a504a75SDimitris Papastamos .hw_params = wm8995_hw_params, 21626a504a75SDimitris Papastamos .digital_mute = wm8995_aif_mute, 21636a504a75SDimitris Papastamos .set_pll = wm8995_set_fll, 21646a504a75SDimitris Papastamos .set_tristate = wm8995_set_tristate, 21656a504a75SDimitris Papastamos }; 21666a504a75SDimitris Papastamos 216785e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8995_aif2_dai_ops = { 21686a504a75SDimitris Papastamos .set_sysclk = wm8995_set_dai_sysclk, 21696a504a75SDimitris Papastamos .set_fmt = wm8995_set_dai_fmt, 21706a504a75SDimitris Papastamos .hw_params = wm8995_hw_params, 21716a504a75SDimitris Papastamos .digital_mute = wm8995_aif_mute, 21726a504a75SDimitris Papastamos .set_pll = wm8995_set_fll, 21736a504a75SDimitris Papastamos .set_tristate = wm8995_set_tristate, 21746a504a75SDimitris Papastamos }; 21756a504a75SDimitris Papastamos 217685e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8995_aif3_dai_ops = { 21776a504a75SDimitris Papastamos .set_tristate = wm8995_set_tristate, 21786a504a75SDimitris Papastamos }; 21796a504a75SDimitris Papastamos 21806a504a75SDimitris Papastamos static struct snd_soc_dai_driver wm8995_dai[] = { 21816a504a75SDimitris Papastamos { 21826a504a75SDimitris Papastamos .name = "wm8995-aif1", 21836a504a75SDimitris Papastamos .playback = { 21846a504a75SDimitris Papastamos .stream_name = "AIF1 Playback", 21856a504a75SDimitris Papastamos .channels_min = 2, 21866a504a75SDimitris Papastamos .channels_max = 2, 21876a504a75SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_96000, 21886a504a75SDimitris Papastamos .formats = WM8995_FORMATS 21896a504a75SDimitris Papastamos }, 21906a504a75SDimitris Papastamos .capture = { 21916a504a75SDimitris Papastamos .stream_name = "AIF1 Capture", 21926a504a75SDimitris Papastamos .channels_min = 2, 21936a504a75SDimitris Papastamos .channels_max = 2, 21946a504a75SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_48000, 21956a504a75SDimitris Papastamos .formats = WM8995_FORMATS 21966a504a75SDimitris Papastamos }, 21976a504a75SDimitris Papastamos .ops = &wm8995_aif1_dai_ops 21986a504a75SDimitris Papastamos }, 21996a504a75SDimitris Papastamos { 22006a504a75SDimitris Papastamos .name = "wm8995-aif2", 22016a504a75SDimitris Papastamos .playback = { 22026a504a75SDimitris Papastamos .stream_name = "AIF2 Playback", 22036a504a75SDimitris Papastamos .channels_min = 2, 22046a504a75SDimitris Papastamos .channels_max = 2, 22056a504a75SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_96000, 22066a504a75SDimitris Papastamos .formats = WM8995_FORMATS 22076a504a75SDimitris Papastamos }, 22086a504a75SDimitris Papastamos .capture = { 22096a504a75SDimitris Papastamos .stream_name = "AIF2 Capture", 22106a504a75SDimitris Papastamos .channels_min = 2, 22116a504a75SDimitris Papastamos .channels_max = 2, 22126a504a75SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_48000, 22136a504a75SDimitris Papastamos .formats = WM8995_FORMATS 22146a504a75SDimitris Papastamos }, 22156a504a75SDimitris Papastamos .ops = &wm8995_aif2_dai_ops 22166a504a75SDimitris Papastamos }, 22176a504a75SDimitris Papastamos { 22186a504a75SDimitris Papastamos .name = "wm8995-aif3", 22196a504a75SDimitris Papastamos .playback = { 22206a504a75SDimitris Papastamos .stream_name = "AIF3 Playback", 22216a504a75SDimitris Papastamos .channels_min = 2, 22226a504a75SDimitris Papastamos .channels_max = 2, 22236a504a75SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_96000, 22246a504a75SDimitris Papastamos .formats = WM8995_FORMATS 22256a504a75SDimitris Papastamos }, 22266a504a75SDimitris Papastamos .capture = { 22276a504a75SDimitris Papastamos .stream_name = "AIF3 Capture", 22286a504a75SDimitris Papastamos .channels_min = 2, 22296a504a75SDimitris Papastamos .channels_max = 2, 22306a504a75SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_48000, 22316a504a75SDimitris Papastamos .formats = WM8995_FORMATS 22326a504a75SDimitris Papastamos }, 22336a504a75SDimitris Papastamos .ops = &wm8995_aif3_dai_ops 22346a504a75SDimitris Papastamos } 22356a504a75SDimitris Papastamos }; 22366a504a75SDimitris Papastamos 22376a504a75SDimitris Papastamos static struct snd_soc_codec_driver soc_codec_dev_wm8995 = { 22386a504a75SDimitris Papastamos .probe = wm8995_probe, 22396a504a75SDimitris Papastamos .remove = wm8995_remove, 22406a504a75SDimitris Papastamos .suspend = wm8995_suspend, 22416a504a75SDimitris Papastamos .resume = wm8995_resume, 22426a504a75SDimitris Papastamos .set_bias_level = wm8995_set_bias_level, 2243eb3032f8SAxel Lin .idle_bias_off = true, 2244c42da642SMark Brown }; 2245c42da642SMark Brown 2246c42da642SMark Brown static struct regmap_config wm8995_regmap = { 2247c42da642SMark Brown .reg_bits = 16, 2248c42da642SMark Brown .val_bits = 16, 2249c42da642SMark Brown 2250c42da642SMark Brown .max_register = WM8995_MAX_REGISTER, 2251c42da642SMark Brown .reg_defaults = wm8995_reg_defaults, 2252c42da642SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8995_reg_defaults), 2253c42da642SMark Brown .volatile_reg = wm8995_volatile, 2254c42da642SMark Brown .readable_reg = wm8995_readable, 2255c42da642SMark Brown .cache_type = REGCACHE_RBTREE, 22566a504a75SDimitris Papastamos }; 22576a504a75SDimitris Papastamos 22586a504a75SDimitris Papastamos #if defined(CONFIG_SPI_MASTER) 22596a504a75SDimitris Papastamos static int __devinit wm8995_spi_probe(struct spi_device *spi) 22606a504a75SDimitris Papastamos { 22616a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 22626a504a75SDimitris Papastamos int ret; 22636a504a75SDimitris Papastamos 22646a504a75SDimitris Papastamos wm8995 = kzalloc(sizeof *wm8995, GFP_KERNEL); 22656a504a75SDimitris Papastamos if (!wm8995) 22666a504a75SDimitris Papastamos return -ENOMEM; 22676a504a75SDimitris Papastamos 22686a504a75SDimitris Papastamos spi_set_drvdata(spi, wm8995); 22696a504a75SDimitris Papastamos 2270c42da642SMark Brown wm8995->regmap = regmap_init_spi(spi, &wm8995_regmap); 2271c42da642SMark Brown if (IS_ERR(wm8995->regmap)) { 2272c42da642SMark Brown ret = PTR_ERR(wm8995->regmap); 2273c42da642SMark Brown dev_err(&spi->dev, "Failed to register regmap: %d\n", ret); 2274c42da642SMark Brown goto err_alloc; 2275c42da642SMark Brown } 2276c42da642SMark Brown 22776a504a75SDimitris Papastamos ret = snd_soc_register_codec(&spi->dev, 22786a504a75SDimitris Papastamos &soc_codec_dev_wm8995, wm8995_dai, 22796a504a75SDimitris Papastamos ARRAY_SIZE(wm8995_dai)); 22806a504a75SDimitris Papastamos if (ret < 0) 2281c42da642SMark Brown goto err_regmap; 2282c42da642SMark Brown 2283c42da642SMark Brown return ret; 2284c42da642SMark Brown 2285c42da642SMark Brown err_regmap: 2286c42da642SMark Brown regmap_exit(wm8995->regmap); 2287c42da642SMark Brown err_alloc: 22886a504a75SDimitris Papastamos kfree(wm8995); 2289c42da642SMark Brown 22906a504a75SDimitris Papastamos return ret; 22916a504a75SDimitris Papastamos } 22926a504a75SDimitris Papastamos 22936a504a75SDimitris Papastamos static int __devexit wm8995_spi_remove(struct spi_device *spi) 22946a504a75SDimitris Papastamos { 2295c42da642SMark Brown struct wm8995_priv *wm8995 = spi_get_drvdata(spi); 22966a504a75SDimitris Papastamos snd_soc_unregister_codec(&spi->dev); 2297c42da642SMark Brown regmap_exit(wm8995->regmap); 2298c42da642SMark Brown kfree(wm8995); 22996a504a75SDimitris Papastamos return 0; 23006a504a75SDimitris Papastamos } 23016a504a75SDimitris Papastamos 23026a504a75SDimitris Papastamos static struct spi_driver wm8995_spi_driver = { 23036a504a75SDimitris Papastamos .driver = { 23046a504a75SDimitris Papastamos .name = "wm8995", 23056a504a75SDimitris Papastamos .owner = THIS_MODULE, 23066a504a75SDimitris Papastamos }, 23076a504a75SDimitris Papastamos .probe = wm8995_spi_probe, 23086a504a75SDimitris Papastamos .remove = __devexit_p(wm8995_spi_remove) 23096a504a75SDimitris Papastamos }; 23106a504a75SDimitris Papastamos #endif 23116a504a75SDimitris Papastamos 23126a504a75SDimitris Papastamos #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 23136a504a75SDimitris Papastamos static __devinit int wm8995_i2c_probe(struct i2c_client *i2c, 23146a504a75SDimitris Papastamos const struct i2c_device_id *id) 23156a504a75SDimitris Papastamos { 23166a504a75SDimitris Papastamos struct wm8995_priv *wm8995; 23176a504a75SDimitris Papastamos int ret; 23186a504a75SDimitris Papastamos 23196a504a75SDimitris Papastamos wm8995 = kzalloc(sizeof *wm8995, GFP_KERNEL); 23206a504a75SDimitris Papastamos if (!wm8995) 23216a504a75SDimitris Papastamos return -ENOMEM; 23226a504a75SDimitris Papastamos 23236a504a75SDimitris Papastamos i2c_set_clientdata(i2c, wm8995); 23246a504a75SDimitris Papastamos 2325c42da642SMark Brown wm8995->regmap = regmap_init_i2c(i2c, &wm8995_regmap); 2326c42da642SMark Brown if (IS_ERR(wm8995->regmap)) { 2327c42da642SMark Brown ret = PTR_ERR(wm8995->regmap); 2328c42da642SMark Brown dev_err(&i2c->dev, "Failed to register regmap: %d\n", ret); 2329c42da642SMark Brown goto err_alloc; 2330c42da642SMark Brown } 2331c42da642SMark Brown 23326a504a75SDimitris Papastamos ret = snd_soc_register_codec(&i2c->dev, 23336a504a75SDimitris Papastamos &soc_codec_dev_wm8995, wm8995_dai, 23346a504a75SDimitris Papastamos ARRAY_SIZE(wm8995_dai)); 2335c42da642SMark Brown if (ret < 0) { 2336c42da642SMark Brown dev_err(&i2c->dev, "Failed to register CODEC: %d\n", ret); 2337c42da642SMark Brown goto err_regmap; 2338c42da642SMark Brown } 2339c42da642SMark Brown 2340c42da642SMark Brown return ret; 2341c42da642SMark Brown 2342c42da642SMark Brown err_regmap: 2343c42da642SMark Brown regmap_exit(wm8995->regmap); 2344c42da642SMark Brown err_alloc: 23456a504a75SDimitris Papastamos kfree(wm8995); 2346c42da642SMark Brown 23476a504a75SDimitris Papastamos return ret; 23486a504a75SDimitris Papastamos } 23496a504a75SDimitris Papastamos 23506a504a75SDimitris Papastamos static __devexit int wm8995_i2c_remove(struct i2c_client *client) 23516a504a75SDimitris Papastamos { 2352c42da642SMark Brown struct wm8995_priv *wm8995 = i2c_get_clientdata(client); 2353c42da642SMark Brown 23546a504a75SDimitris Papastamos snd_soc_unregister_codec(&client->dev); 2355c42da642SMark Brown regmap_exit(wm8995->regmap); 2356c42da642SMark Brown kfree(wm8995); 23576a504a75SDimitris Papastamos return 0; 23586a504a75SDimitris Papastamos } 23596a504a75SDimitris Papastamos 23606a504a75SDimitris Papastamos static const struct i2c_device_id wm8995_i2c_id[] = { 23616a504a75SDimitris Papastamos {"wm8995", 0}, 23626a504a75SDimitris Papastamos {} 23636a504a75SDimitris Papastamos }; 23646a504a75SDimitris Papastamos 23656a504a75SDimitris Papastamos MODULE_DEVICE_TABLE(i2c, wm8995_i2c_id); 23666a504a75SDimitris Papastamos 23676a504a75SDimitris Papastamos static struct i2c_driver wm8995_i2c_driver = { 23686a504a75SDimitris Papastamos .driver = { 23696a504a75SDimitris Papastamos .name = "wm8995", 23706a504a75SDimitris Papastamos .owner = THIS_MODULE, 23716a504a75SDimitris Papastamos }, 23726a504a75SDimitris Papastamos .probe = wm8995_i2c_probe, 23736a504a75SDimitris Papastamos .remove = __devexit_p(wm8995_i2c_remove), 23746a504a75SDimitris Papastamos .id_table = wm8995_i2c_id 23756a504a75SDimitris Papastamos }; 23766a504a75SDimitris Papastamos #endif 23776a504a75SDimitris Papastamos 23786a504a75SDimitris Papastamos static int __init wm8995_modinit(void) 23796a504a75SDimitris Papastamos { 23806a504a75SDimitris Papastamos int ret = 0; 23816a504a75SDimitris Papastamos 23826a504a75SDimitris Papastamos #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 23836a504a75SDimitris Papastamos ret = i2c_add_driver(&wm8995_i2c_driver); 23846a504a75SDimitris Papastamos if (ret) { 23856a504a75SDimitris Papastamos printk(KERN_ERR "Failed to register wm8995 I2C driver: %d\n", 23866a504a75SDimitris Papastamos ret); 23876a504a75SDimitris Papastamos } 23886a504a75SDimitris Papastamos #endif 23896a504a75SDimitris Papastamos #if defined(CONFIG_SPI_MASTER) 23906a504a75SDimitris Papastamos ret = spi_register_driver(&wm8995_spi_driver); 23916a504a75SDimitris Papastamos if (ret) { 23926a504a75SDimitris Papastamos printk(KERN_ERR "Failed to register wm8995 SPI driver: %d\n", 23936a504a75SDimitris Papastamos ret); 23946a504a75SDimitris Papastamos } 23956a504a75SDimitris Papastamos #endif 23966a504a75SDimitris Papastamos return ret; 23976a504a75SDimitris Papastamos } 23986a504a75SDimitris Papastamos 23996a504a75SDimitris Papastamos module_init(wm8995_modinit); 24006a504a75SDimitris Papastamos 24016a504a75SDimitris Papastamos static void __exit wm8995_exit(void) 24026a504a75SDimitris Papastamos { 24036a504a75SDimitris Papastamos #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 24046a504a75SDimitris Papastamos i2c_del_driver(&wm8995_i2c_driver); 24056a504a75SDimitris Papastamos #endif 24066a504a75SDimitris Papastamos #if defined(CONFIG_SPI_MASTER) 24076a504a75SDimitris Papastamos spi_unregister_driver(&wm8995_spi_driver); 24086a504a75SDimitris Papastamos #endif 24096a504a75SDimitris Papastamos } 24106a504a75SDimitris Papastamos 24116a504a75SDimitris Papastamos module_exit(wm8995_exit); 24126a504a75SDimitris Papastamos 24136a504a75SDimitris Papastamos MODULE_DESCRIPTION("ASoC WM8995 driver"); 24146a504a75SDimitris Papastamos MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>"); 24156a504a75SDimitris Papastamos MODULE_LICENSE("GPL"); 2416