1 /* 2 * wm8991.c -- WM8991 ALSA Soc Audio driver 3 * 4 * Copyright 2007-2010 Wolfson Microelectronics PLC. 5 * Author: Graeme Gregory 6 * Graeme.Gregory@wolfsonmicro.com 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License as published by the 10 * Free Software Foundation; either version 2 of the License, or (at your 11 * option) any later version. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/kernel.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 #include <linux/pm.h> 20 #include <linux/i2c.h> 21 #include <linux/regmap.h> 22 #include <linux/slab.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 #include <sound/tlv.h> 30 #include <asm/div64.h> 31 32 #include "wm8991.h" 33 34 struct wm8991_priv { 35 struct regmap *regmap; 36 unsigned int pcmclk; 37 }; 38 39 static const struct reg_default wm8991_reg_defaults[] = { 40 { 1, 0x0000 }, /* R1 - Power Management (1) */ 41 { 2, 0x6000 }, /* R2 - Power Management (2) */ 42 { 3, 0x0000 }, /* R3 - Power Management (3) */ 43 { 4, 0x4050 }, /* R4 - Audio Interface (1) */ 44 { 5, 0x4000 }, /* R5 - Audio Interface (2) */ 45 { 6, 0x01C8 }, /* R6 - Clocking (1) */ 46 { 7, 0x0000 }, /* R7 - Clocking (2) */ 47 { 8, 0x0040 }, /* R8 - Audio Interface (3) */ 48 { 9, 0x0040 }, /* R9 - Audio Interface (4) */ 49 { 10, 0x0004 }, /* R10 - DAC CTRL */ 50 { 11, 0x00C0 }, /* R11 - Left DAC Digital Volume */ 51 { 12, 0x00C0 }, /* R12 - Right DAC Digital Volume */ 52 { 13, 0x0000 }, /* R13 - Digital Side Tone */ 53 { 14, 0x0100 }, /* R14 - ADC CTRL */ 54 { 15, 0x00C0 }, /* R15 - Left ADC Digital Volume */ 55 { 16, 0x00C0 }, /* R16 - Right ADC Digital Volume */ 56 57 { 18, 0x0000 }, /* R18 - GPIO CTRL 1 */ 58 { 19, 0x1000 }, /* R19 - GPIO1 & GPIO2 */ 59 { 20, 0x1010 }, /* R20 - GPIO3 & GPIO4 */ 60 { 21, 0x1010 }, /* R21 - GPIO5 & GPIO6 */ 61 { 22, 0x8000 }, /* R22 - GPIOCTRL 2 */ 62 { 23, 0x0800 }, /* R23 - GPIO_POL */ 63 { 24, 0x008B }, /* R24 - Left Line Input 1&2 Volume */ 64 { 25, 0x008B }, /* R25 - Left Line Input 3&4 Volume */ 65 { 26, 0x008B }, /* R26 - Right Line Input 1&2 Volume */ 66 { 27, 0x008B }, /* R27 - Right Line Input 3&4 Volume */ 67 { 28, 0x0000 }, /* R28 - Left Output Volume */ 68 { 29, 0x0000 }, /* R29 - Right Output Volume */ 69 { 30, 0x0066 }, /* R30 - Line Outputs Volume */ 70 { 31, 0x0022 }, /* R31 - Out3/4 Volume */ 71 { 32, 0x0079 }, /* R32 - Left OPGA Volume */ 72 { 33, 0x0079 }, /* R33 - Right OPGA Volume */ 73 { 34, 0x0003 }, /* R34 - Speaker Volume */ 74 { 35, 0x0003 }, /* R35 - ClassD1 */ 75 76 { 37, 0x0100 }, /* R37 - ClassD3 */ 77 78 { 39, 0x0000 }, /* R39 - Input Mixer1 */ 79 { 40, 0x0000 }, /* R40 - Input Mixer2 */ 80 { 41, 0x0000 }, /* R41 - Input Mixer3 */ 81 { 42, 0x0000 }, /* R42 - Input Mixer4 */ 82 { 43, 0x0000 }, /* R43 - Input Mixer5 */ 83 { 44, 0x0000 }, /* R44 - Input Mixer6 */ 84 { 45, 0x0000 }, /* R45 - Output Mixer1 */ 85 { 46, 0x0000 }, /* R46 - Output Mixer2 */ 86 { 47, 0x0000 }, /* R47 - Output Mixer3 */ 87 { 48, 0x0000 }, /* R48 - Output Mixer4 */ 88 { 49, 0x0000 }, /* R49 - Output Mixer5 */ 89 { 50, 0x0000 }, /* R50 - Output Mixer6 */ 90 { 51, 0x0180 }, /* R51 - Out3/4 Mixer */ 91 { 52, 0x0000 }, /* R52 - Line Mixer1 */ 92 { 53, 0x0000 }, /* R53 - Line Mixer2 */ 93 { 54, 0x0000 }, /* R54 - Speaker Mixer */ 94 { 55, 0x0000 }, /* R55 - Additional Control */ 95 { 56, 0x0000 }, /* R56 - AntiPOP1 */ 96 { 57, 0x0000 }, /* R57 - AntiPOP2 */ 97 { 58, 0x0000 }, /* R58 - MICBIAS */ 98 99 { 60, 0x0008 }, /* R60 - PLL1 */ 100 { 61, 0x0031 }, /* R61 - PLL2 */ 101 { 62, 0x0026 }, /* R62 - PLL3 */ 102 }; 103 104 static bool wm8991_volatile(struct device *dev, unsigned int reg) 105 { 106 switch (reg) { 107 case WM8991_RESET: 108 return true; 109 default: 110 return false; 111 } 112 } 113 114 static const unsigned int rec_mix_tlv[] = { 115 TLV_DB_RANGE_HEAD(1), 116 0, 7, TLV_DB_LINEAR_ITEM(-1500, 600), 117 }; 118 119 static const unsigned int in_pga_tlv[] = { 120 TLV_DB_RANGE_HEAD(1), 121 0, 0x1F, TLV_DB_LINEAR_ITEM(-1650, 3000), 122 }; 123 124 static const unsigned int out_mix_tlv[] = { 125 TLV_DB_RANGE_HEAD(1), 126 0, 7, TLV_DB_LINEAR_ITEM(0, -2100), 127 }; 128 129 static const unsigned int out_pga_tlv[] = { 130 TLV_DB_RANGE_HEAD(1), 131 0, 127, TLV_DB_LINEAR_ITEM(-7300, 600), 132 }; 133 134 static const unsigned int out_omix_tlv[] = { 135 TLV_DB_RANGE_HEAD(1), 136 0, 7, TLV_DB_LINEAR_ITEM(-600, 0), 137 }; 138 139 static const unsigned int out_dac_tlv[] = { 140 TLV_DB_RANGE_HEAD(1), 141 0, 255, TLV_DB_LINEAR_ITEM(-7163, 0), 142 }; 143 144 static const unsigned int in_adc_tlv[] = { 145 TLV_DB_RANGE_HEAD(1), 146 0, 255, TLV_DB_LINEAR_ITEM(-7163, 1763), 147 }; 148 149 static const unsigned int out_sidetone_tlv[] = { 150 TLV_DB_RANGE_HEAD(1), 151 0, 31, TLV_DB_LINEAR_ITEM(-3600, 0), 152 }; 153 154 static int wm899x_outpga_put_volsw_vu(struct snd_kcontrol *kcontrol, 155 struct snd_ctl_elem_value *ucontrol) 156 { 157 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 158 int reg = kcontrol->private_value & 0xff; 159 int ret; 160 u16 val; 161 162 ret = snd_soc_put_volsw(kcontrol, ucontrol); 163 if (ret < 0) 164 return ret; 165 166 /* now hit the volume update bits (always bit 8) */ 167 val = snd_soc_read(codec, reg); 168 return snd_soc_write(codec, reg, val | 0x0100); 169 } 170 171 static const char *wm8991_digital_sidetone[] = 172 {"None", "Left ADC", "Right ADC", "Reserved"}; 173 174 static SOC_ENUM_SINGLE_DECL(wm8991_left_digital_sidetone_enum, 175 WM8991_DIGITAL_SIDE_TONE, 176 WM8991_ADC_TO_DACL_SHIFT, 177 wm8991_digital_sidetone); 178 179 static SOC_ENUM_SINGLE_DECL(wm8991_right_digital_sidetone_enum, 180 WM8991_DIGITAL_SIDE_TONE, 181 WM8991_ADC_TO_DACR_SHIFT, 182 wm8991_digital_sidetone); 183 184 static const char *wm8991_adcmode[] = 185 {"Hi-fi mode", "Voice mode 1", "Voice mode 2", "Voice mode 3"}; 186 187 static SOC_ENUM_SINGLE_DECL(wm8991_right_adcmode_enum, 188 WM8991_ADC_CTRL, 189 WM8991_ADC_HPF_CUT_SHIFT, 190 wm8991_adcmode); 191 192 static const struct snd_kcontrol_new wm8991_snd_controls[] = { 193 /* INMIXL */ 194 SOC_SINGLE("LIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L12MNBST_BIT, 1, 0), 195 SOC_SINGLE("LIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_L34MNBST_BIT, 1, 0), 196 /* INMIXR */ 197 SOC_SINGLE("RIN12 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R12MNBST_BIT, 1, 0), 198 SOC_SINGLE("RIN34 PGA Boost", WM8991_INPUT_MIXER3, WM8991_R34MNBST_BIT, 1, 0), 199 200 /* LOMIX */ 201 SOC_SINGLE_TLV("LOMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER3, 202 WM8991_LLI3LOVOL_SHIFT, WM8991_LLI3LOVOL_MASK, 1, out_mix_tlv), 203 SOC_SINGLE_TLV("LOMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3, 204 WM8991_LR12LOVOL_SHIFT, WM8991_LR12LOVOL_MASK, 1, out_mix_tlv), 205 SOC_SINGLE_TLV("LOMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER3, 206 WM8991_LL12LOVOL_SHIFT, WM8991_LL12LOVOL_MASK, 1, out_mix_tlv), 207 SOC_SINGLE_TLV("LOMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER5, 208 WM8991_LRI3LOVOL_SHIFT, WM8991_LRI3LOVOL_MASK, 1, out_mix_tlv), 209 SOC_SINGLE_TLV("LOMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER5, 210 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv), 211 SOC_SINGLE_TLV("LOMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER5, 212 WM8991_LRBLOVOL_SHIFT, WM8991_LRBLOVOL_MASK, 1, out_mix_tlv), 213 214 /* ROMIX */ 215 SOC_SINGLE_TLV("ROMIX RIN3 Bypass Volume", WM8991_OUTPUT_MIXER4, 216 WM8991_RRI3ROVOL_SHIFT, WM8991_RRI3ROVOL_MASK, 1, out_mix_tlv), 217 SOC_SINGLE_TLV("ROMIX LIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4, 218 WM8991_RL12ROVOL_SHIFT, WM8991_RL12ROVOL_MASK, 1, out_mix_tlv), 219 SOC_SINGLE_TLV("ROMIX RIN12 PGA Bypass Volume", WM8991_OUTPUT_MIXER4, 220 WM8991_RR12ROVOL_SHIFT, WM8991_RR12ROVOL_MASK, 1, out_mix_tlv), 221 SOC_SINGLE_TLV("ROMIX LIN3 Bypass Volume", WM8991_OUTPUT_MIXER6, 222 WM8991_RLI3ROVOL_SHIFT, WM8991_RLI3ROVOL_MASK, 1, out_mix_tlv), 223 SOC_SINGLE_TLV("ROMIX AINLMUX Bypass Volume", WM8991_OUTPUT_MIXER6, 224 WM8991_RLBROVOL_SHIFT, WM8991_RLBROVOL_MASK, 1, out_mix_tlv), 225 SOC_SINGLE_TLV("ROMIX AINRMUX Bypass Volume", WM8991_OUTPUT_MIXER6, 226 WM8991_RRBROVOL_SHIFT, WM8991_RRBROVOL_MASK, 1, out_mix_tlv), 227 228 /* LOUT */ 229 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOUT Volume", WM8991_LEFT_OUTPUT_VOLUME, 230 WM8991_LOUTVOL_SHIFT, WM8991_LOUTVOL_MASK, 0, out_pga_tlv), 231 SOC_SINGLE("LOUT ZC", WM8991_LEFT_OUTPUT_VOLUME, WM8991_LOZC_BIT, 1, 0), 232 233 /* ROUT */ 234 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROUT Volume", WM8991_RIGHT_OUTPUT_VOLUME, 235 WM8991_ROUTVOL_SHIFT, WM8991_ROUTVOL_MASK, 0, out_pga_tlv), 236 SOC_SINGLE("ROUT ZC", WM8991_RIGHT_OUTPUT_VOLUME, WM8991_ROZC_BIT, 1, 0), 237 238 /* LOPGA */ 239 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LOPGA Volume", WM8991_LEFT_OPGA_VOLUME, 240 WM8991_LOPGAVOL_SHIFT, WM8991_LOPGAVOL_MASK, 0, out_pga_tlv), 241 SOC_SINGLE("LOPGA ZC Switch", WM8991_LEFT_OPGA_VOLUME, 242 WM8991_LOPGAZC_BIT, 1, 0), 243 244 /* ROPGA */ 245 SOC_WM899X_OUTPGA_SINGLE_R_TLV("ROPGA Volume", WM8991_RIGHT_OPGA_VOLUME, 246 WM8991_ROPGAVOL_SHIFT, WM8991_ROPGAVOL_MASK, 0, out_pga_tlv), 247 SOC_SINGLE("ROPGA ZC Switch", WM8991_RIGHT_OPGA_VOLUME, 248 WM8991_ROPGAZC_BIT, 1, 0), 249 250 SOC_SINGLE("LON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME, 251 WM8991_LONMUTE_BIT, 1, 0), 252 SOC_SINGLE("LOP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME, 253 WM8991_LOPMUTE_BIT, 1, 0), 254 SOC_SINGLE("LOP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME, 255 WM8991_LOATTN_BIT, 1, 0), 256 SOC_SINGLE("RON Mute Switch", WM8991_LINE_OUTPUTS_VOLUME, 257 WM8991_RONMUTE_BIT, 1, 0), 258 SOC_SINGLE("ROP Mute Switch", WM8991_LINE_OUTPUTS_VOLUME, 259 WM8991_ROPMUTE_BIT, 1, 0), 260 SOC_SINGLE("ROP Attenuation Switch", WM8991_LINE_OUTPUTS_VOLUME, 261 WM8991_ROATTN_BIT, 1, 0), 262 263 SOC_SINGLE("OUT3 Mute Switch", WM8991_OUT3_4_VOLUME, 264 WM8991_OUT3MUTE_BIT, 1, 0), 265 SOC_SINGLE("OUT3 Attenuation Switch", WM8991_OUT3_4_VOLUME, 266 WM8991_OUT3ATTN_BIT, 1, 0), 267 268 SOC_SINGLE("OUT4 Mute Switch", WM8991_OUT3_4_VOLUME, 269 WM8991_OUT4MUTE_BIT, 1, 0), 270 SOC_SINGLE("OUT4 Attenuation Switch", WM8991_OUT3_4_VOLUME, 271 WM8991_OUT4ATTN_BIT, 1, 0), 272 273 SOC_SINGLE("Speaker Mode Switch", WM8991_CLASSD1, 274 WM8991_CDMODE_BIT, 1, 0), 275 276 SOC_SINGLE("Speaker Output Attenuation Volume", WM8991_SPEAKER_VOLUME, 277 WM8991_SPKVOL_SHIFT, WM8991_SPKVOL_MASK, 0), 278 SOC_SINGLE("Speaker DC Boost Volume", WM8991_CLASSD3, 279 WM8991_DCGAIN_SHIFT, WM8991_DCGAIN_MASK, 0), 280 SOC_SINGLE("Speaker AC Boost Volume", WM8991_CLASSD3, 281 WM8991_ACGAIN_SHIFT, WM8991_ACGAIN_MASK, 0), 282 283 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left DAC Digital Volume", 284 WM8991_LEFT_DAC_DIGITAL_VOLUME, 285 WM8991_DACL_VOL_SHIFT, 286 WM8991_DACL_VOL_MASK, 287 0, 288 out_dac_tlv), 289 290 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right DAC Digital Volume", 291 WM8991_RIGHT_DAC_DIGITAL_VOLUME, 292 WM8991_DACR_VOL_SHIFT, 293 WM8991_DACR_VOL_MASK, 294 0, 295 out_dac_tlv), 296 297 SOC_ENUM("Left Digital Sidetone", wm8991_left_digital_sidetone_enum), 298 SOC_ENUM("Right Digital Sidetone", wm8991_right_digital_sidetone_enum), 299 300 SOC_SINGLE_TLV("Left Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE, 301 WM8991_ADCL_DAC_SVOL_SHIFT, WM8991_ADCL_DAC_SVOL_MASK, 0, 302 out_sidetone_tlv), 303 SOC_SINGLE_TLV("Right Digital Sidetone Volume", WM8991_DIGITAL_SIDE_TONE, 304 WM8991_ADCR_DAC_SVOL_SHIFT, WM8991_ADCR_DAC_SVOL_MASK, 0, 305 out_sidetone_tlv), 306 307 SOC_SINGLE("ADC Digital High Pass Filter Switch", WM8991_ADC_CTRL, 308 WM8991_ADC_HPF_ENA_BIT, 1, 0), 309 310 SOC_ENUM("ADC HPF Mode", wm8991_right_adcmode_enum), 311 312 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Left ADC Digital Volume", 313 WM8991_LEFT_ADC_DIGITAL_VOLUME, 314 WM8991_ADCL_VOL_SHIFT, 315 WM8991_ADCL_VOL_MASK, 316 0, 317 in_adc_tlv), 318 319 SOC_WM899X_OUTPGA_SINGLE_R_TLV("Right ADC Digital Volume", 320 WM8991_RIGHT_ADC_DIGITAL_VOLUME, 321 WM8991_ADCR_VOL_SHIFT, 322 WM8991_ADCR_VOL_MASK, 323 0, 324 in_adc_tlv), 325 326 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN12 Volume", 327 WM8991_LEFT_LINE_INPUT_1_2_VOLUME, 328 WM8991_LIN12VOL_SHIFT, 329 WM8991_LIN12VOL_MASK, 330 0, 331 in_pga_tlv), 332 333 SOC_SINGLE("LIN12 ZC Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME, 334 WM8991_LI12ZC_BIT, 1, 0), 335 336 SOC_SINGLE("LIN12 Mute Switch", WM8991_LEFT_LINE_INPUT_1_2_VOLUME, 337 WM8991_LI12MUTE_BIT, 1, 0), 338 339 SOC_WM899X_OUTPGA_SINGLE_R_TLV("LIN34 Volume", 340 WM8991_LEFT_LINE_INPUT_3_4_VOLUME, 341 WM8991_LIN34VOL_SHIFT, 342 WM8991_LIN34VOL_MASK, 343 0, 344 in_pga_tlv), 345 346 SOC_SINGLE("LIN34 ZC Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME, 347 WM8991_LI34ZC_BIT, 1, 0), 348 349 SOC_SINGLE("LIN34 Mute Switch", WM8991_LEFT_LINE_INPUT_3_4_VOLUME, 350 WM8991_LI34MUTE_BIT, 1, 0), 351 352 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN12 Volume", 353 WM8991_RIGHT_LINE_INPUT_1_2_VOLUME, 354 WM8991_RIN12VOL_SHIFT, 355 WM8991_RIN12VOL_MASK, 356 0, 357 in_pga_tlv), 358 359 SOC_SINGLE("RIN12 ZC Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME, 360 WM8991_RI12ZC_BIT, 1, 0), 361 362 SOC_SINGLE("RIN12 Mute Switch", WM8991_RIGHT_LINE_INPUT_1_2_VOLUME, 363 WM8991_RI12MUTE_BIT, 1, 0), 364 365 SOC_WM899X_OUTPGA_SINGLE_R_TLV("RIN34 Volume", 366 WM8991_RIGHT_LINE_INPUT_3_4_VOLUME, 367 WM8991_RIN34VOL_SHIFT, 368 WM8991_RIN34VOL_MASK, 369 0, 370 in_pga_tlv), 371 372 SOC_SINGLE("RIN34 ZC Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME, 373 WM8991_RI34ZC_BIT, 1, 0), 374 375 SOC_SINGLE("RIN34 Mute Switch", WM8991_RIGHT_LINE_INPUT_3_4_VOLUME, 376 WM8991_RI34MUTE_BIT, 1, 0), 377 }; 378 379 /* 380 * _DAPM_ Controls 381 */ 382 static int outmixer_event(struct snd_soc_dapm_widget *w, 383 struct snd_kcontrol *kcontrol, int event) 384 { 385 u32 reg_shift = kcontrol->private_value & 0xfff; 386 int ret = 0; 387 u16 reg; 388 389 switch (reg_shift) { 390 case WM8991_SPEAKER_MIXER | (WM8991_LDSPK_BIT << 8): 391 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER1); 392 if (reg & WM8991_LDLO) { 393 printk(KERN_WARNING 394 "Cannot set as Output Mixer 1 LDLO Set\n"); 395 ret = -1; 396 } 397 break; 398 399 case WM8991_SPEAKER_MIXER | (WM8991_RDSPK_BIT << 8): 400 reg = snd_soc_read(w->codec, WM8991_OUTPUT_MIXER2); 401 if (reg & WM8991_RDRO) { 402 printk(KERN_WARNING 403 "Cannot set as Output Mixer 2 RDRO Set\n"); 404 ret = -1; 405 } 406 break; 407 408 case WM8991_OUTPUT_MIXER1 | (WM8991_LDLO_BIT << 8): 409 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER); 410 if (reg & WM8991_LDSPK) { 411 printk(KERN_WARNING 412 "Cannot set as Speaker Mixer LDSPK Set\n"); 413 ret = -1; 414 } 415 break; 416 417 case WM8991_OUTPUT_MIXER2 | (WM8991_RDRO_BIT << 8): 418 reg = snd_soc_read(w->codec, WM8991_SPEAKER_MIXER); 419 if (reg & WM8991_RDSPK) { 420 printk(KERN_WARNING 421 "Cannot set as Speaker Mixer RDSPK Set\n"); 422 ret = -1; 423 } 424 break; 425 } 426 427 return ret; 428 } 429 430 /* INMIX dB values */ 431 static const unsigned int in_mix_tlv[] = { 432 TLV_DB_RANGE_HEAD(1), 433 0, 7, TLV_DB_LINEAR_ITEM(-1200, 600), 434 }; 435 436 /* Left In PGA Connections */ 437 static const struct snd_kcontrol_new wm8991_dapm_lin12_pga_controls[] = { 438 SOC_DAPM_SINGLE("LIN1 Switch", WM8991_INPUT_MIXER2, WM8991_LMN1_BIT, 1, 0), 439 SOC_DAPM_SINGLE("LIN2 Switch", WM8991_INPUT_MIXER2, WM8991_LMP2_BIT, 1, 0), 440 }; 441 442 static const struct snd_kcontrol_new wm8991_dapm_lin34_pga_controls[] = { 443 SOC_DAPM_SINGLE("LIN3 Switch", WM8991_INPUT_MIXER2, WM8991_LMN3_BIT, 1, 0), 444 SOC_DAPM_SINGLE("LIN4 Switch", WM8991_INPUT_MIXER2, WM8991_LMP4_BIT, 1, 0), 445 }; 446 447 /* Right In PGA Connections */ 448 static const struct snd_kcontrol_new wm8991_dapm_rin12_pga_controls[] = { 449 SOC_DAPM_SINGLE("RIN1 Switch", WM8991_INPUT_MIXER2, WM8991_RMN1_BIT, 1, 0), 450 SOC_DAPM_SINGLE("RIN2 Switch", WM8991_INPUT_MIXER2, WM8991_RMP2_BIT, 1, 0), 451 }; 452 453 static const struct snd_kcontrol_new wm8991_dapm_rin34_pga_controls[] = { 454 SOC_DAPM_SINGLE("RIN3 Switch", WM8991_INPUT_MIXER2, WM8991_RMN3_BIT, 1, 0), 455 SOC_DAPM_SINGLE("RIN4 Switch", WM8991_INPUT_MIXER2, WM8991_RMP4_BIT, 1, 0), 456 }; 457 458 /* INMIXL */ 459 static const struct snd_kcontrol_new wm8991_dapm_inmixl_controls[] = { 460 SOC_DAPM_SINGLE_TLV("Record Left Volume", WM8991_INPUT_MIXER3, 461 WM8991_LDBVOL_SHIFT, WM8991_LDBVOL_MASK, 0, in_mix_tlv), 462 SOC_DAPM_SINGLE_TLV("LIN2 Volume", WM8991_INPUT_MIXER5, WM8991_LI2BVOL_SHIFT, 463 7, 0, in_mix_tlv), 464 SOC_DAPM_SINGLE("LINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT, 465 1, 0), 466 SOC_DAPM_SINGLE("LINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT, 467 1, 0), 468 }; 469 470 /* INMIXR */ 471 static const struct snd_kcontrol_new wm8991_dapm_inmixr_controls[] = { 472 SOC_DAPM_SINGLE_TLV("Record Right Volume", WM8991_INPUT_MIXER4, 473 WM8991_RDBVOL_SHIFT, WM8991_RDBVOL_MASK, 0, in_mix_tlv), 474 SOC_DAPM_SINGLE_TLV("RIN2 Volume", WM8991_INPUT_MIXER6, WM8991_RI2BVOL_SHIFT, 475 7, 0, in_mix_tlv), 476 SOC_DAPM_SINGLE("RINPGA12 Switch", WM8991_INPUT_MIXER3, WM8991_L12MNB_BIT, 477 1, 0), 478 SOC_DAPM_SINGLE("RINPGA34 Switch", WM8991_INPUT_MIXER3, WM8991_L34MNB_BIT, 479 1, 0), 480 }; 481 482 /* AINLMUX */ 483 static const char *wm8991_ainlmux[] = 484 {"INMIXL Mix", "RXVOICE Mix", "DIFFINL Mix"}; 485 486 static SOC_ENUM_SINGLE_DECL(wm8991_ainlmux_enum, 487 WM8991_INPUT_MIXER1, WM8991_AINLMODE_SHIFT, 488 wm8991_ainlmux); 489 490 static const struct snd_kcontrol_new wm8991_dapm_ainlmux_controls = 491 SOC_DAPM_ENUM("Route", wm8991_ainlmux_enum); 492 493 /* DIFFINL */ 494 495 /* AINRMUX */ 496 static const char *wm8991_ainrmux[] = 497 {"INMIXR Mix", "RXVOICE Mix", "DIFFINR Mix"}; 498 499 static SOC_ENUM_SINGLE_DECL(wm8991_ainrmux_enum, 500 WM8991_INPUT_MIXER1, WM8991_AINRMODE_SHIFT, 501 wm8991_ainrmux); 502 503 static const struct snd_kcontrol_new wm8991_dapm_ainrmux_controls = 504 SOC_DAPM_ENUM("Route", wm8991_ainrmux_enum); 505 506 /* RXVOICE */ 507 static const struct snd_kcontrol_new wm8991_dapm_rxvoice_controls[] = { 508 SOC_DAPM_SINGLE_TLV("LIN4RXN", WM8991_INPUT_MIXER5, WM8991_LR4BVOL_SHIFT, 509 WM8991_LR4BVOL_MASK, 0, in_mix_tlv), 510 SOC_DAPM_SINGLE_TLV("RIN4RXP", WM8991_INPUT_MIXER6, WM8991_RL4BVOL_SHIFT, 511 WM8991_RL4BVOL_MASK, 0, in_mix_tlv), 512 }; 513 514 /* LOMIX */ 515 static const struct snd_kcontrol_new wm8991_dapm_lomix_controls[] = { 516 SOC_DAPM_SINGLE("LOMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER1, 517 WM8991_LRBLO_BIT, 1, 0), 518 SOC_DAPM_SINGLE("LOMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER1, 519 WM8991_LLBLO_BIT, 1, 0), 520 SOC_DAPM_SINGLE("LOMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER1, 521 WM8991_LRI3LO_BIT, 1, 0), 522 SOC_DAPM_SINGLE("LOMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER1, 523 WM8991_LLI3LO_BIT, 1, 0), 524 SOC_DAPM_SINGLE("LOMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1, 525 WM8991_LR12LO_BIT, 1, 0), 526 SOC_DAPM_SINGLE("LOMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER1, 527 WM8991_LL12LO_BIT, 1, 0), 528 SOC_DAPM_SINGLE("LOMIX Left DAC Switch", WM8991_OUTPUT_MIXER1, 529 WM8991_LDLO_BIT, 1, 0), 530 }; 531 532 /* ROMIX */ 533 static const struct snd_kcontrol_new wm8991_dapm_romix_controls[] = { 534 SOC_DAPM_SINGLE("ROMIX Left ADC Bypass Switch", WM8991_OUTPUT_MIXER2, 535 WM8991_RLBRO_BIT, 1, 0), 536 SOC_DAPM_SINGLE("ROMIX Right ADC Bypass Switch", WM8991_OUTPUT_MIXER2, 537 WM8991_RRBRO_BIT, 1, 0), 538 SOC_DAPM_SINGLE("ROMIX LIN3 Bypass Switch", WM8991_OUTPUT_MIXER2, 539 WM8991_RLI3RO_BIT, 1, 0), 540 SOC_DAPM_SINGLE("ROMIX RIN3 Bypass Switch", WM8991_OUTPUT_MIXER2, 541 WM8991_RRI3RO_BIT, 1, 0), 542 SOC_DAPM_SINGLE("ROMIX LIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2, 543 WM8991_RL12RO_BIT, 1, 0), 544 SOC_DAPM_SINGLE("ROMIX RIN12 PGA Bypass Switch", WM8991_OUTPUT_MIXER2, 545 WM8991_RR12RO_BIT, 1, 0), 546 SOC_DAPM_SINGLE("ROMIX Right DAC Switch", WM8991_OUTPUT_MIXER2, 547 WM8991_RDRO_BIT, 1, 0), 548 }; 549 550 /* LONMIX */ 551 static const struct snd_kcontrol_new wm8991_dapm_lonmix_controls[] = { 552 SOC_DAPM_SINGLE("LONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1, 553 WM8991_LLOPGALON_BIT, 1, 0), 554 SOC_DAPM_SINGLE("LONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER1, 555 WM8991_LROPGALON_BIT, 1, 0), 556 SOC_DAPM_SINGLE("LONMIX Inverted LOP Switch", WM8991_LINE_MIXER1, 557 WM8991_LOPLON_BIT, 1, 0), 558 }; 559 560 /* LOPMIX */ 561 static const struct snd_kcontrol_new wm8991_dapm_lopmix_controls[] = { 562 SOC_DAPM_SINGLE("LOPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER1, 563 WM8991_LR12LOP_BIT, 1, 0), 564 SOC_DAPM_SINGLE("LOPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER1, 565 WM8991_LL12LOP_BIT, 1, 0), 566 SOC_DAPM_SINGLE("LOPMIX Left Mixer PGA Switch", WM8991_LINE_MIXER1, 567 WM8991_LLOPGALOP_BIT, 1, 0), 568 }; 569 570 /* RONMIX */ 571 static const struct snd_kcontrol_new wm8991_dapm_ronmix_controls[] = { 572 SOC_DAPM_SINGLE("RONMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2, 573 WM8991_RROPGARON_BIT, 1, 0), 574 SOC_DAPM_SINGLE("RONMIX Left Mixer PGA Switch", WM8991_LINE_MIXER2, 575 WM8991_RLOPGARON_BIT, 1, 0), 576 SOC_DAPM_SINGLE("RONMIX Inverted ROP Switch", WM8991_LINE_MIXER2, 577 WM8991_ROPRON_BIT, 1, 0), 578 }; 579 580 /* ROPMIX */ 581 static const struct snd_kcontrol_new wm8991_dapm_ropmix_controls[] = { 582 SOC_DAPM_SINGLE("ROPMIX Left Mic Bypass Switch", WM8991_LINE_MIXER2, 583 WM8991_RL12ROP_BIT, 1, 0), 584 SOC_DAPM_SINGLE("ROPMIX Right Mic Bypass Switch", WM8991_LINE_MIXER2, 585 WM8991_RR12ROP_BIT, 1, 0), 586 SOC_DAPM_SINGLE("ROPMIX Right Mixer PGA Switch", WM8991_LINE_MIXER2, 587 WM8991_RROPGAROP_BIT, 1, 0), 588 }; 589 590 /* OUT3MIX */ 591 static const struct snd_kcontrol_new wm8991_dapm_out3mix_controls[] = { 592 SOC_DAPM_SINGLE("OUT3MIX LIN4RXN Bypass Switch", WM8991_OUT3_4_MIXER, 593 WM8991_LI4O3_BIT, 1, 0), 594 SOC_DAPM_SINGLE("OUT3MIX Left Out PGA Switch", WM8991_OUT3_4_MIXER, 595 WM8991_LPGAO3_BIT, 1, 0), 596 }; 597 598 /* OUT4MIX */ 599 static const struct snd_kcontrol_new wm8991_dapm_out4mix_controls[] = { 600 SOC_DAPM_SINGLE("OUT4MIX Right Out PGA Switch", WM8991_OUT3_4_MIXER, 601 WM8991_RPGAO4_BIT, 1, 0), 602 SOC_DAPM_SINGLE("OUT4MIX RIN4RXP Bypass Switch", WM8991_OUT3_4_MIXER, 603 WM8991_RI4O4_BIT, 1, 0), 604 }; 605 606 /* SPKMIX */ 607 static const struct snd_kcontrol_new wm8991_dapm_spkmix_controls[] = { 608 SOC_DAPM_SINGLE("SPKMIX LIN2 Bypass Switch", WM8991_SPEAKER_MIXER, 609 WM8991_LI2SPK_BIT, 1, 0), 610 SOC_DAPM_SINGLE("SPKMIX LADC Bypass Switch", WM8991_SPEAKER_MIXER, 611 WM8991_LB2SPK_BIT, 1, 0), 612 SOC_DAPM_SINGLE("SPKMIX Left Mixer PGA Switch", WM8991_SPEAKER_MIXER, 613 WM8991_LOPGASPK_BIT, 1, 0), 614 SOC_DAPM_SINGLE("SPKMIX Left DAC Switch", WM8991_SPEAKER_MIXER, 615 WM8991_LDSPK_BIT, 1, 0), 616 SOC_DAPM_SINGLE("SPKMIX Right DAC Switch", WM8991_SPEAKER_MIXER, 617 WM8991_RDSPK_BIT, 1, 0), 618 SOC_DAPM_SINGLE("SPKMIX Right Mixer PGA Switch", WM8991_SPEAKER_MIXER, 619 WM8991_ROPGASPK_BIT, 1, 0), 620 SOC_DAPM_SINGLE("SPKMIX RADC Bypass Switch", WM8991_SPEAKER_MIXER, 621 WM8991_RL12ROP_BIT, 1, 0), 622 SOC_DAPM_SINGLE("SPKMIX RIN2 Bypass Switch", WM8991_SPEAKER_MIXER, 623 WM8991_RI2SPK_BIT, 1, 0), 624 }; 625 626 static const struct snd_soc_dapm_widget wm8991_dapm_widgets[] = { 627 /* Input Side */ 628 /* Input Lines */ 629 SND_SOC_DAPM_INPUT("LIN1"), 630 SND_SOC_DAPM_INPUT("LIN2"), 631 SND_SOC_DAPM_INPUT("LIN3"), 632 SND_SOC_DAPM_INPUT("LIN4RXN"), 633 SND_SOC_DAPM_INPUT("RIN3"), 634 SND_SOC_DAPM_INPUT("RIN4RXP"), 635 SND_SOC_DAPM_INPUT("RIN1"), 636 SND_SOC_DAPM_INPUT("RIN2"), 637 SND_SOC_DAPM_INPUT("Internal ADC Source"), 638 639 SND_SOC_DAPM_SUPPLY("INL", WM8991_POWER_MANAGEMENT_2, 640 WM8991_AINL_ENA_BIT, 0, NULL, 0), 641 SND_SOC_DAPM_SUPPLY("INR", WM8991_POWER_MANAGEMENT_2, 642 WM8991_AINR_ENA_BIT, 0, NULL, 0), 643 644 /* DACs */ 645 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8991_POWER_MANAGEMENT_2, 646 WM8991_ADCL_ENA_BIT, 0), 647 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8991_POWER_MANAGEMENT_2, 648 WM8991_ADCR_ENA_BIT, 0), 649 650 /* Input PGAs */ 651 SND_SOC_DAPM_MIXER("LIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN12_ENA_BIT, 652 0, &wm8991_dapm_lin12_pga_controls[0], 653 ARRAY_SIZE(wm8991_dapm_lin12_pga_controls)), 654 SND_SOC_DAPM_MIXER("LIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_LIN34_ENA_BIT, 655 0, &wm8991_dapm_lin34_pga_controls[0], 656 ARRAY_SIZE(wm8991_dapm_lin34_pga_controls)), 657 SND_SOC_DAPM_MIXER("RIN12 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN12_ENA_BIT, 658 0, &wm8991_dapm_rin12_pga_controls[0], 659 ARRAY_SIZE(wm8991_dapm_rin12_pga_controls)), 660 SND_SOC_DAPM_MIXER("RIN34 PGA", WM8991_POWER_MANAGEMENT_2, WM8991_RIN34_ENA_BIT, 661 0, &wm8991_dapm_rin34_pga_controls[0], 662 ARRAY_SIZE(wm8991_dapm_rin34_pga_controls)), 663 664 /* INMIXL */ 665 SND_SOC_DAPM_MIXER("INMIXL", SND_SOC_NOPM, 0, 0, 666 &wm8991_dapm_inmixl_controls[0], 667 ARRAY_SIZE(wm8991_dapm_inmixl_controls)), 668 669 /* AINLMUX */ 670 SND_SOC_DAPM_MUX("AINLMUX", SND_SOC_NOPM, 0, 0, 671 &wm8991_dapm_ainlmux_controls), 672 673 /* INMIXR */ 674 SND_SOC_DAPM_MIXER("INMIXR", SND_SOC_NOPM, 0, 0, 675 &wm8991_dapm_inmixr_controls[0], 676 ARRAY_SIZE(wm8991_dapm_inmixr_controls)), 677 678 /* AINRMUX */ 679 SND_SOC_DAPM_MUX("AINRMUX", SND_SOC_NOPM, 0, 0, 680 &wm8991_dapm_ainrmux_controls), 681 682 /* Output Side */ 683 /* DACs */ 684 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8991_POWER_MANAGEMENT_3, 685 WM8991_DACL_ENA_BIT, 0), 686 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8991_POWER_MANAGEMENT_3, 687 WM8991_DACR_ENA_BIT, 0), 688 689 /* LOMIX */ 690 SND_SOC_DAPM_MIXER_E("LOMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOMIX_ENA_BIT, 691 0, &wm8991_dapm_lomix_controls[0], 692 ARRAY_SIZE(wm8991_dapm_lomix_controls), 693 outmixer_event, SND_SOC_DAPM_PRE_REG), 694 695 /* LONMIX */ 696 SND_SOC_DAPM_MIXER("LONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LON_ENA_BIT, 0, 697 &wm8991_dapm_lonmix_controls[0], 698 ARRAY_SIZE(wm8991_dapm_lonmix_controls)), 699 700 /* LOPMIX */ 701 SND_SOC_DAPM_MIXER("LOPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_LOP_ENA_BIT, 0, 702 &wm8991_dapm_lopmix_controls[0], 703 ARRAY_SIZE(wm8991_dapm_lopmix_controls)), 704 705 /* OUT3MIX */ 706 SND_SOC_DAPM_MIXER("OUT3MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT3_ENA_BIT, 0, 707 &wm8991_dapm_out3mix_controls[0], 708 ARRAY_SIZE(wm8991_dapm_out3mix_controls)), 709 710 /* SPKMIX */ 711 SND_SOC_DAPM_MIXER_E("SPKMIX", WM8991_POWER_MANAGEMENT_1, WM8991_SPK_ENA_BIT, 0, 712 &wm8991_dapm_spkmix_controls[0], 713 ARRAY_SIZE(wm8991_dapm_spkmix_controls), outmixer_event, 714 SND_SOC_DAPM_PRE_REG), 715 716 /* OUT4MIX */ 717 SND_SOC_DAPM_MIXER("OUT4MIX", WM8991_POWER_MANAGEMENT_1, WM8991_OUT4_ENA_BIT, 0, 718 &wm8991_dapm_out4mix_controls[0], 719 ARRAY_SIZE(wm8991_dapm_out4mix_controls)), 720 721 /* ROPMIX */ 722 SND_SOC_DAPM_MIXER("ROPMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROP_ENA_BIT, 0, 723 &wm8991_dapm_ropmix_controls[0], 724 ARRAY_SIZE(wm8991_dapm_ropmix_controls)), 725 726 /* RONMIX */ 727 SND_SOC_DAPM_MIXER("RONMIX", WM8991_POWER_MANAGEMENT_3, WM8991_RON_ENA_BIT, 0, 728 &wm8991_dapm_ronmix_controls[0], 729 ARRAY_SIZE(wm8991_dapm_ronmix_controls)), 730 731 /* ROMIX */ 732 SND_SOC_DAPM_MIXER_E("ROMIX", WM8991_POWER_MANAGEMENT_3, WM8991_ROMIX_ENA_BIT, 733 0, &wm8991_dapm_romix_controls[0], 734 ARRAY_SIZE(wm8991_dapm_romix_controls), 735 outmixer_event, SND_SOC_DAPM_PRE_REG), 736 737 /* LOUT PGA */ 738 SND_SOC_DAPM_PGA("LOUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_LOUT_ENA_BIT, 0, 739 NULL, 0), 740 741 /* ROUT PGA */ 742 SND_SOC_DAPM_PGA("ROUT PGA", WM8991_POWER_MANAGEMENT_1, WM8991_ROUT_ENA_BIT, 0, 743 NULL, 0), 744 745 /* LOPGA */ 746 SND_SOC_DAPM_PGA("LOPGA", WM8991_POWER_MANAGEMENT_3, WM8991_LOPGA_ENA_BIT, 0, 747 NULL, 0), 748 749 /* ROPGA */ 750 SND_SOC_DAPM_PGA("ROPGA", WM8991_POWER_MANAGEMENT_3, WM8991_ROPGA_ENA_BIT, 0, 751 NULL, 0), 752 753 /* MICBIAS */ 754 SND_SOC_DAPM_SUPPLY("MICBIAS", WM8991_POWER_MANAGEMENT_1, 755 WM8991_MICBIAS_ENA_BIT, 0, NULL, 0), 756 757 SND_SOC_DAPM_OUTPUT("LON"), 758 SND_SOC_DAPM_OUTPUT("LOP"), 759 SND_SOC_DAPM_OUTPUT("OUT3"), 760 SND_SOC_DAPM_OUTPUT("LOUT"), 761 SND_SOC_DAPM_OUTPUT("SPKN"), 762 SND_SOC_DAPM_OUTPUT("SPKP"), 763 SND_SOC_DAPM_OUTPUT("ROUT"), 764 SND_SOC_DAPM_OUTPUT("OUT4"), 765 SND_SOC_DAPM_OUTPUT("ROP"), 766 SND_SOC_DAPM_OUTPUT("RON"), 767 SND_SOC_DAPM_OUTPUT("OUT"), 768 769 SND_SOC_DAPM_OUTPUT("Internal DAC Sink"), 770 }; 771 772 static const struct snd_soc_dapm_route wm8991_dapm_routes[] = { 773 /* Make DACs turn on when playing even if not mixed into any outputs */ 774 {"Internal DAC Sink", NULL, "Left DAC"}, 775 {"Internal DAC Sink", NULL, "Right DAC"}, 776 777 /* Make ADCs turn on when recording even if not mixed from any inputs */ 778 {"Left ADC", NULL, "Internal ADC Source"}, 779 {"Right ADC", NULL, "Internal ADC Source"}, 780 781 /* Input Side */ 782 {"INMIXL", NULL, "INL"}, 783 {"AINLMUX", NULL, "INL"}, 784 {"INMIXR", NULL, "INR"}, 785 {"AINRMUX", NULL, "INR"}, 786 /* LIN12 PGA */ 787 {"LIN12 PGA", "LIN1 Switch", "LIN1"}, 788 {"LIN12 PGA", "LIN2 Switch", "LIN2"}, 789 /* LIN34 PGA */ 790 {"LIN34 PGA", "LIN3 Switch", "LIN3"}, 791 {"LIN34 PGA", "LIN4 Switch", "LIN4RXN"}, 792 /* INMIXL */ 793 {"INMIXL", "Record Left Volume", "LOMIX"}, 794 {"INMIXL", "LIN2 Volume", "LIN2"}, 795 {"INMIXL", "LINPGA12 Switch", "LIN12 PGA"}, 796 {"INMIXL", "LINPGA34 Switch", "LIN34 PGA"}, 797 /* AINLMUX */ 798 {"AINLMUX", "INMIXL Mix", "INMIXL"}, 799 {"AINLMUX", "DIFFINL Mix", "LIN12 PGA"}, 800 {"AINLMUX", "DIFFINL Mix", "LIN34 PGA"}, 801 {"AINLMUX", "RXVOICE Mix", "LIN4RXN"}, 802 {"AINLMUX", "RXVOICE Mix", "RIN4RXP"}, 803 /* ADC */ 804 {"Left ADC", NULL, "AINLMUX"}, 805 806 /* RIN12 PGA */ 807 {"RIN12 PGA", "RIN1 Switch", "RIN1"}, 808 {"RIN12 PGA", "RIN2 Switch", "RIN2"}, 809 /* RIN34 PGA */ 810 {"RIN34 PGA", "RIN3 Switch", "RIN3"}, 811 {"RIN34 PGA", "RIN4 Switch", "RIN4RXP"}, 812 /* INMIXL */ 813 {"INMIXR", "Record Right Volume", "ROMIX"}, 814 {"INMIXR", "RIN2 Volume", "RIN2"}, 815 {"INMIXR", "RINPGA12 Switch", "RIN12 PGA"}, 816 {"INMIXR", "RINPGA34 Switch", "RIN34 PGA"}, 817 /* AINRMUX */ 818 {"AINRMUX", "INMIXR Mix", "INMIXR"}, 819 {"AINRMUX", "DIFFINR Mix", "RIN12 PGA"}, 820 {"AINRMUX", "DIFFINR Mix", "RIN34 PGA"}, 821 {"AINRMUX", "RXVOICE Mix", "LIN4RXN"}, 822 {"AINRMUX", "RXVOICE Mix", "RIN4RXP"}, 823 /* ADC */ 824 {"Right ADC", NULL, "AINRMUX"}, 825 826 /* LOMIX */ 827 {"LOMIX", "LOMIX RIN3 Bypass Switch", "RIN3"}, 828 {"LOMIX", "LOMIX LIN3 Bypass Switch", "LIN3"}, 829 {"LOMIX", "LOMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 830 {"LOMIX", "LOMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 831 {"LOMIX", "LOMIX Right ADC Bypass Switch", "AINRMUX"}, 832 {"LOMIX", "LOMIX Left ADC Bypass Switch", "AINLMUX"}, 833 {"LOMIX", "LOMIX Left DAC Switch", "Left DAC"}, 834 835 /* ROMIX */ 836 {"ROMIX", "ROMIX RIN3 Bypass Switch", "RIN3"}, 837 {"ROMIX", "ROMIX LIN3 Bypass Switch", "LIN3"}, 838 {"ROMIX", "ROMIX LIN12 PGA Bypass Switch", "LIN12 PGA"}, 839 {"ROMIX", "ROMIX RIN12 PGA Bypass Switch", "RIN12 PGA"}, 840 {"ROMIX", "ROMIX Right ADC Bypass Switch", "AINRMUX"}, 841 {"ROMIX", "ROMIX Left ADC Bypass Switch", "AINLMUX"}, 842 {"ROMIX", "ROMIX Right DAC Switch", "Right DAC"}, 843 844 /* SPKMIX */ 845 {"SPKMIX", "SPKMIX LIN2 Bypass Switch", "LIN2"}, 846 {"SPKMIX", "SPKMIX RIN2 Bypass Switch", "RIN2"}, 847 {"SPKMIX", "SPKMIX LADC Bypass Switch", "AINLMUX"}, 848 {"SPKMIX", "SPKMIX RADC Bypass Switch", "AINRMUX"}, 849 {"SPKMIX", "SPKMIX Left Mixer PGA Switch", "LOPGA"}, 850 {"SPKMIX", "SPKMIX Right Mixer PGA Switch", "ROPGA"}, 851 {"SPKMIX", "SPKMIX Right DAC Switch", "Right DAC"}, 852 {"SPKMIX", "SPKMIX Left DAC Switch", "Right DAC"}, 853 854 /* LONMIX */ 855 {"LONMIX", "LONMIX Left Mixer PGA Switch", "LOPGA"}, 856 {"LONMIX", "LONMIX Right Mixer PGA Switch", "ROPGA"}, 857 {"LONMIX", "LONMIX Inverted LOP Switch", "LOPMIX"}, 858 859 /* LOPMIX */ 860 {"LOPMIX", "LOPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 861 {"LOPMIX", "LOPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 862 {"LOPMIX", "LOPMIX Left Mixer PGA Switch", "LOPGA"}, 863 864 /* OUT3MIX */ 865 {"OUT3MIX", "OUT3MIX LIN4RXN Bypass Switch", "LIN4RXN"}, 866 {"OUT3MIX", "OUT3MIX Left Out PGA Switch", "LOPGA"}, 867 868 /* OUT4MIX */ 869 {"OUT4MIX", "OUT4MIX Right Out PGA Switch", "ROPGA"}, 870 {"OUT4MIX", "OUT4MIX RIN4RXP Bypass Switch", "RIN4RXP"}, 871 872 /* RONMIX */ 873 {"RONMIX", "RONMIX Right Mixer PGA Switch", "ROPGA"}, 874 {"RONMIX", "RONMIX Left Mixer PGA Switch", "LOPGA"}, 875 {"RONMIX", "RONMIX Inverted ROP Switch", "ROPMIX"}, 876 877 /* ROPMIX */ 878 {"ROPMIX", "ROPMIX Left Mic Bypass Switch", "LIN12 PGA"}, 879 {"ROPMIX", "ROPMIX Right Mic Bypass Switch", "RIN12 PGA"}, 880 {"ROPMIX", "ROPMIX Right Mixer PGA Switch", "ROPGA"}, 881 882 /* Out Mixer PGAs */ 883 {"LOPGA", NULL, "LOMIX"}, 884 {"ROPGA", NULL, "ROMIX"}, 885 886 {"LOUT PGA", NULL, "LOMIX"}, 887 {"ROUT PGA", NULL, "ROMIX"}, 888 889 /* Output Pins */ 890 {"LON", NULL, "LONMIX"}, 891 {"LOP", NULL, "LOPMIX"}, 892 {"OUT", NULL, "OUT3MIX"}, 893 {"LOUT", NULL, "LOUT PGA"}, 894 {"SPKN", NULL, "SPKMIX"}, 895 {"ROUT", NULL, "ROUT PGA"}, 896 {"OUT4", NULL, "OUT4MIX"}, 897 {"ROP", NULL, "ROPMIX"}, 898 {"RON", NULL, "RONMIX"}, 899 }; 900 901 /* PLL divisors */ 902 struct _pll_div { 903 u32 div2; 904 u32 n; 905 u32 k; 906 }; 907 908 /* The size in bits of the pll divide multiplied by 10 909 * to allow rounding later */ 910 #define FIXED_PLL_SIZE ((1 << 16) * 10) 911 912 static void pll_factors(struct _pll_div *pll_div, unsigned int target, 913 unsigned int source) 914 { 915 u64 Kpart; 916 unsigned int K, Ndiv, Nmod; 917 918 919 Ndiv = target / source; 920 if (Ndiv < 6) { 921 source >>= 1; 922 pll_div->div2 = 1; 923 Ndiv = target / source; 924 } else 925 pll_div->div2 = 0; 926 927 if ((Ndiv < 6) || (Ndiv > 12)) 928 printk(KERN_WARNING 929 "WM8991 N value outwith recommended range! N = %d\n", Ndiv); 930 931 pll_div->n = Ndiv; 932 Nmod = target % source; 933 Kpart = FIXED_PLL_SIZE * (long long)Nmod; 934 935 do_div(Kpart, source); 936 937 K = Kpart & 0xFFFFFFFF; 938 939 /* Check if we need to round */ 940 if ((K % 10) >= 5) 941 K += 5; 942 943 /* Move down to proper range now rounding is done */ 944 K /= 10; 945 946 pll_div->k = K; 947 } 948 949 static int wm8991_set_dai_pll(struct snd_soc_dai *codec_dai, 950 int pll_id, int src, unsigned int freq_in, unsigned int freq_out) 951 { 952 u16 reg; 953 struct snd_soc_codec *codec = codec_dai->codec; 954 struct _pll_div pll_div; 955 956 if (freq_in && freq_out) { 957 pll_factors(&pll_div, freq_out * 4, freq_in); 958 959 /* Turn on PLL */ 960 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2); 961 reg |= WM8991_PLL_ENA; 962 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg); 963 964 /* sysclk comes from PLL */ 965 reg = snd_soc_read(codec, WM8991_CLOCKING_2); 966 snd_soc_write(codec, WM8991_CLOCKING_2, reg | WM8991_SYSCLK_SRC); 967 968 /* set up N , fractional mode and pre-divisor if necessary */ 969 snd_soc_write(codec, WM8991_PLL1, pll_div.n | WM8991_SDM | 970 (pll_div.div2 ? WM8991_PRESCALE : 0)); 971 snd_soc_write(codec, WM8991_PLL2, (u8)(pll_div.k>>8)); 972 snd_soc_write(codec, WM8991_PLL3, (u8)(pll_div.k & 0xFF)); 973 } else { 974 /* Turn on PLL */ 975 reg = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_2); 976 reg &= ~WM8991_PLL_ENA; 977 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_2, reg); 978 } 979 return 0; 980 } 981 982 /* 983 * Set's ADC and Voice DAC format. 984 */ 985 static int wm8991_set_dai_fmt(struct snd_soc_dai *codec_dai, 986 unsigned int fmt) 987 { 988 struct snd_soc_codec *codec = codec_dai->codec; 989 u16 audio1, audio3; 990 991 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1); 992 audio3 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_3); 993 994 /* set master/slave audio interface */ 995 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 996 case SND_SOC_DAIFMT_CBS_CFS: 997 audio3 &= ~WM8991_AIF_MSTR1; 998 break; 999 case SND_SOC_DAIFMT_CBM_CFM: 1000 audio3 |= WM8991_AIF_MSTR1; 1001 break; 1002 default: 1003 return -EINVAL; 1004 } 1005 1006 audio1 &= ~WM8991_AIF_FMT_MASK; 1007 1008 /* interface format */ 1009 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 1010 case SND_SOC_DAIFMT_I2S: 1011 audio1 |= WM8991_AIF_TMF_I2S; 1012 audio1 &= ~WM8991_AIF_LRCLK_INV; 1013 break; 1014 case SND_SOC_DAIFMT_RIGHT_J: 1015 audio1 |= WM8991_AIF_TMF_RIGHTJ; 1016 audio1 &= ~WM8991_AIF_LRCLK_INV; 1017 break; 1018 case SND_SOC_DAIFMT_LEFT_J: 1019 audio1 |= WM8991_AIF_TMF_LEFTJ; 1020 audio1 &= ~WM8991_AIF_LRCLK_INV; 1021 break; 1022 case SND_SOC_DAIFMT_DSP_A: 1023 audio1 |= WM8991_AIF_TMF_DSP; 1024 audio1 &= ~WM8991_AIF_LRCLK_INV; 1025 break; 1026 case SND_SOC_DAIFMT_DSP_B: 1027 audio1 |= WM8991_AIF_TMF_DSP | WM8991_AIF_LRCLK_INV; 1028 break; 1029 default: 1030 return -EINVAL; 1031 } 1032 1033 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1); 1034 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_3, audio3); 1035 return 0; 1036 } 1037 1038 static int wm8991_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1039 int div_id, int div) 1040 { 1041 struct snd_soc_codec *codec = codec_dai->codec; 1042 u16 reg; 1043 1044 switch (div_id) { 1045 case WM8991_MCLK_DIV: 1046 reg = snd_soc_read(codec, WM8991_CLOCKING_2) & 1047 ~WM8991_MCLK_DIV_MASK; 1048 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div); 1049 break; 1050 case WM8991_DACCLK_DIV: 1051 reg = snd_soc_read(codec, WM8991_CLOCKING_2) & 1052 ~WM8991_DAC_CLKDIV_MASK; 1053 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div); 1054 break; 1055 case WM8991_ADCCLK_DIV: 1056 reg = snd_soc_read(codec, WM8991_CLOCKING_2) & 1057 ~WM8991_ADC_CLKDIV_MASK; 1058 snd_soc_write(codec, WM8991_CLOCKING_2, reg | div); 1059 break; 1060 case WM8991_BCLK_DIV: 1061 reg = snd_soc_read(codec, WM8991_CLOCKING_1) & 1062 ~WM8991_BCLK_DIV_MASK; 1063 snd_soc_write(codec, WM8991_CLOCKING_1, reg | div); 1064 break; 1065 default: 1066 return -EINVAL; 1067 } 1068 1069 return 0; 1070 } 1071 1072 /* 1073 * Set PCM DAI bit size and sample rate. 1074 */ 1075 static int wm8991_hw_params(struct snd_pcm_substream *substream, 1076 struct snd_pcm_hw_params *params, 1077 struct snd_soc_dai *dai) 1078 { 1079 struct snd_soc_codec *codec = dai->codec; 1080 u16 audio1 = snd_soc_read(codec, WM8991_AUDIO_INTERFACE_1); 1081 1082 audio1 &= ~WM8991_AIF_WL_MASK; 1083 /* bit size */ 1084 switch (params_width(params)) { 1085 case 16: 1086 break; 1087 case 20: 1088 audio1 |= WM8991_AIF_WL_20BITS; 1089 break; 1090 case 24: 1091 audio1 |= WM8991_AIF_WL_24BITS; 1092 break; 1093 case 32: 1094 audio1 |= WM8991_AIF_WL_32BITS; 1095 break; 1096 } 1097 1098 snd_soc_write(codec, WM8991_AUDIO_INTERFACE_1, audio1); 1099 return 0; 1100 } 1101 1102 static int wm8991_mute(struct snd_soc_dai *dai, int mute) 1103 { 1104 struct snd_soc_codec *codec = dai->codec; 1105 u16 val; 1106 1107 val = snd_soc_read(codec, WM8991_DAC_CTRL) & ~WM8991_DAC_MUTE; 1108 if (mute) 1109 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE); 1110 else 1111 snd_soc_write(codec, WM8991_DAC_CTRL, val); 1112 return 0; 1113 } 1114 1115 static int wm8991_set_bias_level(struct snd_soc_codec *codec, 1116 enum snd_soc_bias_level level) 1117 { 1118 struct wm8991_priv *wm8991 = snd_soc_codec_get_drvdata(codec); 1119 u16 val; 1120 1121 switch (level) { 1122 case SND_SOC_BIAS_ON: 1123 break; 1124 1125 case SND_SOC_BIAS_PREPARE: 1126 /* VMID=2*50k */ 1127 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) & 1128 ~WM8991_VMID_MODE_MASK; 1129 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x2); 1130 break; 1131 1132 case SND_SOC_BIAS_STANDBY: 1133 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 1134 regcache_sync(wm8991->regmap); 1135 /* Enable all output discharge bits */ 1136 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE | 1137 WM8991_DIS_RLINE | WM8991_DIS_OUT3 | 1138 WM8991_DIS_OUT4 | WM8991_DIS_LOUT | 1139 WM8991_DIS_ROUT); 1140 1141 /* Enable POBCTRL, SOFT_ST, VMIDTOG and BUFDCOPEN */ 1142 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST | 1143 WM8991_BUFDCOPEN | WM8991_POBCTRL | 1144 WM8991_VMIDTOG); 1145 1146 /* Delay to allow output caps to discharge */ 1147 msleep(300); 1148 1149 /* Disable VMIDTOG */ 1150 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST | 1151 WM8991_BUFDCOPEN | WM8991_POBCTRL); 1152 1153 /* disable all output discharge bits */ 1154 snd_soc_write(codec, WM8991_ANTIPOP1, 0); 1155 1156 /* Enable outputs */ 1157 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1b00); 1158 1159 msleep(50); 1160 1161 /* Enable VMID at 2x50k */ 1162 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f02); 1163 1164 msleep(100); 1165 1166 /* Enable VREF */ 1167 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03); 1168 1169 msleep(600); 1170 1171 /* Enable BUFIOEN */ 1172 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST | 1173 WM8991_BUFDCOPEN | WM8991_POBCTRL | 1174 WM8991_BUFIOEN); 1175 1176 /* Disable outputs */ 1177 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x3); 1178 1179 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 1180 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_BUFIOEN); 1181 } 1182 1183 /* VMID=2*250k */ 1184 val = snd_soc_read(codec, WM8991_POWER_MANAGEMENT_1) & 1185 ~WM8991_VMID_MODE_MASK; 1186 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, val | 0x4); 1187 break; 1188 1189 case SND_SOC_BIAS_OFF: 1190 /* Enable POBCTRL and SOFT_ST */ 1191 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST | 1192 WM8991_POBCTRL | WM8991_BUFIOEN); 1193 1194 /* Enable POBCTRL, SOFT_ST and BUFDCOPEN */ 1195 snd_soc_write(codec, WM8991_ANTIPOP2, WM8991_SOFTST | 1196 WM8991_BUFDCOPEN | WM8991_POBCTRL | 1197 WM8991_BUFIOEN); 1198 1199 /* mute DAC */ 1200 val = snd_soc_read(codec, WM8991_DAC_CTRL); 1201 snd_soc_write(codec, WM8991_DAC_CTRL, val | WM8991_DAC_MUTE); 1202 1203 /* Enable any disabled outputs */ 1204 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f03); 1205 1206 /* Disable VMID */ 1207 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x1f01); 1208 1209 msleep(300); 1210 1211 /* Enable all output discharge bits */ 1212 snd_soc_write(codec, WM8991_ANTIPOP1, WM8991_DIS_LLINE | 1213 WM8991_DIS_RLINE | WM8991_DIS_OUT3 | 1214 WM8991_DIS_OUT4 | WM8991_DIS_LOUT | 1215 WM8991_DIS_ROUT); 1216 1217 /* Disable VREF */ 1218 snd_soc_write(codec, WM8991_POWER_MANAGEMENT_1, 0x0); 1219 1220 /* disable POBCTRL, SOFT_ST and BUFDCOPEN */ 1221 snd_soc_write(codec, WM8991_ANTIPOP2, 0x0); 1222 regcache_mark_dirty(wm8991->regmap); 1223 break; 1224 } 1225 1226 codec->dapm.bias_level = level; 1227 return 0; 1228 } 1229 1230 #define WM8991_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 1231 SNDRV_PCM_FMTBIT_S24_LE) 1232 1233 static const struct snd_soc_dai_ops wm8991_ops = { 1234 .hw_params = wm8991_hw_params, 1235 .digital_mute = wm8991_mute, 1236 .set_fmt = wm8991_set_dai_fmt, 1237 .set_clkdiv = wm8991_set_dai_clkdiv, 1238 .set_pll = wm8991_set_dai_pll 1239 }; 1240 1241 /* 1242 * The WM8991 supports 2 different and mutually exclusive DAI 1243 * configurations. 1244 * 1245 * 1. ADC/DAC on Primary Interface 1246 * 2. ADC on Primary Interface/DAC on secondary 1247 */ 1248 static struct snd_soc_dai_driver wm8991_dai = { 1249 /* ADC/DAC on primary */ 1250 .name = "wm8991", 1251 .id = 1, 1252 .playback = { 1253 .stream_name = "Playback", 1254 .channels_min = 1, 1255 .channels_max = 2, 1256 .rates = SNDRV_PCM_RATE_8000_96000, 1257 .formats = WM8991_FORMATS 1258 }, 1259 .capture = { 1260 .stream_name = "Capture", 1261 .channels_min = 1, 1262 .channels_max = 2, 1263 .rates = SNDRV_PCM_RATE_8000_96000, 1264 .formats = WM8991_FORMATS 1265 }, 1266 .ops = &wm8991_ops 1267 }; 1268 1269 static struct snd_soc_codec_driver soc_codec_dev_wm8991 = { 1270 .set_bias_level = wm8991_set_bias_level, 1271 .suspend_bias_off = true, 1272 1273 .controls = wm8991_snd_controls, 1274 .num_controls = ARRAY_SIZE(wm8991_snd_controls), 1275 .dapm_widgets = wm8991_dapm_widgets, 1276 .num_dapm_widgets = ARRAY_SIZE(wm8991_dapm_widgets), 1277 .dapm_routes = wm8991_dapm_routes, 1278 .num_dapm_routes = ARRAY_SIZE(wm8991_dapm_routes), 1279 }; 1280 1281 static const struct regmap_config wm8991_regmap = { 1282 .reg_bits = 8, 1283 .val_bits = 16, 1284 1285 .max_register = WM8991_PLL3, 1286 .volatile_reg = wm8991_volatile, 1287 .reg_defaults = wm8991_reg_defaults, 1288 .num_reg_defaults = ARRAY_SIZE(wm8991_reg_defaults), 1289 .cache_type = REGCACHE_RBTREE, 1290 }; 1291 1292 static int wm8991_i2c_probe(struct i2c_client *i2c, 1293 const struct i2c_device_id *id) 1294 { 1295 struct wm8991_priv *wm8991; 1296 unsigned int val; 1297 int ret; 1298 1299 wm8991 = devm_kzalloc(&i2c->dev, sizeof(*wm8991), GFP_KERNEL); 1300 if (!wm8991) 1301 return -ENOMEM; 1302 1303 wm8991->regmap = devm_regmap_init_i2c(i2c, &wm8991_regmap); 1304 if (IS_ERR(wm8991->regmap)) 1305 return PTR_ERR(wm8991->regmap); 1306 1307 i2c_set_clientdata(i2c, wm8991); 1308 1309 ret = regmap_read(wm8991->regmap, WM8991_RESET, &val); 1310 if (ret != 0) { 1311 dev_err(&i2c->dev, "Failed to read device ID: %d\n", ret); 1312 return ret; 1313 } 1314 if (val != 0x8991) { 1315 dev_err(&i2c->dev, "Device with ID %x is not a WM8991\n", val); 1316 return -EINVAL; 1317 } 1318 1319 ret = regmap_write(wm8991->regmap, WM8991_RESET, 0); 1320 if (ret < 0) { 1321 dev_err(&i2c->dev, "Failed to issue reset: %d\n", ret); 1322 return ret; 1323 } 1324 1325 regmap_update_bits(wm8991->regmap, WM8991_AUDIO_INTERFACE_4, 1326 WM8991_ALRCGPIO1, WM8991_ALRCGPIO1); 1327 1328 regmap_update_bits(wm8991->regmap, WM8991_GPIO1_GPIO2, 1329 WM8991_GPIO1_SEL_MASK, 1); 1330 1331 regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_1, 1332 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK, 1333 WM8991_VREF_ENA | WM8991_VMID_MODE_MASK); 1334 1335 regmap_update_bits(wm8991->regmap, WM8991_POWER_MANAGEMENT_2, 1336 WM8991_OPCLK_ENA, WM8991_OPCLK_ENA); 1337 1338 regmap_write(wm8991->regmap, WM8991_DAC_CTRL, 0); 1339 regmap_write(wm8991->regmap, WM8991_LEFT_OUTPUT_VOLUME, 1340 0x50 | (1<<8)); 1341 regmap_write(wm8991->regmap, WM8991_RIGHT_OUTPUT_VOLUME, 1342 0x50 | (1<<8)); 1343 1344 ret = snd_soc_register_codec(&i2c->dev, 1345 &soc_codec_dev_wm8991, &wm8991_dai, 1); 1346 1347 return ret; 1348 } 1349 1350 static int wm8991_i2c_remove(struct i2c_client *client) 1351 { 1352 snd_soc_unregister_codec(&client->dev); 1353 1354 return 0; 1355 } 1356 1357 static const struct i2c_device_id wm8991_i2c_id[] = { 1358 { "wm8991", 0 }, 1359 { } 1360 }; 1361 MODULE_DEVICE_TABLE(i2c, wm8991_i2c_id); 1362 1363 static struct i2c_driver wm8991_i2c_driver = { 1364 .driver = { 1365 .name = "wm8991", 1366 .owner = THIS_MODULE, 1367 }, 1368 .probe = wm8991_i2c_probe, 1369 .remove = wm8991_i2c_remove, 1370 .id_table = wm8991_i2c_id, 1371 }; 1372 1373 module_i2c_driver(wm8991_i2c_driver); 1374 1375 MODULE_DESCRIPTION("ASoC WM8991 driver"); 1376 MODULE_AUTHOR("Graeme Gregory"); 1377 MODULE_LICENSE("GPL"); 1378