1f10485e7SMark Brown /* 2f10485e7SMark Brown * wm8990.h -- audio driver for WM8990 3f10485e7SMark Brown * 4f10485e7SMark Brown * Copyright 2007 Wolfson Microelectronics PLC. 5f10485e7SMark Brown * Author: Graeme Gregory 6f10485e7SMark Brown * graeme.gregory@wolfsonmicro.com or linux@wolfsonmicro.com 7f10485e7SMark Brown * 8f10485e7SMark Brown * This program is free software; you can redistribute it and/or modify it 9f10485e7SMark Brown * under the terms of the GNU General Public License as published by the 10f10485e7SMark Brown * Free Software Foundation; either version 2 of the License, or (at your 11f10485e7SMark Brown * option) any later version. 12f10485e7SMark Brown * 13f10485e7SMark Brown */ 14f10485e7SMark Brown 15f10485e7SMark Brown #ifndef __WM8990REGISTERDEFS_H__ 16f10485e7SMark Brown #define __WM8990REGISTERDEFS_H__ 17f10485e7SMark Brown 18f10485e7SMark Brown /* 19f10485e7SMark Brown * Register values. 20f10485e7SMark Brown */ 21f10485e7SMark Brown #define WM8990_RESET 0x00 22f10485e7SMark Brown #define WM8990_POWER_MANAGEMENT_1 0x01 23f10485e7SMark Brown #define WM8990_POWER_MANAGEMENT_2 0x02 24f10485e7SMark Brown #define WM8990_POWER_MANAGEMENT_3 0x03 25f10485e7SMark Brown #define WM8990_AUDIO_INTERFACE_1 0x04 26f10485e7SMark Brown #define WM8990_AUDIO_INTERFACE_2 0x05 27f10485e7SMark Brown #define WM8990_CLOCKING_1 0x06 28f10485e7SMark Brown #define WM8990_CLOCKING_2 0x07 29f10485e7SMark Brown #define WM8990_AUDIO_INTERFACE_3 0x08 30f10485e7SMark Brown #define WM8990_AUDIO_INTERFACE_4 0x09 31f10485e7SMark Brown #define WM8990_DAC_CTRL 0x0A 32f10485e7SMark Brown #define WM8990_LEFT_DAC_DIGITAL_VOLUME 0x0B 33f10485e7SMark Brown #define WM8990_RIGHT_DAC_DIGITAL_VOLUME 0x0C 34f10485e7SMark Brown #define WM8990_DIGITAL_SIDE_TONE 0x0D 35f10485e7SMark Brown #define WM8990_ADC_CTRL 0x0E 36f10485e7SMark Brown #define WM8990_LEFT_ADC_DIGITAL_VOLUME 0x0F 37f10485e7SMark Brown #define WM8990_RIGHT_ADC_DIGITAL_VOLUME 0x10 38f10485e7SMark Brown #define WM8990_GPIO_CTRL_1 0x12 39f10485e7SMark Brown #define WM8990_GPIO1_GPIO2 0x13 40f10485e7SMark Brown #define WM8990_GPIO3_GPIO4 0x14 41f10485e7SMark Brown #define WM8990_GPIO5_GPIO6 0x15 42f10485e7SMark Brown #define WM8990_GPIOCTRL_2 0x16 43f10485e7SMark Brown #define WM8990_GPIO_POL 0x17 44f10485e7SMark Brown #define WM8990_LEFT_LINE_INPUT_1_2_VOLUME 0x18 45f10485e7SMark Brown #define WM8990_LEFT_LINE_INPUT_3_4_VOLUME 0x19 46f10485e7SMark Brown #define WM8990_RIGHT_LINE_INPUT_1_2_VOLUME 0x1A 47f10485e7SMark Brown #define WM8990_RIGHT_LINE_INPUT_3_4_VOLUME 0x1B 48f10485e7SMark Brown #define WM8990_LEFT_OUTPUT_VOLUME 0x1C 49f10485e7SMark Brown #define WM8990_RIGHT_OUTPUT_VOLUME 0x1D 50f10485e7SMark Brown #define WM8990_LINE_OUTPUTS_VOLUME 0x1E 51f10485e7SMark Brown #define WM8990_OUT3_4_VOLUME 0x1F 52f10485e7SMark Brown #define WM8990_LEFT_OPGA_VOLUME 0x20 53f10485e7SMark Brown #define WM8990_RIGHT_OPGA_VOLUME 0x21 54f10485e7SMark Brown #define WM8990_SPEAKER_VOLUME 0x22 55f10485e7SMark Brown #define WM8990_CLASSD1 0x23 56f10485e7SMark Brown #define WM8990_CLASSD3 0x25 57f10485e7SMark Brown #define WM8990_INPUT_MIXER1 0x27 58f10485e7SMark Brown #define WM8990_INPUT_MIXER2 0x28 59f10485e7SMark Brown #define WM8990_INPUT_MIXER3 0x29 60f10485e7SMark Brown #define WM8990_INPUT_MIXER4 0x2A 61f10485e7SMark Brown #define WM8990_INPUT_MIXER5 0x2B 62f10485e7SMark Brown #define WM8990_INPUT_MIXER6 0x2C 63f10485e7SMark Brown #define WM8990_OUTPUT_MIXER1 0x2D 64f10485e7SMark Brown #define WM8990_OUTPUT_MIXER2 0x2E 65f10485e7SMark Brown #define WM8990_OUTPUT_MIXER3 0x2F 66f10485e7SMark Brown #define WM8990_OUTPUT_MIXER4 0x30 67f10485e7SMark Brown #define WM8990_OUTPUT_MIXER5 0x31 68f10485e7SMark Brown #define WM8990_OUTPUT_MIXER6 0x32 69f10485e7SMark Brown #define WM8990_OUT3_4_MIXER 0x33 70f10485e7SMark Brown #define WM8990_LINE_MIXER1 0x34 71f10485e7SMark Brown #define WM8990_LINE_MIXER2 0x35 72f10485e7SMark Brown #define WM8990_SPEAKER_MIXER 0x36 73f10485e7SMark Brown #define WM8990_ADDITIONAL_CONTROL 0x37 74f10485e7SMark Brown #define WM8990_ANTIPOP1 0x38 75f10485e7SMark Brown #define WM8990_ANTIPOP2 0x39 76f10485e7SMark Brown #define WM8990_MICBIAS 0x3A 77f10485e7SMark Brown #define WM8990_PLL1 0x3C 78f10485e7SMark Brown #define WM8990_PLL2 0x3D 79f10485e7SMark Brown #define WM8990_PLL3 0x3E 80f10485e7SMark Brown #define WM8990_INTDRIVBITS 0x3F 81f10485e7SMark Brown 82f10485e7SMark Brown #define WM8990_REGISTER_COUNT 60 83f10485e7SMark Brown #define WM8990_MAX_REGISTER 0x3F 84f10485e7SMark Brown 85f10485e7SMark Brown /* 86f10485e7SMark Brown * Field Definitions. 87f10485e7SMark Brown */ 88f10485e7SMark Brown 89f10485e7SMark Brown /* 90f10485e7SMark Brown * R0 (0x00) - Reset 91f10485e7SMark Brown */ 92f10485e7SMark Brown #define WM8990_SW_RESET_CHIP_ID_MASK 0xFFFF /* SW_RESET_CHIP_ID */ 93f10485e7SMark Brown 94f10485e7SMark Brown /* 95f10485e7SMark Brown * R1 (0x01) - Power Management (1) 96f10485e7SMark Brown */ 97f10485e7SMark Brown #define WM8990_SPK_ENA 0x1000 /* SPK_ENA */ 98f10485e7SMark Brown #define WM8990_SPK_ENA_BIT 12 99f10485e7SMark Brown #define WM8990_OUT3_ENA 0x0800 /* OUT3_ENA */ 100f10485e7SMark Brown #define WM8990_OUT3_ENA_BIT 11 101f10485e7SMark Brown #define WM8990_OUT4_ENA 0x0400 /* OUT4_ENA */ 102f10485e7SMark Brown #define WM8990_OUT4_ENA_BIT 10 103f10485e7SMark Brown #define WM8990_LOUT_ENA 0x0200 /* LOUT_ENA */ 104f10485e7SMark Brown #define WM8990_LOUT_ENA_BIT 9 105f10485e7SMark Brown #define WM8990_ROUT_ENA 0x0100 /* ROUT_ENA */ 106f10485e7SMark Brown #define WM8990_ROUT_ENA_BIT 8 107f10485e7SMark Brown #define WM8990_MICBIAS_ENA 0x0010 /* MICBIAS_ENA */ 108f10485e7SMark Brown #define WM8990_MICBIAS_ENA_BIT 4 109f10485e7SMark Brown #define WM8990_VMID_MODE_MASK 0x0006 /* VMID_MODE - [2:1] */ 110f10485e7SMark Brown #define WM8990_VREF_ENA 0x0001 /* VREF_ENA */ 111f10485e7SMark Brown #define WM8990_VREF_ENA_BIT 0 112f10485e7SMark Brown 113f10485e7SMark Brown /* 114f10485e7SMark Brown * R2 (0x02) - Power Management (2) 115f10485e7SMark Brown */ 116f10485e7SMark Brown #define WM8990_PLL_ENA 0x8000 /* PLL_ENA */ 117f10485e7SMark Brown #define WM8990_PLL_ENA_BIT 15 118f10485e7SMark Brown #define WM8990_TSHUT_ENA 0x4000 /* TSHUT_ENA */ 119f10485e7SMark Brown #define WM8990_TSHUT_ENA_BIT 14 120f10485e7SMark Brown #define WM8990_TSHUT_OPDIS 0x2000 /* TSHUT_OPDIS */ 121f10485e7SMark Brown #define WM8990_TSHUT_OPDIS_BIT 13 122f10485e7SMark Brown #define WM8990_OPCLK_ENA 0x0800 /* OPCLK_ENA */ 123f10485e7SMark Brown #define WM8990_OPCLK_ENA_BIT 11 124f10485e7SMark Brown #define WM8990_AINL_ENA 0x0200 /* AINL_ENA */ 125f10485e7SMark Brown #define WM8990_AINL_ENA_BIT 9 126f10485e7SMark Brown #define WM8990_AINR_ENA 0x0100 /* AINR_ENA */ 127f10485e7SMark Brown #define WM8990_AINR_ENA_BIT 8 128f10485e7SMark Brown #define WM8990_LIN34_ENA 0x0080 /* LIN34_ENA */ 129f10485e7SMark Brown #define WM8990_LIN34_ENA_BIT 7 130f10485e7SMark Brown #define WM8990_LIN12_ENA 0x0040 /* LIN12_ENA */ 131f10485e7SMark Brown #define WM8990_LIN12_ENA_BIT 6 132f10485e7SMark Brown #define WM8990_RIN34_ENA 0x0020 /* RIN34_ENA */ 133f10485e7SMark Brown #define WM8990_RIN34_ENA_BIT 5 134f10485e7SMark Brown #define WM8990_RIN12_ENA 0x0010 /* RIN12_ENA */ 135f10485e7SMark Brown #define WM8990_RIN12_ENA_BIT 4 136f10485e7SMark Brown #define WM8990_ADCL_ENA 0x0002 /* ADCL_ENA */ 137f10485e7SMark Brown #define WM8990_ADCL_ENA_BIT 1 138f10485e7SMark Brown #define WM8990_ADCR_ENA 0x0001 /* ADCR_ENA */ 139f10485e7SMark Brown #define WM8990_ADCR_ENA_BIT 0 140f10485e7SMark Brown 141f10485e7SMark Brown /* 142f10485e7SMark Brown * R3 (0x03) - Power Management (3) 143f10485e7SMark Brown */ 144f10485e7SMark Brown #define WM8990_LON_ENA 0x2000 /* LON_ENA */ 145f10485e7SMark Brown #define WM8990_LON_ENA_BIT 13 146f10485e7SMark Brown #define WM8990_LOP_ENA 0x1000 /* LOP_ENA */ 147f10485e7SMark Brown #define WM8990_LOP_ENA_BIT 12 148f10485e7SMark Brown #define WM8990_RON_ENA 0x0800 /* RON_ENA */ 149f10485e7SMark Brown #define WM8990_RON_ENA_BIT 11 150f10485e7SMark Brown #define WM8990_ROP_ENA 0x0400 /* ROP_ENA */ 151f10485e7SMark Brown #define WM8990_ROP_ENA_BIT 10 152f10485e7SMark Brown #define WM8990_LOPGA_ENA 0x0080 /* LOPGA_ENA */ 153f10485e7SMark Brown #define WM8990_LOPGA_ENA_BIT 7 154f10485e7SMark Brown #define WM8990_ROPGA_ENA 0x0040 /* ROPGA_ENA */ 155f10485e7SMark Brown #define WM8990_ROPGA_ENA_BIT 6 156f10485e7SMark Brown #define WM8990_LOMIX_ENA 0x0020 /* LOMIX_ENA */ 157f10485e7SMark Brown #define WM8990_LOMIX_ENA_BIT 5 158f10485e7SMark Brown #define WM8990_ROMIX_ENA 0x0010 /* ROMIX_ENA */ 159f10485e7SMark Brown #define WM8990_ROMIX_ENA_BIT 4 160f10485e7SMark Brown #define WM8990_DACL_ENA 0x0002 /* DACL_ENA */ 161f10485e7SMark Brown #define WM8990_DACL_ENA_BIT 1 162f10485e7SMark Brown #define WM8990_DACR_ENA 0x0001 /* DACR_ENA */ 163f10485e7SMark Brown #define WM8990_DACR_ENA_BIT 0 164f10485e7SMark Brown 165f10485e7SMark Brown /* 166f10485e7SMark Brown * R4 (0x04) - Audio Interface (1) 167f10485e7SMark Brown */ 168f10485e7SMark Brown #define WM8990_AIFADCL_SRC 0x8000 /* AIFADCL_SRC */ 169f10485e7SMark Brown #define WM8990_AIFADCR_SRC 0x4000 /* AIFADCR_SRC */ 170f10485e7SMark Brown #define WM8990_AIFADC_TDM 0x2000 /* AIFADC_TDM */ 171f10485e7SMark Brown #define WM8990_AIFADC_TDM_CHAN 0x1000 /* AIFADC_TDM_CHAN */ 172f10485e7SMark Brown #define WM8990_AIF_BCLK_INV 0x0100 /* AIF_BCLK_INV */ 173f10485e7SMark Brown #define WM8990_AIF_LRCLK_INV 0x0080 /* AIF_LRCLK_INV */ 174f10485e7SMark Brown #define WM8990_AIF_WL_MASK 0x0060 /* AIF_WL - [6:5] */ 175f10485e7SMark Brown #define WM8990_AIF_WL_16BITS (0 << 5) 176f10485e7SMark Brown #define WM8990_AIF_WL_20BITS (1 << 5) 177f10485e7SMark Brown #define WM8990_AIF_WL_24BITS (2 << 5) 178f10485e7SMark Brown #define WM8990_AIF_WL_32BITS (3 << 5) 179f10485e7SMark Brown #define WM8990_AIF_FMT_MASK 0x0018 /* AIF_FMT - [4:3] */ 180f10485e7SMark Brown #define WM8990_AIF_TMF_RIGHTJ (0 << 3) 181f10485e7SMark Brown #define WM8990_AIF_TMF_LEFTJ (1 << 3) 182f10485e7SMark Brown #define WM8990_AIF_TMF_I2S (2 << 3) 183f10485e7SMark Brown #define WM8990_AIF_TMF_DSP (3 << 3) 184f10485e7SMark Brown 185f10485e7SMark Brown /* 186f10485e7SMark Brown * R5 (0x05) - Audio Interface (2) 187f10485e7SMark Brown */ 188f10485e7SMark Brown #define WM8990_DACL_SRC 0x8000 /* DACL_SRC */ 189f10485e7SMark Brown #define WM8990_DACR_SRC 0x4000 /* DACR_SRC */ 190f10485e7SMark Brown #define WM8990_AIFDAC_TDM 0x2000 /* AIFDAC_TDM */ 191f10485e7SMark Brown #define WM8990_AIFDAC_TDM_CHAN 0x1000 /* AIFDAC_TDM_CHAN */ 192f10485e7SMark Brown #define WM8990_DAC_BOOST_MASK 0x0C00 /* DAC_BOOST */ 193f10485e7SMark Brown #define WM8990_DAC_COMP 0x0010 /* DAC_COMP */ 194f10485e7SMark Brown #define WM8990_DAC_COMPMODE 0x0008 /* DAC_COMPMODE */ 195f10485e7SMark Brown #define WM8990_ADC_COMP 0x0004 /* ADC_COMP */ 196f10485e7SMark Brown #define WM8990_ADC_COMPMODE 0x0002 /* ADC_COMPMODE */ 197f10485e7SMark Brown #define WM8990_LOOPBACK 0x0001 /* LOOPBACK */ 198f10485e7SMark Brown 199f10485e7SMark Brown /* 200f10485e7SMark Brown * R6 (0x06) - Clocking (1) 201f10485e7SMark Brown */ 202f10485e7SMark Brown #define WM8990_TOCLK_RATE 0x8000 /* TOCLK_RATE */ 203f10485e7SMark Brown #define WM8990_TOCLK_ENA 0x4000 /* TOCLK_ENA */ 204f10485e7SMark Brown #define WM8990_OPCLKDIV_MASK 0x1E00 /* OPCLKDIV - [12:9] */ 205f10485e7SMark Brown #define WM8990_DCLKDIV_MASK 0x01C0 /* DCLKDIV - [8:6] */ 206f10485e7SMark Brown #define WM8990_BCLK_DIV_MASK 0x001E /* BCLK_DIV - [4:1] */ 207f10485e7SMark Brown #define WM8990_BCLK_DIV_1 (0x0 << 1) 208f10485e7SMark Brown #define WM8990_BCLK_DIV_1_5 (0x1 << 1) 209f10485e7SMark Brown #define WM8990_BCLK_DIV_2 (0x2 << 1) 210f10485e7SMark Brown #define WM8990_BCLK_DIV_3 (0x3 << 1) 211f10485e7SMark Brown #define WM8990_BCLK_DIV_4 (0x4 << 1) 212f10485e7SMark Brown #define WM8990_BCLK_DIV_5_5 (0x5 << 1) 213f10485e7SMark Brown #define WM8990_BCLK_DIV_6 (0x6 << 1) 214f10485e7SMark Brown #define WM8990_BCLK_DIV_8 (0x7 << 1) 215f10485e7SMark Brown #define WM8990_BCLK_DIV_11 (0x8 << 1) 216f10485e7SMark Brown #define WM8990_BCLK_DIV_12 (0x9 << 1) 217f10485e7SMark Brown #define WM8990_BCLK_DIV_16 (0xA << 1) 218f10485e7SMark Brown #define WM8990_BCLK_DIV_22 (0xB << 1) 219f10485e7SMark Brown #define WM8990_BCLK_DIV_24 (0xC << 1) 220f10485e7SMark Brown #define WM8990_BCLK_DIV_32 (0xD << 1) 221f10485e7SMark Brown #define WM8990_BCLK_DIV_44 (0xE << 1) 222f10485e7SMark Brown #define WM8990_BCLK_DIV_48 (0xF << 1) 223f10485e7SMark Brown 224f10485e7SMark Brown /* 225f10485e7SMark Brown * R7 (0x07) - Clocking (2) 226f10485e7SMark Brown */ 227f10485e7SMark Brown #define WM8990_MCLK_SRC 0x8000 /* MCLK_SRC */ 228f10485e7SMark Brown #define WM8990_SYSCLK_SRC 0x4000 /* SYSCLK_SRC */ 229f10485e7SMark Brown #define WM8990_CLK_FORCE 0x2000 /* CLK_FORCE */ 230f10485e7SMark Brown #define WM8990_MCLK_DIV_MASK 0x1800 /* MCLK_DIV - [12:11] */ 231f10485e7SMark Brown #define WM8990_MCLK_DIV_1 (0 << 11) 232f10485e7SMark Brown #define WM8990_MCLK_DIV_2 (2 << 11) 233f10485e7SMark Brown #define WM8990_MCLK_INV 0x0400 /* MCLK_INV */ 234f10485e7SMark Brown #define WM8990_ADC_CLKDIV_MASK 0x00E0 /* ADC_CLKDIV */ 235f10485e7SMark Brown #define WM8990_ADC_CLKDIV_1 (0 << 5) 236f10485e7SMark Brown #define WM8990_ADC_CLKDIV_1_5 (1 << 5) 237f10485e7SMark Brown #define WM8990_ADC_CLKDIV_2 (2 << 5) 238f10485e7SMark Brown #define WM8990_ADC_CLKDIV_3 (3 << 5) 239f10485e7SMark Brown #define WM8990_ADC_CLKDIV_4 (4 << 5) 240f10485e7SMark Brown #define WM8990_ADC_CLKDIV_5_5 (5 << 5) 241f10485e7SMark Brown #define WM8990_ADC_CLKDIV_6 (6 << 5) 242f10485e7SMark Brown #define WM8990_DAC_CLKDIV_MASK 0x001C /* DAC_CLKDIV - [4:2] */ 243f10485e7SMark Brown #define WM8990_DAC_CLKDIV_1 (0 << 2) 244f10485e7SMark Brown #define WM8990_DAC_CLKDIV_1_5 (1 << 2) 245f10485e7SMark Brown #define WM8990_DAC_CLKDIV_2 (2 << 2) 246f10485e7SMark Brown #define WM8990_DAC_CLKDIV_3 (3 << 2) 247f10485e7SMark Brown #define WM8990_DAC_CLKDIV_4 (4 << 2) 248f10485e7SMark Brown #define WM8990_DAC_CLKDIV_5_5 (5 << 2) 249f10485e7SMark Brown #define WM8990_DAC_CLKDIV_6 (6 << 2) 250f10485e7SMark Brown 251f10485e7SMark Brown /* 252f10485e7SMark Brown * R8 (0x08) - Audio Interface (3) 253f10485e7SMark Brown */ 254f10485e7SMark Brown #define WM8990_AIF_MSTR1 0x8000 /* AIF_MSTR1 */ 255f10485e7SMark Brown #define WM8990_AIF_MSTR2 0x4000 /* AIF_MSTR2 */ 256f10485e7SMark Brown #define WM8990_AIF_SEL 0x2000 /* AIF_SEL */ 257f10485e7SMark Brown #define WM8990_ADCLRC_DIR 0x0800 /* ADCLRC_DIR */ 258f10485e7SMark Brown #define WM8990_ADCLRC_RATE_MASK 0x07FF /* ADCLRC_RATE */ 259f10485e7SMark Brown 260f10485e7SMark Brown /* 261f10485e7SMark Brown * R9 (0x09) - Audio Interface (4) 262f10485e7SMark Brown */ 263f10485e7SMark Brown #define WM8990_ALRCGPIO1 0x8000 /* ALRCGPIO1 */ 264f10485e7SMark Brown #define WM8990_ALRCBGPIO6 0x4000 /* ALRCBGPIO6 */ 265f10485e7SMark Brown #define WM8990_AIF_TRIS 0x2000 /* AIF_TRIS */ 266f10485e7SMark Brown #define WM8990_DACLRC_DIR 0x0800 /* DACLRC_DIR */ 267f10485e7SMark Brown #define WM8990_DACLRC_RATE_MASK 0x07FF /* DACLRC_RATE */ 268f10485e7SMark Brown 269f10485e7SMark Brown /* 270f10485e7SMark Brown * R10 (0x0A) - DAC CTRL 271f10485e7SMark Brown */ 272f10485e7SMark Brown #define WM8990_AIF_LRCLKRATE 0x0400 /* AIF_LRCLKRATE */ 273f10485e7SMark Brown #define WM8990_DAC_MONO 0x0200 /* DAC_MONO */ 274f10485e7SMark Brown #define WM8990_DAC_SB_FILT 0x0100 /* DAC_SB_FILT */ 275f10485e7SMark Brown #define WM8990_DAC_MUTERATE 0x0080 /* DAC_MUTERATE */ 276f10485e7SMark Brown #define WM8990_DAC_MUTEMODE 0x0040 /* DAC_MUTEMODE */ 277f10485e7SMark Brown #define WM8990_DEEMP_MASK 0x0030 /* DEEMP - [5:4] */ 278f10485e7SMark Brown #define WM8990_DAC_MUTE 0x0004 /* DAC_MUTE */ 279f10485e7SMark Brown #define WM8990_DACL_DATINV 0x0002 /* DACL_DATINV */ 280f10485e7SMark Brown #define WM8990_DACR_DATINV 0x0001 /* DACR_DATINV */ 281f10485e7SMark Brown 282f10485e7SMark Brown /* 283f10485e7SMark Brown * R11 (0x0B) - Left DAC Digital Volume 284f10485e7SMark Brown */ 285f10485e7SMark Brown #define WM8990_DAC_VU 0x0100 /* DAC_VU */ 286f10485e7SMark Brown #define WM8990_DACL_VOL_MASK 0x00FF /* DACL_VOL - [7:0] */ 287f10485e7SMark Brown #define WM8990_DACL_VOL_SHIFT 0 288f10485e7SMark Brown /* 289f10485e7SMark Brown * R12 (0x0C) - Right DAC Digital Volume 290f10485e7SMark Brown */ 291f10485e7SMark Brown #define WM8990_DAC_VU 0x0100 /* DAC_VU */ 292f10485e7SMark Brown #define WM8990_DACR_VOL_MASK 0x00FF /* DACR_VOL - [7:0] */ 293f10485e7SMark Brown #define WM8990_DACR_VOL_SHIFT 0 294f10485e7SMark Brown /* 295f10485e7SMark Brown * R13 (0x0D) - Digital Side Tone 296f10485e7SMark Brown */ 297f10485e7SMark Brown #define WM8990_ADCL_DAC_SVOL_MASK 0x0F /* ADCL_DAC_SVOL */ 298f10485e7SMark Brown #define WM8990_ADCL_DAC_SVOL_SHIFT 9 299f10485e7SMark Brown #define WM8990_ADCR_DAC_SVOL_MASK 0x0F /* ADCR_DAC_SVOL */ 300f10485e7SMark Brown #define WM8990_ADCR_DAC_SVOL_SHIFT 5 301f10485e7SMark Brown #define WM8990_ADC_TO_DACL_MASK 0x03 /* ADC_TO_DACL - [3:2] */ 302f10485e7SMark Brown #define WM8990_ADC_TO_DACL_SHIFT 2 303f10485e7SMark Brown #define WM8990_ADC_TO_DACR_MASK 0x03 /* ADC_TO_DACR - [1:0] */ 304f10485e7SMark Brown #define WM8990_ADC_TO_DACR_SHIFT 0 305f10485e7SMark Brown 306f10485e7SMark Brown /* 307f10485e7SMark Brown * R14 (0x0E) - ADC CTRL 308f10485e7SMark Brown */ 309f10485e7SMark Brown #define WM8990_ADC_HPF_ENA 0x0100 /* ADC_HPF_ENA */ 310f10485e7SMark Brown #define WM8990_ADC_HPF_ENA_BIT 8 311f10485e7SMark Brown #define WM8990_ADC_HPF_CUT_MASK 0x03 /* ADC_HPF_CUT - [6:5] */ 312f10485e7SMark Brown #define WM8990_ADC_HPF_CUT_SHIFT 5 313f10485e7SMark Brown #define WM8990_ADCL_DATINV 0x0002 /* ADCL_DATINV */ 314f10485e7SMark Brown #define WM8990_ADCL_DATINV_BIT 1 315f10485e7SMark Brown #define WM8990_ADCR_DATINV 0x0001 /* ADCR_DATINV */ 316f10485e7SMark Brown #define WM8990_ADCR_DATINV_BIT 0 317f10485e7SMark Brown 318f10485e7SMark Brown /* 319f10485e7SMark Brown * R15 (0x0F) - Left ADC Digital Volume 320f10485e7SMark Brown */ 321f10485e7SMark Brown #define WM8990_ADC_VU 0x0100 /* ADC_VU */ 322f10485e7SMark Brown #define WM8990_ADCL_VOL_MASK 0x00FF /* ADCL_VOL - [7:0] */ 323f10485e7SMark Brown #define WM8990_ADCL_VOL_SHIFT 0 324f10485e7SMark Brown 325f10485e7SMark Brown /* 326f10485e7SMark Brown * R16 (0x10) - Right ADC Digital Volume 327f10485e7SMark Brown */ 328f10485e7SMark Brown #define WM8990_ADC_VU 0x0100 /* ADC_VU */ 329f10485e7SMark Brown #define WM8990_ADCR_VOL_MASK 0x00FF /* ADCR_VOL - [7:0] */ 330f10485e7SMark Brown #define WM8990_ADCR_VOL_SHIFT 0 331f10485e7SMark Brown 332f10485e7SMark Brown /* 333f10485e7SMark Brown * R18 (0x12) - GPIO CTRL 1 334f10485e7SMark Brown */ 335f10485e7SMark Brown #define WM8990_IRQ 0x1000 /* IRQ */ 336f10485e7SMark Brown #define WM8990_TEMPOK 0x0800 /* TEMPOK */ 337f10485e7SMark Brown #define WM8990_MICSHRT 0x0400 /* MICSHRT */ 338f10485e7SMark Brown #define WM8990_MICDET 0x0200 /* MICDET */ 339f10485e7SMark Brown #define WM8990_PLL_LCK 0x0100 /* PLL_LCK */ 340f10485e7SMark Brown #define WM8990_GPI8_STATUS 0x0080 /* GPI8_STATUS */ 341f10485e7SMark Brown #define WM8990_GPI7_STATUS 0x0040 /* GPI7_STATUS */ 342f10485e7SMark Brown #define WM8990_GPIO6_STATUS 0x0020 /* GPIO6_STATUS */ 343f10485e7SMark Brown #define WM8990_GPIO5_STATUS 0x0010 /* GPIO5_STATUS */ 344f10485e7SMark Brown #define WM8990_GPIO4_STATUS 0x0008 /* GPIO4_STATUS */ 345f10485e7SMark Brown #define WM8990_GPIO3_STATUS 0x0004 /* GPIO3_STATUS */ 346f10485e7SMark Brown #define WM8990_GPIO2_STATUS 0x0002 /* GPIO2_STATUS */ 347f10485e7SMark Brown #define WM8990_GPIO1_STATUS 0x0001 /* GPIO1_STATUS */ 348f10485e7SMark Brown 349f10485e7SMark Brown /* 350f10485e7SMark Brown * R19 (0x13) - GPIO1 & GPIO2 351f10485e7SMark Brown */ 352f10485e7SMark Brown #define WM8990_GPIO2_DEB_ENA 0x8000 /* GPIO2_DEB_ENA */ 353f10485e7SMark Brown #define WM8990_GPIO2_IRQ_ENA 0x4000 /* GPIO2_IRQ_ENA */ 354f10485e7SMark Brown #define WM8990_GPIO2_PU 0x2000 /* GPIO2_PU */ 355f10485e7SMark Brown #define WM8990_GPIO2_PD 0x1000 /* GPIO2_PD */ 356f10485e7SMark Brown #define WM8990_GPIO2_SEL_MASK 0x0F00 /* GPIO2_SEL - [11:8] */ 357f10485e7SMark Brown #define WM8990_GPIO1_DEB_ENA 0x0080 /* GPIO1_DEB_ENA */ 358f10485e7SMark Brown #define WM8990_GPIO1_IRQ_ENA 0x0040 /* GPIO1_IRQ_ENA */ 359f10485e7SMark Brown #define WM8990_GPIO1_PU 0x0020 /* GPIO1_PU */ 360f10485e7SMark Brown #define WM8990_GPIO1_PD 0x0010 /* GPIO1_PD */ 361f10485e7SMark Brown #define WM8990_GPIO1_SEL_MASK 0x000F /* GPIO1_SEL - [3:0] */ 362f10485e7SMark Brown 363f10485e7SMark Brown /* 364f10485e7SMark Brown * R20 (0x14) - GPIO3 & GPIO4 365f10485e7SMark Brown */ 366f10485e7SMark Brown #define WM8990_GPIO4_DEB_ENA 0x8000 /* GPIO4_DEB_ENA */ 367f10485e7SMark Brown #define WM8990_GPIO4_IRQ_ENA 0x4000 /* GPIO4_IRQ_ENA */ 368f10485e7SMark Brown #define WM8990_GPIO4_PU 0x2000 /* GPIO4_PU */ 369f10485e7SMark Brown #define WM8990_GPIO4_PD 0x1000 /* GPIO4_PD */ 370f10485e7SMark Brown #define WM8990_GPIO4_SEL_MASK 0x0F00 /* GPIO4_SEL - [11:8] */ 371f10485e7SMark Brown #define WM8990_GPIO3_DEB_ENA 0x0080 /* GPIO3_DEB_ENA */ 372f10485e7SMark Brown #define WM8990_GPIO3_IRQ_ENA 0x0040 /* GPIO3_IRQ_ENA */ 373f10485e7SMark Brown #define WM8990_GPIO3_PU 0x0020 /* GPIO3_PU */ 374f10485e7SMark Brown #define WM8990_GPIO3_PD 0x0010 /* GPIO3_PD */ 375f10485e7SMark Brown #define WM8990_GPIO3_SEL_MASK 0x000F /* GPIO3_SEL - [3:0] */ 376f10485e7SMark Brown 377f10485e7SMark Brown /* 378f10485e7SMark Brown * R21 (0x15) - GPIO5 & GPIO6 379f10485e7SMark Brown */ 380f10485e7SMark Brown #define WM8990_GPIO6_DEB_ENA 0x8000 /* GPIO6_DEB_ENA */ 381f10485e7SMark Brown #define WM8990_GPIO6_IRQ_ENA 0x4000 /* GPIO6_IRQ_ENA */ 382f10485e7SMark Brown #define WM8990_GPIO6_PU 0x2000 /* GPIO6_PU */ 383f10485e7SMark Brown #define WM8990_GPIO6_PD 0x1000 /* GPIO6_PD */ 384f10485e7SMark Brown #define WM8990_GPIO6_SEL_MASK 0x0F00 /* GPIO6_SEL - [11:8] */ 385f10485e7SMark Brown #define WM8990_GPIO5_DEB_ENA 0x0080 /* GPIO5_DEB_ENA */ 386f10485e7SMark Brown #define WM8990_GPIO5_IRQ_ENA 0x0040 /* GPIO5_IRQ_ENA */ 387f10485e7SMark Brown #define WM8990_GPIO5_PU 0x0020 /* GPIO5_PU */ 388f10485e7SMark Brown #define WM8990_GPIO5_PD 0x0010 /* GPIO5_PD */ 389f10485e7SMark Brown #define WM8990_GPIO5_SEL_MASK 0x000F /* GPIO5_SEL - [3:0] */ 390f10485e7SMark Brown 391f10485e7SMark Brown /* 392f10485e7SMark Brown * R22 (0x16) - GPIOCTRL 2 393f10485e7SMark Brown */ 394f10485e7SMark Brown #define WM8990_RD_3W_ENA 0x8000 /* RD_3W_ENA */ 395f10485e7SMark Brown #define WM8990_MODE_3W4W 0x4000 /* MODE_3W4W */ 396f10485e7SMark Brown #define WM8990_TEMPOK_IRQ_ENA 0x0800 /* TEMPOK_IRQ_ENA */ 397f10485e7SMark Brown #define WM8990_MICSHRT_IRQ_ENA 0x0400 /* MICSHRT_IRQ_ENA */ 398f10485e7SMark Brown #define WM8990_MICDET_IRQ_ENA 0x0200 /* MICDET_IRQ_ENA */ 399f10485e7SMark Brown #define WM8990_PLL_LCK_IRQ_ENA 0x0100 /* PLL_LCK_IRQ_ENA */ 400f10485e7SMark Brown #define WM8990_GPI8_DEB_ENA 0x0080 /* GPI8_DEB_ENA */ 401f10485e7SMark Brown #define WM8990_GPI8_IRQ_ENA 0x0040 /* GPI8_IRQ_ENA */ 402f10485e7SMark Brown #define WM8990_GPI8_ENA 0x0010 /* GPI8_ENA */ 403f10485e7SMark Brown #define WM8990_GPI7_DEB_ENA 0x0008 /* GPI7_DEB_ENA */ 404f10485e7SMark Brown #define WM8990_GPI7_IRQ_ENA 0x0004 /* GPI7_IRQ_ENA */ 405f10485e7SMark Brown #define WM8990_GPI7_ENA 0x0001 /* GPI7_ENA */ 406f10485e7SMark Brown 407f10485e7SMark Brown /* 408f10485e7SMark Brown * R23 (0x17) - GPIO_POL 409f10485e7SMark Brown */ 410f10485e7SMark Brown #define WM8990_IRQ_INV 0x1000 /* IRQ_INV */ 411f10485e7SMark Brown #define WM8990_TEMPOK_POL 0x0800 /* TEMPOK_POL */ 412f10485e7SMark Brown #define WM8990_MICSHRT_POL 0x0400 /* MICSHRT_POL */ 413f10485e7SMark Brown #define WM8990_MICDET_POL 0x0200 /* MICDET_POL */ 414f10485e7SMark Brown #define WM8990_PLL_LCK_POL 0x0100 /* PLL_LCK_POL */ 415f10485e7SMark Brown #define WM8990_GPI8_POL 0x0080 /* GPI8_POL */ 416f10485e7SMark Brown #define WM8990_GPI7_POL 0x0040 /* GPI7_POL */ 417f10485e7SMark Brown #define WM8990_GPIO6_POL 0x0020 /* GPIO6_POL */ 418f10485e7SMark Brown #define WM8990_GPIO5_POL 0x0010 /* GPIO5_POL */ 419f10485e7SMark Brown #define WM8990_GPIO4_POL 0x0008 /* GPIO4_POL */ 420f10485e7SMark Brown #define WM8990_GPIO3_POL 0x0004 /* GPIO3_POL */ 421f10485e7SMark Brown #define WM8990_GPIO2_POL 0x0002 /* GPIO2_POL */ 422f10485e7SMark Brown #define WM8990_GPIO1_POL 0x0001 /* GPIO1_POL */ 423f10485e7SMark Brown 424f10485e7SMark Brown /* 425f10485e7SMark Brown * R24 (0x18) - Left Line Input 1&2 Volume 426f10485e7SMark Brown */ 427f10485e7SMark Brown #define WM8990_IPVU 0x0100 /* IPVU */ 428f10485e7SMark Brown #define WM8990_LI12MUTE 0x0080 /* LI12MUTE */ 429f10485e7SMark Brown #define WM8990_LI12MUTE_BIT 7 430f10485e7SMark Brown #define WM8990_LI12ZC 0x0040 /* LI12ZC */ 431f10485e7SMark Brown #define WM8990_LI12ZC_BIT 6 432f10485e7SMark Brown #define WM8990_LIN12VOL_MASK 0x001F /* LIN12VOL - [4:0] */ 433f10485e7SMark Brown #define WM8990_LIN12VOL_SHIFT 0 434f10485e7SMark Brown /* 435f10485e7SMark Brown * R25 (0x19) - Left Line Input 3&4 Volume 436f10485e7SMark Brown */ 437f10485e7SMark Brown #define WM8990_IPVU 0x0100 /* IPVU */ 438f10485e7SMark Brown #define WM8990_LI34MUTE 0x0080 /* LI34MUTE */ 439f10485e7SMark Brown #define WM8990_LI34MUTE_BIT 7 440f10485e7SMark Brown #define WM8990_LI34ZC 0x0040 /* LI34ZC */ 441f10485e7SMark Brown #define WM8990_LI34ZC_BIT 6 442f10485e7SMark Brown #define WM8990_LIN34VOL_MASK 0x001F /* LIN34VOL - [4:0] */ 443f10485e7SMark Brown #define WM8990_LIN34VOL_SHIFT 0 444f10485e7SMark Brown 445f10485e7SMark Brown /* 446f10485e7SMark Brown * R26 (0x1A) - Right Line Input 1&2 Volume 447f10485e7SMark Brown */ 448f10485e7SMark Brown #define WM8990_IPVU 0x0100 /* IPVU */ 449f10485e7SMark Brown #define WM8990_RI12MUTE 0x0080 /* RI12MUTE */ 450f10485e7SMark Brown #define WM8990_RI12MUTE_BIT 7 451f10485e7SMark Brown #define WM8990_RI12ZC 0x0040 /* RI12ZC */ 452f10485e7SMark Brown #define WM8990_RI12ZC_BIT 6 453f10485e7SMark Brown #define WM8990_RIN12VOL_MASK 0x001F /* RIN12VOL - [4:0] */ 454f10485e7SMark Brown #define WM8990_RIN12VOL_SHIFT 0 455f10485e7SMark Brown 456f10485e7SMark Brown /* 457f10485e7SMark Brown * R27 (0x1B) - Right Line Input 3&4 Volume 458f10485e7SMark Brown */ 459f10485e7SMark Brown #define WM8990_IPVU 0x0100 /* IPVU */ 460f10485e7SMark Brown #define WM8990_RI34MUTE 0x0080 /* RI34MUTE */ 461f10485e7SMark Brown #define WM8990_RI34MUTE_BIT 7 462f10485e7SMark Brown #define WM8990_RI34ZC 0x0040 /* RI34ZC */ 463f10485e7SMark Brown #define WM8990_RI34ZC_BIT 6 464f10485e7SMark Brown #define WM8990_RIN34VOL_MASK 0x001F /* RIN34VOL - [4:0] */ 465f10485e7SMark Brown #define WM8990_RIN34VOL_SHIFT 0 466f10485e7SMark Brown 467f10485e7SMark Brown /* 468f10485e7SMark Brown * R28 (0x1C) - Left Output Volume 469f10485e7SMark Brown */ 470f10485e7SMark Brown #define WM8990_OPVU 0x0100 /* OPVU */ 471f10485e7SMark Brown #define WM8990_LOZC 0x0080 /* LOZC */ 472f10485e7SMark Brown #define WM8990_LOZC_BIT 7 473f10485e7SMark Brown #define WM8990_LOUTVOL_MASK 0x007F /* LOUTVOL - [6:0] */ 474f10485e7SMark Brown #define WM8990_LOUTVOL_SHIFT 0 475f10485e7SMark Brown /* 476f10485e7SMark Brown * R29 (0x1D) - Right Output Volume 477f10485e7SMark Brown */ 478f10485e7SMark Brown #define WM8990_OPVU 0x0100 /* OPVU */ 479f10485e7SMark Brown #define WM8990_ROZC 0x0080 /* ROZC */ 480f10485e7SMark Brown #define WM8990_ROZC_BIT 7 481f10485e7SMark Brown #define WM8990_ROUTVOL_MASK 0x007F /* ROUTVOL - [6:0] */ 482f10485e7SMark Brown #define WM8990_ROUTVOL_SHIFT 0 483f10485e7SMark Brown /* 484f10485e7SMark Brown * R30 (0x1E) - Line Outputs Volume 485f10485e7SMark Brown */ 486f10485e7SMark Brown #define WM8990_LONMUTE 0x0040 /* LONMUTE */ 487f10485e7SMark Brown #define WM8990_LONMUTE_BIT 6 488f10485e7SMark Brown #define WM8990_LOPMUTE 0x0020 /* LOPMUTE */ 489f10485e7SMark Brown #define WM8990_LOPMUTE_BIT 5 490f10485e7SMark Brown #define WM8990_LOATTN 0x0010 /* LOATTN */ 491f10485e7SMark Brown #define WM8990_LOATTN_BIT 4 492f10485e7SMark Brown #define WM8990_RONMUTE 0x0004 /* RONMUTE */ 493f10485e7SMark Brown #define WM8990_RONMUTE_BIT 2 494f10485e7SMark Brown #define WM8990_ROPMUTE 0x0002 /* ROPMUTE */ 495f10485e7SMark Brown #define WM8990_ROPMUTE_BIT 1 496f10485e7SMark Brown #define WM8990_ROATTN 0x0001 /* ROATTN */ 497f10485e7SMark Brown #define WM8990_ROATTN_BIT 0 498f10485e7SMark Brown 499f10485e7SMark Brown /* 500f10485e7SMark Brown * R31 (0x1F) - Out3/4 Volume 501f10485e7SMark Brown */ 502f10485e7SMark Brown #define WM8990_OUT3MUTE 0x0020 /* OUT3MUTE */ 503f10485e7SMark Brown #define WM8990_OUT3MUTE_BIT 5 504f10485e7SMark Brown #define WM8990_OUT3ATTN 0x0010 /* OUT3ATTN */ 505f10485e7SMark Brown #define WM8990_OUT3ATTN_BIT 4 506f10485e7SMark Brown #define WM8990_OUT4MUTE 0x0002 /* OUT4MUTE */ 507f10485e7SMark Brown #define WM8990_OUT4MUTE_BIT 1 508f10485e7SMark Brown #define WM8990_OUT4ATTN 0x0001 /* OUT4ATTN */ 509f10485e7SMark Brown #define WM8990_OUT4ATTN_BIT 0 510f10485e7SMark Brown 511f10485e7SMark Brown /* 512f10485e7SMark Brown * R32 (0x20) - Left OPGA Volume 513f10485e7SMark Brown */ 514f10485e7SMark Brown #define WM8990_OPVU 0x0100 /* OPVU */ 515f10485e7SMark Brown #define WM8990_LOPGAZC 0x0080 /* LOPGAZC */ 516f10485e7SMark Brown #define WM8990_LOPGAZC_BIT 7 517f10485e7SMark Brown #define WM8990_LOPGAVOL_MASK 0x007F /* LOPGAVOL - [6:0] */ 518f10485e7SMark Brown #define WM8990_LOPGAVOL_SHIFT 0 519f10485e7SMark Brown 520f10485e7SMark Brown /* 521f10485e7SMark Brown * R33 (0x21) - Right OPGA Volume 522f10485e7SMark Brown */ 523f10485e7SMark Brown #define WM8990_OPVU 0x0100 /* OPVU */ 524f10485e7SMark Brown #define WM8990_ROPGAZC 0x0080 /* ROPGAZC */ 525f10485e7SMark Brown #define WM8990_ROPGAZC_BIT 7 526f10485e7SMark Brown #define WM8990_ROPGAVOL_MASK 0x007F /* ROPGAVOL - [6:0] */ 527f10485e7SMark Brown #define WM8990_ROPGAVOL_SHIFT 0 528f10485e7SMark Brown /* 529f10485e7SMark Brown * R34 (0x22) - Speaker Volume 530f10485e7SMark Brown */ 531f10485e7SMark Brown #define WM8990_SPKVOL_MASK 0x0003 /* SPKVOL - [1:0] */ 532f10485e7SMark Brown #define WM8990_SPKVOL_SHIFT 0 533f10485e7SMark Brown 534f10485e7SMark Brown /* 535f10485e7SMark Brown * R35 (0x23) - ClassD1 536f10485e7SMark Brown */ 537f10485e7SMark Brown #define WM8990_CDMODE 0x0100 /* CDMODE */ 538f10485e7SMark Brown #define WM8990_CDMODE_BIT 8 539f10485e7SMark Brown 540f10485e7SMark Brown /* 541f10485e7SMark Brown * R37 (0x25) - ClassD3 542f10485e7SMark Brown */ 543f10485e7SMark Brown #define WM8990_DCGAIN_MASK 0x0007 /* DCGAIN - [5:3] */ 544f10485e7SMark Brown #define WM8990_DCGAIN_SHIFT 3 545f10485e7SMark Brown #define WM8990_ACGAIN_MASK 0x0007 /* ACGAIN - [2:0] */ 546f10485e7SMark Brown #define WM8990_ACGAIN_SHIFT 0 547f10485e7SMark Brown /* 548f10485e7SMark Brown * R39 (0x27) - Input Mixer1 549f10485e7SMark Brown */ 550f10485e7SMark Brown #define WM8990_AINLMODE_MASK 0x000C /* AINLMODE - [3:2] */ 551f10485e7SMark Brown #define WM8990_AINLMODE_SHIFT 2 552f10485e7SMark Brown #define WM8990_AINRMODE_MASK 0x0003 /* AINRMODE - [1:0] */ 553f10485e7SMark Brown #define WM8990_AINRMODE_SHIFT 0 554f10485e7SMark Brown 555f10485e7SMark Brown /* 556f10485e7SMark Brown * R40 (0x28) - Input Mixer2 557f10485e7SMark Brown */ 558f10485e7SMark Brown #define WM8990_LMP4 0x0080 /* LMP4 */ 559f10485e7SMark Brown #define WM8990_LMP4_BIT 7 /* LMP4 */ 560f10485e7SMark Brown #define WM8990_LMN3 0x0040 /* LMN3 */ 561f10485e7SMark Brown #define WM8990_LMN3_BIT 6 /* LMN3 */ 562f10485e7SMark Brown #define WM8990_LMP2 0x0020 /* LMP2 */ 563f10485e7SMark Brown #define WM8990_LMP2_BIT 5 /* LMP2 */ 564f10485e7SMark Brown #define WM8990_LMN1 0x0010 /* LMN1 */ 565f10485e7SMark Brown #define WM8990_LMN1_BIT 4 /* LMN1 */ 566f10485e7SMark Brown #define WM8990_RMP4 0x0008 /* RMP4 */ 567f10485e7SMark Brown #define WM8990_RMP4_BIT 3 /* RMP4 */ 568f10485e7SMark Brown #define WM8990_RMN3 0x0004 /* RMN3 */ 569f10485e7SMark Brown #define WM8990_RMN3_BIT 2 /* RMN3 */ 570f10485e7SMark Brown #define WM8990_RMP2 0x0002 /* RMP2 */ 571f10485e7SMark Brown #define WM8990_RMP2_BIT 1 /* RMP2 */ 572f10485e7SMark Brown #define WM8990_RMN1 0x0001 /* RMN1 */ 573f10485e7SMark Brown #define WM8990_RMN1_BIT 0 /* RMN1 */ 574f10485e7SMark Brown 575f10485e7SMark Brown /* 576f10485e7SMark Brown * R41 (0x29) - Input Mixer3 577f10485e7SMark Brown */ 578f10485e7SMark Brown #define WM8990_L34MNB 0x0100 /* L34MNB */ 579f10485e7SMark Brown #define WM8990_L34MNB_BIT 8 580f10485e7SMark Brown #define WM8990_L34MNBST 0x0080 /* L34MNBST */ 581f10485e7SMark Brown #define WM8990_L34MNBST_BIT 7 582f10485e7SMark Brown #define WM8990_L12MNB 0x0020 /* L12MNB */ 583f10485e7SMark Brown #define WM8990_L12MNB_BIT 5 584f10485e7SMark Brown #define WM8990_L12MNBST 0x0010 /* L12MNBST */ 585f10485e7SMark Brown #define WM8990_L12MNBST_BIT 4 586f10485e7SMark Brown #define WM8990_LDBVOL_MASK 0x0007 /* LDBVOL - [2:0] */ 587f10485e7SMark Brown #define WM8990_LDBVOL_SHIFT 0 588f10485e7SMark Brown 589f10485e7SMark Brown /* 590f10485e7SMark Brown * R42 (0x2A) - Input Mixer4 591f10485e7SMark Brown */ 592f10485e7SMark Brown #define WM8990_R34MNB 0x0100 /* R34MNB */ 593f10485e7SMark Brown #define WM8990_R34MNB_BIT 8 594f10485e7SMark Brown #define WM8990_R34MNBST 0x0080 /* R34MNBST */ 595f10485e7SMark Brown #define WM8990_R34MNBST_BIT 7 596f10485e7SMark Brown #define WM8990_R12MNB 0x0020 /* R12MNB */ 597f10485e7SMark Brown #define WM8990_R12MNB_BIT 5 598f10485e7SMark Brown #define WM8990_R12MNBST 0x0010 /* R12MNBST */ 599f10485e7SMark Brown #define WM8990_R12MNBST_BIT 4 600f10485e7SMark Brown #define WM8990_RDBVOL_MASK 0x0007 /* RDBVOL - [2:0] */ 601f10485e7SMark Brown #define WM8990_RDBVOL_SHIFT 0 602f10485e7SMark Brown 603f10485e7SMark Brown /* 604f10485e7SMark Brown * R43 (0x2B) - Input Mixer5 605f10485e7SMark Brown */ 606f10485e7SMark Brown #define WM8990_LI2BVOL_MASK 0x07 /* LI2BVOL - [8:6] */ 607f10485e7SMark Brown #define WM8990_LI2BVOL_SHIFT 6 608f10485e7SMark Brown #define WM8990_LR4BVOL_MASK 0x07 /* LR4BVOL - [5:3] */ 609f10485e7SMark Brown #define WM8990_LR4BVOL_SHIFT 3 610f10485e7SMark Brown #define WM8990_LL4BVOL_MASK 0x07 /* LL4BVOL - [2:0] */ 611f10485e7SMark Brown #define WM8990_LL4BVOL_SHIFT 0 612f10485e7SMark Brown 613f10485e7SMark Brown /* 614f10485e7SMark Brown * R44 (0x2C) - Input Mixer6 615f10485e7SMark Brown */ 616f10485e7SMark Brown #define WM8990_RI2BVOL_MASK 0x07 /* RI2BVOL - [8:6] */ 617f10485e7SMark Brown #define WM8990_RI2BVOL_SHIFT 6 618f10485e7SMark Brown #define WM8990_RL4BVOL_MASK 0x07 /* RL4BVOL - [5:3] */ 619f10485e7SMark Brown #define WM8990_RL4BVOL_SHIFT 3 620f10485e7SMark Brown #define WM8990_RR4BVOL_MASK 0x07 /* RR4BVOL - [2:0] */ 621f10485e7SMark Brown #define WM8990_RR4BVOL_SHIFT 0 622f10485e7SMark Brown 623f10485e7SMark Brown /* 624f10485e7SMark Brown * R45 (0x2D) - Output Mixer1 625f10485e7SMark Brown */ 626f10485e7SMark Brown #define WM8990_LRBLO 0x0080 /* LRBLO */ 627f10485e7SMark Brown #define WM8990_LRBLO_BIT 7 628f10485e7SMark Brown #define WM8990_LLBLO 0x0040 /* LLBLO */ 629f10485e7SMark Brown #define WM8990_LLBLO_BIT 6 630f10485e7SMark Brown #define WM8990_LRI3LO 0x0020 /* LRI3LO */ 631f10485e7SMark Brown #define WM8990_LRI3LO_BIT 5 632f10485e7SMark Brown #define WM8990_LLI3LO 0x0010 /* LLI3LO */ 633f10485e7SMark Brown #define WM8990_LLI3LO_BIT 4 634f10485e7SMark Brown #define WM8990_LR12LO 0x0008 /* LR12LO */ 635f10485e7SMark Brown #define WM8990_LR12LO_BIT 3 636f10485e7SMark Brown #define WM8990_LL12LO 0x0004 /* LL12LO */ 637f10485e7SMark Brown #define WM8990_LL12LO_BIT 2 638f10485e7SMark Brown #define WM8990_LDLO 0x0001 /* LDLO */ 639f10485e7SMark Brown #define WM8990_LDLO_BIT 0 640f10485e7SMark Brown 641f10485e7SMark Brown /* 642f10485e7SMark Brown * R46 (0x2E) - Output Mixer2 643f10485e7SMark Brown */ 644f10485e7SMark Brown #define WM8990_RLBRO 0x0080 /* RLBRO */ 645f10485e7SMark Brown #define WM8990_RLBRO_BIT 7 646f10485e7SMark Brown #define WM8990_RRBRO 0x0040 /* RRBRO */ 647f10485e7SMark Brown #define WM8990_RRBRO_BIT 6 648f10485e7SMark Brown #define WM8990_RLI3RO 0x0020 /* RLI3RO */ 649f10485e7SMark Brown #define WM8990_RLI3RO_BIT 5 650f10485e7SMark Brown #define WM8990_RRI3RO 0x0010 /* RRI3RO */ 651f10485e7SMark Brown #define WM8990_RRI3RO_BIT 4 652f10485e7SMark Brown #define WM8990_RL12RO 0x0008 /* RL12RO */ 653f10485e7SMark Brown #define WM8990_RL12RO_BIT 3 654f10485e7SMark Brown #define WM8990_RR12RO 0x0004 /* RR12RO */ 655f10485e7SMark Brown #define WM8990_RR12RO_BIT 2 656f10485e7SMark Brown #define WM8990_RDRO 0x0001 /* RDRO */ 657f10485e7SMark Brown #define WM8990_RDRO_BIT 0 658f10485e7SMark Brown 659f10485e7SMark Brown /* 660f10485e7SMark Brown * R47 (0x2F) - Output Mixer3 661f10485e7SMark Brown */ 662f10485e7SMark Brown #define WM8990_LLI3LOVOL_MASK 0x07 /* LLI3LOVOL - [8:6] */ 663f10485e7SMark Brown #define WM8990_LLI3LOVOL_SHIFT 6 664f10485e7SMark Brown #define WM8990_LR12LOVOL_MASK 0x07 /* LR12LOVOL - [5:3] */ 665f10485e7SMark Brown #define WM8990_LR12LOVOL_SHIFT 3 666f10485e7SMark Brown #define WM8990_LL12LOVOL_MASK 0x07 /* LL12LOVOL - [2:0] */ 667f10485e7SMark Brown #define WM8990_LL12LOVOL_SHIFT 0 668f10485e7SMark Brown 669f10485e7SMark Brown /* 670f10485e7SMark Brown * R48 (0x30) - Output Mixer4 671f10485e7SMark Brown */ 672f10485e7SMark Brown #define WM8990_RRI3ROVOL_MASK 0x07 /* RRI3ROVOL - [8:6] */ 673f10485e7SMark Brown #define WM8990_RRI3ROVOL_SHIFT 6 674f10485e7SMark Brown #define WM8990_RL12ROVOL_MASK 0x07 /* RL12ROVOL - [5:3] */ 675f10485e7SMark Brown #define WM8990_RL12ROVOL_SHIFT 3 676f10485e7SMark Brown #define WM8990_RR12ROVOL_MASK 0x07 /* RR12ROVOL - [2:0] */ 677f10485e7SMark Brown #define WM8990_RR12ROVOL_SHIFT 0 678f10485e7SMark Brown 679f10485e7SMark Brown /* 680f10485e7SMark Brown * R49 (0x31) - Output Mixer5 681f10485e7SMark Brown */ 682f10485e7SMark Brown #define WM8990_LRI3LOVOL_MASK 0x07 /* LRI3LOVOL - [8:6] */ 683f10485e7SMark Brown #define WM8990_LRI3LOVOL_SHIFT 6 684f10485e7SMark Brown #define WM8990_LRBLOVOL_MASK 0x07 /* LRBLOVOL - [5:3] */ 685f10485e7SMark Brown #define WM8990_LRBLOVOL_SHIFT 3 686f10485e7SMark Brown #define WM8990_LLBLOVOL_MASK 0x07 /* LLBLOVOL - [2:0] */ 687f10485e7SMark Brown #define WM8990_LLBLOVOL_SHIFT 0 688f10485e7SMark Brown 689f10485e7SMark Brown /* 690f10485e7SMark Brown * R50 (0x32) - Output Mixer6 691f10485e7SMark Brown */ 692f10485e7SMark Brown #define WM8990_RLI3ROVOL_MASK 0x07 /* RLI3ROVOL - [8:6] */ 693f10485e7SMark Brown #define WM8990_RLI3ROVOL_SHIFT 6 694f10485e7SMark Brown #define WM8990_RLBROVOL_MASK 0x07 /* RLBROVOL - [5:3] */ 695f10485e7SMark Brown #define WM8990_RLBROVOL_SHIFT 3 696f10485e7SMark Brown #define WM8990_RRBROVOL_MASK 0x07 /* RRBROVOL - [2:0] */ 697f10485e7SMark Brown #define WM8990_RRBROVOL_SHIFT 0 698f10485e7SMark Brown 699f10485e7SMark Brown /* 700f10485e7SMark Brown * R51 (0x33) - Out3/4 Mixer 701f10485e7SMark Brown */ 702f10485e7SMark Brown #define WM8990_VSEL_MASK 0x0180 /* VSEL - [8:7] */ 703f10485e7SMark Brown #define WM8990_LI4O3 0x0020 /* LI4O3 */ 704f10485e7SMark Brown #define WM8990_LI4O3_BIT 5 705f10485e7SMark Brown #define WM8990_LPGAO3 0x0010 /* LPGAO3 */ 706f10485e7SMark Brown #define WM8990_LPGAO3_BIT 4 707f10485e7SMark Brown #define WM8990_RI4O4 0x0002 /* RI4O4 */ 708f10485e7SMark Brown #define WM8990_RI4O4_BIT 1 709f10485e7SMark Brown #define WM8990_RPGAO4 0x0001 /* RPGAO4 */ 710f10485e7SMark Brown #define WM8990_RPGAO4_BIT 0 711f10485e7SMark Brown /* 712f10485e7SMark Brown * R52 (0x34) - Line Mixer1 713f10485e7SMark Brown */ 714f10485e7SMark Brown #define WM8990_LLOPGALON 0x0040 /* LLOPGALON */ 715f10485e7SMark Brown #define WM8990_LLOPGALON_BIT 6 716f10485e7SMark Brown #define WM8990_LROPGALON 0x0020 /* LROPGALON */ 717f10485e7SMark Brown #define WM8990_LROPGALON_BIT 5 718f10485e7SMark Brown #define WM8990_LOPLON 0x0010 /* LOPLON */ 719f10485e7SMark Brown #define WM8990_LOPLON_BIT 4 720f10485e7SMark Brown #define WM8990_LR12LOP 0x0004 /* LR12LOP */ 721f10485e7SMark Brown #define WM8990_LR12LOP_BIT 2 722f10485e7SMark Brown #define WM8990_LL12LOP 0x0002 /* LL12LOP */ 723f10485e7SMark Brown #define WM8990_LL12LOP_BIT 1 724f10485e7SMark Brown #define WM8990_LLOPGALOP 0x0001 /* LLOPGALOP */ 725f10485e7SMark Brown #define WM8990_LLOPGALOP_BIT 0 726f10485e7SMark Brown /* 727f10485e7SMark Brown * R53 (0x35) - Line Mixer2 728f10485e7SMark Brown */ 729f10485e7SMark Brown #define WM8990_RROPGARON 0x0040 /* RROPGARON */ 730f10485e7SMark Brown #define WM8990_RROPGARON_BIT 6 731f10485e7SMark Brown #define WM8990_RLOPGARON 0x0020 /* RLOPGARON */ 732f10485e7SMark Brown #define WM8990_RLOPGARON_BIT 5 733f10485e7SMark Brown #define WM8990_ROPRON 0x0010 /* ROPRON */ 734f10485e7SMark Brown #define WM8990_ROPRON_BIT 4 735f10485e7SMark Brown #define WM8990_RL12ROP 0x0004 /* RL12ROP */ 736f10485e7SMark Brown #define WM8990_RL12ROP_BIT 2 737f10485e7SMark Brown #define WM8990_RR12ROP 0x0002 /* RR12ROP */ 738f10485e7SMark Brown #define WM8990_RR12ROP_BIT 1 739f10485e7SMark Brown #define WM8990_RROPGAROP 0x0001 /* RROPGAROP */ 740f10485e7SMark Brown #define WM8990_RROPGAROP_BIT 0 741f10485e7SMark Brown 742f10485e7SMark Brown /* 743f10485e7SMark Brown * R54 (0x36) - Speaker Mixer 744f10485e7SMark Brown */ 745f10485e7SMark Brown #define WM8990_LB2SPK 0x0080 /* LB2SPK */ 746f10485e7SMark Brown #define WM8990_LB2SPK_BIT 7 747f10485e7SMark Brown #define WM8990_RB2SPK 0x0040 /* RB2SPK */ 748f10485e7SMark Brown #define WM8990_RB2SPK_BIT 6 749f10485e7SMark Brown #define WM8990_LI2SPK 0x0020 /* LI2SPK */ 750f10485e7SMark Brown #define WM8990_LI2SPK_BIT 5 751f10485e7SMark Brown #define WM8990_RI2SPK 0x0010 /* RI2SPK */ 752f10485e7SMark Brown #define WM8990_RI2SPK_BIT 4 753f10485e7SMark Brown #define WM8990_LOPGASPK 0x0008 /* LOPGASPK */ 754f10485e7SMark Brown #define WM8990_LOPGASPK_BIT 3 755f10485e7SMark Brown #define WM8990_ROPGASPK 0x0004 /* ROPGASPK */ 756f10485e7SMark Brown #define WM8990_ROPGASPK_BIT 2 757f10485e7SMark Brown #define WM8990_LDSPK 0x0002 /* LDSPK */ 758f10485e7SMark Brown #define WM8990_LDSPK_BIT 1 759f10485e7SMark Brown #define WM8990_RDSPK 0x0001 /* RDSPK */ 760f10485e7SMark Brown #define WM8990_RDSPK_BIT 0 761f10485e7SMark Brown 762f10485e7SMark Brown /* 763f10485e7SMark Brown * R55 (0x37) - Additional Control 764f10485e7SMark Brown */ 765f10485e7SMark Brown #define WM8990_VROI 0x0001 /* VROI */ 766f10485e7SMark Brown 767f10485e7SMark Brown /* 768f10485e7SMark Brown * R56 (0x38) - AntiPOP1 769f10485e7SMark Brown */ 770f10485e7SMark Brown #define WM8990_DIS_LLINE 0x0020 /* DIS_LLINE */ 771f10485e7SMark Brown #define WM8990_DIS_RLINE 0x0010 /* DIS_RLINE */ 772f10485e7SMark Brown #define WM8990_DIS_OUT3 0x0008 /* DIS_OUT3 */ 773f10485e7SMark Brown #define WM8990_DIS_OUT4 0x0004 /* DIS_OUT4 */ 774f10485e7SMark Brown #define WM8990_DIS_LOUT 0x0002 /* DIS_LOUT */ 775f10485e7SMark Brown #define WM8990_DIS_ROUT 0x0001 /* DIS_ROUT */ 776f10485e7SMark Brown 777f10485e7SMark Brown /* 778f10485e7SMark Brown * R57 (0x39) - AntiPOP2 779f10485e7SMark Brown */ 780f10485e7SMark Brown #define WM8990_SOFTST 0x0040 /* SOFTST */ 781f10485e7SMark Brown #define WM8990_BUFIOEN 0x0008 /* BUFIOEN */ 782f10485e7SMark Brown #define WM8990_BUFDCOPEN 0x0004 /* BUFDCOPEN */ 783f10485e7SMark Brown #define WM8990_POBCTRL 0x0002 /* POBCTRL */ 784f10485e7SMark Brown #define WM8990_VMIDTOG 0x0001 /* VMIDTOG */ 785f10485e7SMark Brown 786f10485e7SMark Brown /* 787f10485e7SMark Brown * R58 (0x3A) - MICBIAS 788f10485e7SMark Brown */ 789f10485e7SMark Brown #define WM8990_MCDSCTH_MASK 0x00C0 /* MCDSCTH - [7:6] */ 790f10485e7SMark Brown #define WM8990_MCDTHR_MASK 0x0038 /* MCDTHR - [5:3] */ 791f10485e7SMark Brown #define WM8990_MCD 0x0004 /* MCD */ 792f10485e7SMark Brown #define WM8990_MBSEL 0x0001 /* MBSEL */ 793f10485e7SMark Brown 794f10485e7SMark Brown /* 795f10485e7SMark Brown * R60 (0x3C) - PLL1 796f10485e7SMark Brown */ 797f10485e7SMark Brown #define WM8990_SDM 0x0080 /* SDM */ 798f10485e7SMark Brown #define WM8990_PRESCALE 0x0040 /* PRESCALE */ 799f10485e7SMark Brown #define WM8990_PLLN_MASK 0x000F /* PLLN - [3:0] */ 800f10485e7SMark Brown 801f10485e7SMark Brown /* 802f10485e7SMark Brown * R61 (0x3D) - PLL2 803f10485e7SMark Brown */ 804f10485e7SMark Brown #define WM8990_PLLK1_MASK 0x00FF /* PLLK1 - [7:0] */ 805f10485e7SMark Brown 806f10485e7SMark Brown /* 807f10485e7SMark Brown * R62 (0x3E) - PLL3 808f10485e7SMark Brown */ 809f10485e7SMark Brown #define WM8990_PLLK2_MASK 0x00FF /* PLLK2 - [7:0] */ 810f10485e7SMark Brown 811f10485e7SMark Brown /* 812f10485e7SMark Brown * R63 (0x3F) - Internal Driver Bits 813f10485e7SMark Brown */ 814f10485e7SMark Brown #define WM8990_INMIXL_PWR_BIT 0 815f10485e7SMark Brown #define WM8990_AINLMUX_PWR_BIT 1 816f10485e7SMark Brown #define WM8990_INMIXR_PWR_BIT 2 817f10485e7SMark Brown #define WM8990_AINRMUX_PWR_BIT 3 818f10485e7SMark Brown 819f10485e7SMark Brown struct wm8990_setup_data { 820f10485e7SMark Brown unsigned short i2c_address; 821f10485e7SMark Brown }; 822f10485e7SMark Brown 823f10485e7SMark Brown #define WM8990_MCLK_DIV 0 824f10485e7SMark Brown #define WM8990_DACCLK_DIV 1 825f10485e7SMark Brown #define WM8990_ADCCLK_DIV 2 826f10485e7SMark Brown #define WM8990_BCLK_DIV 3 827f10485e7SMark Brown 828f10485e7SMark Brown extern struct snd_soc_codec_dai wm8990_dai; 829f10485e7SMark Brown extern struct snd_soc_codec_device soc_codec_dev_wm8990; 830f10485e7SMark Brown 831f10485e7SMark Brown #endif /* __WM8990REGISTERDEFS_H__ */ 832f10485e7SMark Brown /*------------------------------ END OF FILE ---------------------------------*/ 833