1 /* 2 * wm8988.c -- WM8988 ALSA SoC audio driver 3 * 4 * Copyright 2009 Wolfson Microelectronics plc 5 * Copyright 2005 Openedhand Ltd. 6 * 7 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/init.h> 17 #include <linux/delay.h> 18 #include <linux/pm.h> 19 #include <linux/i2c.h> 20 #include <linux/spi/spi.h> 21 #include <linux/platform_device.h> 22 #include <sound/core.h> 23 #include <sound/pcm.h> 24 #include <sound/pcm_params.h> 25 #include <sound/tlv.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 30 #include "wm8988.h" 31 32 /* 33 * wm8988 register cache 34 * We can't read the WM8988 register space when we 35 * are using 2 wire for device control, so we cache them instead. 36 */ 37 static const u16 wm8988_reg[] = { 38 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ 39 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ 40 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ 41 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ 42 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ 43 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ 44 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ 45 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ 46 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ 47 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ 48 0x0079, 0x0079, 0x0079, /* 40 */ 49 }; 50 51 /* codec private data */ 52 struct wm8988_priv { 53 unsigned int sysclk; 54 struct snd_soc_codec codec; 55 struct snd_pcm_hw_constraint_list *sysclk_constraints; 56 u16 reg_cache[WM8988_NUM_REG]; 57 }; 58 59 60 #define wm8988_reset(c) snd_soc_write(c, WM8988_RESET, 0) 61 62 /* 63 * WM8988 Controls 64 */ 65 66 static const char *bass_boost_txt[] = {"Linear Control", "Adaptive Boost"}; 67 static const struct soc_enum bass_boost = 68 SOC_ENUM_SINGLE(WM8988_BASS, 7, 2, bass_boost_txt); 69 70 static const char *bass_filter_txt[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; 71 static const struct soc_enum bass_filter = 72 SOC_ENUM_SINGLE(WM8988_BASS, 6, 2, bass_filter_txt); 73 74 static const char *treble_txt[] = {"8kHz", "4kHz"}; 75 static const struct soc_enum treble = 76 SOC_ENUM_SINGLE(WM8988_TREBLE, 6, 2, treble_txt); 77 78 static const char *stereo_3d_lc_txt[] = {"200Hz", "500Hz"}; 79 static const struct soc_enum stereo_3d_lc = 80 SOC_ENUM_SINGLE(WM8988_3D, 5, 2, stereo_3d_lc_txt); 81 82 static const char *stereo_3d_uc_txt[] = {"2.2kHz", "1.5kHz"}; 83 static const struct soc_enum stereo_3d_uc = 84 SOC_ENUM_SINGLE(WM8988_3D, 6, 2, stereo_3d_uc_txt); 85 86 static const char *stereo_3d_func_txt[] = {"Capture", "Playback"}; 87 static const struct soc_enum stereo_3d_func = 88 SOC_ENUM_SINGLE(WM8988_3D, 7, 2, stereo_3d_func_txt); 89 90 static const char *alc_func_txt[] = {"Off", "Right", "Left", "Stereo"}; 91 static const struct soc_enum alc_func = 92 SOC_ENUM_SINGLE(WM8988_ALC1, 7, 4, alc_func_txt); 93 94 static const char *ng_type_txt[] = {"Constant PGA Gain", 95 "Mute ADC Output"}; 96 static const struct soc_enum ng_type = 97 SOC_ENUM_SINGLE(WM8988_NGATE, 1, 2, ng_type_txt); 98 99 static const char *deemph_txt[] = {"None", "32Khz", "44.1Khz", "48Khz"}; 100 static const struct soc_enum deemph = 101 SOC_ENUM_SINGLE(WM8988_ADCDAC, 1, 4, deemph_txt); 102 103 static const char *adcpol_txt[] = {"Normal", "L Invert", "R Invert", 104 "L + R Invert"}; 105 static const struct soc_enum adcpol = 106 SOC_ENUM_SINGLE(WM8988_ADCDAC, 5, 4, adcpol_txt); 107 108 static const DECLARE_TLV_DB_SCALE(pga_tlv, -1725, 75, 0); 109 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); 110 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); 111 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 112 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); 113 114 static const struct snd_kcontrol_new wm8988_snd_controls[] = { 115 116 SOC_ENUM("Bass Boost", bass_boost), 117 SOC_ENUM("Bass Filter", bass_filter), 118 SOC_SINGLE("Bass Volume", WM8988_BASS, 0, 15, 1), 119 120 SOC_SINGLE("Treble Volume", WM8988_TREBLE, 0, 15, 0), 121 SOC_ENUM("Treble Cut-off", treble), 122 123 SOC_SINGLE("3D Switch", WM8988_3D, 0, 1, 0), 124 SOC_SINGLE("3D Volume", WM8988_3D, 1, 15, 0), 125 SOC_ENUM("3D Lower Cut-off", stereo_3d_lc), 126 SOC_ENUM("3D Upper Cut-off", stereo_3d_uc), 127 SOC_ENUM("3D Mode", stereo_3d_func), 128 129 SOC_SINGLE("ALC Capture Target Volume", WM8988_ALC1, 0, 7, 0), 130 SOC_SINGLE("ALC Capture Max Volume", WM8988_ALC1, 4, 7, 0), 131 SOC_ENUM("ALC Capture Function", alc_func), 132 SOC_SINGLE("ALC Capture ZC Switch", WM8988_ALC2, 7, 1, 0), 133 SOC_SINGLE("ALC Capture Hold Time", WM8988_ALC2, 0, 15, 0), 134 SOC_SINGLE("ALC Capture Decay Time", WM8988_ALC3, 4, 15, 0), 135 SOC_SINGLE("ALC Capture Attack Time", WM8988_ALC3, 0, 15, 0), 136 SOC_SINGLE("ALC Capture NG Threshold", WM8988_NGATE, 3, 31, 0), 137 SOC_ENUM("ALC Capture NG Type", ng_type), 138 SOC_SINGLE("ALC Capture NG Switch", WM8988_NGATE, 0, 1, 0), 139 140 SOC_SINGLE("ZC Timeout Switch", WM8988_ADCTL1, 0, 1, 0), 141 142 SOC_DOUBLE_R_TLV("Capture Digital Volume", WM8988_LADC, WM8988_RADC, 143 0, 255, 0, adc_tlv), 144 SOC_DOUBLE_R_TLV("Capture Volume", WM8988_LINVOL, WM8988_RINVOL, 145 0, 63, 0, pga_tlv), 146 SOC_DOUBLE_R("Capture ZC Switch", WM8988_LINVOL, WM8988_RINVOL, 6, 1, 0), 147 SOC_DOUBLE_R("Capture Switch", WM8988_LINVOL, WM8988_RINVOL, 7, 1, 1), 148 149 SOC_ENUM("Playback De-emphasis", deemph), 150 151 SOC_ENUM("Capture Polarity", adcpol), 152 SOC_SINGLE("Playback 6dB Attenuate", WM8988_ADCDAC, 7, 1, 0), 153 SOC_SINGLE("Capture 6dB Attenuate", WM8988_ADCDAC, 8, 1, 0), 154 155 SOC_DOUBLE_R_TLV("PCM Volume", WM8988_LDAC, WM8988_RDAC, 0, 255, 0, dac_tlv), 156 157 SOC_SINGLE_TLV("Left Mixer Left Bypass Volume", WM8988_LOUTM1, 4, 7, 1, 158 bypass_tlv), 159 SOC_SINGLE_TLV("Left Mixer Right Bypass Volume", WM8988_LOUTM2, 4, 7, 1, 160 bypass_tlv), 161 SOC_SINGLE_TLV("Right Mixer Left Bypass Volume", WM8988_ROUTM1, 4, 7, 1, 162 bypass_tlv), 163 SOC_SINGLE_TLV("Right Mixer Right Bypass Volume", WM8988_ROUTM2, 4, 7, 1, 164 bypass_tlv), 165 166 SOC_DOUBLE_R("Output 1 Playback ZC Switch", WM8988_LOUT1V, 167 WM8988_ROUT1V, 7, 1, 0), 168 SOC_DOUBLE_R_TLV("Output 1 Playback Volume", WM8988_LOUT1V, WM8988_ROUT1V, 169 0, 127, 0, out_tlv), 170 171 SOC_DOUBLE_R("Output 2 Playback ZC Switch", WM8988_LOUT2V, 172 WM8988_ROUT2V, 7, 1, 0), 173 SOC_DOUBLE_R_TLV("Output 2 Playback Volume", WM8988_LOUT2V, WM8988_ROUT2V, 174 0, 127, 0, out_tlv), 175 176 }; 177 178 /* 179 * DAPM Controls 180 */ 181 182 static int wm8988_lrc_control(struct snd_soc_dapm_widget *w, 183 struct snd_kcontrol *kcontrol, int event) 184 { 185 struct snd_soc_codec *codec = w->codec; 186 u16 adctl2 = snd_soc_read(codec, WM8988_ADCTL2); 187 188 /* Use the DAC to gate LRC if active, otherwise use ADC */ 189 if (snd_soc_read(codec, WM8988_PWR2) & 0x180) 190 adctl2 &= ~0x4; 191 else 192 adctl2 |= 0x4; 193 194 return snd_soc_write(codec, WM8988_ADCTL2, adctl2); 195 } 196 197 static const char *wm8988_line_texts[] = { 198 "Line 1", "Line 2", "PGA", "Differential"}; 199 200 static const unsigned int wm8988_line_values[] = { 201 0, 1, 3, 4}; 202 203 static const struct soc_enum wm8988_lline_enum = 204 SOC_VALUE_ENUM_SINGLE(WM8988_LOUTM1, 0, 7, 205 ARRAY_SIZE(wm8988_line_texts), 206 wm8988_line_texts, 207 wm8988_line_values); 208 static const struct snd_kcontrol_new wm8988_left_line_controls = 209 SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); 210 211 static const struct soc_enum wm8988_rline_enum = 212 SOC_VALUE_ENUM_SINGLE(WM8988_ROUTM1, 0, 7, 213 ARRAY_SIZE(wm8988_line_texts), 214 wm8988_line_texts, 215 wm8988_line_values); 216 static const struct snd_kcontrol_new wm8988_right_line_controls = 217 SOC_DAPM_VALUE_ENUM("Route", wm8988_lline_enum); 218 219 /* Left Mixer */ 220 static const struct snd_kcontrol_new wm8988_left_mixer_controls[] = { 221 SOC_DAPM_SINGLE("Playback Switch", WM8988_LOUTM1, 8, 1, 0), 222 SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_LOUTM1, 7, 1, 0), 223 SOC_DAPM_SINGLE("Right Playback Switch", WM8988_LOUTM2, 8, 1, 0), 224 SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_LOUTM2, 7, 1, 0), 225 }; 226 227 /* Right Mixer */ 228 static const struct snd_kcontrol_new wm8988_right_mixer_controls[] = { 229 SOC_DAPM_SINGLE("Left Playback Switch", WM8988_ROUTM1, 8, 1, 0), 230 SOC_DAPM_SINGLE("Left Bypass Switch", WM8988_ROUTM1, 7, 1, 0), 231 SOC_DAPM_SINGLE("Playback Switch", WM8988_ROUTM2, 8, 1, 0), 232 SOC_DAPM_SINGLE("Right Bypass Switch", WM8988_ROUTM2, 7, 1, 0), 233 }; 234 235 static const char *wm8988_pga_sel[] = {"Line 1", "Line 2", "Differential"}; 236 static const unsigned int wm8988_pga_val[] = { 0, 1, 3 }; 237 238 /* Left PGA Mux */ 239 static const struct soc_enum wm8988_lpga_enum = 240 SOC_VALUE_ENUM_SINGLE(WM8988_LADCIN, 6, 3, 241 ARRAY_SIZE(wm8988_pga_sel), 242 wm8988_pga_sel, 243 wm8988_pga_val); 244 static const struct snd_kcontrol_new wm8988_left_pga_controls = 245 SOC_DAPM_VALUE_ENUM("Route", wm8988_lpga_enum); 246 247 /* Right PGA Mux */ 248 static const struct soc_enum wm8988_rpga_enum = 249 SOC_VALUE_ENUM_SINGLE(WM8988_RADCIN, 6, 3, 250 ARRAY_SIZE(wm8988_pga_sel), 251 wm8988_pga_sel, 252 wm8988_pga_val); 253 static const struct snd_kcontrol_new wm8988_right_pga_controls = 254 SOC_DAPM_VALUE_ENUM("Route", wm8988_rpga_enum); 255 256 /* Differential Mux */ 257 static const char *wm8988_diff_sel[] = {"Line 1", "Line 2"}; 258 static const struct soc_enum diffmux = 259 SOC_ENUM_SINGLE(WM8988_ADCIN, 8, 2, wm8988_diff_sel); 260 static const struct snd_kcontrol_new wm8988_diffmux_controls = 261 SOC_DAPM_ENUM("Route", diffmux); 262 263 /* Mono ADC Mux */ 264 static const char *wm8988_mono_mux[] = {"Stereo", "Mono (Left)", 265 "Mono (Right)", "Digital Mono"}; 266 static const struct soc_enum monomux = 267 SOC_ENUM_SINGLE(WM8988_ADCIN, 6, 4, wm8988_mono_mux); 268 static const struct snd_kcontrol_new wm8988_monomux_controls = 269 SOC_DAPM_ENUM("Route", monomux); 270 271 static const struct snd_soc_dapm_widget wm8988_dapm_widgets[] = { 272 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8988_PWR1, 1, 0), 273 274 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, 275 &wm8988_diffmux_controls), 276 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, 277 &wm8988_monomux_controls), 278 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, 279 &wm8988_monomux_controls), 280 281 SND_SOC_DAPM_MUX("Left PGA Mux", WM8988_PWR1, 5, 0, 282 &wm8988_left_pga_controls), 283 SND_SOC_DAPM_MUX("Right PGA Mux", WM8988_PWR1, 4, 0, 284 &wm8988_right_pga_controls), 285 286 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, 287 &wm8988_left_line_controls), 288 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, 289 &wm8988_right_line_controls), 290 291 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8988_PWR1, 2, 0), 292 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8988_PWR1, 3, 0), 293 294 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8988_PWR2, 7, 0), 295 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8988_PWR2, 8, 0), 296 297 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, 298 &wm8988_left_mixer_controls[0], 299 ARRAY_SIZE(wm8988_left_mixer_controls)), 300 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, 301 &wm8988_right_mixer_controls[0], 302 ARRAY_SIZE(wm8988_right_mixer_controls)), 303 304 SND_SOC_DAPM_PGA("Right Out 2", WM8988_PWR2, 3, 0, NULL, 0), 305 SND_SOC_DAPM_PGA("Left Out 2", WM8988_PWR2, 4, 0, NULL, 0), 306 SND_SOC_DAPM_PGA("Right Out 1", WM8988_PWR2, 5, 0, NULL, 0), 307 SND_SOC_DAPM_PGA("Left Out 1", WM8988_PWR2, 6, 0, NULL, 0), 308 309 SND_SOC_DAPM_POST("LRC control", wm8988_lrc_control), 310 311 SND_SOC_DAPM_OUTPUT("LOUT1"), 312 SND_SOC_DAPM_OUTPUT("ROUT1"), 313 SND_SOC_DAPM_OUTPUT("LOUT2"), 314 SND_SOC_DAPM_OUTPUT("ROUT2"), 315 SND_SOC_DAPM_OUTPUT("VREF"), 316 317 SND_SOC_DAPM_INPUT("LINPUT1"), 318 SND_SOC_DAPM_INPUT("LINPUT2"), 319 SND_SOC_DAPM_INPUT("RINPUT1"), 320 SND_SOC_DAPM_INPUT("RINPUT2"), 321 }; 322 323 static const struct snd_soc_dapm_route audio_map[] = { 324 325 { "Left Line Mux", "Line 1", "LINPUT1" }, 326 { "Left Line Mux", "Line 2", "LINPUT2" }, 327 { "Left Line Mux", "PGA", "Left PGA Mux" }, 328 { "Left Line Mux", "Differential", "Differential Mux" }, 329 330 { "Right Line Mux", "Line 1", "RINPUT1" }, 331 { "Right Line Mux", "Line 2", "RINPUT2" }, 332 { "Right Line Mux", "PGA", "Right PGA Mux" }, 333 { "Right Line Mux", "Differential", "Differential Mux" }, 334 335 { "Left PGA Mux", "Line 1", "LINPUT1" }, 336 { "Left PGA Mux", "Line 2", "LINPUT2" }, 337 { "Left PGA Mux", "Differential", "Differential Mux" }, 338 339 { "Right PGA Mux", "Line 1", "RINPUT1" }, 340 { "Right PGA Mux", "Line 2", "RINPUT2" }, 341 { "Right PGA Mux", "Differential", "Differential Mux" }, 342 343 { "Differential Mux", "Line 1", "LINPUT1" }, 344 { "Differential Mux", "Line 1", "RINPUT1" }, 345 { "Differential Mux", "Line 2", "LINPUT2" }, 346 { "Differential Mux", "Line 2", "RINPUT2" }, 347 348 { "Left ADC Mux", "Stereo", "Left PGA Mux" }, 349 { "Left ADC Mux", "Mono (Left)", "Left PGA Mux" }, 350 { "Left ADC Mux", "Digital Mono", "Left PGA Mux" }, 351 352 { "Right ADC Mux", "Stereo", "Right PGA Mux" }, 353 { "Right ADC Mux", "Mono (Right)", "Right PGA Mux" }, 354 { "Right ADC Mux", "Digital Mono", "Right PGA Mux" }, 355 356 { "Left ADC", NULL, "Left ADC Mux" }, 357 { "Right ADC", NULL, "Right ADC Mux" }, 358 359 { "Left Line Mux", "Line 1", "LINPUT1" }, 360 { "Left Line Mux", "Line 2", "LINPUT2" }, 361 { "Left Line Mux", "PGA", "Left PGA Mux" }, 362 { "Left Line Mux", "Differential", "Differential Mux" }, 363 364 { "Right Line Mux", "Line 1", "RINPUT1" }, 365 { "Right Line Mux", "Line 2", "RINPUT2" }, 366 { "Right Line Mux", "PGA", "Right PGA Mux" }, 367 { "Right Line Mux", "Differential", "Differential Mux" }, 368 369 { "Left Mixer", "Playback Switch", "Left DAC" }, 370 { "Left Mixer", "Left Bypass Switch", "Left Line Mux" }, 371 { "Left Mixer", "Right Playback Switch", "Right DAC" }, 372 { "Left Mixer", "Right Bypass Switch", "Right Line Mux" }, 373 374 { "Right Mixer", "Left Playback Switch", "Left DAC" }, 375 { "Right Mixer", "Left Bypass Switch", "Left Line Mux" }, 376 { "Right Mixer", "Playback Switch", "Right DAC" }, 377 { "Right Mixer", "Right Bypass Switch", "Right Line Mux" }, 378 379 { "Left Out 1", NULL, "Left Mixer" }, 380 { "LOUT1", NULL, "Left Out 1" }, 381 { "Right Out 1", NULL, "Right Mixer" }, 382 { "ROUT1", NULL, "Right Out 1" }, 383 384 { "Left Out 2", NULL, "Left Mixer" }, 385 { "LOUT2", NULL, "Left Out 2" }, 386 { "Right Out 2", NULL, "Right Mixer" }, 387 { "ROUT2", NULL, "Right Out 2" }, 388 }; 389 390 struct _coeff_div { 391 u32 mclk; 392 u32 rate; 393 u16 fs; 394 u8 sr:5; 395 u8 usb:1; 396 }; 397 398 /* codec hifi mclk clock divider coefficients */ 399 static const struct _coeff_div coeff_div[] = { 400 /* 8k */ 401 {12288000, 8000, 1536, 0x6, 0x0}, 402 {11289600, 8000, 1408, 0x16, 0x0}, 403 {18432000, 8000, 2304, 0x7, 0x0}, 404 {16934400, 8000, 2112, 0x17, 0x0}, 405 {12000000, 8000, 1500, 0x6, 0x1}, 406 407 /* 11.025k */ 408 {11289600, 11025, 1024, 0x18, 0x0}, 409 {16934400, 11025, 1536, 0x19, 0x0}, 410 {12000000, 11025, 1088, 0x19, 0x1}, 411 412 /* 16k */ 413 {12288000, 16000, 768, 0xa, 0x0}, 414 {18432000, 16000, 1152, 0xb, 0x0}, 415 {12000000, 16000, 750, 0xa, 0x1}, 416 417 /* 22.05k */ 418 {11289600, 22050, 512, 0x1a, 0x0}, 419 {16934400, 22050, 768, 0x1b, 0x0}, 420 {12000000, 22050, 544, 0x1b, 0x1}, 421 422 /* 32k */ 423 {12288000, 32000, 384, 0xc, 0x0}, 424 {18432000, 32000, 576, 0xd, 0x0}, 425 {12000000, 32000, 375, 0xa, 0x1}, 426 427 /* 44.1k */ 428 {11289600, 44100, 256, 0x10, 0x0}, 429 {16934400, 44100, 384, 0x11, 0x0}, 430 {12000000, 44100, 272, 0x11, 0x1}, 431 432 /* 48k */ 433 {12288000, 48000, 256, 0x0, 0x0}, 434 {18432000, 48000, 384, 0x1, 0x0}, 435 {12000000, 48000, 250, 0x0, 0x1}, 436 437 /* 88.2k */ 438 {11289600, 88200, 128, 0x1e, 0x0}, 439 {16934400, 88200, 192, 0x1f, 0x0}, 440 {12000000, 88200, 136, 0x1f, 0x1}, 441 442 /* 96k */ 443 {12288000, 96000, 128, 0xe, 0x0}, 444 {18432000, 96000, 192, 0xf, 0x0}, 445 {12000000, 96000, 125, 0xe, 0x1}, 446 }; 447 448 static inline int get_coeff(int mclk, int rate) 449 { 450 int i; 451 452 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 453 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 454 return i; 455 } 456 457 return -EINVAL; 458 } 459 460 /* The set of rates we can generate from the above for each SYSCLK */ 461 462 static unsigned int rates_12288[] = { 463 8000, 12000, 16000, 24000, 24000, 32000, 48000, 96000, 464 }; 465 466 static struct snd_pcm_hw_constraint_list constraints_12288 = { 467 .count = ARRAY_SIZE(rates_12288), 468 .list = rates_12288, 469 }; 470 471 static unsigned int rates_112896[] = { 472 8000, 11025, 22050, 44100, 473 }; 474 475 static struct snd_pcm_hw_constraint_list constraints_112896 = { 476 .count = ARRAY_SIZE(rates_112896), 477 .list = rates_112896, 478 }; 479 480 static unsigned int rates_12[] = { 481 8000, 11025, 12000, 16000, 22050, 2400, 32000, 41100, 48000, 482 48000, 88235, 96000, 483 }; 484 485 static struct snd_pcm_hw_constraint_list constraints_12 = { 486 .count = ARRAY_SIZE(rates_12), 487 .list = rates_12, 488 }; 489 490 /* 491 * Note that this should be called from init rather than from hw_params. 492 */ 493 static int wm8988_set_dai_sysclk(struct snd_soc_dai *codec_dai, 494 int clk_id, unsigned int freq, int dir) 495 { 496 struct snd_soc_codec *codec = codec_dai->codec; 497 struct wm8988_priv *wm8988 = codec->private_data; 498 499 switch (freq) { 500 case 11289600: 501 case 18432000: 502 case 22579200: 503 case 36864000: 504 wm8988->sysclk_constraints = &constraints_112896; 505 wm8988->sysclk = freq; 506 return 0; 507 508 case 12288000: 509 case 16934400: 510 case 24576000: 511 case 33868800: 512 wm8988->sysclk_constraints = &constraints_12288; 513 wm8988->sysclk = freq; 514 return 0; 515 516 case 12000000: 517 case 24000000: 518 wm8988->sysclk_constraints = &constraints_12; 519 wm8988->sysclk = freq; 520 return 0; 521 } 522 return -EINVAL; 523 } 524 525 static int wm8988_set_dai_fmt(struct snd_soc_dai *codec_dai, 526 unsigned int fmt) 527 { 528 struct snd_soc_codec *codec = codec_dai->codec; 529 u16 iface = 0; 530 531 /* set master/slave audio interface */ 532 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 533 case SND_SOC_DAIFMT_CBM_CFM: 534 iface = 0x0040; 535 break; 536 case SND_SOC_DAIFMT_CBS_CFS: 537 break; 538 default: 539 return -EINVAL; 540 } 541 542 /* interface format */ 543 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 544 case SND_SOC_DAIFMT_I2S: 545 iface |= 0x0002; 546 break; 547 case SND_SOC_DAIFMT_RIGHT_J: 548 break; 549 case SND_SOC_DAIFMT_LEFT_J: 550 iface |= 0x0001; 551 break; 552 case SND_SOC_DAIFMT_DSP_A: 553 iface |= 0x0003; 554 break; 555 case SND_SOC_DAIFMT_DSP_B: 556 iface |= 0x0013; 557 break; 558 default: 559 return -EINVAL; 560 } 561 562 /* clock inversion */ 563 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 564 case SND_SOC_DAIFMT_NB_NF: 565 break; 566 case SND_SOC_DAIFMT_IB_IF: 567 iface |= 0x0090; 568 break; 569 case SND_SOC_DAIFMT_IB_NF: 570 iface |= 0x0080; 571 break; 572 case SND_SOC_DAIFMT_NB_IF: 573 iface |= 0x0010; 574 break; 575 default: 576 return -EINVAL; 577 } 578 579 snd_soc_write(codec, WM8988_IFACE, iface); 580 return 0; 581 } 582 583 static int wm8988_pcm_startup(struct snd_pcm_substream *substream, 584 struct snd_soc_dai *dai) 585 { 586 struct snd_soc_codec *codec = dai->codec; 587 struct wm8988_priv *wm8988 = codec->private_data; 588 589 /* The set of sample rates that can be supported depends on the 590 * MCLK supplied to the CODEC - enforce this. 591 */ 592 if (!wm8988->sysclk) { 593 dev_err(codec->dev, 594 "No MCLK configured, call set_sysclk() on init\n"); 595 return -EINVAL; 596 } 597 598 snd_pcm_hw_constraint_list(substream->runtime, 0, 599 SNDRV_PCM_HW_PARAM_RATE, 600 wm8988->sysclk_constraints); 601 602 return 0; 603 } 604 605 static int wm8988_pcm_hw_params(struct snd_pcm_substream *substream, 606 struct snd_pcm_hw_params *params, 607 struct snd_soc_dai *dai) 608 { 609 struct snd_soc_pcm_runtime *rtd = substream->private_data; 610 struct snd_soc_device *socdev = rtd->socdev; 611 struct snd_soc_codec *codec = socdev->card->codec; 612 struct wm8988_priv *wm8988 = codec->private_data; 613 u16 iface = snd_soc_read(codec, WM8988_IFACE) & 0x1f3; 614 u16 srate = snd_soc_read(codec, WM8988_SRATE) & 0x180; 615 int coeff; 616 617 coeff = get_coeff(wm8988->sysclk, params_rate(params)); 618 if (coeff < 0) { 619 coeff = get_coeff(wm8988->sysclk / 2, params_rate(params)); 620 srate |= 0x40; 621 } 622 if (coeff < 0) { 623 dev_err(codec->dev, 624 "Unable to configure sample rate %dHz with %dHz MCLK\n", 625 params_rate(params), wm8988->sysclk); 626 return coeff; 627 } 628 629 /* bit size */ 630 switch (params_format(params)) { 631 case SNDRV_PCM_FORMAT_S16_LE: 632 break; 633 case SNDRV_PCM_FORMAT_S20_3LE: 634 iface |= 0x0004; 635 break; 636 case SNDRV_PCM_FORMAT_S24_LE: 637 iface |= 0x0008; 638 break; 639 case SNDRV_PCM_FORMAT_S32_LE: 640 iface |= 0x000c; 641 break; 642 } 643 644 /* set iface & srate */ 645 snd_soc_write(codec, WM8988_IFACE, iface); 646 if (coeff >= 0) 647 snd_soc_write(codec, WM8988_SRATE, srate | 648 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); 649 650 return 0; 651 } 652 653 static int wm8988_mute(struct snd_soc_dai *dai, int mute) 654 { 655 struct snd_soc_codec *codec = dai->codec; 656 u16 mute_reg = snd_soc_read(codec, WM8988_ADCDAC) & 0xfff7; 657 658 if (mute) 659 snd_soc_write(codec, WM8988_ADCDAC, mute_reg | 0x8); 660 else 661 snd_soc_write(codec, WM8988_ADCDAC, mute_reg); 662 return 0; 663 } 664 665 static int wm8988_set_bias_level(struct snd_soc_codec *codec, 666 enum snd_soc_bias_level level) 667 { 668 u16 pwr_reg = snd_soc_read(codec, WM8988_PWR1) & ~0x1c1; 669 670 switch (level) { 671 case SND_SOC_BIAS_ON: 672 break; 673 674 case SND_SOC_BIAS_PREPARE: 675 /* VREF, VMID=2x50k, digital enabled */ 676 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x00c0); 677 break; 678 679 case SND_SOC_BIAS_STANDBY: 680 if (codec->bias_level == SND_SOC_BIAS_OFF) { 681 /* VREF, VMID=2x5k */ 682 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x1c1); 683 684 /* Charge caps */ 685 msleep(100); 686 } 687 688 /* VREF, VMID=2*500k, digital stopped */ 689 snd_soc_write(codec, WM8988_PWR1, pwr_reg | 0x0141); 690 break; 691 692 case SND_SOC_BIAS_OFF: 693 snd_soc_write(codec, WM8988_PWR1, 0x0000); 694 break; 695 } 696 codec->bias_level = level; 697 return 0; 698 } 699 700 #define WM8988_RATES SNDRV_PCM_RATE_8000_96000 701 702 #define WM8988_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 703 SNDRV_PCM_FMTBIT_S24_LE) 704 705 static struct snd_soc_dai_ops wm8988_ops = { 706 .startup = wm8988_pcm_startup, 707 .hw_params = wm8988_pcm_hw_params, 708 .set_fmt = wm8988_set_dai_fmt, 709 .set_sysclk = wm8988_set_dai_sysclk, 710 .digital_mute = wm8988_mute, 711 }; 712 713 struct snd_soc_dai wm8988_dai = { 714 .name = "WM8988", 715 .playback = { 716 .stream_name = "Playback", 717 .channels_min = 1, 718 .channels_max = 2, 719 .rates = WM8988_RATES, 720 .formats = WM8988_FORMATS, 721 }, 722 .capture = { 723 .stream_name = "Capture", 724 .channels_min = 1, 725 .channels_max = 2, 726 .rates = WM8988_RATES, 727 .formats = WM8988_FORMATS, 728 }, 729 .ops = &wm8988_ops, 730 .symmetric_rates = 1, 731 }; 732 EXPORT_SYMBOL_GPL(wm8988_dai); 733 734 static int wm8988_suspend(struct platform_device *pdev, pm_message_t state) 735 { 736 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 737 struct snd_soc_codec *codec = socdev->card->codec; 738 739 wm8988_set_bias_level(codec, SND_SOC_BIAS_OFF); 740 return 0; 741 } 742 743 static int wm8988_resume(struct platform_device *pdev) 744 { 745 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 746 struct snd_soc_codec *codec = socdev->card->codec; 747 int i; 748 u8 data[2]; 749 u16 *cache = codec->reg_cache; 750 751 /* Sync reg_cache with the hardware */ 752 for (i = 0; i < WM8988_NUM_REG; i++) { 753 if (i == WM8988_RESET) 754 continue; 755 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); 756 data[1] = cache[i] & 0x00ff; 757 codec->hw_write(codec->control_data, data, 2); 758 } 759 760 wm8988_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 761 762 return 0; 763 } 764 765 static struct snd_soc_codec *wm8988_codec; 766 767 static int wm8988_probe(struct platform_device *pdev) 768 { 769 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 770 struct snd_soc_codec *codec; 771 int ret = 0; 772 773 if (wm8988_codec == NULL) { 774 dev_err(&pdev->dev, "Codec device not registered\n"); 775 return -ENODEV; 776 } 777 778 socdev->card->codec = wm8988_codec; 779 codec = wm8988_codec; 780 781 /* register pcms */ 782 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 783 if (ret < 0) { 784 dev_err(codec->dev, "failed to create pcms: %d\n", ret); 785 goto pcm_err; 786 } 787 788 snd_soc_add_controls(codec, wm8988_snd_controls, 789 ARRAY_SIZE(wm8988_snd_controls)); 790 snd_soc_dapm_new_controls(codec, wm8988_dapm_widgets, 791 ARRAY_SIZE(wm8988_dapm_widgets)); 792 snd_soc_dapm_add_routes(codec, audio_map, ARRAY_SIZE(audio_map)); 793 snd_soc_dapm_new_widgets(codec); 794 795 ret = snd_soc_init_card(socdev); 796 if (ret < 0) { 797 dev_err(codec->dev, "failed to register card: %d\n", ret); 798 goto card_err; 799 } 800 801 return ret; 802 803 card_err: 804 snd_soc_free_pcms(socdev); 805 snd_soc_dapm_free(socdev); 806 pcm_err: 807 return ret; 808 } 809 810 static int wm8988_remove(struct platform_device *pdev) 811 { 812 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 813 814 snd_soc_free_pcms(socdev); 815 snd_soc_dapm_free(socdev); 816 817 return 0; 818 } 819 820 struct snd_soc_codec_device soc_codec_dev_wm8988 = { 821 .probe = wm8988_probe, 822 .remove = wm8988_remove, 823 .suspend = wm8988_suspend, 824 .resume = wm8988_resume, 825 }; 826 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8988); 827 828 static int wm8988_register(struct wm8988_priv *wm8988, 829 enum snd_soc_control_type control) 830 { 831 struct snd_soc_codec *codec = &wm8988->codec; 832 int ret; 833 u16 reg; 834 835 if (wm8988_codec) { 836 dev_err(codec->dev, "Another WM8988 is registered\n"); 837 ret = -EINVAL; 838 goto err; 839 } 840 841 mutex_init(&codec->mutex); 842 INIT_LIST_HEAD(&codec->dapm_widgets); 843 INIT_LIST_HEAD(&codec->dapm_paths); 844 845 codec->private_data = wm8988; 846 codec->name = "WM8988"; 847 codec->owner = THIS_MODULE; 848 codec->dai = &wm8988_dai; 849 codec->num_dai = 1; 850 codec->reg_cache_size = ARRAY_SIZE(wm8988->reg_cache); 851 codec->reg_cache = &wm8988->reg_cache; 852 codec->bias_level = SND_SOC_BIAS_OFF; 853 codec->set_bias_level = wm8988_set_bias_level; 854 855 memcpy(codec->reg_cache, wm8988_reg, 856 sizeof(wm8988_reg)); 857 858 ret = snd_soc_codec_set_cache_io(codec, 7, 9, control); 859 if (ret < 0) { 860 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret); 861 goto err; 862 } 863 864 ret = wm8988_reset(codec); 865 if (ret < 0) { 866 dev_err(codec->dev, "Failed to issue reset\n"); 867 goto err; 868 } 869 870 /* set the update bits (we always update left then right) */ 871 reg = snd_soc_read(codec, WM8988_RADC); 872 snd_soc_write(codec, WM8988_RADC, reg | 0x100); 873 reg = snd_soc_read(codec, WM8988_RDAC); 874 snd_soc_write(codec, WM8988_RDAC, reg | 0x0100); 875 reg = snd_soc_read(codec, WM8988_ROUT1V); 876 snd_soc_write(codec, WM8988_ROUT1V, reg | 0x0100); 877 reg = snd_soc_read(codec, WM8988_ROUT2V); 878 snd_soc_write(codec, WM8988_ROUT2V, reg | 0x0100); 879 reg = snd_soc_read(codec, WM8988_RINVOL); 880 snd_soc_write(codec, WM8988_RINVOL, reg | 0x0100); 881 882 wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_STANDBY); 883 884 wm8988_dai.dev = codec->dev; 885 886 wm8988_codec = codec; 887 888 ret = snd_soc_register_codec(codec); 889 if (ret != 0) { 890 dev_err(codec->dev, "Failed to register codec: %d\n", ret); 891 goto err; 892 } 893 894 ret = snd_soc_register_dai(&wm8988_dai); 895 if (ret != 0) { 896 dev_err(codec->dev, "Failed to register DAI: %d\n", ret); 897 snd_soc_unregister_codec(codec); 898 goto err_codec; 899 } 900 901 return 0; 902 903 err_codec: 904 snd_soc_unregister_codec(codec); 905 err: 906 kfree(wm8988); 907 return ret; 908 } 909 910 static void wm8988_unregister(struct wm8988_priv *wm8988) 911 { 912 wm8988_set_bias_level(&wm8988->codec, SND_SOC_BIAS_OFF); 913 snd_soc_unregister_dai(&wm8988_dai); 914 snd_soc_unregister_codec(&wm8988->codec); 915 kfree(wm8988); 916 wm8988_codec = NULL; 917 } 918 919 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 920 static int wm8988_i2c_probe(struct i2c_client *i2c, 921 const struct i2c_device_id *id) 922 { 923 struct wm8988_priv *wm8988; 924 struct snd_soc_codec *codec; 925 926 wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL); 927 if (wm8988 == NULL) 928 return -ENOMEM; 929 930 codec = &wm8988->codec; 931 932 i2c_set_clientdata(i2c, wm8988); 933 codec->control_data = i2c; 934 935 codec->dev = &i2c->dev; 936 937 return wm8988_register(wm8988, SND_SOC_I2C); 938 } 939 940 static int wm8988_i2c_remove(struct i2c_client *client) 941 { 942 struct wm8988_priv *wm8988 = i2c_get_clientdata(client); 943 wm8988_unregister(wm8988); 944 return 0; 945 } 946 947 #ifdef CONFIG_PM 948 static int wm8988_i2c_suspend(struct i2c_client *client, pm_message_t msg) 949 { 950 return snd_soc_suspend_device(&client->dev); 951 } 952 953 static int wm8988_i2c_resume(struct i2c_client *client) 954 { 955 return snd_soc_resume_device(&client->dev); 956 } 957 #else 958 #define wm8988_i2c_suspend NULL 959 #define wm8988_i2c_resume NULL 960 #endif 961 962 static const struct i2c_device_id wm8988_i2c_id[] = { 963 { "wm8988", 0 }, 964 { } 965 }; 966 MODULE_DEVICE_TABLE(i2c, wm8988_i2c_id); 967 968 static struct i2c_driver wm8988_i2c_driver = { 969 .driver = { 970 .name = "WM8988", 971 .owner = THIS_MODULE, 972 }, 973 .probe = wm8988_i2c_probe, 974 .remove = wm8988_i2c_remove, 975 .suspend = wm8988_i2c_suspend, 976 .resume = wm8988_i2c_resume, 977 .id_table = wm8988_i2c_id, 978 }; 979 #endif 980 981 #if defined(CONFIG_SPI_MASTER) 982 static int __devinit wm8988_spi_probe(struct spi_device *spi) 983 { 984 struct wm8988_priv *wm8988; 985 struct snd_soc_codec *codec; 986 987 wm8988 = kzalloc(sizeof(struct wm8988_priv), GFP_KERNEL); 988 if (wm8988 == NULL) 989 return -ENOMEM; 990 991 codec = &wm8988->codec; 992 codec->control_data = spi; 993 codec->dev = &spi->dev; 994 995 dev_set_drvdata(&spi->dev, wm8988); 996 997 return wm8988_register(wm8988, SND_SOC_SPI); 998 } 999 1000 static int __devexit wm8988_spi_remove(struct spi_device *spi) 1001 { 1002 struct wm8988_priv *wm8988 = dev_get_drvdata(&spi->dev); 1003 1004 wm8988_unregister(wm8988); 1005 1006 return 0; 1007 } 1008 1009 #ifdef CONFIG_PM 1010 static int wm8988_spi_suspend(struct spi_device *spi, pm_message_t msg) 1011 { 1012 return snd_soc_suspend_device(&spi->dev); 1013 } 1014 1015 static int wm8988_spi_resume(struct spi_device *spi) 1016 { 1017 return snd_soc_resume_device(&spi->dev); 1018 } 1019 #else 1020 #define wm8988_spi_suspend NULL 1021 #define wm8988_spi_resume NULL 1022 #endif 1023 1024 static struct spi_driver wm8988_spi_driver = { 1025 .driver = { 1026 .name = "wm8988", 1027 .bus = &spi_bus_type, 1028 .owner = THIS_MODULE, 1029 }, 1030 .probe = wm8988_spi_probe, 1031 .remove = __devexit_p(wm8988_spi_remove), 1032 .suspend = wm8988_spi_suspend, 1033 .resume = wm8988_spi_resume, 1034 }; 1035 #endif 1036 1037 static int __init wm8988_modinit(void) 1038 { 1039 int ret; 1040 1041 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1042 ret = i2c_add_driver(&wm8988_i2c_driver); 1043 if (ret != 0) 1044 pr_err("WM8988: Unable to register I2C driver: %d\n", ret); 1045 #endif 1046 #if defined(CONFIG_SPI_MASTER) 1047 ret = spi_register_driver(&wm8988_spi_driver); 1048 if (ret != 0) 1049 pr_err("WM8988: Unable to register SPI driver: %d\n", ret); 1050 #endif 1051 return ret; 1052 } 1053 module_init(wm8988_modinit); 1054 1055 static void __exit wm8988_exit(void) 1056 { 1057 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 1058 i2c_del_driver(&wm8988_i2c_driver); 1059 #endif 1060 #if defined(CONFIG_SPI_MASTER) 1061 spi_unregister_driver(&wm8988_spi_driver); 1062 #endif 1063 } 1064 module_exit(wm8988_exit); 1065 1066 1067 MODULE_DESCRIPTION("ASoC WM8988 driver"); 1068 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>"); 1069 MODULE_LICENSE("GPL"); 1070