16b3860b0SDimitris Papastamos /* 26b3860b0SDimitris Papastamos * wm8983.c -- WM8983 ALSA SoC Audio driver 36b3860b0SDimitris Papastamos * 46b3860b0SDimitris Papastamos * Copyright 2011 Wolfson Microelectronics plc 56b3860b0SDimitris Papastamos * 66b3860b0SDimitris Papastamos * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> 76b3860b0SDimitris Papastamos * 86b3860b0SDimitris Papastamos * This program is free software; you can redistribute it and/or modify 96b3860b0SDimitris Papastamos * it under the terms of the GNU General Public License version 2 as 106b3860b0SDimitris Papastamos * published by the Free Software Foundation. 116b3860b0SDimitris Papastamos */ 126b3860b0SDimitris Papastamos 136b3860b0SDimitris Papastamos #include <linux/module.h> 146b3860b0SDimitris Papastamos #include <linux/moduleparam.h> 156b3860b0SDimitris Papastamos #include <linux/init.h> 166b3860b0SDimitris Papastamos #include <linux/delay.h> 176b3860b0SDimitris Papastamos #include <linux/pm.h> 186b3860b0SDimitris Papastamos #include <linux/i2c.h> 192ee01ac6SMark Brown #include <linux/regmap.h> 206b3860b0SDimitris Papastamos #include <linux/spi/spi.h> 216b3860b0SDimitris Papastamos #include <linux/slab.h> 226b3860b0SDimitris Papastamos #include <sound/core.h> 236b3860b0SDimitris Papastamos #include <sound/pcm.h> 246b3860b0SDimitris Papastamos #include <sound/pcm_params.h> 256b3860b0SDimitris Papastamos #include <sound/soc.h> 266b3860b0SDimitris Papastamos #include <sound/initval.h> 276b3860b0SDimitris Papastamos #include <sound/tlv.h> 286b3860b0SDimitris Papastamos 296b3860b0SDimitris Papastamos #include "wm8983.h" 306b3860b0SDimitris Papastamos 312ee01ac6SMark Brown static const struct reg_default wm8983_defaults[] = { 322ee01ac6SMark Brown { 0x01, 0x0000 }, /* R1 - Power management 1 */ 332ee01ac6SMark Brown { 0x02, 0x0000 }, /* R2 - Power management 2 */ 342ee01ac6SMark Brown { 0x03, 0x0000 }, /* R3 - Power management 3 */ 352ee01ac6SMark Brown { 0x04, 0x0050 }, /* R4 - Audio Interface */ 362ee01ac6SMark Brown { 0x05, 0x0000 }, /* R5 - Companding control */ 372ee01ac6SMark Brown { 0x06, 0x0140 }, /* R6 - Clock Gen control */ 382ee01ac6SMark Brown { 0x07, 0x0000 }, /* R7 - Additional control */ 392ee01ac6SMark Brown { 0x08, 0x0000 }, /* R8 - GPIO Control */ 402ee01ac6SMark Brown { 0x09, 0x0000 }, /* R9 - Jack Detect Control 1 */ 412ee01ac6SMark Brown { 0x0A, 0x0000 }, /* R10 - DAC Control */ 422ee01ac6SMark Brown { 0x0B, 0x00FF }, /* R11 - Left DAC digital Vol */ 432ee01ac6SMark Brown { 0x0C, 0x00FF }, /* R12 - Right DAC digital vol */ 442ee01ac6SMark Brown { 0x0D, 0x0000 }, /* R13 - Jack Detect Control 2 */ 452ee01ac6SMark Brown { 0x0E, 0x0100 }, /* R14 - ADC Control */ 462ee01ac6SMark Brown { 0x0F, 0x00FF }, /* R15 - Left ADC Digital Vol */ 472ee01ac6SMark Brown { 0x10, 0x00FF }, /* R16 - Right ADC Digital Vol */ 482ee01ac6SMark Brown { 0x12, 0x012C }, /* R18 - EQ1 - low shelf */ 492ee01ac6SMark Brown { 0x13, 0x002C }, /* R19 - EQ2 - peak 1 */ 502ee01ac6SMark Brown { 0x14, 0x002C }, /* R20 - EQ3 - peak 2 */ 512ee01ac6SMark Brown { 0x15, 0x002C }, /* R21 - EQ4 - peak 3 */ 522ee01ac6SMark Brown { 0x16, 0x002C }, /* R22 - EQ5 - high shelf */ 532ee01ac6SMark Brown { 0x18, 0x0032 }, /* R24 - DAC Limiter 1 */ 542ee01ac6SMark Brown { 0x19, 0x0000 }, /* R25 - DAC Limiter 2 */ 552ee01ac6SMark Brown { 0x1B, 0x0000 }, /* R27 - Notch Filter 1 */ 562ee01ac6SMark Brown { 0x1C, 0x0000 }, /* R28 - Notch Filter 2 */ 572ee01ac6SMark Brown { 0x1D, 0x0000 }, /* R29 - Notch Filter 3 */ 582ee01ac6SMark Brown { 0x1E, 0x0000 }, /* R30 - Notch Filter 4 */ 592ee01ac6SMark Brown { 0x20, 0x0038 }, /* R32 - ALC control 1 */ 602ee01ac6SMark Brown { 0x21, 0x000B }, /* R33 - ALC control 2 */ 612ee01ac6SMark Brown { 0x22, 0x0032 }, /* R34 - ALC control 3 */ 622ee01ac6SMark Brown { 0x23, 0x0000 }, /* R35 - Noise Gate */ 632ee01ac6SMark Brown { 0x24, 0x0008 }, /* R36 - PLL N */ 642ee01ac6SMark Brown { 0x25, 0x000C }, /* R37 - PLL K 1 */ 652ee01ac6SMark Brown { 0x26, 0x0093 }, /* R38 - PLL K 2 */ 662ee01ac6SMark Brown { 0x27, 0x00E9 }, /* R39 - PLL K 3 */ 672ee01ac6SMark Brown { 0x29, 0x0000 }, /* R41 - 3D control */ 682ee01ac6SMark Brown { 0x2A, 0x0000 }, /* R42 - OUT4 to ADC */ 692ee01ac6SMark Brown { 0x2B, 0x0000 }, /* R43 - Beep control */ 702ee01ac6SMark Brown { 0x2C, 0x0033 }, /* R44 - Input ctrl */ 712ee01ac6SMark Brown { 0x2D, 0x0010 }, /* R45 - Left INP PGA gain ctrl */ 722ee01ac6SMark Brown { 0x2E, 0x0010 }, /* R46 - Right INP PGA gain ctrl */ 732ee01ac6SMark Brown { 0x2F, 0x0100 }, /* R47 - Left ADC BOOST ctrl */ 742ee01ac6SMark Brown { 0x30, 0x0100 }, /* R48 - Right ADC BOOST ctrl */ 752ee01ac6SMark Brown { 0x31, 0x0002 }, /* R49 - Output ctrl */ 762ee01ac6SMark Brown { 0x32, 0x0001 }, /* R50 - Left mixer ctrl */ 772ee01ac6SMark Brown { 0x33, 0x0001 }, /* R51 - Right mixer ctrl */ 782ee01ac6SMark Brown { 0x34, 0x0039 }, /* R52 - LOUT1 (HP) volume ctrl */ 792ee01ac6SMark Brown { 0x35, 0x0039 }, /* R53 - ROUT1 (HP) volume ctrl */ 802ee01ac6SMark Brown { 0x36, 0x0039 }, /* R54 - LOUT2 (SPK) volume ctrl */ 812ee01ac6SMark Brown { 0x37, 0x0039 }, /* R55 - ROUT2 (SPK) volume ctrl */ 822ee01ac6SMark Brown { 0x38, 0x0001 }, /* R56 - OUT3 mixer ctrl */ 832ee01ac6SMark Brown { 0x39, 0x0001 }, /* R57 - OUT4 (MONO) mix ctrl */ 842ee01ac6SMark Brown { 0x3D, 0x0000 }, /* R61 - BIAS CTRL */ 856b3860b0SDimitris Papastamos }; 866b3860b0SDimitris Papastamos 876b3860b0SDimitris Papastamos /* vol/gain update regs */ 886b3860b0SDimitris Papastamos static const int vol_update_regs[] = { 896b3860b0SDimitris Papastamos WM8983_LEFT_DAC_DIGITAL_VOL, 906b3860b0SDimitris Papastamos WM8983_RIGHT_DAC_DIGITAL_VOL, 916b3860b0SDimitris Papastamos WM8983_LEFT_ADC_DIGITAL_VOL, 926b3860b0SDimitris Papastamos WM8983_RIGHT_ADC_DIGITAL_VOL, 936b3860b0SDimitris Papastamos WM8983_LOUT1_HP_VOLUME_CTRL, 946b3860b0SDimitris Papastamos WM8983_ROUT1_HP_VOLUME_CTRL, 956b3860b0SDimitris Papastamos WM8983_LOUT2_SPK_VOLUME_CTRL, 966b3860b0SDimitris Papastamos WM8983_ROUT2_SPK_VOLUME_CTRL, 976b3860b0SDimitris Papastamos WM8983_LEFT_INP_PGA_GAIN_CTRL, 986b3860b0SDimitris Papastamos WM8983_RIGHT_INP_PGA_GAIN_CTRL 996b3860b0SDimitris Papastamos }; 1006b3860b0SDimitris Papastamos 1016b3860b0SDimitris Papastamos struct wm8983_priv { 1022ee01ac6SMark Brown struct regmap *regmap; 1036b3860b0SDimitris Papastamos u32 sysclk; 1046b3860b0SDimitris Papastamos u32 bclk; 1056b3860b0SDimitris Papastamos }; 1066b3860b0SDimitris Papastamos 1076b3860b0SDimitris Papastamos static const struct { 1086b3860b0SDimitris Papastamos int div; 1096b3860b0SDimitris Papastamos int ratio; 1106b3860b0SDimitris Papastamos } fs_ratios[] = { 1116b3860b0SDimitris Papastamos { 10, 128 }, 1126b3860b0SDimitris Papastamos { 15, 192 }, 1136b3860b0SDimitris Papastamos { 20, 256 }, 1146b3860b0SDimitris Papastamos { 30, 384 }, 1156b3860b0SDimitris Papastamos { 40, 512 }, 1166b3860b0SDimitris Papastamos { 60, 768 }, 1176b3860b0SDimitris Papastamos { 80, 1024 }, 1186b3860b0SDimitris Papastamos { 120, 1536 } 1196b3860b0SDimitris Papastamos }; 1206b3860b0SDimitris Papastamos 1216b3860b0SDimitris Papastamos static const int srates[] = { 48000, 32000, 24000, 16000, 12000, 8000 }; 1226b3860b0SDimitris Papastamos 1236b3860b0SDimitris Papastamos static const int bclk_divs[] = { 1246b3860b0SDimitris Papastamos 1, 2, 4, 8, 16, 32 1256b3860b0SDimitris Papastamos }; 1266b3860b0SDimitris Papastamos 1276b3860b0SDimitris Papastamos static int eqmode_get(struct snd_kcontrol *kcontrol, 1286b3860b0SDimitris Papastamos struct snd_ctl_elem_value *ucontrol); 1296b3860b0SDimitris Papastamos static int eqmode_put(struct snd_kcontrol *kcontrol, 1306b3860b0SDimitris Papastamos struct snd_ctl_elem_value *ucontrol); 1316b3860b0SDimitris Papastamos 1326b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(dac_tlv, -12700, 50, 1); 1336b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(adc_tlv, -12700, 50, 1); 1346b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(out_tlv, -5700, 100, 0); 1356b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(lim_thresh_tlv, -600, 100, 0); 1366b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(lim_boost_tlv, 0, 100, 0); 1376b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(alc_min_tlv, -1200, 600, 0); 1386b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -675, 600, 0); 1396b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(alc_tar_tlv, -2250, 150, 0); 1406b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(pga_vol_tlv, -1200, 75, 0); 1416b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(boost_tlv, -1200, 300, 1); 1426b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0); 1436b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(aux_tlv, -1500, 300, 0); 1446b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(bypass_tlv, -1500, 300, 0); 1456b3860b0SDimitris Papastamos static const DECLARE_TLV_DB_SCALE(pga_boost_tlv, 0, 2000, 0); 1466b3860b0SDimitris Papastamos 1476b3860b0SDimitris Papastamos static const char *alc_sel_text[] = { "Off", "Right", "Left", "Stereo" }; 148ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(alc_sel, WM8983_ALC_CONTROL_1, 7, alc_sel_text); 1496b3860b0SDimitris Papastamos 1506b3860b0SDimitris Papastamos static const char *alc_mode_text[] = { "ALC", "Limiter" }; 151ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(alc_mode, WM8983_ALC_CONTROL_3, 8, alc_mode_text); 1526b3860b0SDimitris Papastamos 1536b3860b0SDimitris Papastamos static const char *filter_mode_text[] = { "Audio", "Application" }; 154ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(filter_mode, WM8983_ADC_CONTROL, 7, 1556b3860b0SDimitris Papastamos filter_mode_text); 1566b3860b0SDimitris Papastamos 1576b3860b0SDimitris Papastamos static const char *eq_bw_text[] = { "Narrow", "Wide" }; 1586b3860b0SDimitris Papastamos static const char *eqmode_text[] = { "Capture", "Playback" }; 159ae170688STakashi Iwai static SOC_ENUM_SINGLE_EXT_DECL(eqmode, eqmode_text); 1606b3860b0SDimitris Papastamos 1616b3860b0SDimitris Papastamos static const char *eq1_cutoff_text[] = { 1626b3860b0SDimitris Papastamos "80Hz", "105Hz", "135Hz", "175Hz" 1636b3860b0SDimitris Papastamos }; 164ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq1_cutoff, WM8983_EQ1_LOW_SHELF, 5, 1656b3860b0SDimitris Papastamos eq1_cutoff_text); 1666b3860b0SDimitris Papastamos static const char *eq2_cutoff_text[] = { 1676b3860b0SDimitris Papastamos "230Hz", "300Hz", "385Hz", "500Hz" 1686b3860b0SDimitris Papastamos }; 169ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq2_bw, WM8983_EQ2_PEAK_1, 8, eq_bw_text); 170ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq2_cutoff, WM8983_EQ2_PEAK_1, 5, eq2_cutoff_text); 1716b3860b0SDimitris Papastamos static const char *eq3_cutoff_text[] = { 1726b3860b0SDimitris Papastamos "650Hz", "850Hz", "1.1kHz", "1.4kHz" 1736b3860b0SDimitris Papastamos }; 174ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq3_bw, WM8983_EQ3_PEAK_2, 8, eq_bw_text); 175ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq3_cutoff, WM8983_EQ3_PEAK_2, 5, eq3_cutoff_text); 1766b3860b0SDimitris Papastamos static const char *eq4_cutoff_text[] = { 1776b3860b0SDimitris Papastamos "1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" 1786b3860b0SDimitris Papastamos }; 179ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq4_bw, WM8983_EQ4_PEAK_3, 8, eq_bw_text); 180ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq4_cutoff, WM8983_EQ4_PEAK_3, 5, eq4_cutoff_text); 1816b3860b0SDimitris Papastamos static const char *eq5_cutoff_text[] = { 1826b3860b0SDimitris Papastamos "5.3kHz", "6.9kHz", "9kHz", "11.7kHz" 1836b3860b0SDimitris Papastamos }; 184ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(eq5_cutoff, WM8983_EQ5_HIGH_SHELF, 5, 1856b3860b0SDimitris Papastamos eq5_cutoff_text); 1866b3860b0SDimitris Papastamos 1876b3860b0SDimitris Papastamos static const char *depth_3d_text[] = { 1886b3860b0SDimitris Papastamos "Off", 1896b3860b0SDimitris Papastamos "6.67%", 1906b3860b0SDimitris Papastamos "13.3%", 1916b3860b0SDimitris Papastamos "20%", 1926b3860b0SDimitris Papastamos "26.7%", 1936b3860b0SDimitris Papastamos "33.3%", 1946b3860b0SDimitris Papastamos "40%", 1956b3860b0SDimitris Papastamos "46.6%", 1966b3860b0SDimitris Papastamos "53.3%", 1976b3860b0SDimitris Papastamos "60%", 1986b3860b0SDimitris Papastamos "66.7%", 1996b3860b0SDimitris Papastamos "73.3%", 2006b3860b0SDimitris Papastamos "80%", 2016b3860b0SDimitris Papastamos "86.7%", 2026b3860b0SDimitris Papastamos "93.3%", 2036b3860b0SDimitris Papastamos "100%" 2046b3860b0SDimitris Papastamos }; 205ae170688STakashi Iwai static SOC_ENUM_SINGLE_DECL(depth_3d, WM8983_3D_CONTROL, 0, 2066b3860b0SDimitris Papastamos depth_3d_text); 2076b3860b0SDimitris Papastamos 2086b3860b0SDimitris Papastamos static const struct snd_kcontrol_new wm8983_snd_controls[] = { 2096b3860b0SDimitris Papastamos SOC_SINGLE("Digital Loopback Switch", WM8983_COMPANDING_CONTROL, 2106b3860b0SDimitris Papastamos 0, 1, 0), 2116b3860b0SDimitris Papastamos 2126b3860b0SDimitris Papastamos SOC_ENUM("ALC Capture Function", alc_sel), 2136b3860b0SDimitris Papastamos SOC_SINGLE_TLV("ALC Capture Max Volume", WM8983_ALC_CONTROL_1, 2146b3860b0SDimitris Papastamos 3, 7, 0, alc_max_tlv), 2156b3860b0SDimitris Papastamos SOC_SINGLE_TLV("ALC Capture Min Volume", WM8983_ALC_CONTROL_1, 2166b3860b0SDimitris Papastamos 0, 7, 0, alc_min_tlv), 2176b3860b0SDimitris Papastamos SOC_SINGLE_TLV("ALC Capture Target Volume", WM8983_ALC_CONTROL_2, 2186b3860b0SDimitris Papastamos 0, 15, 0, alc_tar_tlv), 2196b3860b0SDimitris Papastamos SOC_SINGLE("ALC Capture Attack", WM8983_ALC_CONTROL_3, 0, 10, 0), 2206b3860b0SDimitris Papastamos SOC_SINGLE("ALC Capture Hold", WM8983_ALC_CONTROL_2, 4, 10, 0), 2216b3860b0SDimitris Papastamos SOC_SINGLE("ALC Capture Decay", WM8983_ALC_CONTROL_3, 4, 10, 0), 2226b3860b0SDimitris Papastamos SOC_ENUM("ALC Mode", alc_mode), 2236b3860b0SDimitris Papastamos SOC_SINGLE("ALC Capture NG Switch", WM8983_NOISE_GATE, 2246b3860b0SDimitris Papastamos 3, 1, 0), 2256b3860b0SDimitris Papastamos SOC_SINGLE("ALC Capture NG Threshold", WM8983_NOISE_GATE, 2266b3860b0SDimitris Papastamos 0, 7, 1), 2276b3860b0SDimitris Papastamos 2286b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Capture Volume", WM8983_LEFT_ADC_DIGITAL_VOL, 2296b3860b0SDimitris Papastamos WM8983_RIGHT_ADC_DIGITAL_VOL, 0, 255, 0, adc_tlv), 2306b3860b0SDimitris Papastamos SOC_DOUBLE_R("Capture PGA ZC Switch", WM8983_LEFT_INP_PGA_GAIN_CTRL, 2316b3860b0SDimitris Papastamos WM8983_RIGHT_INP_PGA_GAIN_CTRL, 7, 1, 0), 2326b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Capture PGA Volume", WM8983_LEFT_INP_PGA_GAIN_CTRL, 2336b3860b0SDimitris Papastamos WM8983_RIGHT_INP_PGA_GAIN_CTRL, 0, 63, 0, pga_vol_tlv), 2346b3860b0SDimitris Papastamos 2356b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Capture PGA Boost Volume", 2366b3860b0SDimitris Papastamos WM8983_LEFT_ADC_BOOST_CTRL, WM8983_RIGHT_ADC_BOOST_CTRL, 2376b3860b0SDimitris Papastamos 8, 1, 0, pga_boost_tlv), 2386b3860b0SDimitris Papastamos 2396b3860b0SDimitris Papastamos SOC_DOUBLE("ADC Inversion Switch", WM8983_ADC_CONTROL, 0, 1, 1, 0), 2406b3860b0SDimitris Papastamos SOC_SINGLE("ADC 128x Oversampling Switch", WM8983_ADC_CONTROL, 8, 1, 0), 2416b3860b0SDimitris Papastamos 2426b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Playback Volume", WM8983_LEFT_DAC_DIGITAL_VOL, 2436b3860b0SDimitris Papastamos WM8983_RIGHT_DAC_DIGITAL_VOL, 0, 255, 0, dac_tlv), 2446b3860b0SDimitris Papastamos 2456b3860b0SDimitris Papastamos SOC_SINGLE("DAC Playback Limiter Switch", WM8983_DAC_LIMITER_1, 8, 1, 0), 2466b3860b0SDimitris Papastamos SOC_SINGLE("DAC Playback Limiter Decay", WM8983_DAC_LIMITER_1, 4, 10, 0), 2476b3860b0SDimitris Papastamos SOC_SINGLE("DAC Playback Limiter Attack", WM8983_DAC_LIMITER_1, 0, 11, 0), 2486b3860b0SDimitris Papastamos SOC_SINGLE_TLV("DAC Playback Limiter Threshold", WM8983_DAC_LIMITER_2, 2496b3860b0SDimitris Papastamos 4, 7, 1, lim_thresh_tlv), 2506b3860b0SDimitris Papastamos SOC_SINGLE_TLV("DAC Playback Limiter Boost Volume", WM8983_DAC_LIMITER_2, 2516b3860b0SDimitris Papastamos 0, 12, 0, lim_boost_tlv), 2526b3860b0SDimitris Papastamos SOC_DOUBLE("DAC Inversion Switch", WM8983_DAC_CONTROL, 0, 1, 1, 0), 2536b3860b0SDimitris Papastamos SOC_SINGLE("DAC Auto Mute Switch", WM8983_DAC_CONTROL, 2, 1, 0), 2546b3860b0SDimitris Papastamos SOC_SINGLE("DAC 128x Oversampling Switch", WM8983_DAC_CONTROL, 3, 1, 0), 2556b3860b0SDimitris Papastamos 2566b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8983_LOUT1_HP_VOLUME_CTRL, 2576b3860b0SDimitris Papastamos WM8983_ROUT1_HP_VOLUME_CTRL, 0, 63, 0, out_tlv), 2586b3860b0SDimitris Papastamos SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8983_LOUT1_HP_VOLUME_CTRL, 2596b3860b0SDimitris Papastamos WM8983_ROUT1_HP_VOLUME_CTRL, 7, 1, 0), 2606b3860b0SDimitris Papastamos SOC_DOUBLE_R("Headphone Switch", WM8983_LOUT1_HP_VOLUME_CTRL, 2616b3860b0SDimitris Papastamos WM8983_ROUT1_HP_VOLUME_CTRL, 6, 1, 1), 2626b3860b0SDimitris Papastamos 2636b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8983_LOUT2_SPK_VOLUME_CTRL, 2646b3860b0SDimitris Papastamos WM8983_ROUT2_SPK_VOLUME_CTRL, 0, 63, 0, out_tlv), 2656b3860b0SDimitris Papastamos SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8983_LOUT2_SPK_VOLUME_CTRL, 2666b3860b0SDimitris Papastamos WM8983_ROUT2_SPK_VOLUME_CTRL, 7, 1, 0), 2676b3860b0SDimitris Papastamos SOC_DOUBLE_R("Speaker Switch", WM8983_LOUT2_SPK_VOLUME_CTRL, 2686b3860b0SDimitris Papastamos WM8983_ROUT2_SPK_VOLUME_CTRL, 6, 1, 1), 2696b3860b0SDimitris Papastamos 2706b3860b0SDimitris Papastamos SOC_SINGLE("OUT3 Switch", WM8983_OUT3_MIXER_CTRL, 2716b3860b0SDimitris Papastamos 6, 1, 1), 2726b3860b0SDimitris Papastamos 2736b3860b0SDimitris Papastamos SOC_SINGLE("OUT4 Switch", WM8983_OUT4_MONO_MIX_CTRL, 2746b3860b0SDimitris Papastamos 6, 1, 1), 2756b3860b0SDimitris Papastamos 2766b3860b0SDimitris Papastamos SOC_SINGLE("High Pass Filter Switch", WM8983_ADC_CONTROL, 8, 1, 0), 2776b3860b0SDimitris Papastamos SOC_ENUM("High Pass Filter Mode", filter_mode), 2786b3860b0SDimitris Papastamos SOC_SINGLE("High Pass Filter Cutoff", WM8983_ADC_CONTROL, 4, 7, 0), 2796b3860b0SDimitris Papastamos 2806b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Aux Bypass Volume", 2816b3860b0SDimitris Papastamos WM8983_LEFT_MIXER_CTRL, WM8983_RIGHT_MIXER_CTRL, 6, 7, 0, 2826b3860b0SDimitris Papastamos aux_tlv), 2836b3860b0SDimitris Papastamos 2846b3860b0SDimitris Papastamos SOC_DOUBLE_R_TLV("Input PGA Bypass Volume", 2856b3860b0SDimitris Papastamos WM8983_LEFT_MIXER_CTRL, WM8983_RIGHT_MIXER_CTRL, 2, 7, 0, 2866b3860b0SDimitris Papastamos bypass_tlv), 2876b3860b0SDimitris Papastamos 2886b3860b0SDimitris Papastamos SOC_ENUM_EXT("Equalizer Function", eqmode, eqmode_get, eqmode_put), 2896b3860b0SDimitris Papastamos SOC_ENUM("EQ1 Cutoff", eq1_cutoff), 2906b3860b0SDimitris Papastamos SOC_SINGLE_TLV("EQ1 Volume", WM8983_EQ1_LOW_SHELF, 0, 24, 1, eq_tlv), 291c46d5c04SMasanari Iida SOC_ENUM("EQ2 Bandwidth", eq2_bw), 2926b3860b0SDimitris Papastamos SOC_ENUM("EQ2 Cutoff", eq2_cutoff), 2936b3860b0SDimitris Papastamos SOC_SINGLE_TLV("EQ2 Volume", WM8983_EQ2_PEAK_1, 0, 24, 1, eq_tlv), 294c46d5c04SMasanari Iida SOC_ENUM("EQ3 Bandwidth", eq3_bw), 2956b3860b0SDimitris Papastamos SOC_ENUM("EQ3 Cutoff", eq3_cutoff), 2966b3860b0SDimitris Papastamos SOC_SINGLE_TLV("EQ3 Volume", WM8983_EQ3_PEAK_2, 0, 24, 1, eq_tlv), 297c46d5c04SMasanari Iida SOC_ENUM("EQ4 Bandwidth", eq4_bw), 2986b3860b0SDimitris Papastamos SOC_ENUM("EQ4 Cutoff", eq4_cutoff), 2996b3860b0SDimitris Papastamos SOC_SINGLE_TLV("EQ4 Volume", WM8983_EQ4_PEAK_3, 0, 24, 1, eq_tlv), 3006b3860b0SDimitris Papastamos SOC_ENUM("EQ5 Cutoff", eq5_cutoff), 3016b3860b0SDimitris Papastamos SOC_SINGLE_TLV("EQ5 Volume", WM8983_EQ5_HIGH_SHELF, 0, 24, 1, eq_tlv), 3026b3860b0SDimitris Papastamos 3036b3860b0SDimitris Papastamos SOC_ENUM("3D Depth", depth_3d), 3046b3860b0SDimitris Papastamos }; 3056b3860b0SDimitris Papastamos 3066b3860b0SDimitris Papastamos static const struct snd_kcontrol_new left_out_mixer[] = { 3076b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("Line Switch", WM8983_LEFT_MIXER_CTRL, 1, 1, 0), 3086b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("Aux Switch", WM8983_LEFT_MIXER_CTRL, 5, 1, 0), 3096b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("PCM Switch", WM8983_LEFT_MIXER_CTRL, 0, 1, 0), 3106b3860b0SDimitris Papastamos }; 3116b3860b0SDimitris Papastamos 3126b3860b0SDimitris Papastamos static const struct snd_kcontrol_new right_out_mixer[] = { 3136b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("Line Switch", WM8983_RIGHT_MIXER_CTRL, 1, 1, 0), 3146b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("Aux Switch", WM8983_RIGHT_MIXER_CTRL, 5, 1, 0), 3156b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("PCM Switch", WM8983_RIGHT_MIXER_CTRL, 0, 1, 0), 3166b3860b0SDimitris Papastamos }; 3176b3860b0SDimitris Papastamos 3186b3860b0SDimitris Papastamos static const struct snd_kcontrol_new left_input_mixer[] = { 3196b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("L2 Switch", WM8983_INPUT_CTRL, 2, 1, 0), 3206b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("MicN Switch", WM8983_INPUT_CTRL, 1, 1, 0), 3216b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("MicP Switch", WM8983_INPUT_CTRL, 0, 1, 0), 3226b3860b0SDimitris Papastamos }; 3236b3860b0SDimitris Papastamos 3246b3860b0SDimitris Papastamos static const struct snd_kcontrol_new right_input_mixer[] = { 3256b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("R2 Switch", WM8983_INPUT_CTRL, 6, 1, 0), 3266b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("MicN Switch", WM8983_INPUT_CTRL, 5, 1, 0), 3276b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("MicP Switch", WM8983_INPUT_CTRL, 4, 1, 0), 3286b3860b0SDimitris Papastamos }; 3296b3860b0SDimitris Papastamos 3306b3860b0SDimitris Papastamos static const struct snd_kcontrol_new left_boost_mixer[] = { 3316b3860b0SDimitris Papastamos SOC_DAPM_SINGLE_TLV("L2 Volume", WM8983_LEFT_ADC_BOOST_CTRL, 3326b3860b0SDimitris Papastamos 4, 7, 0, boost_tlv), 3336b3860b0SDimitris Papastamos SOC_DAPM_SINGLE_TLV("AUXL Volume", WM8983_LEFT_ADC_BOOST_CTRL, 3346b3860b0SDimitris Papastamos 0, 7, 0, boost_tlv) 3356b3860b0SDimitris Papastamos }; 3366b3860b0SDimitris Papastamos 3376b3860b0SDimitris Papastamos static const struct snd_kcontrol_new out3_mixer[] = { 3386b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("LMIX2OUT3 Switch", WM8983_OUT3_MIXER_CTRL, 3396b3860b0SDimitris Papastamos 1, 1, 0), 3406b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("LDAC2OUT3 Switch", WM8983_OUT3_MIXER_CTRL, 3416b3860b0SDimitris Papastamos 0, 1, 0), 3426b3860b0SDimitris Papastamos }; 3436b3860b0SDimitris Papastamos 3446b3860b0SDimitris Papastamos static const struct snd_kcontrol_new out4_mixer[] = { 3456b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("LMIX2OUT4 Switch", WM8983_OUT4_MONO_MIX_CTRL, 3466b3860b0SDimitris Papastamos 4, 1, 0), 3476b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("RMIX2OUT4 Switch", WM8983_OUT4_MONO_MIX_CTRL, 3486b3860b0SDimitris Papastamos 1, 1, 0), 3496b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("LDAC2OUT4 Switch", WM8983_OUT4_MONO_MIX_CTRL, 3506b3860b0SDimitris Papastamos 3, 1, 0), 3516b3860b0SDimitris Papastamos SOC_DAPM_SINGLE("RDAC2OUT4 Switch", WM8983_OUT4_MONO_MIX_CTRL, 3526b3860b0SDimitris Papastamos 0, 1, 0), 3536b3860b0SDimitris Papastamos }; 3546b3860b0SDimitris Papastamos 3556b3860b0SDimitris Papastamos static const struct snd_kcontrol_new right_boost_mixer[] = { 3566b3860b0SDimitris Papastamos SOC_DAPM_SINGLE_TLV("R2 Volume", WM8983_RIGHT_ADC_BOOST_CTRL, 3576b3860b0SDimitris Papastamos 4, 7, 0, boost_tlv), 3586b3860b0SDimitris Papastamos SOC_DAPM_SINGLE_TLV("AUXR Volume", WM8983_RIGHT_ADC_BOOST_CTRL, 3596b3860b0SDimitris Papastamos 0, 7, 0, boost_tlv) 3606b3860b0SDimitris Papastamos }; 3616b3860b0SDimitris Papastamos 3626b3860b0SDimitris Papastamos static const struct snd_soc_dapm_widget wm8983_dapm_widgets[] = { 3636b3860b0SDimitris Papastamos SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8983_POWER_MANAGEMENT_3, 3646b3860b0SDimitris Papastamos 0, 0), 3656b3860b0SDimitris Papastamos SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8983_POWER_MANAGEMENT_3, 3666b3860b0SDimitris Papastamos 1, 0), 3676b3860b0SDimitris Papastamos SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8983_POWER_MANAGEMENT_2, 3686b3860b0SDimitris Papastamos 0, 0), 3696b3860b0SDimitris Papastamos SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8983_POWER_MANAGEMENT_2, 3706b3860b0SDimitris Papastamos 1, 0), 3716b3860b0SDimitris Papastamos 3726b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("Left Output Mixer", WM8983_POWER_MANAGEMENT_3, 3736b3860b0SDimitris Papastamos 2, 0, left_out_mixer, ARRAY_SIZE(left_out_mixer)), 3746b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("Right Output Mixer", WM8983_POWER_MANAGEMENT_3, 3756b3860b0SDimitris Papastamos 3, 0, right_out_mixer, ARRAY_SIZE(right_out_mixer)), 3766b3860b0SDimitris Papastamos 3776b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("Left Input Mixer", WM8983_POWER_MANAGEMENT_2, 3786b3860b0SDimitris Papastamos 2, 0, left_input_mixer, ARRAY_SIZE(left_input_mixer)), 3796b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("Right Input Mixer", WM8983_POWER_MANAGEMENT_2, 3806b3860b0SDimitris Papastamos 3, 0, right_input_mixer, ARRAY_SIZE(right_input_mixer)), 3816b3860b0SDimitris Papastamos 3826b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8983_POWER_MANAGEMENT_2, 3836b3860b0SDimitris Papastamos 4, 0, left_boost_mixer, ARRAY_SIZE(left_boost_mixer)), 3846b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8983_POWER_MANAGEMENT_2, 3856b3860b0SDimitris Papastamos 5, 0, right_boost_mixer, ARRAY_SIZE(right_boost_mixer)), 3866b3860b0SDimitris Papastamos 3876b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("OUT3 Mixer", WM8983_POWER_MANAGEMENT_1, 3886b3860b0SDimitris Papastamos 6, 0, out3_mixer, ARRAY_SIZE(out3_mixer)), 3896b3860b0SDimitris Papastamos 3906b3860b0SDimitris Papastamos SND_SOC_DAPM_MIXER("OUT4 Mixer", WM8983_POWER_MANAGEMENT_1, 3916b3860b0SDimitris Papastamos 7, 0, out4_mixer, ARRAY_SIZE(out4_mixer)), 3926b3860b0SDimitris Papastamos 3936b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("Left Capture PGA", WM8983_LEFT_INP_PGA_GAIN_CTRL, 3946b3860b0SDimitris Papastamos 6, 1, NULL, 0), 3956b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("Right Capture PGA", WM8983_RIGHT_INP_PGA_GAIN_CTRL, 3966b3860b0SDimitris Papastamos 6, 1, NULL, 0), 3976b3860b0SDimitris Papastamos 3986b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("Left Headphone Out", WM8983_POWER_MANAGEMENT_2, 3996b3860b0SDimitris Papastamos 7, 0, NULL, 0), 4006b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("Right Headphone Out", WM8983_POWER_MANAGEMENT_2, 4016b3860b0SDimitris Papastamos 8, 0, NULL, 0), 4026b3860b0SDimitris Papastamos 4036b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("Left Speaker Out", WM8983_POWER_MANAGEMENT_3, 4046b3860b0SDimitris Papastamos 5, 0, NULL, 0), 4056b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("Right Speaker Out", WM8983_POWER_MANAGEMENT_3, 4066b3860b0SDimitris Papastamos 6, 0, NULL, 0), 4076b3860b0SDimitris Papastamos 4086b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("OUT3 Out", WM8983_POWER_MANAGEMENT_3, 4096b3860b0SDimitris Papastamos 7, 0, NULL, 0), 4106b3860b0SDimitris Papastamos 4116b3860b0SDimitris Papastamos SND_SOC_DAPM_PGA("OUT4 Out", WM8983_POWER_MANAGEMENT_3, 4126b3860b0SDimitris Papastamos 8, 0, NULL, 0), 4136b3860b0SDimitris Papastamos 414605b151aSMark Brown SND_SOC_DAPM_SUPPLY("Mic Bias", WM8983_POWER_MANAGEMENT_1, 4, 0, 415605b151aSMark Brown NULL, 0), 4166b3860b0SDimitris Papastamos 4176b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("LIN"), 4186b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("LIP"), 4196b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("RIN"), 4206b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("RIP"), 4216b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("AUXL"), 4226b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("AUXR"), 4236b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("L2"), 4246b3860b0SDimitris Papastamos SND_SOC_DAPM_INPUT("R2"), 4256b3860b0SDimitris Papastamos SND_SOC_DAPM_OUTPUT("HPL"), 4266b3860b0SDimitris Papastamos SND_SOC_DAPM_OUTPUT("HPR"), 4276b3860b0SDimitris Papastamos SND_SOC_DAPM_OUTPUT("SPKL"), 4286b3860b0SDimitris Papastamos SND_SOC_DAPM_OUTPUT("SPKR"), 4296b3860b0SDimitris Papastamos SND_SOC_DAPM_OUTPUT("OUT3"), 4306b3860b0SDimitris Papastamos SND_SOC_DAPM_OUTPUT("OUT4") 4316b3860b0SDimitris Papastamos }; 4326b3860b0SDimitris Papastamos 4336b3860b0SDimitris Papastamos static const struct snd_soc_dapm_route wm8983_audio_map[] = { 4346b3860b0SDimitris Papastamos { "OUT3 Mixer", "LMIX2OUT3 Switch", "Left Output Mixer" }, 4356b3860b0SDimitris Papastamos { "OUT3 Mixer", "LDAC2OUT3 Switch", "Left DAC" }, 4366b3860b0SDimitris Papastamos 4376b3860b0SDimitris Papastamos { "OUT3 Out", NULL, "OUT3 Mixer" }, 4386b3860b0SDimitris Papastamos { "OUT3", NULL, "OUT3 Out" }, 4396b3860b0SDimitris Papastamos 4406b3860b0SDimitris Papastamos { "OUT4 Mixer", "LMIX2OUT4 Switch", "Left Output Mixer" }, 4416b3860b0SDimitris Papastamos { "OUT4 Mixer", "RMIX2OUT4 Switch", "Right Output Mixer" }, 4426b3860b0SDimitris Papastamos { "OUT4 Mixer", "LDAC2OUT4 Switch", "Left DAC" }, 4436b3860b0SDimitris Papastamos { "OUT4 Mixer", "RDAC2OUT4 Switch", "Right DAC" }, 4446b3860b0SDimitris Papastamos 4456b3860b0SDimitris Papastamos { "OUT4 Out", NULL, "OUT4 Mixer" }, 4466b3860b0SDimitris Papastamos { "OUT4", NULL, "OUT4 Out" }, 4476b3860b0SDimitris Papastamos 4486b3860b0SDimitris Papastamos { "Right Output Mixer", "PCM Switch", "Right DAC" }, 4496b3860b0SDimitris Papastamos { "Right Output Mixer", "Aux Switch", "AUXR" }, 4506b3860b0SDimitris Papastamos { "Right Output Mixer", "Line Switch", "Right Boost Mixer" }, 4516b3860b0SDimitris Papastamos 4526b3860b0SDimitris Papastamos { "Left Output Mixer", "PCM Switch", "Left DAC" }, 4536b3860b0SDimitris Papastamos { "Left Output Mixer", "Aux Switch", "AUXL" }, 4546b3860b0SDimitris Papastamos { "Left Output Mixer", "Line Switch", "Left Boost Mixer" }, 4556b3860b0SDimitris Papastamos 4566b3860b0SDimitris Papastamos { "Right Headphone Out", NULL, "Right Output Mixer" }, 4576b3860b0SDimitris Papastamos { "HPR", NULL, "Right Headphone Out" }, 4586b3860b0SDimitris Papastamos 4596b3860b0SDimitris Papastamos { "Left Headphone Out", NULL, "Left Output Mixer" }, 4606b3860b0SDimitris Papastamos { "HPL", NULL, "Left Headphone Out" }, 4616b3860b0SDimitris Papastamos 4626b3860b0SDimitris Papastamos { "Right Speaker Out", NULL, "Right Output Mixer" }, 4636b3860b0SDimitris Papastamos { "SPKR", NULL, "Right Speaker Out" }, 4646b3860b0SDimitris Papastamos 4656b3860b0SDimitris Papastamos { "Left Speaker Out", NULL, "Left Output Mixer" }, 4666b3860b0SDimitris Papastamos { "SPKL", NULL, "Left Speaker Out" }, 4676b3860b0SDimitris Papastamos 4686b3860b0SDimitris Papastamos { "Right ADC", NULL, "Right Boost Mixer" }, 4696b3860b0SDimitris Papastamos 4706b3860b0SDimitris Papastamos { "Right Boost Mixer", "AUXR Volume", "AUXR" }, 4716b3860b0SDimitris Papastamos { "Right Boost Mixer", NULL, "Right Capture PGA" }, 4726b3860b0SDimitris Papastamos { "Right Boost Mixer", "R2 Volume", "R2" }, 4736b3860b0SDimitris Papastamos 4746b3860b0SDimitris Papastamos { "Left ADC", NULL, "Left Boost Mixer" }, 4756b3860b0SDimitris Papastamos 4766b3860b0SDimitris Papastamos { "Left Boost Mixer", "AUXL Volume", "AUXL" }, 4776b3860b0SDimitris Papastamos { "Left Boost Mixer", NULL, "Left Capture PGA" }, 4786b3860b0SDimitris Papastamos { "Left Boost Mixer", "L2 Volume", "L2" }, 4796b3860b0SDimitris Papastamos 4806b3860b0SDimitris Papastamos { "Right Capture PGA", NULL, "Right Input Mixer" }, 4816b3860b0SDimitris Papastamos { "Left Capture PGA", NULL, "Left Input Mixer" }, 4826b3860b0SDimitris Papastamos 4836b3860b0SDimitris Papastamos { "Right Input Mixer", "R2 Switch", "R2" }, 4846b3860b0SDimitris Papastamos { "Right Input Mixer", "MicN Switch", "RIN" }, 4856b3860b0SDimitris Papastamos { "Right Input Mixer", "MicP Switch", "RIP" }, 4866b3860b0SDimitris Papastamos 4876b3860b0SDimitris Papastamos { "Left Input Mixer", "L2 Switch", "L2" }, 4886b3860b0SDimitris Papastamos { "Left Input Mixer", "MicN Switch", "LIN" }, 4896b3860b0SDimitris Papastamos { "Left Input Mixer", "MicP Switch", "LIP" }, 4906b3860b0SDimitris Papastamos }; 4916b3860b0SDimitris Papastamos 4926b3860b0SDimitris Papastamos static int eqmode_get(struct snd_kcontrol *kcontrol, 4936b3860b0SDimitris Papastamos struct snd_ctl_elem_value *ucontrol) 4946b3860b0SDimitris Papastamos { 495ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 4966b3860b0SDimitris Papastamos unsigned int reg; 4976b3860b0SDimitris Papastamos 4986b3860b0SDimitris Papastamos reg = snd_soc_read(codec, WM8983_EQ1_LOW_SHELF); 4996b3860b0SDimitris Papastamos if (reg & WM8983_EQ3DMODE) 5006b3860b0SDimitris Papastamos ucontrol->value.integer.value[0] = 1; 5016b3860b0SDimitris Papastamos else 5026b3860b0SDimitris Papastamos ucontrol->value.integer.value[0] = 0; 5036b3860b0SDimitris Papastamos 5046b3860b0SDimitris Papastamos return 0; 5056b3860b0SDimitris Papastamos } 5066b3860b0SDimitris Papastamos 5076b3860b0SDimitris Papastamos static int eqmode_put(struct snd_kcontrol *kcontrol, 5086b3860b0SDimitris Papastamos struct snd_ctl_elem_value *ucontrol) 5096b3860b0SDimitris Papastamos { 510ea53bf77SLars-Peter Clausen struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 5116b3860b0SDimitris Papastamos unsigned int regpwr2, regpwr3; 5126b3860b0SDimitris Papastamos unsigned int reg_eq; 5136b3860b0SDimitris Papastamos 5146b3860b0SDimitris Papastamos if (ucontrol->value.integer.value[0] != 0 5156b3860b0SDimitris Papastamos && ucontrol->value.integer.value[0] != 1) 5166b3860b0SDimitris Papastamos return -EINVAL; 5176b3860b0SDimitris Papastamos 5186b3860b0SDimitris Papastamos reg_eq = snd_soc_read(codec, WM8983_EQ1_LOW_SHELF); 5196b3860b0SDimitris Papastamos switch ((reg_eq & WM8983_EQ3DMODE) >> WM8983_EQ3DMODE_SHIFT) { 5206b3860b0SDimitris Papastamos case 0: 5216b3860b0SDimitris Papastamos if (!ucontrol->value.integer.value[0]) 5226b3860b0SDimitris Papastamos return 0; 5236b3860b0SDimitris Papastamos break; 5246b3860b0SDimitris Papastamos case 1: 5256b3860b0SDimitris Papastamos if (ucontrol->value.integer.value[0]) 5266b3860b0SDimitris Papastamos return 0; 5276b3860b0SDimitris Papastamos break; 5286b3860b0SDimitris Papastamos } 5296b3860b0SDimitris Papastamos 5306b3860b0SDimitris Papastamos regpwr2 = snd_soc_read(codec, WM8983_POWER_MANAGEMENT_2); 5316b3860b0SDimitris Papastamos regpwr3 = snd_soc_read(codec, WM8983_POWER_MANAGEMENT_3); 5326b3860b0SDimitris Papastamos /* disable the DACs and ADCs */ 5336b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_2, 5346b3860b0SDimitris Papastamos WM8983_ADCENR_MASK | WM8983_ADCENL_MASK, 0); 5356b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_3, 5366b3860b0SDimitris Papastamos WM8983_DACENR_MASK | WM8983_DACENL_MASK, 0); 5376b3860b0SDimitris Papastamos /* set the desired eqmode */ 5386b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_EQ1_LOW_SHELF, 5396b3860b0SDimitris Papastamos WM8983_EQ3DMODE_MASK, 5406b3860b0SDimitris Papastamos ucontrol->value.integer.value[0] 5416b3860b0SDimitris Papastamos << WM8983_EQ3DMODE_SHIFT); 5426b3860b0SDimitris Papastamos /* restore DAC/ADC configuration */ 5436b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_POWER_MANAGEMENT_2, regpwr2); 5446b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_POWER_MANAGEMENT_3, regpwr3); 5456b3860b0SDimitris Papastamos return 0; 5466b3860b0SDimitris Papastamos } 5476b3860b0SDimitris Papastamos 54885e71184SAxel Lin static bool wm8983_writeable(struct device *dev, unsigned int reg) 5496b3860b0SDimitris Papastamos { 55085e71184SAxel Lin switch (reg) { 55185e71184SAxel Lin case WM8983_SOFTWARE_RESET ... WM8983_RIGHT_ADC_DIGITAL_VOL: 55285e71184SAxel Lin case WM8983_EQ1_LOW_SHELF ... WM8983_DAC_LIMITER_2: 55385e71184SAxel Lin case WM8983_NOTCH_FILTER_1 ... WM8983_NOTCH_FILTER_4: 55485e71184SAxel Lin case WM8983_ALC_CONTROL_1 ... WM8983_PLL_K_3: 55585e71184SAxel Lin case WM8983_3D_CONTROL ... WM8983_OUT4_MONO_MIX_CTRL: 55685e71184SAxel Lin case WM8983_BIAS_CTRL: 55785e71184SAxel Lin return true; 55885e71184SAxel Lin default: 55985e71184SAxel Lin return false; 56085e71184SAxel Lin } 5616b3860b0SDimitris Papastamos } 5626b3860b0SDimitris Papastamos 5636b3860b0SDimitris Papastamos static int wm8983_dac_mute(struct snd_soc_dai *dai, int mute) 5646b3860b0SDimitris Papastamos { 5656b3860b0SDimitris Papastamos struct snd_soc_codec *codec = dai->codec; 5666b3860b0SDimitris Papastamos 5676b3860b0SDimitris Papastamos return snd_soc_update_bits(codec, WM8983_DAC_CONTROL, 5686b3860b0SDimitris Papastamos WM8983_SOFTMUTE_MASK, 5696b3860b0SDimitris Papastamos !!mute << WM8983_SOFTMUTE_SHIFT); 5706b3860b0SDimitris Papastamos } 5716b3860b0SDimitris Papastamos 5726b3860b0SDimitris Papastamos static int wm8983_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 5736b3860b0SDimitris Papastamos { 5746b3860b0SDimitris Papastamos struct snd_soc_codec *codec = dai->codec; 5756b3860b0SDimitris Papastamos u16 format, master, bcp, lrp; 5766b3860b0SDimitris Papastamos 5776b3860b0SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 5786b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_I2S: 5796b3860b0SDimitris Papastamos format = 0x2; 5806b3860b0SDimitris Papastamos break; 5816b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_RIGHT_J: 5826b3860b0SDimitris Papastamos format = 0x0; 5836b3860b0SDimitris Papastamos break; 5846b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_LEFT_J: 5856b3860b0SDimitris Papastamos format = 0x1; 5866b3860b0SDimitris Papastamos break; 5876b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_DSP_A: 5886b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_DSP_B: 5896b3860b0SDimitris Papastamos format = 0x3; 5906b3860b0SDimitris Papastamos break; 5916b3860b0SDimitris Papastamos default: 5926b3860b0SDimitris Papastamos dev_err(dai->dev, "Unknown dai format\n"); 5936b3860b0SDimitris Papastamos return -EINVAL; 5946b3860b0SDimitris Papastamos } 5956b3860b0SDimitris Papastamos 5966b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE, 5976b3860b0SDimitris Papastamos WM8983_FMT_MASK, format << WM8983_FMT_SHIFT); 5986b3860b0SDimitris Papastamos 5996b3860b0SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 6006b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_CBM_CFM: 6016b3860b0SDimitris Papastamos master = 1; 6026b3860b0SDimitris Papastamos break; 6036b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_CBS_CFS: 6046b3860b0SDimitris Papastamos master = 0; 6056b3860b0SDimitris Papastamos break; 6066b3860b0SDimitris Papastamos default: 6076b3860b0SDimitris Papastamos dev_err(dai->dev, "Unknown master/slave configuration\n"); 6086b3860b0SDimitris Papastamos return -EINVAL; 6096b3860b0SDimitris Papastamos } 6106b3860b0SDimitris Papastamos 6116b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL, 6126b3860b0SDimitris Papastamos WM8983_MS_MASK, master << WM8983_MS_SHIFT); 6136b3860b0SDimitris Papastamos 6146b3860b0SDimitris Papastamos /* FIXME: We don't currently support DSP A/B modes */ 6156b3860b0SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 6166b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_DSP_A: 6176b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_DSP_B: 6186b3860b0SDimitris Papastamos dev_err(dai->dev, "DSP A/B modes are not supported\n"); 6196b3860b0SDimitris Papastamos return -EINVAL; 6206b3860b0SDimitris Papastamos default: 6216b3860b0SDimitris Papastamos break; 6226b3860b0SDimitris Papastamos } 6236b3860b0SDimitris Papastamos 6246b3860b0SDimitris Papastamos bcp = lrp = 0; 6256b3860b0SDimitris Papastamos switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 6266b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_NB_NF: 6276b3860b0SDimitris Papastamos break; 6286b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_IB_IF: 6296b3860b0SDimitris Papastamos bcp = lrp = 1; 6306b3860b0SDimitris Papastamos break; 6316b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_IB_NF: 6326b3860b0SDimitris Papastamos bcp = 1; 6336b3860b0SDimitris Papastamos break; 6346b3860b0SDimitris Papastamos case SND_SOC_DAIFMT_NB_IF: 6356b3860b0SDimitris Papastamos lrp = 1; 6366b3860b0SDimitris Papastamos break; 6376b3860b0SDimitris Papastamos default: 6386b3860b0SDimitris Papastamos dev_err(dai->dev, "Unknown polarity configuration\n"); 6396b3860b0SDimitris Papastamos return -EINVAL; 6406b3860b0SDimitris Papastamos } 6416b3860b0SDimitris Papastamos 6426b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE, 6436b3860b0SDimitris Papastamos WM8983_LRCP_MASK, lrp << WM8983_LRCP_SHIFT); 6446b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE, 6456b3860b0SDimitris Papastamos WM8983_BCP_MASK, bcp << WM8983_BCP_SHIFT); 6466b3860b0SDimitris Papastamos return 0; 6476b3860b0SDimitris Papastamos } 6486b3860b0SDimitris Papastamos 6496b3860b0SDimitris Papastamos static int wm8983_hw_params(struct snd_pcm_substream *substream, 6506b3860b0SDimitris Papastamos struct snd_pcm_hw_params *params, 6516b3860b0SDimitris Papastamos struct snd_soc_dai *dai) 6526b3860b0SDimitris Papastamos { 6536b3860b0SDimitris Papastamos int i; 6546b3860b0SDimitris Papastamos struct snd_soc_codec *codec = dai->codec; 6556b3860b0SDimitris Papastamos struct wm8983_priv *wm8983 = snd_soc_codec_get_drvdata(codec); 6566b3860b0SDimitris Papastamos u16 blen, srate_idx; 6576b3860b0SDimitris Papastamos u32 tmp; 6586b3860b0SDimitris Papastamos int srate_best; 6596b3860b0SDimitris Papastamos int ret; 6606b3860b0SDimitris Papastamos 6616b3860b0SDimitris Papastamos ret = snd_soc_params_to_bclk(params); 6626b3860b0SDimitris Papastamos if (ret < 0) { 6636b3860b0SDimitris Papastamos dev_err(codec->dev, "Failed to convert params to bclk: %d\n", ret); 6646b3860b0SDimitris Papastamos return ret; 6656b3860b0SDimitris Papastamos } 6666b3860b0SDimitris Papastamos 6676b3860b0SDimitris Papastamos wm8983->bclk = ret; 6686b3860b0SDimitris Papastamos 669af8ff146SMark Brown switch (params_width(params)) { 670af8ff146SMark Brown case 16: 6716b3860b0SDimitris Papastamos blen = 0x0; 6726b3860b0SDimitris Papastamos break; 673af8ff146SMark Brown case 20: 6746b3860b0SDimitris Papastamos blen = 0x1; 6756b3860b0SDimitris Papastamos break; 676af8ff146SMark Brown case 24: 6776b3860b0SDimitris Papastamos blen = 0x2; 6786b3860b0SDimitris Papastamos break; 679af8ff146SMark Brown case 32: 6806b3860b0SDimitris Papastamos blen = 0x3; 6816b3860b0SDimitris Papastamos break; 6826b3860b0SDimitris Papastamos default: 6836b3860b0SDimitris Papastamos dev_err(dai->dev, "Unsupported word length %u\n", 684af8ff146SMark Brown params_width(params)); 6856b3860b0SDimitris Papastamos return -EINVAL; 6866b3860b0SDimitris Papastamos } 6876b3860b0SDimitris Papastamos 6886b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_AUDIO_INTERFACE, 6896b3860b0SDimitris Papastamos WM8983_WL_MASK, blen << WM8983_WL_SHIFT); 6906b3860b0SDimitris Papastamos 6916b3860b0SDimitris Papastamos /* 6926b3860b0SDimitris Papastamos * match to the nearest possible sample rate and rely 6936b3860b0SDimitris Papastamos * on the array index to configure the SR register 6946b3860b0SDimitris Papastamos */ 6956b3860b0SDimitris Papastamos srate_idx = 0; 6966b3860b0SDimitris Papastamos srate_best = abs(srates[0] - params_rate(params)); 6976b3860b0SDimitris Papastamos for (i = 1; i < ARRAY_SIZE(srates); ++i) { 6986b3860b0SDimitris Papastamos if (abs(srates[i] - params_rate(params)) >= srate_best) 6996b3860b0SDimitris Papastamos continue; 7006b3860b0SDimitris Papastamos srate_idx = i; 7016b3860b0SDimitris Papastamos srate_best = abs(srates[i] - params_rate(params)); 7026b3860b0SDimitris Papastamos } 7036b3860b0SDimitris Papastamos 7046b3860b0SDimitris Papastamos dev_dbg(dai->dev, "Selected SRATE = %d\n", srates[srate_idx]); 7056b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_ADDITIONAL_CONTROL, 7066b3860b0SDimitris Papastamos WM8983_SR_MASK, srate_idx << WM8983_SR_SHIFT); 7076b3860b0SDimitris Papastamos 7086b3860b0SDimitris Papastamos dev_dbg(dai->dev, "Target BCLK = %uHz\n", wm8983->bclk); 7096b3860b0SDimitris Papastamos dev_dbg(dai->dev, "SYSCLK = %uHz\n", wm8983->sysclk); 7106b3860b0SDimitris Papastamos 7116b3860b0SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(fs_ratios); ++i) { 7126b3860b0SDimitris Papastamos if (wm8983->sysclk / params_rate(params) 7136b3860b0SDimitris Papastamos == fs_ratios[i].ratio) 7146b3860b0SDimitris Papastamos break; 7156b3860b0SDimitris Papastamos } 7166b3860b0SDimitris Papastamos 7176b3860b0SDimitris Papastamos if (i == ARRAY_SIZE(fs_ratios)) { 7186b3860b0SDimitris Papastamos dev_err(dai->dev, "Unable to configure MCLK ratio %u/%u\n", 7196b3860b0SDimitris Papastamos wm8983->sysclk, params_rate(params)); 7206b3860b0SDimitris Papastamos return -EINVAL; 7216b3860b0SDimitris Papastamos } 7226b3860b0SDimitris Papastamos 7236b3860b0SDimitris Papastamos dev_dbg(dai->dev, "MCLK ratio = %dfs\n", fs_ratios[i].ratio); 7246b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL, 7256b3860b0SDimitris Papastamos WM8983_MCLKDIV_MASK, i << WM8983_MCLKDIV_SHIFT); 7266b3860b0SDimitris Papastamos 7276b3860b0SDimitris Papastamos /* select the appropriate bclk divider */ 7286b3860b0SDimitris Papastamos tmp = (wm8983->sysclk / fs_ratios[i].div) * 10; 7296b3860b0SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(bclk_divs); ++i) { 7306b3860b0SDimitris Papastamos if (wm8983->bclk == tmp / bclk_divs[i]) 7316b3860b0SDimitris Papastamos break; 7326b3860b0SDimitris Papastamos } 7336b3860b0SDimitris Papastamos 7346b3860b0SDimitris Papastamos if (i == ARRAY_SIZE(bclk_divs)) { 7356b3860b0SDimitris Papastamos dev_err(dai->dev, "No matching BCLK divider found\n"); 7366b3860b0SDimitris Papastamos return -EINVAL; 7376b3860b0SDimitris Papastamos } 7386b3860b0SDimitris Papastamos 7396b3860b0SDimitris Papastamos dev_dbg(dai->dev, "BCLK div = %d\n", i); 7406b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL, 7416b3860b0SDimitris Papastamos WM8983_BCLKDIV_MASK, i << WM8983_BCLKDIV_SHIFT); 7426b3860b0SDimitris Papastamos 7436b3860b0SDimitris Papastamos return 0; 7446b3860b0SDimitris Papastamos } 7456b3860b0SDimitris Papastamos 7466b3860b0SDimitris Papastamos struct pll_div { 7476b3860b0SDimitris Papastamos u32 div2:1; 7486b3860b0SDimitris Papastamos u32 n:4; 7496b3860b0SDimitris Papastamos u32 k:24; 7506b3860b0SDimitris Papastamos }; 7516b3860b0SDimitris Papastamos 7526b3860b0SDimitris Papastamos #define FIXED_PLL_SIZE ((1ULL << 24) * 10) 7536b3860b0SDimitris Papastamos static int pll_factors(struct pll_div *pll_div, unsigned int target, 7546b3860b0SDimitris Papastamos unsigned int source) 7556b3860b0SDimitris Papastamos { 7566b3860b0SDimitris Papastamos u64 Kpart; 7576b3860b0SDimitris Papastamos unsigned long int K, Ndiv, Nmod; 7586b3860b0SDimitris Papastamos 7596b3860b0SDimitris Papastamos pll_div->div2 = 0; 7606b3860b0SDimitris Papastamos Ndiv = target / source; 7616b3860b0SDimitris Papastamos if (Ndiv < 6) { 7626b3860b0SDimitris Papastamos source >>= 1; 7636b3860b0SDimitris Papastamos pll_div->div2 = 1; 7646b3860b0SDimitris Papastamos Ndiv = target / source; 7656b3860b0SDimitris Papastamos } 7666b3860b0SDimitris Papastamos 7676b3860b0SDimitris Papastamos if (Ndiv < 6 || Ndiv > 12) { 7686b3860b0SDimitris Papastamos printk(KERN_ERR "%s: WM8983 N value is not within" 7696b3860b0SDimitris Papastamos " the recommended range: %lu\n", __func__, Ndiv); 7706b3860b0SDimitris Papastamos return -EINVAL; 7716b3860b0SDimitris Papastamos } 7726b3860b0SDimitris Papastamos pll_div->n = Ndiv; 7736b3860b0SDimitris Papastamos 7746b3860b0SDimitris Papastamos Nmod = target % source; 7756b3860b0SDimitris Papastamos Kpart = FIXED_PLL_SIZE * (u64)Nmod; 7766b3860b0SDimitris Papastamos 7776b3860b0SDimitris Papastamos do_div(Kpart, source); 7786b3860b0SDimitris Papastamos 7796b3860b0SDimitris Papastamos K = Kpart & 0xffffffff; 7806b3860b0SDimitris Papastamos if ((K % 10) >= 5) 7816b3860b0SDimitris Papastamos K += 5; 7826b3860b0SDimitris Papastamos K /= 10; 7836b3860b0SDimitris Papastamos pll_div->k = K; 7846b3860b0SDimitris Papastamos return 0; 7856b3860b0SDimitris Papastamos } 7866b3860b0SDimitris Papastamos 7876b3860b0SDimitris Papastamos static int wm8983_set_pll(struct snd_soc_dai *dai, int pll_id, 7886b3860b0SDimitris Papastamos int source, unsigned int freq_in, 7896b3860b0SDimitris Papastamos unsigned int freq_out) 7906b3860b0SDimitris Papastamos { 7916b3860b0SDimitris Papastamos int ret; 7926b3860b0SDimitris Papastamos struct snd_soc_codec *codec; 7936b3860b0SDimitris Papastamos struct pll_div pll_div; 7946b3860b0SDimitris Papastamos 7956b3860b0SDimitris Papastamos codec = dai->codec; 7966757d8ccSFabio Estevam if (!freq_in || !freq_out) { 7976757d8ccSFabio Estevam /* disable the PLL */ 7986757d8ccSFabio Estevam snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 7996757d8ccSFabio Estevam WM8983_PLLEN_MASK, 0); 8006757d8ccSFabio Estevam return 0; 8016757d8ccSFabio Estevam } else { 8026b3860b0SDimitris Papastamos ret = pll_factors(&pll_div, freq_out * 4 * 2, freq_in); 8036b3860b0SDimitris Papastamos if (ret) 8046b3860b0SDimitris Papastamos return ret; 8056b3860b0SDimitris Papastamos 8066b3860b0SDimitris Papastamos /* disable the PLL before re-programming it */ 8076b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 8086b3860b0SDimitris Papastamos WM8983_PLLEN_MASK, 0); 8096b3860b0SDimitris Papastamos 8106b3860b0SDimitris Papastamos /* set PLLN and PRESCALE */ 8116b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_PLL_N, 8126b3860b0SDimitris Papastamos (pll_div.div2 << WM8983_PLL_PRESCALE_SHIFT) 8136b3860b0SDimitris Papastamos | pll_div.n); 8146b3860b0SDimitris Papastamos /* set PLLK */ 8156b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_PLL_K_3, pll_div.k & 0x1ff); 8166b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_PLL_K_2, (pll_div.k >> 9) & 0x1ff); 8176b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_PLL_K_1, (pll_div.k >> 18)); 8186b3860b0SDimitris Papastamos /* enable the PLL */ 8196b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 8206b3860b0SDimitris Papastamos WM8983_PLLEN_MASK, WM8983_PLLEN); 8216757d8ccSFabio Estevam } 8226757d8ccSFabio Estevam 8236b3860b0SDimitris Papastamos return 0; 8246b3860b0SDimitris Papastamos } 8256b3860b0SDimitris Papastamos 8266b3860b0SDimitris Papastamos static int wm8983_set_sysclk(struct snd_soc_dai *dai, 8276b3860b0SDimitris Papastamos int clk_id, unsigned int freq, int dir) 8286b3860b0SDimitris Papastamos { 8296b3860b0SDimitris Papastamos struct snd_soc_codec *codec = dai->codec; 8306b3860b0SDimitris Papastamos struct wm8983_priv *wm8983 = snd_soc_codec_get_drvdata(codec); 8316b3860b0SDimitris Papastamos 8326b3860b0SDimitris Papastamos switch (clk_id) { 8336b3860b0SDimitris Papastamos case WM8983_CLKSRC_MCLK: 8346b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL, 8356b3860b0SDimitris Papastamos WM8983_CLKSEL_MASK, 0); 8366b3860b0SDimitris Papastamos break; 8376b3860b0SDimitris Papastamos case WM8983_CLKSRC_PLL: 8386b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_CLOCK_GEN_CONTROL, 8396b3860b0SDimitris Papastamos WM8983_CLKSEL_MASK, WM8983_CLKSEL); 8406b3860b0SDimitris Papastamos break; 8416b3860b0SDimitris Papastamos default: 8426b3860b0SDimitris Papastamos dev_err(dai->dev, "Unknown clock source: %d\n", clk_id); 8436b3860b0SDimitris Papastamos return -EINVAL; 8446b3860b0SDimitris Papastamos } 8456b3860b0SDimitris Papastamos 8466b3860b0SDimitris Papastamos wm8983->sysclk = freq; 8476b3860b0SDimitris Papastamos return 0; 8486b3860b0SDimitris Papastamos } 8496b3860b0SDimitris Papastamos 8506b3860b0SDimitris Papastamos static int wm8983_set_bias_level(struct snd_soc_codec *codec, 8516b3860b0SDimitris Papastamos enum snd_soc_bias_level level) 8526b3860b0SDimitris Papastamos { 8532ee01ac6SMark Brown struct wm8983_priv *wm8983 = snd_soc_codec_get_drvdata(codec); 8546b3860b0SDimitris Papastamos int ret; 8556b3860b0SDimitris Papastamos 8566b3860b0SDimitris Papastamos switch (level) { 8576b3860b0SDimitris Papastamos case SND_SOC_BIAS_ON: 8586b3860b0SDimitris Papastamos case SND_SOC_BIAS_PREPARE: 8596b3860b0SDimitris Papastamos /* VMID at 100k */ 8606b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 8616b3860b0SDimitris Papastamos WM8983_VMIDSEL_MASK, 8626b3860b0SDimitris Papastamos 1 << WM8983_VMIDSEL_SHIFT); 8636b3860b0SDimitris Papastamos break; 8646b3860b0SDimitris Papastamos case SND_SOC_BIAS_STANDBY: 86571ffce00SLars-Peter Clausen if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) { 8662ee01ac6SMark Brown ret = regcache_sync(wm8983->regmap); 8676b3860b0SDimitris Papastamos if (ret < 0) { 8686b3860b0SDimitris Papastamos dev_err(codec->dev, "Failed to sync cache: %d\n", ret); 8696b3860b0SDimitris Papastamos return ret; 8706b3860b0SDimitris Papastamos } 8716b3860b0SDimitris Papastamos /* enable anti-pop features */ 8726b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_OUT4_TO_ADC, 8736b3860b0SDimitris Papastamos WM8983_POBCTRL_MASK | WM8983_DELEN_MASK, 8746b3860b0SDimitris Papastamos WM8983_POBCTRL | WM8983_DELEN); 8756b3860b0SDimitris Papastamos /* enable thermal shutdown */ 8766b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_OUTPUT_CTRL, 8776b3860b0SDimitris Papastamos WM8983_TSDEN_MASK, WM8983_TSDEN); 8786b3860b0SDimitris Papastamos /* enable BIASEN */ 8796b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 8806b3860b0SDimitris Papastamos WM8983_BIASEN_MASK, WM8983_BIASEN); 8816b3860b0SDimitris Papastamos /* VMID at 100k */ 8826b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 8836b3860b0SDimitris Papastamos WM8983_VMIDSEL_MASK, 8846b3860b0SDimitris Papastamos 1 << WM8983_VMIDSEL_SHIFT); 8856b3860b0SDimitris Papastamos msleep(250); 8866b3860b0SDimitris Papastamos /* disable anti-pop features */ 8876b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_OUT4_TO_ADC, 8886b3860b0SDimitris Papastamos WM8983_POBCTRL_MASK | 8896b3860b0SDimitris Papastamos WM8983_DELEN_MASK, 0); 8906b3860b0SDimitris Papastamos } 8916b3860b0SDimitris Papastamos 8926b3860b0SDimitris Papastamos /* VMID at 500k */ 8936b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 8946b3860b0SDimitris Papastamos WM8983_VMIDSEL_MASK, 8956b3860b0SDimitris Papastamos 2 << WM8983_VMIDSEL_SHIFT); 8966b3860b0SDimitris Papastamos break; 8976b3860b0SDimitris Papastamos case SND_SOC_BIAS_OFF: 8986b3860b0SDimitris Papastamos /* disable thermal shutdown */ 8996b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_OUTPUT_CTRL, 9006b3860b0SDimitris Papastamos WM8983_TSDEN_MASK, 0); 9016b3860b0SDimitris Papastamos /* disable VMIDSEL and BIASEN */ 9026b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_POWER_MANAGEMENT_1, 9036b3860b0SDimitris Papastamos WM8983_VMIDSEL_MASK | WM8983_BIASEN_MASK, 9046b3860b0SDimitris Papastamos 0); 9056b3860b0SDimitris Papastamos /* wait for VMID to discharge */ 9066b3860b0SDimitris Papastamos msleep(100); 9076b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_POWER_MANAGEMENT_1, 0); 9086b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_POWER_MANAGEMENT_2, 0); 9096b3860b0SDimitris Papastamos snd_soc_write(codec, WM8983_POWER_MANAGEMENT_3, 0); 9106b3860b0SDimitris Papastamos break; 9116b3860b0SDimitris Papastamos } 9126b3860b0SDimitris Papastamos 9136b3860b0SDimitris Papastamos return 0; 9146b3860b0SDimitris Papastamos } 9156b3860b0SDimitris Papastamos 9166b3860b0SDimitris Papastamos static int wm8983_probe(struct snd_soc_codec *codec) 9176b3860b0SDimitris Papastamos { 9186b3860b0SDimitris Papastamos int ret; 9196b3860b0SDimitris Papastamos int i; 9206b3860b0SDimitris Papastamos 9216f25e4eeSAxel Lin ret = snd_soc_write(codec, WM8983_SOFTWARE_RESET, 0); 9226b3860b0SDimitris Papastamos if (ret < 0) { 9236b3860b0SDimitris Papastamos dev_err(codec->dev, "Failed to issue reset: %d\n", ret); 9246b3860b0SDimitris Papastamos return ret; 9256b3860b0SDimitris Papastamos } 9266b3860b0SDimitris Papastamos 9276b3860b0SDimitris Papastamos /* set the vol/gain update bits */ 9286b3860b0SDimitris Papastamos for (i = 0; i < ARRAY_SIZE(vol_update_regs); ++i) 9296b3860b0SDimitris Papastamos snd_soc_update_bits(codec, vol_update_regs[i], 9306b3860b0SDimitris Papastamos 0x100, 0x100); 9316b3860b0SDimitris Papastamos 9326b3860b0SDimitris Papastamos /* mute all outputs and set PGAs to minimum gain */ 9336b3860b0SDimitris Papastamos for (i = WM8983_LOUT1_HP_VOLUME_CTRL; 9346b3860b0SDimitris Papastamos i <= WM8983_OUT4_MONO_MIX_CTRL; ++i) 9356b3860b0SDimitris Papastamos snd_soc_update_bits(codec, i, 0x40, 0x40); 9366b3860b0SDimitris Papastamos 9376b3860b0SDimitris Papastamos /* enable soft mute */ 9386b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_DAC_CONTROL, 9396b3860b0SDimitris Papastamos WM8983_SOFTMUTE_MASK, 9406b3860b0SDimitris Papastamos WM8983_SOFTMUTE); 9416b3860b0SDimitris Papastamos 9426b3860b0SDimitris Papastamos /* enable BIASCUT */ 9436b3860b0SDimitris Papastamos snd_soc_update_bits(codec, WM8983_BIAS_CTRL, 9446b3860b0SDimitris Papastamos WM8983_BIASCUT, WM8983_BIASCUT); 9456b3860b0SDimitris Papastamos return 0; 9466b3860b0SDimitris Papastamos } 9476b3860b0SDimitris Papastamos 94885e7652dSLars-Peter Clausen static const struct snd_soc_dai_ops wm8983_dai_ops = { 9496b3860b0SDimitris Papastamos .digital_mute = wm8983_dac_mute, 9506b3860b0SDimitris Papastamos .hw_params = wm8983_hw_params, 9516b3860b0SDimitris Papastamos .set_fmt = wm8983_set_fmt, 9526b3860b0SDimitris Papastamos .set_sysclk = wm8983_set_sysclk, 9536b3860b0SDimitris Papastamos .set_pll = wm8983_set_pll 9546b3860b0SDimitris Papastamos }; 9556b3860b0SDimitris Papastamos 9566b3860b0SDimitris Papastamos #define WM8983_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 9576b3860b0SDimitris Papastamos SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 9586b3860b0SDimitris Papastamos 9596b3860b0SDimitris Papastamos static struct snd_soc_dai_driver wm8983_dai = { 9606b3860b0SDimitris Papastamos .name = "wm8983-hifi", 9616b3860b0SDimitris Papastamos .playback = { 9626b3860b0SDimitris Papastamos .stream_name = "Playback", 9636b3860b0SDimitris Papastamos .channels_min = 2, 9646b3860b0SDimitris Papastamos .channels_max = 2, 9656b3860b0SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_48000, 9666b3860b0SDimitris Papastamos .formats = WM8983_FORMATS, 9676b3860b0SDimitris Papastamos }, 9686b3860b0SDimitris Papastamos .capture = { 9696b3860b0SDimitris Papastamos .stream_name = "Capture", 9706b3860b0SDimitris Papastamos .channels_min = 2, 9716b3860b0SDimitris Papastamos .channels_max = 2, 9726b3860b0SDimitris Papastamos .rates = SNDRV_PCM_RATE_8000_48000, 9736b3860b0SDimitris Papastamos .formats = WM8983_FORMATS, 9746b3860b0SDimitris Papastamos }, 9756b3860b0SDimitris Papastamos .ops = &wm8983_dai_ops, 9766b3860b0SDimitris Papastamos .symmetric_rates = 1 9776b3860b0SDimitris Papastamos }; 9786b3860b0SDimitris Papastamos 9796b3860b0SDimitris Papastamos static struct snd_soc_codec_driver soc_codec_dev_wm8983 = { 9806b3860b0SDimitris Papastamos .probe = wm8983_probe, 9816b3860b0SDimitris Papastamos .set_bias_level = wm8983_set_bias_level, 982387fe80fSLars-Peter Clausen .suspend_bias_off = true, 9836b3860b0SDimitris Papastamos .controls = wm8983_snd_controls, 9846b3860b0SDimitris Papastamos .num_controls = ARRAY_SIZE(wm8983_snd_controls), 9856b3860b0SDimitris Papastamos .dapm_widgets = wm8983_dapm_widgets, 9866b3860b0SDimitris Papastamos .num_dapm_widgets = ARRAY_SIZE(wm8983_dapm_widgets), 9876b3860b0SDimitris Papastamos .dapm_routes = wm8983_audio_map, 9886b3860b0SDimitris Papastamos .num_dapm_routes = ARRAY_SIZE(wm8983_audio_map), 9892ee01ac6SMark Brown }; 9902ee01ac6SMark Brown 9912ee01ac6SMark Brown static const struct regmap_config wm8983_regmap = { 9922ee01ac6SMark Brown .reg_bits = 7, 9932ee01ac6SMark Brown .val_bits = 9, 9942ee01ac6SMark Brown 9952ee01ac6SMark Brown .reg_defaults = wm8983_defaults, 9962ee01ac6SMark Brown .num_reg_defaults = ARRAY_SIZE(wm8983_defaults), 9972ee01ac6SMark Brown .cache_type = REGCACHE_RBTREE, 99885e71184SAxel Lin .max_register = WM8983_MAX_REGISTER, 9992ee01ac6SMark Brown 100085e71184SAxel Lin .writeable_reg = wm8983_writeable, 10016b3860b0SDimitris Papastamos }; 10026b3860b0SDimitris Papastamos 10036b3860b0SDimitris Papastamos #if defined(CONFIG_SPI_MASTER) 10047a79e94eSBill Pemberton static int wm8983_spi_probe(struct spi_device *spi) 10056b3860b0SDimitris Papastamos { 10066b3860b0SDimitris Papastamos struct wm8983_priv *wm8983; 10076b3860b0SDimitris Papastamos int ret; 10086b3860b0SDimitris Papastamos 1009d6e2dc15SMark Brown wm8983 = devm_kzalloc(&spi->dev, sizeof *wm8983, GFP_KERNEL); 10106b3860b0SDimitris Papastamos if (!wm8983) 10116b3860b0SDimitris Papastamos return -ENOMEM; 10126b3860b0SDimitris Papastamos 10132ee01ac6SMark Brown wm8983->regmap = devm_regmap_init_spi(spi, &wm8983_regmap); 10142ee01ac6SMark Brown if (IS_ERR(wm8983->regmap)) { 10152ee01ac6SMark Brown ret = PTR_ERR(wm8983->regmap); 10162ee01ac6SMark Brown dev_err(&spi->dev, "Failed to init regmap: %d\n", ret); 10172ee01ac6SMark Brown return ret; 10182ee01ac6SMark Brown } 10192ee01ac6SMark Brown 10206b3860b0SDimitris Papastamos spi_set_drvdata(spi, wm8983); 10216b3860b0SDimitris Papastamos 10226b3860b0SDimitris Papastamos ret = snd_soc_register_codec(&spi->dev, 10236b3860b0SDimitris Papastamos &soc_codec_dev_wm8983, &wm8983_dai, 1); 10246b3860b0SDimitris Papastamos return ret; 10256b3860b0SDimitris Papastamos } 10266b3860b0SDimitris Papastamos 10277a79e94eSBill Pemberton static int wm8983_spi_remove(struct spi_device *spi) 10286b3860b0SDimitris Papastamos { 10296b3860b0SDimitris Papastamos snd_soc_unregister_codec(&spi->dev); 10306b3860b0SDimitris Papastamos return 0; 10316b3860b0SDimitris Papastamos } 10326b3860b0SDimitris Papastamos 10336b3860b0SDimitris Papastamos static struct spi_driver wm8983_spi_driver = { 10346b3860b0SDimitris Papastamos .driver = { 10356b3860b0SDimitris Papastamos .name = "wm8983", 10366b3860b0SDimitris Papastamos .owner = THIS_MODULE, 10376b3860b0SDimitris Papastamos }, 10386b3860b0SDimitris Papastamos .probe = wm8983_spi_probe, 10397a79e94eSBill Pemberton .remove = wm8983_spi_remove 10406b3860b0SDimitris Papastamos }; 10416b3860b0SDimitris Papastamos #endif 10426b3860b0SDimitris Papastamos 1043060ec80aSFabio Estevam #if IS_ENABLED(CONFIG_I2C) 10447a79e94eSBill Pemberton static int wm8983_i2c_probe(struct i2c_client *i2c, 10456b3860b0SDimitris Papastamos const struct i2c_device_id *id) 10466b3860b0SDimitris Papastamos { 10476b3860b0SDimitris Papastamos struct wm8983_priv *wm8983; 10486b3860b0SDimitris Papastamos int ret; 10496b3860b0SDimitris Papastamos 1050d6e2dc15SMark Brown wm8983 = devm_kzalloc(&i2c->dev, sizeof *wm8983, GFP_KERNEL); 10516b3860b0SDimitris Papastamos if (!wm8983) 10526b3860b0SDimitris Papastamos return -ENOMEM; 10536b3860b0SDimitris Papastamos 10542ee01ac6SMark Brown wm8983->regmap = devm_regmap_init_i2c(i2c, &wm8983_regmap); 10552ee01ac6SMark Brown if (IS_ERR(wm8983->regmap)) { 10562ee01ac6SMark Brown ret = PTR_ERR(wm8983->regmap); 10572ee01ac6SMark Brown dev_err(&i2c->dev, "Failed to init regmap: %d\n", ret); 10582ee01ac6SMark Brown return ret; 10592ee01ac6SMark Brown } 10602ee01ac6SMark Brown 10616b3860b0SDimitris Papastamos i2c_set_clientdata(i2c, wm8983); 10626b3860b0SDimitris Papastamos 10636b3860b0SDimitris Papastamos ret = snd_soc_register_codec(&i2c->dev, 10646b3860b0SDimitris Papastamos &soc_codec_dev_wm8983, &wm8983_dai, 1); 1065d6e2dc15SMark Brown 10666b3860b0SDimitris Papastamos return ret; 10676b3860b0SDimitris Papastamos } 10686b3860b0SDimitris Papastamos 10697a79e94eSBill Pemberton static int wm8983_i2c_remove(struct i2c_client *client) 10706b3860b0SDimitris Papastamos { 10716b3860b0SDimitris Papastamos snd_soc_unregister_codec(&client->dev); 10726b3860b0SDimitris Papastamos return 0; 10736b3860b0SDimitris Papastamos } 10746b3860b0SDimitris Papastamos 10756b3860b0SDimitris Papastamos static const struct i2c_device_id wm8983_i2c_id[] = { 10766b3860b0SDimitris Papastamos { "wm8983", 0 }, 10776b3860b0SDimitris Papastamos { } 10786b3860b0SDimitris Papastamos }; 10796b3860b0SDimitris Papastamos MODULE_DEVICE_TABLE(i2c, wm8983_i2c_id); 10806b3860b0SDimitris Papastamos 10816b3860b0SDimitris Papastamos static struct i2c_driver wm8983_i2c_driver = { 10826b3860b0SDimitris Papastamos .driver = { 10836b3860b0SDimitris Papastamos .name = "wm8983", 10846b3860b0SDimitris Papastamos .owner = THIS_MODULE, 10856b3860b0SDimitris Papastamos }, 10866b3860b0SDimitris Papastamos .probe = wm8983_i2c_probe, 10877a79e94eSBill Pemberton .remove = wm8983_i2c_remove, 10886b3860b0SDimitris Papastamos .id_table = wm8983_i2c_id 10896b3860b0SDimitris Papastamos }; 10906b3860b0SDimitris Papastamos #endif 10916b3860b0SDimitris Papastamos 10926b3860b0SDimitris Papastamos static int __init wm8983_modinit(void) 10936b3860b0SDimitris Papastamos { 10946b3860b0SDimitris Papastamos int ret = 0; 10956b3860b0SDimitris Papastamos 1096060ec80aSFabio Estevam #if IS_ENABLED(CONFIG_I2C) 10976b3860b0SDimitris Papastamos ret = i2c_add_driver(&wm8983_i2c_driver); 10986b3860b0SDimitris Papastamos if (ret) { 10996b3860b0SDimitris Papastamos printk(KERN_ERR "Failed to register wm8983 I2C driver: %d\n", 11006b3860b0SDimitris Papastamos ret); 11016b3860b0SDimitris Papastamos } 11026b3860b0SDimitris Papastamos #endif 11036b3860b0SDimitris Papastamos #if defined(CONFIG_SPI_MASTER) 11046b3860b0SDimitris Papastamos ret = spi_register_driver(&wm8983_spi_driver); 11056b3860b0SDimitris Papastamos if (ret != 0) { 11066b3860b0SDimitris Papastamos printk(KERN_ERR "Failed to register wm8983 SPI driver: %d\n", 11076b3860b0SDimitris Papastamos ret); 11086b3860b0SDimitris Papastamos } 11096b3860b0SDimitris Papastamos #endif 11106b3860b0SDimitris Papastamos return ret; 11116b3860b0SDimitris Papastamos } 11126b3860b0SDimitris Papastamos module_init(wm8983_modinit); 11136b3860b0SDimitris Papastamos 11146b3860b0SDimitris Papastamos static void __exit wm8983_exit(void) 11156b3860b0SDimitris Papastamos { 1116060ec80aSFabio Estevam #if IS_ENABLED(CONFIG_I2C) 11176b3860b0SDimitris Papastamos i2c_del_driver(&wm8983_i2c_driver); 11186b3860b0SDimitris Papastamos #endif 11196b3860b0SDimitris Papastamos #if defined(CONFIG_SPI_MASTER) 11206b3860b0SDimitris Papastamos spi_unregister_driver(&wm8983_spi_driver); 11216b3860b0SDimitris Papastamos #endif 11226b3860b0SDimitris Papastamos } 11236b3860b0SDimitris Papastamos module_exit(wm8983_exit); 11246b3860b0SDimitris Papastamos 11256b3860b0SDimitris Papastamos MODULE_DESCRIPTION("ASoC WM8983 driver"); 11266b3860b0SDimitris Papastamos MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>"); 11276b3860b0SDimitris Papastamos MODULE_LICENSE("GPL"); 1128