xref: /openbmc/linux/sound/soc/codecs/wm8974.c (revision 0c874100)
1 /*
2  * wm8974.c  --  WM8974 ALSA Soc Audio driver
3  *
4  * Copyright 2006-2009 Wolfson Microelectronics PLC.
5  *
6  * Author: Liam Girdwood <Liam.Girdwood@wolfsonmicro.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License version 2 as
10  * published by the Free Software Foundation.
11  */
12 
13 #include <linux/module.h>
14 #include <linux/kernel.h>
15 #include <linux/init.h>
16 #include <linux/delay.h>
17 #include <linux/pm.h>
18 #include <linux/i2c.h>
19 #include <linux/regmap.h>
20 #include <linux/slab.h>
21 #include <sound/core.h>
22 #include <sound/pcm.h>
23 #include <sound/pcm_params.h>
24 #include <sound/soc.h>
25 #include <sound/initval.h>
26 #include <sound/tlv.h>
27 
28 #include "wm8974.h"
29 
30 struct wm8974_priv {
31 	unsigned int mclk;
32 	unsigned int fs;
33 };
34 
35 static const struct reg_default wm8974_reg_defaults[] = {
36 	{  0, 0x0000 }, {  1, 0x0000 }, {  2, 0x0000 }, {  3, 0x0000 },
37 	{  4, 0x0050 }, {  5, 0x0000 }, {  6, 0x0140 }, {  7, 0x0000 },
38 	{  8, 0x0000 }, {  9, 0x0000 }, { 10, 0x0000 }, { 11, 0x00ff },
39 	{ 12, 0x0000 }, { 13, 0x0000 }, { 14, 0x0100 }, { 15, 0x00ff },
40 	{ 16, 0x0000 }, { 17, 0x0000 }, { 18, 0x012c }, { 19, 0x002c },
41 	{ 20, 0x002c }, { 21, 0x002c }, { 22, 0x002c }, { 23, 0x0000 },
42 	{ 24, 0x0032 }, { 25, 0x0000 }, { 26, 0x0000 }, { 27, 0x0000 },
43 	{ 28, 0x0000 }, { 29, 0x0000 }, { 30, 0x0000 }, { 31, 0x0000 },
44 	{ 32, 0x0038 }, { 33, 0x000b }, { 34, 0x0032 }, { 35, 0x0000 },
45 	{ 36, 0x0008 }, { 37, 0x000c }, { 38, 0x0093 }, { 39, 0x00e9 },
46 	{ 40, 0x0000 }, { 41, 0x0000 }, { 42, 0x0000 }, { 43, 0x0000 },
47 	{ 44, 0x0003 }, { 45, 0x0010 }, { 46, 0x0000 }, { 47, 0x0000 },
48 	{ 48, 0x0000 }, { 49, 0x0002 }, { 50, 0x0000 }, { 51, 0x0000 },
49 	{ 52, 0x0000 }, { 53, 0x0000 }, { 54, 0x0039 }, { 55, 0x0000 },
50 	{ 56, 0x0000 },
51 };
52 
53 #define WM8974_POWER1_BIASEN  0x08
54 #define WM8974_POWER1_BUFIOEN 0x04
55 
56 #define wm8974_reset(c)	snd_soc_component_write(c, WM8974_RESET, 0)
57 
58 static const char *wm8974_companding[] = {"Off", "NC", "u-law", "A-law" };
59 static const char *wm8974_deemp[] = {"None", "32kHz", "44.1kHz", "48kHz" };
60 static const char *wm8974_eqmode[] = {"Capture", "Playback" };
61 static const char *wm8974_bw[] = {"Narrow", "Wide" };
62 static const char *wm8974_eq1[] = {"80Hz", "105Hz", "135Hz", "175Hz" };
63 static const char *wm8974_eq2[] = {"230Hz", "300Hz", "385Hz", "500Hz" };
64 static const char *wm8974_eq3[] = {"650Hz", "850Hz", "1.1kHz", "1.4kHz" };
65 static const char *wm8974_eq4[] = {"1.8kHz", "2.4kHz", "3.2kHz", "4.1kHz" };
66 static const char *wm8974_eq5[] = {"5.3kHz", "6.9kHz", "9kHz", "11.7kHz" };
67 static const char *wm8974_alc[] = {"ALC", "Limiter" };
68 
69 static const struct soc_enum wm8974_enum[] = {
70 	SOC_ENUM_SINGLE(WM8974_COMP, 1, 4, wm8974_companding), /* adc */
71 	SOC_ENUM_SINGLE(WM8974_COMP, 3, 4, wm8974_companding), /* dac */
72 	SOC_ENUM_SINGLE(WM8974_DAC,  4, 4, wm8974_deemp),
73 	SOC_ENUM_SINGLE(WM8974_EQ1,  8, 2, wm8974_eqmode),
74 
75 	SOC_ENUM_SINGLE(WM8974_EQ1,  5, 4, wm8974_eq1),
76 	SOC_ENUM_SINGLE(WM8974_EQ2,  8, 2, wm8974_bw),
77 	SOC_ENUM_SINGLE(WM8974_EQ2,  5, 4, wm8974_eq2),
78 	SOC_ENUM_SINGLE(WM8974_EQ3,  8, 2, wm8974_bw),
79 
80 	SOC_ENUM_SINGLE(WM8974_EQ3,  5, 4, wm8974_eq3),
81 	SOC_ENUM_SINGLE(WM8974_EQ4,  8, 2, wm8974_bw),
82 	SOC_ENUM_SINGLE(WM8974_EQ4,  5, 4, wm8974_eq4),
83 	SOC_ENUM_SINGLE(WM8974_EQ5,  8, 2, wm8974_bw),
84 
85 	SOC_ENUM_SINGLE(WM8974_EQ5,  5, 4, wm8974_eq5),
86 	SOC_ENUM_SINGLE(WM8974_ALC3,  8, 2, wm8974_alc),
87 };
88 
89 static const char *wm8974_auxmode_text[] = { "Buffer", "Mixer" };
90 
91 static SOC_ENUM_SINGLE_DECL(wm8974_auxmode,
92 			    WM8974_INPUT,  3, wm8974_auxmode_text);
93 
94 static const DECLARE_TLV_DB_SCALE(digital_tlv, -12750, 50, 1);
95 static const DECLARE_TLV_DB_SCALE(eq_tlv, -1200, 100, 0);
96 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1200, 75, 0);
97 static const DECLARE_TLV_DB_SCALE(spk_tlv, -5700, 100, 0);
98 
99 static const struct snd_kcontrol_new wm8974_snd_controls[] = {
100 
101 SOC_SINGLE("Digital Loopback Switch", WM8974_COMP, 0, 1, 0),
102 
103 SOC_ENUM("DAC Companding", wm8974_enum[1]),
104 SOC_ENUM("ADC Companding", wm8974_enum[0]),
105 
106 SOC_ENUM("Playback De-emphasis", wm8974_enum[2]),
107 SOC_SINGLE("DAC Inversion Switch", WM8974_DAC, 0, 1, 0),
108 
109 SOC_SINGLE_TLV("PCM Volume", WM8974_DACVOL, 0, 255, 0, digital_tlv),
110 
111 SOC_SINGLE("High Pass Filter Switch", WM8974_ADC, 8, 1, 0),
112 SOC_SINGLE("High Pass Cut Off", WM8974_ADC, 4, 7, 0),
113 SOC_SINGLE("ADC Inversion Switch", WM8974_ADC, 0, 1, 0),
114 
115 SOC_SINGLE_TLV("Capture Volume", WM8974_ADCVOL,  0, 255, 0, digital_tlv),
116 
117 SOC_ENUM("Equaliser Function", wm8974_enum[3]),
118 SOC_ENUM("EQ1 Cut Off", wm8974_enum[4]),
119 SOC_SINGLE_TLV("EQ1 Volume", WM8974_EQ1,  0, 24, 1, eq_tlv),
120 
121 SOC_ENUM("Equaliser EQ2 Bandwidth", wm8974_enum[5]),
122 SOC_ENUM("EQ2 Cut Off", wm8974_enum[6]),
123 SOC_SINGLE_TLV("EQ2 Volume", WM8974_EQ2,  0, 24, 1, eq_tlv),
124 
125 SOC_ENUM("Equaliser EQ3 Bandwidth", wm8974_enum[7]),
126 SOC_ENUM("EQ3 Cut Off", wm8974_enum[8]),
127 SOC_SINGLE_TLV("EQ3 Volume", WM8974_EQ3,  0, 24, 1, eq_tlv),
128 
129 SOC_ENUM("Equaliser EQ4 Bandwidth", wm8974_enum[9]),
130 SOC_ENUM("EQ4 Cut Off", wm8974_enum[10]),
131 SOC_SINGLE_TLV("EQ4 Volume", WM8974_EQ4,  0, 24, 1, eq_tlv),
132 
133 SOC_ENUM("Equaliser EQ5 Bandwidth", wm8974_enum[11]),
134 SOC_ENUM("EQ5 Cut Off", wm8974_enum[12]),
135 SOC_SINGLE_TLV("EQ5 Volume", WM8974_EQ5,  0, 24, 1, eq_tlv),
136 
137 SOC_SINGLE("DAC Playback Limiter Switch", WM8974_DACLIM1,  8, 1, 0),
138 SOC_SINGLE("DAC Playback Limiter Decay", WM8974_DACLIM1,  4, 15, 0),
139 SOC_SINGLE("DAC Playback Limiter Attack", WM8974_DACLIM1,  0, 15, 0),
140 
141 SOC_SINGLE("DAC Playback Limiter Threshold", WM8974_DACLIM2,  4, 7, 0),
142 SOC_SINGLE("DAC Playback Limiter Boost", WM8974_DACLIM2,  0, 15, 0),
143 
144 SOC_SINGLE("ALC Enable Switch", WM8974_ALC1,  8, 1, 0),
145 SOC_SINGLE("ALC Capture Max Gain", WM8974_ALC1,  3, 7, 0),
146 SOC_SINGLE("ALC Capture Min Gain", WM8974_ALC1,  0, 7, 0),
147 
148 SOC_SINGLE("ALC Capture ZC Switch", WM8974_ALC2,  8, 1, 0),
149 SOC_SINGLE("ALC Capture Hold", WM8974_ALC2,  4, 7, 0),
150 SOC_SINGLE("ALC Capture Target", WM8974_ALC2,  0, 15, 0),
151 
152 SOC_ENUM("ALC Capture Mode", wm8974_enum[13]),
153 SOC_SINGLE("ALC Capture Decay", WM8974_ALC3,  4, 15, 0),
154 SOC_SINGLE("ALC Capture Attack", WM8974_ALC3,  0, 15, 0),
155 
156 SOC_SINGLE("ALC Capture Noise Gate Switch", WM8974_NGATE,  3, 1, 0),
157 SOC_SINGLE("ALC Capture Noise Gate Threshold", WM8974_NGATE,  0, 7, 0),
158 
159 SOC_SINGLE("Capture PGA ZC Switch", WM8974_INPPGA,  7, 1, 0),
160 SOC_SINGLE_TLV("Capture PGA Volume", WM8974_INPPGA,  0, 63, 0, inpga_tlv),
161 
162 SOC_SINGLE("Speaker Playback ZC Switch", WM8974_SPKVOL,  7, 1, 0),
163 SOC_SINGLE("Speaker Playback Switch", WM8974_SPKVOL,  6, 1, 1),
164 SOC_SINGLE_TLV("Speaker Playback Volume", WM8974_SPKVOL,  0, 63, 0, spk_tlv),
165 
166 SOC_ENUM("Aux Mode", wm8974_auxmode),
167 
168 SOC_SINGLE("Capture Boost(+20dB)", WM8974_ADCBOOST,  8, 1, 0),
169 SOC_SINGLE("Mono Playback Switch", WM8974_MONOMIX, 6, 1, 1),
170 
171 /* DAC / ADC oversampling */
172 SOC_SINGLE("DAC 128x Oversampling Switch", WM8974_DAC, 8, 1, 0),
173 SOC_SINGLE("ADC 128x Oversampling Switch", WM8974_ADC, 8, 1, 0),
174 };
175 
176 /* Speaker Output Mixer */
177 static const struct snd_kcontrol_new wm8974_speaker_mixer_controls[] = {
178 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_SPKMIX, 1, 1, 0),
179 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_SPKMIX, 5, 1, 0),
180 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_SPKMIX, 0, 1, 0),
181 };
182 
183 /* Mono Output Mixer */
184 static const struct snd_kcontrol_new wm8974_mono_mixer_controls[] = {
185 SOC_DAPM_SINGLE("Line Bypass Switch", WM8974_MONOMIX, 1, 1, 0),
186 SOC_DAPM_SINGLE("Aux Playback Switch", WM8974_MONOMIX, 2, 1, 0),
187 SOC_DAPM_SINGLE("PCM Playback Switch", WM8974_MONOMIX, 0, 1, 0),
188 };
189 
190 /* Boost mixer */
191 static const struct snd_kcontrol_new wm8974_boost_mixer[] = {
192 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPPGA, 6, 1, 0),
193 };
194 
195 /* Input PGA */
196 static const struct snd_kcontrol_new wm8974_inpga[] = {
197 SOC_DAPM_SINGLE("Aux Switch", WM8974_INPUT, 2, 1, 0),
198 SOC_DAPM_SINGLE("MicN Switch", WM8974_INPUT, 1, 1, 0),
199 SOC_DAPM_SINGLE("MicP Switch", WM8974_INPUT, 0, 1, 0),
200 };
201 
202 /* AUX Input boost vol */
203 static const struct snd_kcontrol_new wm8974_aux_boost_controls =
204 SOC_DAPM_SINGLE("Aux Volume", WM8974_ADCBOOST, 0, 7, 0);
205 
206 /* Mic Input boost vol */
207 static const struct snd_kcontrol_new wm8974_mic_boost_controls =
208 SOC_DAPM_SINGLE("Mic Volume", WM8974_ADCBOOST, 4, 7, 0);
209 
210 static const struct snd_soc_dapm_widget wm8974_dapm_widgets[] = {
211 SND_SOC_DAPM_MIXER("Speaker Mixer", WM8974_POWER3, 2, 0,
212 	&wm8974_speaker_mixer_controls[0],
213 	ARRAY_SIZE(wm8974_speaker_mixer_controls)),
214 SND_SOC_DAPM_MIXER("Mono Mixer", WM8974_POWER3, 3, 0,
215 	&wm8974_mono_mixer_controls[0],
216 	ARRAY_SIZE(wm8974_mono_mixer_controls)),
217 SND_SOC_DAPM_DAC("DAC", "HiFi Playback", WM8974_POWER3, 0, 0),
218 SND_SOC_DAPM_ADC("ADC", "HiFi Capture", WM8974_POWER2, 0, 0),
219 SND_SOC_DAPM_PGA("Aux Input", WM8974_POWER1, 6, 0, NULL, 0),
220 SND_SOC_DAPM_PGA("SpkN Out", WM8974_POWER3, 5, 0, NULL, 0),
221 SND_SOC_DAPM_PGA("SpkP Out", WM8974_POWER3, 6, 0, NULL, 0),
222 SND_SOC_DAPM_PGA("Mono Out", WM8974_POWER3, 7, 0, NULL, 0),
223 
224 SND_SOC_DAPM_MIXER("Input PGA", WM8974_POWER2, 2, 0, wm8974_inpga,
225 		   ARRAY_SIZE(wm8974_inpga)),
226 SND_SOC_DAPM_MIXER("Boost Mixer", WM8974_POWER2, 4, 0,
227 		   wm8974_boost_mixer, ARRAY_SIZE(wm8974_boost_mixer)),
228 
229 SND_SOC_DAPM_SUPPLY("Mic Bias", WM8974_POWER1, 4, 0, NULL, 0),
230 
231 SND_SOC_DAPM_INPUT("MICN"),
232 SND_SOC_DAPM_INPUT("MICP"),
233 SND_SOC_DAPM_INPUT("AUX"),
234 SND_SOC_DAPM_OUTPUT("MONOOUT"),
235 SND_SOC_DAPM_OUTPUT("SPKOUTP"),
236 SND_SOC_DAPM_OUTPUT("SPKOUTN"),
237 };
238 
239 static const struct snd_soc_dapm_route wm8974_dapm_routes[] = {
240 	/* Mono output mixer */
241 	{"Mono Mixer", "PCM Playback Switch", "DAC"},
242 	{"Mono Mixer", "Aux Playback Switch", "Aux Input"},
243 	{"Mono Mixer", "Line Bypass Switch", "Boost Mixer"},
244 
245 	/* Speaker output mixer */
246 	{"Speaker Mixer", "PCM Playback Switch", "DAC"},
247 	{"Speaker Mixer", "Aux Playback Switch", "Aux Input"},
248 	{"Speaker Mixer", "Line Bypass Switch", "Boost Mixer"},
249 
250 	/* Outputs */
251 	{"Mono Out", NULL, "Mono Mixer"},
252 	{"MONOOUT", NULL, "Mono Out"},
253 	{"SpkN Out", NULL, "Speaker Mixer"},
254 	{"SpkP Out", NULL, "Speaker Mixer"},
255 	{"SPKOUTN", NULL, "SpkN Out"},
256 	{"SPKOUTP", NULL, "SpkP Out"},
257 
258 	/* Boost Mixer */
259 	{"ADC", NULL, "Boost Mixer"},
260 	{"Boost Mixer", "Aux Switch", "Aux Input"},
261 	{"Boost Mixer", NULL, "Input PGA"},
262 	{"Boost Mixer", NULL, "MICP"},
263 
264 	/* Input PGA */
265 	{"Input PGA", "Aux Switch", "Aux Input"},
266 	{"Input PGA", "MicN Switch", "MICN"},
267 	{"Input PGA", "MicP Switch", "MICP"},
268 
269 	/* Inputs */
270 	{"Aux Input", NULL, "AUX"},
271 };
272 
273 struct pll_ {
274 	unsigned int pre_div:1;
275 	unsigned int n:4;
276 	unsigned int k;
277 };
278 
279 /* The size in bits of the pll divide multiplied by 10
280  * to allow rounding later */
281 #define FIXED_PLL_SIZE ((1 << 24) * 10)
282 
283 static void pll_factors(struct pll_ *pll_div,
284 			unsigned int target, unsigned int source)
285 {
286 	unsigned long long Kpart;
287 	unsigned int K, Ndiv, Nmod;
288 
289 	/* There is a fixed divide by 4 in the output path */
290 	target *= 4;
291 
292 	Ndiv = target / source;
293 	if (Ndiv < 6) {
294 		source /= 2;
295 		pll_div->pre_div = 1;
296 		Ndiv = target / source;
297 	} else
298 		pll_div->pre_div = 0;
299 
300 	if ((Ndiv < 6) || (Ndiv > 12))
301 		printk(KERN_WARNING
302 			"WM8974 N value %u outwith recommended range!\n",
303 			Ndiv);
304 
305 	pll_div->n = Ndiv;
306 	Nmod = target % source;
307 	Kpart = FIXED_PLL_SIZE * (long long)Nmod;
308 
309 	do_div(Kpart, source);
310 
311 	K = Kpart & 0xFFFFFFFF;
312 
313 	/* Check if we need to round */
314 	if ((K % 10) >= 5)
315 		K += 5;
316 
317 	/* Move down to proper range now rounding is done */
318 	K /= 10;
319 
320 	pll_div->k = K;
321 }
322 
323 static int wm8974_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
324 		int source, unsigned int freq_in, unsigned int freq_out)
325 {
326 	struct snd_soc_component *component = codec_dai->component;
327 	struct pll_ pll_div;
328 	u16 reg;
329 
330 	if (freq_in == 0 || freq_out == 0) {
331 		/* Clock CODEC directly from MCLK */
332 		reg = snd_soc_component_read32(component, WM8974_CLOCK);
333 		snd_soc_component_write(component, WM8974_CLOCK, reg & 0x0ff);
334 
335 		/* Turn off PLL */
336 		reg = snd_soc_component_read32(component, WM8974_POWER1);
337 		snd_soc_component_write(component, WM8974_POWER1, reg & 0x1df);
338 		return 0;
339 	}
340 
341 	pll_factors(&pll_div, freq_out, freq_in);
342 
343 	snd_soc_component_write(component, WM8974_PLLN, (pll_div.pre_div << 4) | pll_div.n);
344 	snd_soc_component_write(component, WM8974_PLLK1, pll_div.k >> 18);
345 	snd_soc_component_write(component, WM8974_PLLK2, (pll_div.k >> 9) & 0x1ff);
346 	snd_soc_component_write(component, WM8974_PLLK3, pll_div.k & 0x1ff);
347 	reg = snd_soc_component_read32(component, WM8974_POWER1);
348 	snd_soc_component_write(component, WM8974_POWER1, reg | 0x020);
349 
350 	/* Run CODEC from PLL instead of MCLK */
351 	reg = snd_soc_component_read32(component, WM8974_CLOCK);
352 	snd_soc_component_write(component, WM8974_CLOCK, reg | 0x100);
353 
354 	return 0;
355 }
356 
357 /*
358  * Configure WM8974 clock dividers.
359  */
360 static int wm8974_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
361 		int div_id, int div)
362 {
363 	struct snd_soc_component *component = codec_dai->component;
364 	u16 reg;
365 
366 	switch (div_id) {
367 	case WM8974_OPCLKDIV:
368 		reg = snd_soc_component_read32(component, WM8974_GPIO) & 0x1cf;
369 		snd_soc_component_write(component, WM8974_GPIO, reg | div);
370 		break;
371 	case WM8974_MCLKDIV:
372 		reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x11f;
373 		snd_soc_component_write(component, WM8974_CLOCK, reg | div);
374 		break;
375 	case WM8974_BCLKDIV:
376 		reg = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1e3;
377 		snd_soc_component_write(component, WM8974_CLOCK, reg | div);
378 		break;
379 	default:
380 		return -EINVAL;
381 	}
382 
383 	return 0;
384 }
385 
386 static unsigned int wm8974_get_mclkdiv(unsigned int f_in, unsigned int f_out,
387 				       int *mclkdiv)
388 {
389 	unsigned int ratio = 2 * f_in / f_out;
390 
391 	if (ratio <= 2) {
392 		*mclkdiv = WM8974_MCLKDIV_1;
393 		ratio = 2;
394 	} else if (ratio == 3) {
395 		*mclkdiv = WM8974_MCLKDIV_1_5;
396 	} else if (ratio == 4) {
397 		*mclkdiv = WM8974_MCLKDIV_2;
398 	} else if (ratio <= 6) {
399 		*mclkdiv = WM8974_MCLKDIV_3;
400 		ratio = 6;
401 	} else if (ratio <= 8) {
402 		*mclkdiv = WM8974_MCLKDIV_4;
403 		ratio = 8;
404 	} else if (ratio <= 12) {
405 		*mclkdiv = WM8974_MCLKDIV_6;
406 		ratio = 12;
407 	} else if (ratio <= 16) {
408 		*mclkdiv = WM8974_MCLKDIV_8;
409 		ratio = 16;
410 	} else {
411 		*mclkdiv = WM8974_MCLKDIV_12;
412 		ratio = 24;
413 	}
414 
415 	return f_out * ratio / 2;
416 }
417 
418 static int wm8974_update_clocks(struct snd_soc_dai *dai)
419 {
420 	struct snd_soc_component *component = dai->component;
421 	struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
422 	unsigned int fs256;
423 	unsigned int fpll = 0;
424 	unsigned int f;
425 	int mclkdiv;
426 
427 	if (!priv->mclk || !priv->fs)
428 		return 0;
429 
430 	fs256 = 256 * priv->fs;
431 
432 	f = wm8974_get_mclkdiv(priv->mclk, fs256, &mclkdiv);
433 
434 	if (f != priv->mclk) {
435 		/* The PLL performs best around 90MHz */
436 		fpll = wm8974_get_mclkdiv(22500000, fs256, &mclkdiv);
437 	}
438 
439 	wm8974_set_dai_pll(dai, 0, 0, priv->mclk, fpll);
440 	wm8974_set_dai_clkdiv(dai, WM8974_MCLKDIV, mclkdiv);
441 
442 	return 0;
443 }
444 
445 static int wm8974_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
446 				 unsigned int freq, int dir)
447 {
448 	struct snd_soc_component *component = dai->component;
449 	struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
450 
451 	if (dir != SND_SOC_CLOCK_IN)
452 		return -EINVAL;
453 
454 	priv->mclk = freq;
455 
456 	return wm8974_update_clocks(dai);
457 }
458 
459 static int wm8974_set_dai_fmt(struct snd_soc_dai *codec_dai,
460 		unsigned int fmt)
461 {
462 	struct snd_soc_component *component = codec_dai->component;
463 	u16 iface = 0;
464 	u16 clk = snd_soc_component_read32(component, WM8974_CLOCK) & 0x1fe;
465 
466 	/* set master/slave audio interface */
467 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
468 	case SND_SOC_DAIFMT_CBM_CFM:
469 		clk |= 0x0001;
470 		break;
471 	case SND_SOC_DAIFMT_CBS_CFS:
472 		break;
473 	default:
474 		return -EINVAL;
475 	}
476 
477 	/* interface format */
478 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
479 	case SND_SOC_DAIFMT_I2S:
480 		iface |= 0x0010;
481 		break;
482 	case SND_SOC_DAIFMT_RIGHT_J:
483 		break;
484 	case SND_SOC_DAIFMT_LEFT_J:
485 		iface |= 0x0008;
486 		break;
487 	case SND_SOC_DAIFMT_DSP_A:
488 		iface |= 0x00018;
489 		break;
490 	default:
491 		return -EINVAL;
492 	}
493 
494 	/* clock inversion */
495 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
496 	case SND_SOC_DAIFMT_NB_NF:
497 		break;
498 	case SND_SOC_DAIFMT_IB_IF:
499 		iface |= 0x0180;
500 		break;
501 	case SND_SOC_DAIFMT_IB_NF:
502 		iface |= 0x0100;
503 		break;
504 	case SND_SOC_DAIFMT_NB_IF:
505 		iface |= 0x0080;
506 		break;
507 	default:
508 		return -EINVAL;
509 	}
510 
511 	snd_soc_component_write(component, WM8974_IFACE, iface);
512 	snd_soc_component_write(component, WM8974_CLOCK, clk);
513 	return 0;
514 }
515 
516 static int wm8974_pcm_hw_params(struct snd_pcm_substream *substream,
517 				struct snd_pcm_hw_params *params,
518 				struct snd_soc_dai *dai)
519 {
520 	struct snd_soc_component *component = dai->component;
521 	struct wm8974_priv *priv = snd_soc_component_get_drvdata(component);
522 	u16 iface = snd_soc_component_read32(component, WM8974_IFACE) & 0x19f;
523 	u16 adn = snd_soc_component_read32(component, WM8974_ADD) & 0x1f1;
524 	int err;
525 
526 	priv->fs = params_rate(params);
527 	err = wm8974_update_clocks(dai);
528 	if (err)
529 		return err;
530 
531 	/* bit size */
532 	switch (params_width(params)) {
533 	case 16:
534 		break;
535 	case 20:
536 		iface |= 0x0020;
537 		break;
538 	case 24:
539 		iface |= 0x0040;
540 		break;
541 	case 32:
542 		iface |= 0x0060;
543 		break;
544 	}
545 
546 	/* filter coefficient */
547 	switch (params_rate(params)) {
548 	case 8000:
549 		adn |= 0x5 << 1;
550 		break;
551 	case 11025:
552 		adn |= 0x4 << 1;
553 		break;
554 	case 16000:
555 		adn |= 0x3 << 1;
556 		break;
557 	case 22050:
558 		adn |= 0x2 << 1;
559 		break;
560 	case 32000:
561 		adn |= 0x1 << 1;
562 		break;
563 	case 44100:
564 	case 48000:
565 		break;
566 	}
567 
568 	snd_soc_component_write(component, WM8974_IFACE, iface);
569 	snd_soc_component_write(component, WM8974_ADD, adn);
570 	return 0;
571 }
572 
573 static int wm8974_mute(struct snd_soc_dai *dai, int mute)
574 {
575 	struct snd_soc_component *component = dai->component;
576 	u16 mute_reg = snd_soc_component_read32(component, WM8974_DAC) & 0xffbf;
577 
578 	if (mute)
579 		snd_soc_component_write(component, WM8974_DAC, mute_reg | 0x40);
580 	else
581 		snd_soc_component_write(component, WM8974_DAC, mute_reg);
582 	return 0;
583 }
584 
585 /* liam need to make this lower power with dapm */
586 static int wm8974_set_bias_level(struct snd_soc_component *component,
587 	enum snd_soc_bias_level level)
588 {
589 	u16 power1 = snd_soc_component_read32(component, WM8974_POWER1) & ~0x3;
590 
591 	switch (level) {
592 	case SND_SOC_BIAS_ON:
593 	case SND_SOC_BIAS_PREPARE:
594 		power1 |= 0x1;  /* VMID 50k */
595 		snd_soc_component_write(component, WM8974_POWER1, power1);
596 		break;
597 
598 	case SND_SOC_BIAS_STANDBY:
599 		power1 |= WM8974_POWER1_BIASEN | WM8974_POWER1_BUFIOEN;
600 
601 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
602 			regcache_sync(dev_get_regmap(component->dev, NULL));
603 
604 			/* Initial cap charge at VMID 5k */
605 			snd_soc_component_write(component, WM8974_POWER1, power1 | 0x3);
606 			mdelay(100);
607 		}
608 
609 		power1 |= 0x2;  /* VMID 500k */
610 		snd_soc_component_write(component, WM8974_POWER1, power1);
611 		break;
612 
613 	case SND_SOC_BIAS_OFF:
614 		snd_soc_component_write(component, WM8974_POWER1, 0);
615 		snd_soc_component_write(component, WM8974_POWER2, 0);
616 		snd_soc_component_write(component, WM8974_POWER3, 0);
617 		break;
618 	}
619 
620 	return 0;
621 }
622 
623 #define WM8974_RATES (SNDRV_PCM_RATE_8000_48000)
624 
625 #define WM8974_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
626 	SNDRV_PCM_FMTBIT_S24_LE)
627 
628 static const struct snd_soc_dai_ops wm8974_ops = {
629 	.hw_params = wm8974_pcm_hw_params,
630 	.digital_mute = wm8974_mute,
631 	.set_fmt = wm8974_set_dai_fmt,
632 	.set_clkdiv = wm8974_set_dai_clkdiv,
633 	.set_pll = wm8974_set_dai_pll,
634 	.set_sysclk = wm8974_set_dai_sysclk,
635 };
636 
637 static struct snd_soc_dai_driver wm8974_dai = {
638 	.name = "wm8974-hifi",
639 	.playback = {
640 		.stream_name = "Playback",
641 		.channels_min = 1,
642 		.channels_max = 2,   /* Only 1 channel of data */
643 		.rates = WM8974_RATES,
644 		.formats = WM8974_FORMATS,},
645 	.capture = {
646 		.stream_name = "Capture",
647 		.channels_min = 1,
648 		.channels_max = 2,   /* Only 1 channel of data */
649 		.rates = WM8974_RATES,
650 		.formats = WM8974_FORMATS,},
651 	.ops = &wm8974_ops,
652 	.symmetric_rates = 1,
653 };
654 
655 static const struct regmap_config wm8974_regmap = {
656 	.reg_bits = 7,
657 	.val_bits = 9,
658 
659 	.max_register = WM8974_MONOMIX,
660 	.reg_defaults = wm8974_reg_defaults,
661 	.num_reg_defaults = ARRAY_SIZE(wm8974_reg_defaults),
662 	.cache_type = REGCACHE_FLAT,
663 };
664 
665 static int wm8974_probe(struct snd_soc_component *component)
666 {
667 	int ret = 0;
668 
669 	ret = wm8974_reset(component);
670 	if (ret < 0) {
671 		dev_err(component->dev, "Failed to issue reset\n");
672 		return ret;
673 	}
674 
675 	return 0;
676 }
677 
678 static const struct snd_soc_component_driver soc_component_dev_wm8974 = {
679 	.probe			= wm8974_probe,
680 	.set_bias_level		= wm8974_set_bias_level,
681 	.controls		= wm8974_snd_controls,
682 	.num_controls		= ARRAY_SIZE(wm8974_snd_controls),
683 	.dapm_widgets		= wm8974_dapm_widgets,
684 	.num_dapm_widgets	= ARRAY_SIZE(wm8974_dapm_widgets),
685 	.dapm_routes		= wm8974_dapm_routes,
686 	.num_dapm_routes	= ARRAY_SIZE(wm8974_dapm_routes),
687 	.suspend_bias_off	= 1,
688 	.idle_bias_on		= 1,
689 	.use_pmdown_time	= 1,
690 	.endianness		= 1,
691 	.non_legacy_dai_naming	= 1,
692 };
693 
694 static int wm8974_i2c_probe(struct i2c_client *i2c,
695 			    const struct i2c_device_id *id)
696 {
697 	struct wm8974_priv *priv;
698 	struct regmap *regmap;
699 	int ret;
700 
701 	priv = devm_kzalloc(&i2c->dev, sizeof(*priv), GFP_KERNEL);
702 	if (!priv)
703 		return -ENOMEM;
704 
705 	i2c_set_clientdata(i2c, priv);
706 
707 	regmap = devm_regmap_init_i2c(i2c, &wm8974_regmap);
708 	if (IS_ERR(regmap))
709 		return PTR_ERR(regmap);
710 
711 	ret = devm_snd_soc_register_component(&i2c->dev,
712 			&soc_component_dev_wm8974, &wm8974_dai, 1);
713 
714 	return ret;
715 }
716 
717 static const struct i2c_device_id wm8974_i2c_id[] = {
718 	{ "wm8974", 0 },
719 	{ }
720 };
721 MODULE_DEVICE_TABLE(i2c, wm8974_i2c_id);
722 
723 static const struct of_device_id wm8974_of_match[] = {
724        { .compatible = "wlf,wm8974", },
725        { }
726 };
727 MODULE_DEVICE_TABLE(of, wm8974_of_match);
728 
729 static struct i2c_driver wm8974_i2c_driver = {
730 	.driver = {
731 		.name = "wm8974",
732 		.of_match_table = wm8974_of_match,
733 	},
734 	.probe =    wm8974_i2c_probe,
735 	.id_table = wm8974_i2c_id,
736 };
737 
738 module_i2c_driver(wm8974_i2c_driver);
739 
740 MODULE_DESCRIPTION("ASoC WM8974 driver");
741 MODULE_AUTHOR("Liam Girdwood");
742 MODULE_LICENSE("GPL");
743