1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * wm8960.c -- WM8960 ALSA SoC Audio driver 4 * 5 * Copyright 2007-11 Wolfson Microelectronics, plc 6 * 7 * Author: Liam Girdwood 8 */ 9 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <linux/init.h> 13 #include <linux/delay.h> 14 #include <linux/pm.h> 15 #include <linux/clk.h> 16 #include <linux/i2c.h> 17 #include <linux/slab.h> 18 #include <sound/core.h> 19 #include <sound/pcm.h> 20 #include <sound/pcm_params.h> 21 #include <sound/soc.h> 22 #include <sound/initval.h> 23 #include <sound/tlv.h> 24 #include <sound/wm8960.h> 25 26 #include "wm8960.h" 27 28 /* R25 - Power 1 */ 29 #define WM8960_VMID_MASK 0x180 30 #define WM8960_VREF 0x40 31 32 /* R26 - Power 2 */ 33 #define WM8960_PWR2_LOUT1 0x40 34 #define WM8960_PWR2_ROUT1 0x20 35 #define WM8960_PWR2_OUT3 0x02 36 37 /* R28 - Anti-pop 1 */ 38 #define WM8960_POBCTRL 0x80 39 #define WM8960_BUFDCOPEN 0x10 40 #define WM8960_BUFIOEN 0x08 41 #define WM8960_SOFT_ST 0x04 42 #define WM8960_HPSTBY 0x01 43 44 /* R29 - Anti-pop 2 */ 45 #define WM8960_DISOP 0x40 46 #define WM8960_DRES_MASK 0x30 47 48 #define WM8960_DSCH_TOUT 600 /* discharge timeout, ms */ 49 50 static bool is_pll_freq_available(unsigned int source, unsigned int target); 51 static int wm8960_set_pll(struct snd_soc_component *component, 52 unsigned int freq_in, unsigned int freq_out); 53 /* 54 * wm8960 register cache 55 * We can't read the WM8960 register space when we are 56 * using 2 wire for device control, so we cache them instead. 57 */ 58 static const struct reg_default wm8960_reg_defaults[] = { 59 { 0x0, 0x00a7 }, 60 { 0x1, 0x00a7 }, 61 { 0x2, 0x0000 }, 62 { 0x3, 0x0000 }, 63 { 0x4, 0x0000 }, 64 { 0x5, 0x0008 }, 65 { 0x6, 0x0000 }, 66 { 0x7, 0x000a }, 67 { 0x8, 0x01c0 }, 68 { 0x9, 0x0000 }, 69 { 0xa, 0x00ff }, 70 { 0xb, 0x00ff }, 71 72 { 0x10, 0x0000 }, 73 { 0x11, 0x007b }, 74 { 0x12, 0x0100 }, 75 { 0x13, 0x0032 }, 76 { 0x14, 0x0000 }, 77 { 0x15, 0x00c3 }, 78 { 0x16, 0x00c3 }, 79 { 0x17, 0x01c0 }, 80 { 0x18, 0x0000 }, 81 { 0x19, 0x0000 }, 82 { 0x1a, 0x0000 }, 83 { 0x1b, 0x0000 }, 84 { 0x1c, 0x0000 }, 85 { 0x1d, 0x0000 }, 86 87 { 0x20, 0x0100 }, 88 { 0x21, 0x0100 }, 89 { 0x22, 0x0050 }, 90 91 { 0x25, 0x0050 }, 92 { 0x26, 0x0000 }, 93 { 0x27, 0x0000 }, 94 { 0x28, 0x0000 }, 95 { 0x29, 0x0000 }, 96 { 0x2a, 0x0040 }, 97 { 0x2b, 0x0000 }, 98 { 0x2c, 0x0000 }, 99 { 0x2d, 0x0050 }, 100 { 0x2e, 0x0050 }, 101 { 0x2f, 0x0000 }, 102 { 0x30, 0x0002 }, 103 { 0x31, 0x0037 }, 104 105 { 0x33, 0x0080 }, 106 { 0x34, 0x0008 }, 107 { 0x35, 0x0031 }, 108 { 0x36, 0x0026 }, 109 { 0x37, 0x00e9 }, 110 }; 111 112 static bool wm8960_volatile(struct device *dev, unsigned int reg) 113 { 114 switch (reg) { 115 case WM8960_RESET: 116 return true; 117 default: 118 return false; 119 } 120 } 121 122 struct wm8960_priv { 123 struct clk *mclk; 124 struct regmap *regmap; 125 int (*set_bias_level)(struct snd_soc_component *, 126 enum snd_soc_bias_level level); 127 struct snd_soc_dapm_widget *lout1; 128 struct snd_soc_dapm_widget *rout1; 129 struct snd_soc_dapm_widget *out3; 130 bool deemph; 131 int lrclk; 132 int bclk; 133 int sysclk; 134 int clk_id; 135 int freq_in; 136 bool is_stream_in_use[2]; 137 struct wm8960_data pdata; 138 ktime_t dsch_start; 139 }; 140 141 #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0) 142 143 /* enumerated controls */ 144 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted", 145 "Right Inverted", "Stereo Inversion"}; 146 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"}; 147 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"}; 148 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"}; 149 static const char *wm8960_alcmode[] = {"ALC", "Limiter"}; 150 static const char *wm8960_adc_data_output_sel[] = { 151 "Left Data = Left ADC; Right Data = Right ADC", 152 "Left Data = Left ADC; Right Data = Left ADC", 153 "Left Data = Right ADC; Right Data = Right ADC", 154 "Left Data = Right ADC; Right Data = Left ADC", 155 }; 156 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"}; 157 158 static const struct soc_enum wm8960_enum[] = { 159 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity), 160 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity), 161 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff), 162 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff), 163 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc), 164 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode), 165 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel), 166 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix), 167 }; 168 169 static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; 170 171 static int wm8960_set_deemph(struct snd_soc_component *component) 172 { 173 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 174 int val, i, best; 175 176 /* If we're using deemphasis select the nearest available sample 177 * rate. 178 */ 179 if (wm8960->deemph) { 180 best = 1; 181 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 182 if (abs(deemph_settings[i] - wm8960->lrclk) < 183 abs(deemph_settings[best] - wm8960->lrclk)) 184 best = i; 185 } 186 187 val = best << 1; 188 } else { 189 val = 0; 190 } 191 192 dev_dbg(component->dev, "Set deemphasis %d\n", val); 193 194 return snd_soc_component_update_bits(component, WM8960_DACCTL1, 195 0x6, val); 196 } 197 198 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol, 199 struct snd_ctl_elem_value *ucontrol) 200 { 201 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 202 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 203 204 ucontrol->value.integer.value[0] = wm8960->deemph; 205 return 0; 206 } 207 208 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol, 209 struct snd_ctl_elem_value *ucontrol) 210 { 211 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 212 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 213 unsigned int deemph = ucontrol->value.integer.value[0]; 214 215 if (deemph > 1) 216 return -EINVAL; 217 218 wm8960->deemph = deemph; 219 220 return wm8960_set_deemph(component); 221 } 222 223 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); 224 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0); 225 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); 226 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0); 227 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 228 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1); 229 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv, 230 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0), 231 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0), 232 ); 233 234 static const struct snd_kcontrol_new wm8960_snd_controls[] = { 235 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL, 236 0, 63, 0, inpga_tlv), 237 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL, 238 6, 1, 0), 239 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL, 240 7, 1, 1), 241 242 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume", 243 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv), 244 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume", 245 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv), 246 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume", 247 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv), 248 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume", 249 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv), 250 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume", 251 WM8960_RINPATH, 4, 3, 0, micboost_tlv), 252 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume", 253 WM8960_LINPATH, 4, 3, 0, micboost_tlv), 254 255 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC, 256 0, 255, 0, dac_tlv), 257 258 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1, 259 0, 127, 0, out_tlv), 260 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1, 261 7, 1, 0), 262 263 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2, 264 0, 127, 0, out_tlv), 265 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2, 266 7, 1, 0), 267 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0), 268 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0), 269 270 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0), 271 SOC_ENUM("ADC Polarity", wm8960_enum[0]), 272 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0), 273 274 SOC_ENUM("DAC Polarity", wm8960_enum[1]), 275 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 276 wm8960_get_deemph, wm8960_put_deemph), 277 278 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]), 279 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]), 280 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0), 281 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0), 282 283 SOC_ENUM("ALC Function", wm8960_enum[4]), 284 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0), 285 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1), 286 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0), 287 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0), 288 SOC_ENUM("ALC Mode", wm8960_enum[5]), 289 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0), 290 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0), 291 292 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0), 293 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0), 294 295 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC, 296 0, 255, 0, adc_tlv), 297 298 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume", 299 WM8960_BYPASS1, 4, 7, 1, bypass_tlv), 300 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume", 301 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv), 302 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume", 303 WM8960_BYPASS2, 4, 7, 1, bypass_tlv), 304 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume", 305 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv), 306 307 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]), 308 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]), 309 }; 310 311 static const struct snd_kcontrol_new wm8960_lin_boost[] = { 312 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0), 313 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0), 314 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0), 315 }; 316 317 static const struct snd_kcontrol_new wm8960_lin[] = { 318 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0), 319 }; 320 321 static const struct snd_kcontrol_new wm8960_rin_boost[] = { 322 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0), 323 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0), 324 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0), 325 }; 326 327 static const struct snd_kcontrol_new wm8960_rin[] = { 328 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0), 329 }; 330 331 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = { 332 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0), 333 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0), 334 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0), 335 }; 336 337 static const struct snd_kcontrol_new wm8960_routput_mixer[] = { 338 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0), 339 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0), 340 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0), 341 }; 342 343 static const struct snd_kcontrol_new wm8960_mono_out[] = { 344 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0), 345 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0), 346 }; 347 348 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = { 349 SND_SOC_DAPM_INPUT("LINPUT1"), 350 SND_SOC_DAPM_INPUT("RINPUT1"), 351 SND_SOC_DAPM_INPUT("LINPUT2"), 352 SND_SOC_DAPM_INPUT("RINPUT2"), 353 SND_SOC_DAPM_INPUT("LINPUT3"), 354 SND_SOC_DAPM_INPUT("RINPUT3"), 355 356 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0), 357 358 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0, 359 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)), 360 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0, 361 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)), 362 363 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0, 364 wm8960_lin, ARRAY_SIZE(wm8960_lin)), 365 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0, 366 wm8960_rin, ARRAY_SIZE(wm8960_rin)), 367 368 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0), 369 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0), 370 371 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0), 372 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0), 373 374 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0, 375 &wm8960_loutput_mixer[0], 376 ARRAY_SIZE(wm8960_loutput_mixer)), 377 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0, 378 &wm8960_routput_mixer[0], 379 ARRAY_SIZE(wm8960_routput_mixer)), 380 381 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0), 382 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0), 383 384 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0), 385 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0), 386 387 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0), 388 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0), 389 390 SND_SOC_DAPM_OUTPUT("SPK_LP"), 391 SND_SOC_DAPM_OUTPUT("SPK_LN"), 392 SND_SOC_DAPM_OUTPUT("HP_L"), 393 SND_SOC_DAPM_OUTPUT("HP_R"), 394 SND_SOC_DAPM_OUTPUT("SPK_RP"), 395 SND_SOC_DAPM_OUTPUT("SPK_RN"), 396 SND_SOC_DAPM_OUTPUT("OUT3"), 397 }; 398 399 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = { 400 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0, 401 &wm8960_mono_out[0], 402 ARRAY_SIZE(wm8960_mono_out)), 403 }; 404 405 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */ 406 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = { 407 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0), 408 }; 409 410 static const struct snd_soc_dapm_route audio_paths[] = { 411 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" }, 412 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" }, 413 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" }, 414 415 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" }, 416 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */ 417 { "Left Input Mixer", NULL, "LINPUT2" }, 418 { "Left Input Mixer", NULL, "LINPUT3" }, 419 420 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" }, 421 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" }, 422 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" }, 423 424 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" }, 425 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */ 426 { "Right Input Mixer", NULL, "RINPUT2" }, 427 { "Right Input Mixer", NULL, "RINPUT3" }, 428 429 { "Left ADC", NULL, "Left Input Mixer" }, 430 { "Right ADC", NULL, "Right Input Mixer" }, 431 432 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" }, 433 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" }, 434 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" }, 435 436 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" }, 437 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" }, 438 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" }, 439 440 { "LOUT1 PGA", NULL, "Left Output Mixer" }, 441 { "ROUT1 PGA", NULL, "Right Output Mixer" }, 442 443 { "HP_L", NULL, "LOUT1 PGA" }, 444 { "HP_R", NULL, "ROUT1 PGA" }, 445 446 { "Left Speaker PGA", NULL, "Left Output Mixer" }, 447 { "Right Speaker PGA", NULL, "Right Output Mixer" }, 448 449 { "Left Speaker Output", NULL, "Left Speaker PGA" }, 450 { "Right Speaker Output", NULL, "Right Speaker PGA" }, 451 452 { "SPK_LN", NULL, "Left Speaker Output" }, 453 { "SPK_LP", NULL, "Left Speaker Output" }, 454 { "SPK_RN", NULL, "Right Speaker Output" }, 455 { "SPK_RP", NULL, "Right Speaker Output" }, 456 }; 457 458 static const struct snd_soc_dapm_route audio_paths_out3[] = { 459 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" }, 460 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" }, 461 462 { "OUT3", NULL, "Mono Output Mixer", } 463 }; 464 465 static const struct snd_soc_dapm_route audio_paths_capless[] = { 466 { "HP_L", NULL, "OUT3 VMID" }, 467 { "HP_R", NULL, "OUT3 VMID" }, 468 469 { "OUT3 VMID", NULL, "Left Output Mixer" }, 470 { "OUT3 VMID", NULL, "Right Output Mixer" }, 471 }; 472 473 static int wm8960_add_widgets(struct snd_soc_component *component) 474 { 475 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 476 struct wm8960_data *pdata = &wm8960->pdata; 477 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 478 struct snd_soc_dapm_widget *w; 479 480 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets, 481 ARRAY_SIZE(wm8960_dapm_widgets)); 482 483 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths)); 484 485 /* In capless mode OUT3 is used to provide VMID for the 486 * headphone outputs, otherwise it is used as a mono mixer. 487 */ 488 if (pdata && pdata->capless) { 489 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless, 490 ARRAY_SIZE(wm8960_dapm_widgets_capless)); 491 492 snd_soc_dapm_add_routes(dapm, audio_paths_capless, 493 ARRAY_SIZE(audio_paths_capless)); 494 } else { 495 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3, 496 ARRAY_SIZE(wm8960_dapm_widgets_out3)); 497 498 snd_soc_dapm_add_routes(dapm, audio_paths_out3, 499 ARRAY_SIZE(audio_paths_out3)); 500 } 501 502 /* We need to power up the headphone output stage out of 503 * sequence for capless mode. To save scanning the widget 504 * list each time to find the desired power state do so now 505 * and save the result. 506 */ 507 list_for_each_entry(w, &component->card->widgets, list) { 508 if (w->dapm != dapm) 509 continue; 510 if (strcmp(w->name, "LOUT1 PGA") == 0) 511 wm8960->lout1 = w; 512 if (strcmp(w->name, "ROUT1 PGA") == 0) 513 wm8960->rout1 = w; 514 if (strcmp(w->name, "OUT3 VMID") == 0) 515 wm8960->out3 = w; 516 } 517 518 return 0; 519 } 520 521 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai, 522 unsigned int fmt) 523 { 524 struct snd_soc_component *component = codec_dai->component; 525 u16 iface = 0; 526 527 /* set master/slave audio interface */ 528 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 529 case SND_SOC_DAIFMT_CBM_CFM: 530 iface |= 0x0040; 531 break; 532 case SND_SOC_DAIFMT_CBS_CFS: 533 break; 534 default: 535 return -EINVAL; 536 } 537 538 /* interface format */ 539 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 540 case SND_SOC_DAIFMT_I2S: 541 iface |= 0x0002; 542 break; 543 case SND_SOC_DAIFMT_RIGHT_J: 544 break; 545 case SND_SOC_DAIFMT_LEFT_J: 546 iface |= 0x0001; 547 break; 548 case SND_SOC_DAIFMT_DSP_A: 549 iface |= 0x0003; 550 break; 551 case SND_SOC_DAIFMT_DSP_B: 552 iface |= 0x0013; 553 break; 554 default: 555 return -EINVAL; 556 } 557 558 /* clock inversion */ 559 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 560 case SND_SOC_DAIFMT_NB_NF: 561 break; 562 case SND_SOC_DAIFMT_IB_IF: 563 iface |= 0x0090; 564 break; 565 case SND_SOC_DAIFMT_IB_NF: 566 iface |= 0x0080; 567 break; 568 case SND_SOC_DAIFMT_NB_IF: 569 iface |= 0x0010; 570 break; 571 default: 572 return -EINVAL; 573 } 574 575 /* set iface */ 576 snd_soc_component_write(component, WM8960_IFACE1, iface); 577 return 0; 578 } 579 580 static struct { 581 int rate; 582 unsigned int val; 583 } alc_rates[] = { 584 { 48000, 0 }, 585 { 44100, 0 }, 586 { 32000, 1 }, 587 { 22050, 2 }, 588 { 24000, 2 }, 589 { 16000, 3 }, 590 { 11025, 4 }, 591 { 12000, 4 }, 592 { 8000, 5 }, 593 }; 594 595 /* -1 for reserved value */ 596 static const int sysclk_divs[] = { 1, -1, 2, -1 }; 597 598 /* Multiply 256 for internal 256 div */ 599 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 }; 600 601 /* Multiply 10 to eliminate decimials */ 602 static const int bclk_divs[] = { 603 10, 15, 20, 30, 40, 55, 60, 80, 110, 604 120, 160, 220, 240, 320, 320, 320 605 }; 606 607 /** 608 * wm8960_configure_sysclk - checks if there is a sysclk frequency available 609 * The sysclk must be chosen such that: 610 * - sysclk = MCLK / sysclk_divs 611 * - lrclk = sysclk / dac_divs 612 * - 10 * bclk = sysclk / bclk_divs 613 * 614 * @wm8960: codec private data 615 * @mclk: MCLK used to derive sysclk 616 * @sysclk_idx: sysclk_divs index for found sysclk 617 * @dac_idx: dac_divs index for found lrclk 618 * @bclk_idx: bclk_divs index for found bclk 619 * 620 * Returns: 621 * -1, in case no sysclk frequency available found 622 * >=0, in case we could derive bclk and lrclk from sysclk using 623 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers 624 */ 625 static 626 int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, 627 int *sysclk_idx, int *dac_idx, int *bclk_idx) 628 { 629 int sysclk, bclk, lrclk; 630 int i, j, k; 631 int diff; 632 633 /* marker for no match */ 634 *bclk_idx = -1; 635 636 bclk = wm8960->bclk; 637 lrclk = wm8960->lrclk; 638 639 /* check if the sysclk frequency is available. */ 640 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { 641 if (sysclk_divs[i] == -1) 642 continue; 643 sysclk = mclk / sysclk_divs[i]; 644 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { 645 if (sysclk != dac_divs[j] * lrclk) 646 continue; 647 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { 648 diff = sysclk - bclk * bclk_divs[k] / 10; 649 if (diff == 0) { 650 *sysclk_idx = i; 651 *dac_idx = j; 652 *bclk_idx = k; 653 break; 654 } 655 } 656 if (k != ARRAY_SIZE(bclk_divs)) 657 break; 658 } 659 if (j != ARRAY_SIZE(dac_divs)) 660 break; 661 } 662 return *bclk_idx; 663 } 664 665 /** 666 * wm8960_configure_pll - checks if there is a PLL out frequency available 667 * The PLL out frequency must be chosen such that: 668 * - sysclk = lrclk * dac_divs 669 * - freq_out = sysclk * sysclk_divs 670 * - 10 * sysclk = bclk * bclk_divs 671 * 672 * If we cannot find an exact match for (sysclk, lrclk, bclk) 673 * triplet, we relax the bclk such that bclk is chosen as the 674 * closest available frequency greater than expected bclk. 675 * 676 * @component: component structure 677 * @freq_in: input frequency used to derive freq out via PLL 678 * @sysclk_idx: sysclk_divs index for found sysclk 679 * @dac_idx: dac_divs index for found lrclk 680 * @bclk_idx: bclk_divs index for found bclk 681 * 682 * Returns: 683 * < 0, in case no PLL frequency out available was found 684 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using 685 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers 686 */ 687 static 688 int wm8960_configure_pll(struct snd_soc_component *component, int freq_in, 689 int *sysclk_idx, int *dac_idx, int *bclk_idx) 690 { 691 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 692 int sysclk, bclk, lrclk, freq_out; 693 int diff, closest, best_freq_out; 694 int i, j, k; 695 696 bclk = wm8960->bclk; 697 lrclk = wm8960->lrclk; 698 closest = freq_in; 699 700 best_freq_out = -EINVAL; 701 *sysclk_idx = *dac_idx = *bclk_idx = -1; 702 703 /* 704 * From Datasheet, the PLL performs best when f2 is between 705 * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz 706 * or 12.288MHz, then sysclkdiv = 2 is the best choice. 707 * So search sysclk_divs from 2 to 1 other than from 1 to 2. 708 */ 709 for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) { 710 if (sysclk_divs[i] == -1) 711 continue; 712 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { 713 sysclk = lrclk * dac_divs[j]; 714 freq_out = sysclk * sysclk_divs[i]; 715 716 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { 717 if (!is_pll_freq_available(freq_in, freq_out)) 718 continue; 719 720 diff = sysclk - bclk * bclk_divs[k] / 10; 721 if (diff == 0) { 722 *sysclk_idx = i; 723 *dac_idx = j; 724 *bclk_idx = k; 725 return freq_out; 726 } 727 if (diff > 0 && closest > diff) { 728 *sysclk_idx = i; 729 *dac_idx = j; 730 *bclk_idx = k; 731 closest = diff; 732 best_freq_out = freq_out; 733 } 734 } 735 } 736 } 737 738 return best_freq_out; 739 } 740 static int wm8960_configure_clocking(struct snd_soc_component *component) 741 { 742 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 743 int freq_out, freq_in; 744 u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1); 745 int i, j, k; 746 int ret; 747 748 /* 749 * For Slave mode clocking should still be configured, 750 * so this if statement should be removed, but some platform 751 * may not work if the sysclk is not configured, to avoid such 752 * compatible issue, just add '!wm8960->sysclk' condition in 753 * this if statement. 754 */ 755 if (!(iface1 & (1 << 6)) && !wm8960->sysclk) { 756 dev_warn(component->dev, 757 "slave mode, but proceeding with no clock configuration\n"); 758 return 0; 759 } 760 761 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) { 762 dev_err(component->dev, "No MCLK configured\n"); 763 return -EINVAL; 764 } 765 766 freq_in = wm8960->freq_in; 767 /* 768 * If it's sysclk auto mode, check if the MCLK can provide sysclk or 769 * not. If MCLK can provide sysclk, using MCLK to provide sysclk 770 * directly. Otherwise, auto select a available pll out frequency 771 * and set PLL. 772 */ 773 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) { 774 /* disable the PLL and using MCLK to provide sysclk */ 775 wm8960_set_pll(component, 0, 0); 776 freq_out = freq_in; 777 } else if (wm8960->sysclk) { 778 freq_out = wm8960->sysclk; 779 } else { 780 dev_err(component->dev, "No SYSCLK configured\n"); 781 return -EINVAL; 782 } 783 784 if (wm8960->clk_id != WM8960_SYSCLK_PLL) { 785 ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k); 786 if (ret >= 0) { 787 goto configure_clock; 788 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) { 789 dev_err(component->dev, "failed to configure clock\n"); 790 return -EINVAL; 791 } 792 } 793 794 freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k); 795 if (freq_out < 0) { 796 dev_err(component->dev, "failed to configure clock via PLL\n"); 797 return freq_out; 798 } 799 wm8960_set_pll(component, freq_in, freq_out); 800 801 configure_clock: 802 /* configure sysclk clock */ 803 snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1); 804 805 /* configure frame clock */ 806 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3); 807 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6); 808 809 /* configure bit clock */ 810 snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k); 811 812 return 0; 813 } 814 815 static int wm8960_hw_params(struct snd_pcm_substream *substream, 816 struct snd_pcm_hw_params *params, 817 struct snd_soc_dai *dai) 818 { 819 struct snd_soc_component *component = dai->component; 820 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 821 u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3; 822 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 823 int i; 824 825 wm8960->bclk = snd_soc_params_to_bclk(params); 826 if (params_channels(params) == 1) 827 wm8960->bclk *= 2; 828 829 /* bit size */ 830 switch (params_width(params)) { 831 case 16: 832 break; 833 case 20: 834 iface |= 0x0004; 835 break; 836 case 24: 837 iface |= 0x0008; 838 break; 839 case 32: 840 /* right justify mode does not support 32 word length */ 841 if ((iface & 0x3) != 0) { 842 iface |= 0x000c; 843 break; 844 } 845 fallthrough; 846 default: 847 dev_err(component->dev, "unsupported width %d\n", 848 params_width(params)); 849 return -EINVAL; 850 } 851 852 wm8960->lrclk = params_rate(params); 853 /* Update filters for the new rate */ 854 if (tx) { 855 wm8960_set_deemph(component); 856 } else { 857 for (i = 0; i < ARRAY_SIZE(alc_rates); i++) 858 if (alc_rates[i].rate == params_rate(params)) 859 snd_soc_component_update_bits(component, 860 WM8960_ADDCTL3, 0x7, 861 alc_rates[i].val); 862 } 863 864 /* set iface */ 865 snd_soc_component_write(component, WM8960_IFACE1, iface); 866 867 wm8960->is_stream_in_use[tx] = true; 868 869 if (!wm8960->is_stream_in_use[!tx]) 870 return wm8960_configure_clocking(component); 871 872 return 0; 873 } 874 875 static int wm8960_hw_free(struct snd_pcm_substream *substream, 876 struct snd_soc_dai *dai) 877 { 878 struct snd_soc_component *component = dai->component; 879 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 880 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 881 882 wm8960->is_stream_in_use[tx] = false; 883 884 return 0; 885 } 886 887 static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction) 888 { 889 struct snd_soc_component *component = dai->component; 890 891 if (mute) 892 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8); 893 else 894 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0); 895 return 0; 896 } 897 898 static int wm8960_set_bias_level_out3(struct snd_soc_component *component, 899 enum snd_soc_bias_level level) 900 { 901 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 902 u16 pm2 = snd_soc_component_read(component, WM8960_POWER2); 903 int ret; 904 ktime_t tout; 905 906 switch (level) { 907 case SND_SOC_BIAS_ON: 908 break; 909 910 case SND_SOC_BIAS_PREPARE: 911 switch (snd_soc_component_get_bias_level(component)) { 912 case SND_SOC_BIAS_STANDBY: 913 if (!IS_ERR(wm8960->mclk)) { 914 ret = clk_prepare_enable(wm8960->mclk); 915 if (ret) { 916 dev_err(component->dev, 917 "Failed to enable MCLK: %d\n", 918 ret); 919 return ret; 920 } 921 } 922 923 ret = wm8960_configure_clocking(component); 924 if (ret) 925 return ret; 926 927 /* Set VMID to 2x50k */ 928 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80); 929 break; 930 931 case SND_SOC_BIAS_ON: 932 /* 933 * If it's sysclk auto mode, and the pll is enabled, 934 * disable the pll 935 */ 936 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1)) 937 wm8960_set_pll(component, 0, 0); 938 939 if (!IS_ERR(wm8960->mclk)) 940 clk_disable_unprepare(wm8960->mclk); 941 break; 942 943 default: 944 break; 945 } 946 947 break; 948 949 case SND_SOC_BIAS_STANDBY: 950 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 951 /* ensure discharge is complete */ 952 tout = WM8960_DSCH_TOUT - ktime_ms_delta(ktime_get(), wm8960->dsch_start); 953 if (tout > 0) 954 msleep(tout); 955 956 regcache_sync(wm8960->regmap); 957 958 /* Enable anti-pop features */ 959 snd_soc_component_write(component, WM8960_APOP1, 960 WM8960_POBCTRL | WM8960_SOFT_ST | 961 WM8960_BUFDCOPEN | WM8960_BUFIOEN); 962 963 /* Enable & ramp VMID at 2x50k */ 964 snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80); 965 msleep(100); 966 967 /* Enable VREF */ 968 snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF, 969 WM8960_VREF); 970 971 /* Disable anti-pop features */ 972 snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN); 973 } 974 975 /* Set VMID to 2x250k */ 976 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100); 977 break; 978 979 case SND_SOC_BIAS_OFF: 980 /* Enable anti-pop features */ 981 snd_soc_component_write(component, WM8960_APOP1, 982 WM8960_POBCTRL | WM8960_SOFT_ST | 983 WM8960_BUFDCOPEN | WM8960_BUFIOEN); 984 985 /* Disable VMID and VREF, mark discharge */ 986 snd_soc_component_write(component, WM8960_POWER1, 0); 987 wm8960->dsch_start = ktime_get(); 988 break; 989 } 990 991 return 0; 992 } 993 994 static int wm8960_set_bias_level_capless(struct snd_soc_component *component, 995 enum snd_soc_bias_level level) 996 { 997 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 998 u16 pm2 = snd_soc_component_read(component, WM8960_POWER2); 999 int reg, ret; 1000 1001 switch (level) { 1002 case SND_SOC_BIAS_ON: 1003 break; 1004 1005 case SND_SOC_BIAS_PREPARE: 1006 switch (snd_soc_component_get_bias_level(component)) { 1007 case SND_SOC_BIAS_STANDBY: 1008 /* Enable anti pop mode */ 1009 snd_soc_component_update_bits(component, WM8960_APOP1, 1010 WM8960_POBCTRL | WM8960_SOFT_ST | 1011 WM8960_BUFDCOPEN, 1012 WM8960_POBCTRL | WM8960_SOFT_ST | 1013 WM8960_BUFDCOPEN); 1014 1015 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */ 1016 reg = 0; 1017 if (wm8960->lout1 && wm8960->lout1->power) 1018 reg |= WM8960_PWR2_LOUT1; 1019 if (wm8960->rout1 && wm8960->rout1->power) 1020 reg |= WM8960_PWR2_ROUT1; 1021 if (wm8960->out3 && wm8960->out3->power) 1022 reg |= WM8960_PWR2_OUT3; 1023 snd_soc_component_update_bits(component, WM8960_POWER2, 1024 WM8960_PWR2_LOUT1 | 1025 WM8960_PWR2_ROUT1 | 1026 WM8960_PWR2_OUT3, reg); 1027 1028 /* Enable VMID at 2*50k */ 1029 snd_soc_component_update_bits(component, WM8960_POWER1, 1030 WM8960_VMID_MASK, 0x80); 1031 1032 /* Ramp */ 1033 msleep(100); 1034 1035 /* Enable VREF */ 1036 snd_soc_component_update_bits(component, WM8960_POWER1, 1037 WM8960_VREF, WM8960_VREF); 1038 1039 msleep(100); 1040 1041 if (!IS_ERR(wm8960->mclk)) { 1042 ret = clk_prepare_enable(wm8960->mclk); 1043 if (ret) { 1044 dev_err(component->dev, 1045 "Failed to enable MCLK: %d\n", 1046 ret); 1047 return ret; 1048 } 1049 } 1050 1051 ret = wm8960_configure_clocking(component); 1052 if (ret) 1053 return ret; 1054 1055 break; 1056 1057 case SND_SOC_BIAS_ON: 1058 /* 1059 * If it's sysclk auto mode, and the pll is enabled, 1060 * disable the pll 1061 */ 1062 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1)) 1063 wm8960_set_pll(component, 0, 0); 1064 1065 if (!IS_ERR(wm8960->mclk)) 1066 clk_disable_unprepare(wm8960->mclk); 1067 1068 /* Enable anti-pop mode */ 1069 snd_soc_component_update_bits(component, WM8960_APOP1, 1070 WM8960_POBCTRL | WM8960_SOFT_ST | 1071 WM8960_BUFDCOPEN, 1072 WM8960_POBCTRL | WM8960_SOFT_ST | 1073 WM8960_BUFDCOPEN); 1074 1075 /* Disable VMID and VREF */ 1076 snd_soc_component_update_bits(component, WM8960_POWER1, 1077 WM8960_VREF | WM8960_VMID_MASK, 0); 1078 break; 1079 1080 case SND_SOC_BIAS_OFF: 1081 regcache_sync(wm8960->regmap); 1082 break; 1083 default: 1084 break; 1085 } 1086 break; 1087 1088 case SND_SOC_BIAS_STANDBY: 1089 switch (snd_soc_component_get_bias_level(component)) { 1090 case SND_SOC_BIAS_PREPARE: 1091 /* Disable HP discharge */ 1092 snd_soc_component_update_bits(component, WM8960_APOP2, 1093 WM8960_DISOP | WM8960_DRES_MASK, 1094 0); 1095 1096 /* Disable anti-pop features */ 1097 snd_soc_component_update_bits(component, WM8960_APOP1, 1098 WM8960_POBCTRL | WM8960_SOFT_ST | 1099 WM8960_BUFDCOPEN, 1100 WM8960_POBCTRL | WM8960_SOFT_ST | 1101 WM8960_BUFDCOPEN); 1102 break; 1103 1104 default: 1105 break; 1106 } 1107 break; 1108 1109 case SND_SOC_BIAS_OFF: 1110 break; 1111 } 1112 1113 return 0; 1114 } 1115 1116 /* PLL divisors */ 1117 struct _pll_div { 1118 u32 pre_div:1; 1119 u32 n:4; 1120 u32 k:24; 1121 }; 1122 1123 static bool is_pll_freq_available(unsigned int source, unsigned int target) 1124 { 1125 unsigned int Ndiv; 1126 1127 if (source == 0 || target == 0) 1128 return false; 1129 1130 /* Scale up target to PLL operating frequency */ 1131 target *= 4; 1132 Ndiv = target / source; 1133 1134 if (Ndiv < 6) { 1135 source >>= 1; 1136 Ndiv = target / source; 1137 } 1138 1139 if ((Ndiv < 6) || (Ndiv > 12)) 1140 return false; 1141 1142 return true; 1143 } 1144 1145 /* The size in bits of the pll divide multiplied by 10 1146 * to allow rounding later */ 1147 #define FIXED_PLL_SIZE ((1 << 24) * 10) 1148 1149 static int pll_factors(unsigned int source, unsigned int target, 1150 struct _pll_div *pll_div) 1151 { 1152 unsigned long long Kpart; 1153 unsigned int K, Ndiv, Nmod; 1154 1155 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target); 1156 1157 /* Scale up target to PLL operating frequency */ 1158 target *= 4; 1159 1160 Ndiv = target / source; 1161 if (Ndiv < 6) { 1162 source >>= 1; 1163 pll_div->pre_div = 1; 1164 Ndiv = target / source; 1165 } else 1166 pll_div->pre_div = 0; 1167 1168 if ((Ndiv < 6) || (Ndiv > 12)) { 1169 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv); 1170 return -EINVAL; 1171 } 1172 1173 pll_div->n = Ndiv; 1174 Nmod = target % source; 1175 Kpart = FIXED_PLL_SIZE * (long long)Nmod; 1176 1177 do_div(Kpart, source); 1178 1179 K = Kpart & 0xFFFFFFFF; 1180 1181 /* Check if we need to round */ 1182 if ((K % 10) >= 5) 1183 K += 5; 1184 1185 /* Move down to proper range now rounding is done */ 1186 K /= 10; 1187 1188 pll_div->k = K; 1189 1190 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n", 1191 pll_div->n, pll_div->k, pll_div->pre_div); 1192 1193 return 0; 1194 } 1195 1196 static int wm8960_set_pll(struct snd_soc_component *component, 1197 unsigned int freq_in, unsigned int freq_out) 1198 { 1199 u16 reg; 1200 static struct _pll_div pll_div; 1201 int ret; 1202 1203 if (freq_in && freq_out) { 1204 ret = pll_factors(freq_in, freq_out, &pll_div); 1205 if (ret != 0) 1206 return ret; 1207 } 1208 1209 /* Disable the PLL: even if we are changing the frequency the 1210 * PLL needs to be disabled while we do so. */ 1211 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0); 1212 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0); 1213 1214 if (!freq_in || !freq_out) 1215 return 0; 1216 1217 reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f; 1218 reg |= pll_div.pre_div << 4; 1219 reg |= pll_div.n; 1220 1221 if (pll_div.k) { 1222 reg |= 0x20; 1223 1224 snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff); 1225 snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff); 1226 snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff); 1227 } 1228 snd_soc_component_write(component, WM8960_PLL1, reg); 1229 1230 /* Turn it on */ 1231 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1); 1232 msleep(250); 1233 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1); 1234 1235 return 0; 1236 } 1237 1238 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 1239 int source, unsigned int freq_in, unsigned int freq_out) 1240 { 1241 struct snd_soc_component *component = codec_dai->component; 1242 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1243 1244 wm8960->freq_in = freq_in; 1245 1246 if (pll_id == WM8960_SYSCLK_AUTO) 1247 return 0; 1248 1249 return wm8960_set_pll(component, freq_in, freq_out); 1250 } 1251 1252 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1253 int div_id, int div) 1254 { 1255 struct snd_soc_component *component = codec_dai->component; 1256 u16 reg; 1257 1258 switch (div_id) { 1259 case WM8960_SYSCLKDIV: 1260 reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9; 1261 snd_soc_component_write(component, WM8960_CLOCK1, reg | div); 1262 break; 1263 case WM8960_DACDIV: 1264 reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7; 1265 snd_soc_component_write(component, WM8960_CLOCK1, reg | div); 1266 break; 1267 case WM8960_OPCLKDIV: 1268 reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f; 1269 snd_soc_component_write(component, WM8960_PLL1, reg | div); 1270 break; 1271 case WM8960_DCLKDIV: 1272 reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f; 1273 snd_soc_component_write(component, WM8960_CLOCK2, reg | div); 1274 break; 1275 case WM8960_TOCLKSEL: 1276 reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd; 1277 snd_soc_component_write(component, WM8960_ADDCTL1, reg | div); 1278 break; 1279 default: 1280 return -EINVAL; 1281 } 1282 1283 return 0; 1284 } 1285 1286 static int wm8960_set_bias_level(struct snd_soc_component *component, 1287 enum snd_soc_bias_level level) 1288 { 1289 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1290 1291 return wm8960->set_bias_level(component, level); 1292 } 1293 1294 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, 1295 unsigned int freq, int dir) 1296 { 1297 struct snd_soc_component *component = dai->component; 1298 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1299 1300 switch (clk_id) { 1301 case WM8960_SYSCLK_MCLK: 1302 snd_soc_component_update_bits(component, WM8960_CLOCK1, 1303 0x1, WM8960_SYSCLK_MCLK); 1304 break; 1305 case WM8960_SYSCLK_PLL: 1306 snd_soc_component_update_bits(component, WM8960_CLOCK1, 1307 0x1, WM8960_SYSCLK_PLL); 1308 break; 1309 case WM8960_SYSCLK_AUTO: 1310 break; 1311 default: 1312 return -EINVAL; 1313 } 1314 1315 wm8960->sysclk = freq; 1316 wm8960->clk_id = clk_id; 1317 1318 return 0; 1319 } 1320 1321 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000 1322 1323 #define WM8960_FORMATS \ 1324 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1325 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1326 1327 static const struct snd_soc_dai_ops wm8960_dai_ops = { 1328 .hw_params = wm8960_hw_params, 1329 .hw_free = wm8960_hw_free, 1330 .mute_stream = wm8960_mute, 1331 .set_fmt = wm8960_set_dai_fmt, 1332 .set_clkdiv = wm8960_set_dai_clkdiv, 1333 .set_pll = wm8960_set_dai_pll, 1334 .set_sysclk = wm8960_set_dai_sysclk, 1335 .no_capture_mute = 1, 1336 }; 1337 1338 static struct snd_soc_dai_driver wm8960_dai = { 1339 .name = "wm8960-hifi", 1340 .playback = { 1341 .stream_name = "Playback", 1342 .channels_min = 1, 1343 .channels_max = 2, 1344 .rates = WM8960_RATES, 1345 .formats = WM8960_FORMATS,}, 1346 .capture = { 1347 .stream_name = "Capture", 1348 .channels_min = 1, 1349 .channels_max = 2, 1350 .rates = WM8960_RATES, 1351 .formats = WM8960_FORMATS,}, 1352 .ops = &wm8960_dai_ops, 1353 .symmetric_rate = 1, 1354 }; 1355 1356 static int wm8960_probe(struct snd_soc_component *component) 1357 { 1358 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1359 struct wm8960_data *pdata = &wm8960->pdata; 1360 1361 if (pdata->capless) 1362 wm8960->set_bias_level = wm8960_set_bias_level_capless; 1363 else 1364 wm8960->set_bias_level = wm8960_set_bias_level_out3; 1365 1366 snd_soc_add_component_controls(component, wm8960_snd_controls, 1367 ARRAY_SIZE(wm8960_snd_controls)); 1368 wm8960_add_widgets(component); 1369 1370 return 0; 1371 } 1372 1373 static const struct snd_soc_component_driver soc_component_dev_wm8960 = { 1374 .probe = wm8960_probe, 1375 .set_bias_level = wm8960_set_bias_level, 1376 .suspend_bias_off = 1, 1377 .idle_bias_on = 1, 1378 .use_pmdown_time = 1, 1379 .endianness = 1, 1380 .non_legacy_dai_naming = 1, 1381 }; 1382 1383 static const struct regmap_config wm8960_regmap = { 1384 .reg_bits = 7, 1385 .val_bits = 9, 1386 .max_register = WM8960_PLL4, 1387 1388 .reg_defaults = wm8960_reg_defaults, 1389 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults), 1390 .cache_type = REGCACHE_RBTREE, 1391 1392 .volatile_reg = wm8960_volatile, 1393 }; 1394 1395 static void wm8960_set_pdata_from_of(struct i2c_client *i2c, 1396 struct wm8960_data *pdata) 1397 { 1398 const struct device_node *np = i2c->dev.of_node; 1399 1400 if (of_property_read_bool(np, "wlf,capless")) 1401 pdata->capless = true; 1402 1403 if (of_property_read_bool(np, "wlf,shared-lrclk")) 1404 pdata->shared_lrclk = true; 1405 1406 of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg, 1407 ARRAY_SIZE(pdata->gpio_cfg)); 1408 1409 of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg, 1410 ARRAY_SIZE(pdata->hp_cfg)); 1411 } 1412 1413 static int wm8960_i2c_probe(struct i2c_client *i2c, 1414 const struct i2c_device_id *id) 1415 { 1416 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev); 1417 struct wm8960_priv *wm8960; 1418 int ret; 1419 1420 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv), 1421 GFP_KERNEL); 1422 if (wm8960 == NULL) 1423 return -ENOMEM; 1424 1425 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk"); 1426 if (IS_ERR(wm8960->mclk)) { 1427 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER) 1428 return -EPROBE_DEFER; 1429 } 1430 1431 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap); 1432 if (IS_ERR(wm8960->regmap)) 1433 return PTR_ERR(wm8960->regmap); 1434 1435 if (pdata) 1436 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data)); 1437 else if (i2c->dev.of_node) 1438 wm8960_set_pdata_from_of(i2c, &wm8960->pdata); 1439 1440 ret = wm8960_reset(wm8960->regmap); 1441 if (ret != 0) { 1442 dev_err(&i2c->dev, "Failed to issue reset\n"); 1443 return ret; 1444 } 1445 1446 if (wm8960->pdata.shared_lrclk) { 1447 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 1448 0x4, 0x4); 1449 if (ret != 0) { 1450 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n", 1451 ret); 1452 return ret; 1453 } 1454 } 1455 1456 /* Latch the update bits */ 1457 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100); 1458 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100); 1459 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100); 1460 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100); 1461 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100); 1462 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100); 1463 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100); 1464 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100); 1465 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100); 1466 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100); 1467 1468 /* ADCLRC pin configured as GPIO. */ 1469 regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6, 1470 wm8960->pdata.gpio_cfg[0] << 6); 1471 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4, 1472 wm8960->pdata.gpio_cfg[1] << 4); 1473 1474 /* Enable headphone jack detect */ 1475 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2, 1476 wm8960->pdata.hp_cfg[0] << 2); 1477 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5, 1478 wm8960->pdata.hp_cfg[1] << 5); 1479 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3, 1480 wm8960->pdata.hp_cfg[2]); 1481 1482 i2c_set_clientdata(i2c, wm8960); 1483 1484 ret = devm_snd_soc_register_component(&i2c->dev, 1485 &soc_component_dev_wm8960, &wm8960_dai, 1); 1486 1487 return ret; 1488 } 1489 1490 static int wm8960_i2c_remove(struct i2c_client *client) 1491 { 1492 return 0; 1493 } 1494 1495 static const struct i2c_device_id wm8960_i2c_id[] = { 1496 { "wm8960", 0 }, 1497 { } 1498 }; 1499 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id); 1500 1501 static const struct of_device_id wm8960_of_match[] = { 1502 { .compatible = "wlf,wm8960", }, 1503 { } 1504 }; 1505 MODULE_DEVICE_TABLE(of, wm8960_of_match); 1506 1507 static struct i2c_driver wm8960_i2c_driver = { 1508 .driver = { 1509 .name = "wm8960", 1510 .of_match_table = wm8960_of_match, 1511 }, 1512 .probe = wm8960_i2c_probe, 1513 .remove = wm8960_i2c_remove, 1514 .id_table = wm8960_i2c_id, 1515 }; 1516 1517 module_i2c_driver(wm8960_i2c_driver); 1518 1519 MODULE_DESCRIPTION("ASoC WM8960 driver"); 1520 MODULE_AUTHOR("Liam Girdwood"); 1521 MODULE_LICENSE("GPL"); 1522