1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * wm8960.c -- WM8960 ALSA SoC Audio driver 4 * 5 * Copyright 2007-11 Wolfson Microelectronics, plc 6 * 7 * Author: Liam Girdwood 8 */ 9 10 #include <linux/module.h> 11 #include <linux/moduleparam.h> 12 #include <linux/init.h> 13 #include <linux/delay.h> 14 #include <linux/pm.h> 15 #include <linux/clk.h> 16 #include <linux/i2c.h> 17 #include <linux/slab.h> 18 #include <sound/core.h> 19 #include <sound/pcm.h> 20 #include <sound/pcm_params.h> 21 #include <sound/soc.h> 22 #include <sound/initval.h> 23 #include <sound/tlv.h> 24 #include <sound/wm8960.h> 25 26 #include "wm8960.h" 27 28 /* R25 - Power 1 */ 29 #define WM8960_VMID_MASK 0x180 30 #define WM8960_VREF 0x40 31 32 /* R26 - Power 2 */ 33 #define WM8960_PWR2_LOUT1 0x40 34 #define WM8960_PWR2_ROUT1 0x20 35 #define WM8960_PWR2_OUT3 0x02 36 37 /* R28 - Anti-pop 1 */ 38 #define WM8960_POBCTRL 0x80 39 #define WM8960_BUFDCOPEN 0x10 40 #define WM8960_BUFIOEN 0x08 41 #define WM8960_SOFT_ST 0x04 42 #define WM8960_HPSTBY 0x01 43 44 /* R29 - Anti-pop 2 */ 45 #define WM8960_DISOP 0x40 46 #define WM8960_DRES_MASK 0x30 47 48 static bool is_pll_freq_available(unsigned int source, unsigned int target); 49 static int wm8960_set_pll(struct snd_soc_component *component, 50 unsigned int freq_in, unsigned int freq_out); 51 /* 52 * wm8960 register cache 53 * We can't read the WM8960 register space when we are 54 * using 2 wire for device control, so we cache them instead. 55 */ 56 static const struct reg_default wm8960_reg_defaults[] = { 57 { 0x0, 0x00a7 }, 58 { 0x1, 0x00a7 }, 59 { 0x2, 0x0000 }, 60 { 0x3, 0x0000 }, 61 { 0x4, 0x0000 }, 62 { 0x5, 0x0008 }, 63 { 0x6, 0x0000 }, 64 { 0x7, 0x000a }, 65 { 0x8, 0x01c0 }, 66 { 0x9, 0x0000 }, 67 { 0xa, 0x00ff }, 68 { 0xb, 0x00ff }, 69 70 { 0x10, 0x0000 }, 71 { 0x11, 0x007b }, 72 { 0x12, 0x0100 }, 73 { 0x13, 0x0032 }, 74 { 0x14, 0x0000 }, 75 { 0x15, 0x00c3 }, 76 { 0x16, 0x00c3 }, 77 { 0x17, 0x01c0 }, 78 { 0x18, 0x0000 }, 79 { 0x19, 0x0000 }, 80 { 0x1a, 0x0000 }, 81 { 0x1b, 0x0000 }, 82 { 0x1c, 0x0000 }, 83 { 0x1d, 0x0000 }, 84 85 { 0x20, 0x0100 }, 86 { 0x21, 0x0100 }, 87 { 0x22, 0x0050 }, 88 89 { 0x25, 0x0050 }, 90 { 0x26, 0x0000 }, 91 { 0x27, 0x0000 }, 92 { 0x28, 0x0000 }, 93 { 0x29, 0x0000 }, 94 { 0x2a, 0x0040 }, 95 { 0x2b, 0x0000 }, 96 { 0x2c, 0x0000 }, 97 { 0x2d, 0x0050 }, 98 { 0x2e, 0x0050 }, 99 { 0x2f, 0x0000 }, 100 { 0x30, 0x0002 }, 101 { 0x31, 0x0037 }, 102 103 { 0x33, 0x0080 }, 104 { 0x34, 0x0008 }, 105 { 0x35, 0x0031 }, 106 { 0x36, 0x0026 }, 107 { 0x37, 0x00e9 }, 108 }; 109 110 static bool wm8960_volatile(struct device *dev, unsigned int reg) 111 { 112 switch (reg) { 113 case WM8960_RESET: 114 return true; 115 default: 116 return false; 117 } 118 } 119 120 struct wm8960_priv { 121 struct clk *mclk; 122 struct regmap *regmap; 123 int (*set_bias_level)(struct snd_soc_component *, 124 enum snd_soc_bias_level level); 125 struct snd_soc_dapm_widget *lout1; 126 struct snd_soc_dapm_widget *rout1; 127 struct snd_soc_dapm_widget *out3; 128 bool deemph; 129 int lrclk; 130 int bclk; 131 int sysclk; 132 int clk_id; 133 int freq_in; 134 bool is_stream_in_use[2]; 135 struct wm8960_data pdata; 136 }; 137 138 #define wm8960_reset(c) regmap_write(c, WM8960_RESET, 0) 139 140 /* enumerated controls */ 141 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted", 142 "Right Inverted", "Stereo Inversion"}; 143 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"}; 144 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"}; 145 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"}; 146 static const char *wm8960_alcmode[] = {"ALC", "Limiter"}; 147 static const char *wm8960_adc_data_output_sel[] = { 148 "Left Data = Left ADC; Right Data = Right ADC", 149 "Left Data = Left ADC; Right Data = Left ADC", 150 "Left Data = Right ADC; Right Data = Right ADC", 151 "Left Data = Right ADC; Right Data = Left ADC", 152 }; 153 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"}; 154 155 static const struct soc_enum wm8960_enum[] = { 156 SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity), 157 SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity), 158 SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff), 159 SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff), 160 SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc), 161 SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode), 162 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel), 163 SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix), 164 }; 165 166 static const int deemph_settings[] = { 0, 32000, 44100, 48000 }; 167 168 static int wm8960_set_deemph(struct snd_soc_component *component) 169 { 170 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 171 int val, i, best; 172 173 /* If we're using deemphasis select the nearest available sample 174 * rate. 175 */ 176 if (wm8960->deemph) { 177 best = 1; 178 for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) { 179 if (abs(deemph_settings[i] - wm8960->lrclk) < 180 abs(deemph_settings[best] - wm8960->lrclk)) 181 best = i; 182 } 183 184 val = best << 1; 185 } else { 186 val = 0; 187 } 188 189 dev_dbg(component->dev, "Set deemphasis %d\n", val); 190 191 return snd_soc_component_update_bits(component, WM8960_DACCTL1, 192 0x6, val); 193 } 194 195 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol, 196 struct snd_ctl_elem_value *ucontrol) 197 { 198 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 199 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 200 201 ucontrol->value.integer.value[0] = wm8960->deemph; 202 return 0; 203 } 204 205 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol, 206 struct snd_ctl_elem_value *ucontrol) 207 { 208 struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol); 209 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 210 unsigned int deemph = ucontrol->value.integer.value[0]; 211 212 if (deemph > 1) 213 return -EINVAL; 214 215 wm8960->deemph = deemph; 216 217 return wm8960_set_deemph(component); 218 } 219 220 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1); 221 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0); 222 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1); 223 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0); 224 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1); 225 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1); 226 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv, 227 0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0), 228 2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0), 229 ); 230 231 static const struct snd_kcontrol_new wm8960_snd_controls[] = { 232 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL, 233 0, 63, 0, inpga_tlv), 234 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL, 235 6, 1, 0), 236 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL, 237 7, 1, 1), 238 239 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume", 240 WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv), 241 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume", 242 WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv), 243 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume", 244 WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv), 245 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume", 246 WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv), 247 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume", 248 WM8960_RINPATH, 4, 3, 0, micboost_tlv), 249 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume", 250 WM8960_LINPATH, 4, 3, 0, micboost_tlv), 251 252 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC, 253 0, 255, 0, dac_tlv), 254 255 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1, 256 0, 127, 0, out_tlv), 257 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1, 258 7, 1, 0), 259 260 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2, 261 0, 127, 0, out_tlv), 262 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2, 263 7, 1, 0), 264 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0), 265 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0), 266 267 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0), 268 SOC_ENUM("ADC Polarity", wm8960_enum[0]), 269 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0), 270 271 SOC_ENUM("DAC Polarity", wm8960_enum[1]), 272 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0, 273 wm8960_get_deemph, wm8960_put_deemph), 274 275 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]), 276 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]), 277 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0), 278 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0), 279 280 SOC_ENUM("ALC Function", wm8960_enum[4]), 281 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0), 282 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1), 283 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0), 284 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0), 285 SOC_ENUM("ALC Mode", wm8960_enum[5]), 286 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0), 287 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0), 288 289 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0), 290 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0), 291 292 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC, 293 0, 255, 0, adc_tlv), 294 295 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume", 296 WM8960_BYPASS1, 4, 7, 1, bypass_tlv), 297 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume", 298 WM8960_LOUTMIX, 4, 7, 1, bypass_tlv), 299 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume", 300 WM8960_BYPASS2, 4, 7, 1, bypass_tlv), 301 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume", 302 WM8960_ROUTMIX, 4, 7, 1, bypass_tlv), 303 304 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]), 305 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]), 306 }; 307 308 static const struct snd_kcontrol_new wm8960_lin_boost[] = { 309 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0), 310 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0), 311 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0), 312 }; 313 314 static const struct snd_kcontrol_new wm8960_lin[] = { 315 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0), 316 }; 317 318 static const struct snd_kcontrol_new wm8960_rin_boost[] = { 319 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0), 320 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0), 321 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0), 322 }; 323 324 static const struct snd_kcontrol_new wm8960_rin[] = { 325 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0), 326 }; 327 328 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = { 329 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0), 330 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0), 331 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0), 332 }; 333 334 static const struct snd_kcontrol_new wm8960_routput_mixer[] = { 335 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0), 336 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0), 337 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0), 338 }; 339 340 static const struct snd_kcontrol_new wm8960_mono_out[] = { 341 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0), 342 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0), 343 }; 344 345 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = { 346 SND_SOC_DAPM_INPUT("LINPUT1"), 347 SND_SOC_DAPM_INPUT("RINPUT1"), 348 SND_SOC_DAPM_INPUT("LINPUT2"), 349 SND_SOC_DAPM_INPUT("RINPUT2"), 350 SND_SOC_DAPM_INPUT("LINPUT3"), 351 SND_SOC_DAPM_INPUT("RINPUT3"), 352 353 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0), 354 355 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0, 356 wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)), 357 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0, 358 wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)), 359 360 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0, 361 wm8960_lin, ARRAY_SIZE(wm8960_lin)), 362 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0, 363 wm8960_rin, ARRAY_SIZE(wm8960_rin)), 364 365 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0), 366 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0), 367 368 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0), 369 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0), 370 371 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0, 372 &wm8960_loutput_mixer[0], 373 ARRAY_SIZE(wm8960_loutput_mixer)), 374 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0, 375 &wm8960_routput_mixer[0], 376 ARRAY_SIZE(wm8960_routput_mixer)), 377 378 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0), 379 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0), 380 381 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0), 382 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0), 383 384 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0), 385 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0), 386 387 SND_SOC_DAPM_OUTPUT("SPK_LP"), 388 SND_SOC_DAPM_OUTPUT("SPK_LN"), 389 SND_SOC_DAPM_OUTPUT("HP_L"), 390 SND_SOC_DAPM_OUTPUT("HP_R"), 391 SND_SOC_DAPM_OUTPUT("SPK_RP"), 392 SND_SOC_DAPM_OUTPUT("SPK_RN"), 393 SND_SOC_DAPM_OUTPUT("OUT3"), 394 }; 395 396 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = { 397 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0, 398 &wm8960_mono_out[0], 399 ARRAY_SIZE(wm8960_mono_out)), 400 }; 401 402 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */ 403 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = { 404 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0), 405 }; 406 407 static const struct snd_soc_dapm_route audio_paths[] = { 408 { "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" }, 409 { "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" }, 410 { "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" }, 411 412 { "Left Input Mixer", "Boost Switch", "Left Boost Mixer" }, 413 { "Left Input Mixer", "Boost Switch", "LINPUT1" }, /* Really Boost Switch */ 414 { "Left Input Mixer", NULL, "LINPUT2" }, 415 { "Left Input Mixer", NULL, "LINPUT3" }, 416 417 { "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" }, 418 { "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" }, 419 { "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" }, 420 421 { "Right Input Mixer", "Boost Switch", "Right Boost Mixer" }, 422 { "Right Input Mixer", "Boost Switch", "RINPUT1" }, /* Really Boost Switch */ 423 { "Right Input Mixer", NULL, "RINPUT2" }, 424 { "Right Input Mixer", NULL, "RINPUT3" }, 425 426 { "Left ADC", NULL, "Left Input Mixer" }, 427 { "Right ADC", NULL, "Right Input Mixer" }, 428 429 { "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" }, 430 { "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" }, 431 { "Left Output Mixer", "PCM Playback Switch", "Left DAC" }, 432 433 { "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" }, 434 { "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" }, 435 { "Right Output Mixer", "PCM Playback Switch", "Right DAC" }, 436 437 { "LOUT1 PGA", NULL, "Left Output Mixer" }, 438 { "ROUT1 PGA", NULL, "Right Output Mixer" }, 439 440 { "HP_L", NULL, "LOUT1 PGA" }, 441 { "HP_R", NULL, "ROUT1 PGA" }, 442 443 { "Left Speaker PGA", NULL, "Left Output Mixer" }, 444 { "Right Speaker PGA", NULL, "Right Output Mixer" }, 445 446 { "Left Speaker Output", NULL, "Left Speaker PGA" }, 447 { "Right Speaker Output", NULL, "Right Speaker PGA" }, 448 449 { "SPK_LN", NULL, "Left Speaker Output" }, 450 { "SPK_LP", NULL, "Left Speaker Output" }, 451 { "SPK_RN", NULL, "Right Speaker Output" }, 452 { "SPK_RP", NULL, "Right Speaker Output" }, 453 }; 454 455 static const struct snd_soc_dapm_route audio_paths_out3[] = { 456 { "Mono Output Mixer", "Left Switch", "Left Output Mixer" }, 457 { "Mono Output Mixer", "Right Switch", "Right Output Mixer" }, 458 459 { "OUT3", NULL, "Mono Output Mixer", } 460 }; 461 462 static const struct snd_soc_dapm_route audio_paths_capless[] = { 463 { "HP_L", NULL, "OUT3 VMID" }, 464 { "HP_R", NULL, "OUT3 VMID" }, 465 466 { "OUT3 VMID", NULL, "Left Output Mixer" }, 467 { "OUT3 VMID", NULL, "Right Output Mixer" }, 468 }; 469 470 static int wm8960_add_widgets(struct snd_soc_component *component) 471 { 472 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 473 struct wm8960_data *pdata = &wm8960->pdata; 474 struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component); 475 struct snd_soc_dapm_widget *w; 476 477 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets, 478 ARRAY_SIZE(wm8960_dapm_widgets)); 479 480 snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths)); 481 482 /* In capless mode OUT3 is used to provide VMID for the 483 * headphone outputs, otherwise it is used as a mono mixer. 484 */ 485 if (pdata && pdata->capless) { 486 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless, 487 ARRAY_SIZE(wm8960_dapm_widgets_capless)); 488 489 snd_soc_dapm_add_routes(dapm, audio_paths_capless, 490 ARRAY_SIZE(audio_paths_capless)); 491 } else { 492 snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3, 493 ARRAY_SIZE(wm8960_dapm_widgets_out3)); 494 495 snd_soc_dapm_add_routes(dapm, audio_paths_out3, 496 ARRAY_SIZE(audio_paths_out3)); 497 } 498 499 /* We need to power up the headphone output stage out of 500 * sequence for capless mode. To save scanning the widget 501 * list each time to find the desired power state do so now 502 * and save the result. 503 */ 504 list_for_each_entry(w, &component->card->widgets, list) { 505 if (w->dapm != dapm) 506 continue; 507 if (strcmp(w->name, "LOUT1 PGA") == 0) 508 wm8960->lout1 = w; 509 if (strcmp(w->name, "ROUT1 PGA") == 0) 510 wm8960->rout1 = w; 511 if (strcmp(w->name, "OUT3 VMID") == 0) 512 wm8960->out3 = w; 513 } 514 515 return 0; 516 } 517 518 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai, 519 unsigned int fmt) 520 { 521 struct snd_soc_component *component = codec_dai->component; 522 u16 iface = 0; 523 524 /* set master/slave audio interface */ 525 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 526 case SND_SOC_DAIFMT_CBM_CFM: 527 iface |= 0x0040; 528 break; 529 case SND_SOC_DAIFMT_CBS_CFS: 530 break; 531 default: 532 return -EINVAL; 533 } 534 535 /* interface format */ 536 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 537 case SND_SOC_DAIFMT_I2S: 538 iface |= 0x0002; 539 break; 540 case SND_SOC_DAIFMT_RIGHT_J: 541 break; 542 case SND_SOC_DAIFMT_LEFT_J: 543 iface |= 0x0001; 544 break; 545 case SND_SOC_DAIFMT_DSP_A: 546 iface |= 0x0003; 547 break; 548 case SND_SOC_DAIFMT_DSP_B: 549 iface |= 0x0013; 550 break; 551 default: 552 return -EINVAL; 553 } 554 555 /* clock inversion */ 556 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 557 case SND_SOC_DAIFMT_NB_NF: 558 break; 559 case SND_SOC_DAIFMT_IB_IF: 560 iface |= 0x0090; 561 break; 562 case SND_SOC_DAIFMT_IB_NF: 563 iface |= 0x0080; 564 break; 565 case SND_SOC_DAIFMT_NB_IF: 566 iface |= 0x0010; 567 break; 568 default: 569 return -EINVAL; 570 } 571 572 /* set iface */ 573 snd_soc_component_write(component, WM8960_IFACE1, iface); 574 return 0; 575 } 576 577 static struct { 578 int rate; 579 unsigned int val; 580 } alc_rates[] = { 581 { 48000, 0 }, 582 { 44100, 0 }, 583 { 32000, 1 }, 584 { 22050, 2 }, 585 { 24000, 2 }, 586 { 16000, 3 }, 587 { 11025, 4 }, 588 { 12000, 4 }, 589 { 8000, 5 }, 590 }; 591 592 /* -1 for reserved value */ 593 static const int sysclk_divs[] = { 1, -1, 2, -1 }; 594 595 /* Multiply 256 for internal 256 div */ 596 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 }; 597 598 /* Multiply 10 to eliminate decimials */ 599 static const int bclk_divs[] = { 600 10, 15, 20, 30, 40, 55, 60, 80, 110, 601 120, 160, 220, 240, 320, 320, 320 602 }; 603 604 /** 605 * wm8960_configure_sysclk - checks if there is a sysclk frequency available 606 * The sysclk must be chosen such that: 607 * - sysclk = MCLK / sysclk_divs 608 * - lrclk = sysclk / dac_divs 609 * - 10 * bclk = sysclk / bclk_divs 610 * 611 * @wm8960: codec private data 612 * @mclk: MCLK used to derive sysclk 613 * @sysclk_idx: sysclk_divs index for found sysclk 614 * @dac_idx: dac_divs index for found lrclk 615 * @bclk_idx: bclk_divs index for found bclk 616 * 617 * Returns: 618 * -1, in case no sysclk frequency available found 619 * >=0, in case we could derive bclk and lrclk from sysclk using 620 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers 621 */ 622 static 623 int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk, 624 int *sysclk_idx, int *dac_idx, int *bclk_idx) 625 { 626 int sysclk, bclk, lrclk; 627 int i, j, k; 628 int diff; 629 630 /* marker for no match */ 631 *bclk_idx = -1; 632 633 bclk = wm8960->bclk; 634 lrclk = wm8960->lrclk; 635 636 /* check if the sysclk frequency is available. */ 637 for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) { 638 if (sysclk_divs[i] == -1) 639 continue; 640 sysclk = mclk / sysclk_divs[i]; 641 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { 642 if (sysclk != dac_divs[j] * lrclk) 643 continue; 644 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { 645 diff = sysclk - bclk * bclk_divs[k] / 10; 646 if (diff == 0) { 647 *sysclk_idx = i; 648 *dac_idx = j; 649 *bclk_idx = k; 650 break; 651 } 652 } 653 if (k != ARRAY_SIZE(bclk_divs)) 654 break; 655 } 656 if (j != ARRAY_SIZE(dac_divs)) 657 break; 658 } 659 return *bclk_idx; 660 } 661 662 /** 663 * wm8960_configure_pll - checks if there is a PLL out frequency available 664 * The PLL out frequency must be chosen such that: 665 * - sysclk = lrclk * dac_divs 666 * - freq_out = sysclk * sysclk_divs 667 * - 10 * sysclk = bclk * bclk_divs 668 * 669 * If we cannot find an exact match for (sysclk, lrclk, bclk) 670 * triplet, we relax the bclk such that bclk is chosen as the 671 * closest available frequency greater than expected bclk. 672 * 673 * @component: component structure 674 * @freq_in: input frequency used to derive freq out via PLL 675 * @sysclk_idx: sysclk_divs index for found sysclk 676 * @dac_idx: dac_divs index for found lrclk 677 * @bclk_idx: bclk_divs index for found bclk 678 * 679 * Returns: 680 * < 0, in case no PLL frequency out available was found 681 * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using 682 * (@sysclk_idx, @dac_idx, @bclk_idx) dividers 683 */ 684 static 685 int wm8960_configure_pll(struct snd_soc_component *component, int freq_in, 686 int *sysclk_idx, int *dac_idx, int *bclk_idx) 687 { 688 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 689 int sysclk, bclk, lrclk, freq_out; 690 int diff, closest, best_freq_out; 691 int i, j, k; 692 693 bclk = wm8960->bclk; 694 lrclk = wm8960->lrclk; 695 closest = freq_in; 696 697 best_freq_out = -EINVAL; 698 *sysclk_idx = *dac_idx = *bclk_idx = -1; 699 700 /* 701 * From Datasheet, the PLL performs best when f2 is between 702 * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz 703 * or 12.288MHz, then sysclkdiv = 2 is the best choice. 704 * So search sysclk_divs from 2 to 1 other than from 1 to 2. 705 */ 706 for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) { 707 if (sysclk_divs[i] == -1) 708 continue; 709 for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) { 710 sysclk = lrclk * dac_divs[j]; 711 freq_out = sysclk * sysclk_divs[i]; 712 713 for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) { 714 if (!is_pll_freq_available(freq_in, freq_out)) 715 continue; 716 717 diff = sysclk - bclk * bclk_divs[k] / 10; 718 if (diff == 0) { 719 *sysclk_idx = i; 720 *dac_idx = j; 721 *bclk_idx = k; 722 return freq_out; 723 } 724 if (diff > 0 && closest > diff) { 725 *sysclk_idx = i; 726 *dac_idx = j; 727 *bclk_idx = k; 728 closest = diff; 729 best_freq_out = freq_out; 730 } 731 } 732 } 733 } 734 735 return best_freq_out; 736 } 737 static int wm8960_configure_clocking(struct snd_soc_component *component) 738 { 739 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 740 int freq_out, freq_in; 741 u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1); 742 int i, j, k; 743 int ret; 744 745 if (!(iface1 & (1<<6))) { 746 dev_dbg(component->dev, 747 "Codec is slave mode, no need to configure clock\n"); 748 return 0; 749 } 750 751 if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) { 752 dev_err(component->dev, "No MCLK configured\n"); 753 return -EINVAL; 754 } 755 756 freq_in = wm8960->freq_in; 757 /* 758 * If it's sysclk auto mode, check if the MCLK can provide sysclk or 759 * not. If MCLK can provide sysclk, using MCLK to provide sysclk 760 * directly. Otherwise, auto select a available pll out frequency 761 * and set PLL. 762 */ 763 if (wm8960->clk_id == WM8960_SYSCLK_AUTO) { 764 /* disable the PLL and using MCLK to provide sysclk */ 765 wm8960_set_pll(component, 0, 0); 766 freq_out = freq_in; 767 } else if (wm8960->sysclk) { 768 freq_out = wm8960->sysclk; 769 } else { 770 dev_err(component->dev, "No SYSCLK configured\n"); 771 return -EINVAL; 772 } 773 774 if (wm8960->clk_id != WM8960_SYSCLK_PLL) { 775 ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k); 776 if (ret >= 0) { 777 goto configure_clock; 778 } else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) { 779 dev_err(component->dev, "failed to configure clock\n"); 780 return -EINVAL; 781 } 782 } 783 784 freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k); 785 if (freq_out < 0) { 786 dev_err(component->dev, "failed to configure clock via PLL\n"); 787 return freq_out; 788 } 789 wm8960_set_pll(component, freq_in, freq_out); 790 791 configure_clock: 792 /* configure sysclk clock */ 793 snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1); 794 795 /* configure frame clock */ 796 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3); 797 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6); 798 799 /* configure bit clock */ 800 snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k); 801 802 return 0; 803 } 804 805 static int wm8960_hw_params(struct snd_pcm_substream *substream, 806 struct snd_pcm_hw_params *params, 807 struct snd_soc_dai *dai) 808 { 809 struct snd_soc_component *component = dai->component; 810 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 811 u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3; 812 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 813 int i; 814 815 wm8960->bclk = snd_soc_params_to_bclk(params); 816 if (params_channels(params) == 1) 817 wm8960->bclk *= 2; 818 819 /* bit size */ 820 switch (params_width(params)) { 821 case 16: 822 break; 823 case 20: 824 iface |= 0x0004; 825 break; 826 case 24: 827 iface |= 0x0008; 828 break; 829 case 32: 830 /* right justify mode does not support 32 word length */ 831 if ((iface & 0x3) != 0) { 832 iface |= 0x000c; 833 break; 834 } 835 fallthrough; 836 default: 837 dev_err(component->dev, "unsupported width %d\n", 838 params_width(params)); 839 return -EINVAL; 840 } 841 842 wm8960->lrclk = params_rate(params); 843 /* Update filters for the new rate */ 844 if (tx) { 845 wm8960_set_deemph(component); 846 } else { 847 for (i = 0; i < ARRAY_SIZE(alc_rates); i++) 848 if (alc_rates[i].rate == params_rate(params)) 849 snd_soc_component_update_bits(component, 850 WM8960_ADDCTL3, 0x7, 851 alc_rates[i].val); 852 } 853 854 /* set iface */ 855 snd_soc_component_write(component, WM8960_IFACE1, iface); 856 857 wm8960->is_stream_in_use[tx] = true; 858 859 if (!wm8960->is_stream_in_use[!tx]) 860 return wm8960_configure_clocking(component); 861 862 return 0; 863 } 864 865 static int wm8960_hw_free(struct snd_pcm_substream *substream, 866 struct snd_soc_dai *dai) 867 { 868 struct snd_soc_component *component = dai->component; 869 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 870 bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK; 871 872 wm8960->is_stream_in_use[tx] = false; 873 874 return 0; 875 } 876 877 static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction) 878 { 879 struct snd_soc_component *component = dai->component; 880 881 if (mute) 882 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8); 883 else 884 snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0); 885 return 0; 886 } 887 888 static int wm8960_set_bias_level_out3(struct snd_soc_component *component, 889 enum snd_soc_bias_level level) 890 { 891 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 892 u16 pm2 = snd_soc_component_read(component, WM8960_POWER2); 893 int ret; 894 895 switch (level) { 896 case SND_SOC_BIAS_ON: 897 break; 898 899 case SND_SOC_BIAS_PREPARE: 900 switch (snd_soc_component_get_bias_level(component)) { 901 case SND_SOC_BIAS_STANDBY: 902 if (!IS_ERR(wm8960->mclk)) { 903 ret = clk_prepare_enable(wm8960->mclk); 904 if (ret) { 905 dev_err(component->dev, 906 "Failed to enable MCLK: %d\n", 907 ret); 908 return ret; 909 } 910 } 911 912 ret = wm8960_configure_clocking(component); 913 if (ret) 914 return ret; 915 916 /* Set VMID to 2x50k */ 917 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80); 918 break; 919 920 case SND_SOC_BIAS_ON: 921 /* 922 * If it's sysclk auto mode, and the pll is enabled, 923 * disable the pll 924 */ 925 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1)) 926 wm8960_set_pll(component, 0, 0); 927 928 if (!IS_ERR(wm8960->mclk)) 929 clk_disable_unprepare(wm8960->mclk); 930 break; 931 932 default: 933 break; 934 } 935 936 break; 937 938 case SND_SOC_BIAS_STANDBY: 939 if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) { 940 regcache_sync(wm8960->regmap); 941 942 /* Enable anti-pop features */ 943 snd_soc_component_write(component, WM8960_APOP1, 944 WM8960_POBCTRL | WM8960_SOFT_ST | 945 WM8960_BUFDCOPEN | WM8960_BUFIOEN); 946 947 /* Enable & ramp VMID at 2x50k */ 948 snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80); 949 msleep(100); 950 951 /* Enable VREF */ 952 snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF, 953 WM8960_VREF); 954 955 /* Disable anti-pop features */ 956 snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN); 957 } 958 959 /* Set VMID to 2x250k */ 960 snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100); 961 break; 962 963 case SND_SOC_BIAS_OFF: 964 /* Enable anti-pop features */ 965 snd_soc_component_write(component, WM8960_APOP1, 966 WM8960_POBCTRL | WM8960_SOFT_ST | 967 WM8960_BUFDCOPEN | WM8960_BUFIOEN); 968 969 /* Disable VMID and VREF, let them discharge */ 970 snd_soc_component_write(component, WM8960_POWER1, 0); 971 msleep(600); 972 break; 973 } 974 975 return 0; 976 } 977 978 static int wm8960_set_bias_level_capless(struct snd_soc_component *component, 979 enum snd_soc_bias_level level) 980 { 981 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 982 u16 pm2 = snd_soc_component_read(component, WM8960_POWER2); 983 int reg, ret; 984 985 switch (level) { 986 case SND_SOC_BIAS_ON: 987 break; 988 989 case SND_SOC_BIAS_PREPARE: 990 switch (snd_soc_component_get_bias_level(component)) { 991 case SND_SOC_BIAS_STANDBY: 992 /* Enable anti pop mode */ 993 snd_soc_component_update_bits(component, WM8960_APOP1, 994 WM8960_POBCTRL | WM8960_SOFT_ST | 995 WM8960_BUFDCOPEN, 996 WM8960_POBCTRL | WM8960_SOFT_ST | 997 WM8960_BUFDCOPEN); 998 999 /* Enable LOUT1, ROUT1 and OUT3 if they're enabled */ 1000 reg = 0; 1001 if (wm8960->lout1 && wm8960->lout1->power) 1002 reg |= WM8960_PWR2_LOUT1; 1003 if (wm8960->rout1 && wm8960->rout1->power) 1004 reg |= WM8960_PWR2_ROUT1; 1005 if (wm8960->out3 && wm8960->out3->power) 1006 reg |= WM8960_PWR2_OUT3; 1007 snd_soc_component_update_bits(component, WM8960_POWER2, 1008 WM8960_PWR2_LOUT1 | 1009 WM8960_PWR2_ROUT1 | 1010 WM8960_PWR2_OUT3, reg); 1011 1012 /* Enable VMID at 2*50k */ 1013 snd_soc_component_update_bits(component, WM8960_POWER1, 1014 WM8960_VMID_MASK, 0x80); 1015 1016 /* Ramp */ 1017 msleep(100); 1018 1019 /* Enable VREF */ 1020 snd_soc_component_update_bits(component, WM8960_POWER1, 1021 WM8960_VREF, WM8960_VREF); 1022 1023 msleep(100); 1024 1025 if (!IS_ERR(wm8960->mclk)) { 1026 ret = clk_prepare_enable(wm8960->mclk); 1027 if (ret) { 1028 dev_err(component->dev, 1029 "Failed to enable MCLK: %d\n", 1030 ret); 1031 return ret; 1032 } 1033 } 1034 1035 ret = wm8960_configure_clocking(component); 1036 if (ret) 1037 return ret; 1038 1039 break; 1040 1041 case SND_SOC_BIAS_ON: 1042 /* 1043 * If it's sysclk auto mode, and the pll is enabled, 1044 * disable the pll 1045 */ 1046 if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1)) 1047 wm8960_set_pll(component, 0, 0); 1048 1049 if (!IS_ERR(wm8960->mclk)) 1050 clk_disable_unprepare(wm8960->mclk); 1051 1052 /* Enable anti-pop mode */ 1053 snd_soc_component_update_bits(component, WM8960_APOP1, 1054 WM8960_POBCTRL | WM8960_SOFT_ST | 1055 WM8960_BUFDCOPEN, 1056 WM8960_POBCTRL | WM8960_SOFT_ST | 1057 WM8960_BUFDCOPEN); 1058 1059 /* Disable VMID and VREF */ 1060 snd_soc_component_update_bits(component, WM8960_POWER1, 1061 WM8960_VREF | WM8960_VMID_MASK, 0); 1062 break; 1063 1064 case SND_SOC_BIAS_OFF: 1065 regcache_sync(wm8960->regmap); 1066 break; 1067 default: 1068 break; 1069 } 1070 break; 1071 1072 case SND_SOC_BIAS_STANDBY: 1073 switch (snd_soc_component_get_bias_level(component)) { 1074 case SND_SOC_BIAS_PREPARE: 1075 /* Disable HP discharge */ 1076 snd_soc_component_update_bits(component, WM8960_APOP2, 1077 WM8960_DISOP | WM8960_DRES_MASK, 1078 0); 1079 1080 /* Disable anti-pop features */ 1081 snd_soc_component_update_bits(component, WM8960_APOP1, 1082 WM8960_POBCTRL | WM8960_SOFT_ST | 1083 WM8960_BUFDCOPEN, 1084 WM8960_POBCTRL | WM8960_SOFT_ST | 1085 WM8960_BUFDCOPEN); 1086 break; 1087 1088 default: 1089 break; 1090 } 1091 break; 1092 1093 case SND_SOC_BIAS_OFF: 1094 break; 1095 } 1096 1097 return 0; 1098 } 1099 1100 /* PLL divisors */ 1101 struct _pll_div { 1102 u32 pre_div:1; 1103 u32 n:4; 1104 u32 k:24; 1105 }; 1106 1107 static bool is_pll_freq_available(unsigned int source, unsigned int target) 1108 { 1109 unsigned int Ndiv; 1110 1111 if (source == 0 || target == 0) 1112 return false; 1113 1114 /* Scale up target to PLL operating frequency */ 1115 target *= 4; 1116 Ndiv = target / source; 1117 1118 if (Ndiv < 6) { 1119 source >>= 1; 1120 Ndiv = target / source; 1121 } 1122 1123 if ((Ndiv < 6) || (Ndiv > 12)) 1124 return false; 1125 1126 return true; 1127 } 1128 1129 /* The size in bits of the pll divide multiplied by 10 1130 * to allow rounding later */ 1131 #define FIXED_PLL_SIZE ((1 << 24) * 10) 1132 1133 static int pll_factors(unsigned int source, unsigned int target, 1134 struct _pll_div *pll_div) 1135 { 1136 unsigned long long Kpart; 1137 unsigned int K, Ndiv, Nmod; 1138 1139 pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target); 1140 1141 /* Scale up target to PLL operating frequency */ 1142 target *= 4; 1143 1144 Ndiv = target / source; 1145 if (Ndiv < 6) { 1146 source >>= 1; 1147 pll_div->pre_div = 1; 1148 Ndiv = target / source; 1149 } else 1150 pll_div->pre_div = 0; 1151 1152 if ((Ndiv < 6) || (Ndiv > 12)) { 1153 pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv); 1154 return -EINVAL; 1155 } 1156 1157 pll_div->n = Ndiv; 1158 Nmod = target % source; 1159 Kpart = FIXED_PLL_SIZE * (long long)Nmod; 1160 1161 do_div(Kpart, source); 1162 1163 K = Kpart & 0xFFFFFFFF; 1164 1165 /* Check if we need to round */ 1166 if ((K % 10) >= 5) 1167 K += 5; 1168 1169 /* Move down to proper range now rounding is done */ 1170 K /= 10; 1171 1172 pll_div->k = K; 1173 1174 pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n", 1175 pll_div->n, pll_div->k, pll_div->pre_div); 1176 1177 return 0; 1178 } 1179 1180 static int wm8960_set_pll(struct snd_soc_component *component, 1181 unsigned int freq_in, unsigned int freq_out) 1182 { 1183 u16 reg; 1184 static struct _pll_div pll_div; 1185 int ret; 1186 1187 if (freq_in && freq_out) { 1188 ret = pll_factors(freq_in, freq_out, &pll_div); 1189 if (ret != 0) 1190 return ret; 1191 } 1192 1193 /* Disable the PLL: even if we are changing the frequency the 1194 * PLL needs to be disabled while we do so. */ 1195 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0); 1196 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0); 1197 1198 if (!freq_in || !freq_out) 1199 return 0; 1200 1201 reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f; 1202 reg |= pll_div.pre_div << 4; 1203 reg |= pll_div.n; 1204 1205 if (pll_div.k) { 1206 reg |= 0x20; 1207 1208 snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff); 1209 snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff); 1210 snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff); 1211 } 1212 snd_soc_component_write(component, WM8960_PLL1, reg); 1213 1214 /* Turn it on */ 1215 snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1); 1216 msleep(250); 1217 snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1); 1218 1219 return 0; 1220 } 1221 1222 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id, 1223 int source, unsigned int freq_in, unsigned int freq_out) 1224 { 1225 struct snd_soc_component *component = codec_dai->component; 1226 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1227 1228 wm8960->freq_in = freq_in; 1229 1230 if (pll_id == WM8960_SYSCLK_AUTO) 1231 return 0; 1232 1233 return wm8960_set_pll(component, freq_in, freq_out); 1234 } 1235 1236 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai, 1237 int div_id, int div) 1238 { 1239 struct snd_soc_component *component = codec_dai->component; 1240 u16 reg; 1241 1242 switch (div_id) { 1243 case WM8960_SYSCLKDIV: 1244 reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9; 1245 snd_soc_component_write(component, WM8960_CLOCK1, reg | div); 1246 break; 1247 case WM8960_DACDIV: 1248 reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7; 1249 snd_soc_component_write(component, WM8960_CLOCK1, reg | div); 1250 break; 1251 case WM8960_OPCLKDIV: 1252 reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f; 1253 snd_soc_component_write(component, WM8960_PLL1, reg | div); 1254 break; 1255 case WM8960_DCLKDIV: 1256 reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f; 1257 snd_soc_component_write(component, WM8960_CLOCK2, reg | div); 1258 break; 1259 case WM8960_TOCLKSEL: 1260 reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd; 1261 snd_soc_component_write(component, WM8960_ADDCTL1, reg | div); 1262 break; 1263 default: 1264 return -EINVAL; 1265 } 1266 1267 return 0; 1268 } 1269 1270 static int wm8960_set_bias_level(struct snd_soc_component *component, 1271 enum snd_soc_bias_level level) 1272 { 1273 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1274 1275 return wm8960->set_bias_level(component, level); 1276 } 1277 1278 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id, 1279 unsigned int freq, int dir) 1280 { 1281 struct snd_soc_component *component = dai->component; 1282 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1283 1284 switch (clk_id) { 1285 case WM8960_SYSCLK_MCLK: 1286 snd_soc_component_update_bits(component, WM8960_CLOCK1, 1287 0x1, WM8960_SYSCLK_MCLK); 1288 break; 1289 case WM8960_SYSCLK_PLL: 1290 snd_soc_component_update_bits(component, WM8960_CLOCK1, 1291 0x1, WM8960_SYSCLK_PLL); 1292 break; 1293 case WM8960_SYSCLK_AUTO: 1294 break; 1295 default: 1296 return -EINVAL; 1297 } 1298 1299 wm8960->sysclk = freq; 1300 wm8960->clk_id = clk_id; 1301 1302 return 0; 1303 } 1304 1305 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000 1306 1307 #define WM8960_FORMATS \ 1308 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 1309 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE) 1310 1311 static const struct snd_soc_dai_ops wm8960_dai_ops = { 1312 .hw_params = wm8960_hw_params, 1313 .hw_free = wm8960_hw_free, 1314 .mute_stream = wm8960_mute, 1315 .set_fmt = wm8960_set_dai_fmt, 1316 .set_clkdiv = wm8960_set_dai_clkdiv, 1317 .set_pll = wm8960_set_dai_pll, 1318 .set_sysclk = wm8960_set_dai_sysclk, 1319 .no_capture_mute = 1, 1320 }; 1321 1322 static struct snd_soc_dai_driver wm8960_dai = { 1323 .name = "wm8960-hifi", 1324 .playback = { 1325 .stream_name = "Playback", 1326 .channels_min = 1, 1327 .channels_max = 2, 1328 .rates = WM8960_RATES, 1329 .formats = WM8960_FORMATS,}, 1330 .capture = { 1331 .stream_name = "Capture", 1332 .channels_min = 1, 1333 .channels_max = 2, 1334 .rates = WM8960_RATES, 1335 .formats = WM8960_FORMATS,}, 1336 .ops = &wm8960_dai_ops, 1337 .symmetric_rate = 1, 1338 }; 1339 1340 static int wm8960_probe(struct snd_soc_component *component) 1341 { 1342 struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component); 1343 struct wm8960_data *pdata = &wm8960->pdata; 1344 1345 if (pdata->capless) 1346 wm8960->set_bias_level = wm8960_set_bias_level_capless; 1347 else 1348 wm8960->set_bias_level = wm8960_set_bias_level_out3; 1349 1350 snd_soc_add_component_controls(component, wm8960_snd_controls, 1351 ARRAY_SIZE(wm8960_snd_controls)); 1352 wm8960_add_widgets(component); 1353 1354 return 0; 1355 } 1356 1357 static const struct snd_soc_component_driver soc_component_dev_wm8960 = { 1358 .probe = wm8960_probe, 1359 .set_bias_level = wm8960_set_bias_level, 1360 .suspend_bias_off = 1, 1361 .idle_bias_on = 1, 1362 .use_pmdown_time = 1, 1363 .endianness = 1, 1364 .non_legacy_dai_naming = 1, 1365 }; 1366 1367 static const struct regmap_config wm8960_regmap = { 1368 .reg_bits = 7, 1369 .val_bits = 9, 1370 .max_register = WM8960_PLL4, 1371 1372 .reg_defaults = wm8960_reg_defaults, 1373 .num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults), 1374 .cache_type = REGCACHE_RBTREE, 1375 1376 .volatile_reg = wm8960_volatile, 1377 }; 1378 1379 static void wm8960_set_pdata_from_of(struct i2c_client *i2c, 1380 struct wm8960_data *pdata) 1381 { 1382 const struct device_node *np = i2c->dev.of_node; 1383 1384 if (of_property_read_bool(np, "wlf,capless")) 1385 pdata->capless = true; 1386 1387 if (of_property_read_bool(np, "wlf,shared-lrclk")) 1388 pdata->shared_lrclk = true; 1389 1390 of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg, 1391 ARRAY_SIZE(pdata->gpio_cfg)); 1392 1393 of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg, 1394 ARRAY_SIZE(pdata->hp_cfg)); 1395 } 1396 1397 static int wm8960_i2c_probe(struct i2c_client *i2c, 1398 const struct i2c_device_id *id) 1399 { 1400 struct wm8960_data *pdata = dev_get_platdata(&i2c->dev); 1401 struct wm8960_priv *wm8960; 1402 int ret; 1403 1404 wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv), 1405 GFP_KERNEL); 1406 if (wm8960 == NULL) 1407 return -ENOMEM; 1408 1409 wm8960->mclk = devm_clk_get(&i2c->dev, "mclk"); 1410 if (IS_ERR(wm8960->mclk)) { 1411 if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER) 1412 return -EPROBE_DEFER; 1413 } 1414 1415 wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap); 1416 if (IS_ERR(wm8960->regmap)) 1417 return PTR_ERR(wm8960->regmap); 1418 1419 if (pdata) 1420 memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data)); 1421 else if (i2c->dev.of_node) 1422 wm8960_set_pdata_from_of(i2c, &wm8960->pdata); 1423 1424 ret = wm8960_reset(wm8960->regmap); 1425 if (ret != 0) { 1426 dev_err(&i2c->dev, "Failed to issue reset\n"); 1427 return ret; 1428 } 1429 1430 if (wm8960->pdata.shared_lrclk) { 1431 ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 1432 0x4, 0x4); 1433 if (ret != 0) { 1434 dev_err(&i2c->dev, "Failed to enable LRCM: %d\n", 1435 ret); 1436 return ret; 1437 } 1438 } 1439 1440 /* Latch the update bits */ 1441 regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100); 1442 regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100); 1443 regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100); 1444 regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100); 1445 regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100); 1446 regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100); 1447 regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100); 1448 regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100); 1449 regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100); 1450 regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100); 1451 1452 /* ADCLRC pin configured as GPIO. */ 1453 regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6, 1454 wm8960->pdata.gpio_cfg[0] << 6); 1455 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4, 1456 wm8960->pdata.gpio_cfg[1] << 4); 1457 1458 /* Enable headphone jack detect */ 1459 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2, 1460 wm8960->pdata.hp_cfg[0] << 2); 1461 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5, 1462 wm8960->pdata.hp_cfg[1] << 5); 1463 regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3, 1464 wm8960->pdata.hp_cfg[2]); 1465 1466 i2c_set_clientdata(i2c, wm8960); 1467 1468 ret = devm_snd_soc_register_component(&i2c->dev, 1469 &soc_component_dev_wm8960, &wm8960_dai, 1); 1470 1471 return ret; 1472 } 1473 1474 static int wm8960_i2c_remove(struct i2c_client *client) 1475 { 1476 return 0; 1477 } 1478 1479 static const struct i2c_device_id wm8960_i2c_id[] = { 1480 { "wm8960", 0 }, 1481 { } 1482 }; 1483 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id); 1484 1485 static const struct of_device_id wm8960_of_match[] = { 1486 { .compatible = "wlf,wm8960", }, 1487 { } 1488 }; 1489 MODULE_DEVICE_TABLE(of, wm8960_of_match); 1490 1491 static struct i2c_driver wm8960_i2c_driver = { 1492 .driver = { 1493 .name = "wm8960", 1494 .of_match_table = wm8960_of_match, 1495 }, 1496 .probe = wm8960_i2c_probe, 1497 .remove = wm8960_i2c_remove, 1498 .id_table = wm8960_i2c_id, 1499 }; 1500 1501 module_i2c_driver(wm8960_i2c_driver); 1502 1503 MODULE_DESCRIPTION("ASoC WM8960 driver"); 1504 MODULE_AUTHOR("Liam Girdwood"); 1505 MODULE_LICENSE("GPL"); 1506