xref: /openbmc/linux/sound/soc/codecs/wm8960.c (revision 1d54134d)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * wm8960.c  --  WM8960 ALSA SoC Audio driver
4  *
5  * Copyright 2007-11 Wolfson Microelectronics, plc
6  *
7  * Author: Liam Girdwood
8  */
9 
10 #include <linux/module.h>
11 #include <linux/moduleparam.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
14 #include <linux/pm.h>
15 #include <linux/clk.h>
16 #include <linux/i2c.h>
17 #include <linux/acpi.h>
18 #include <linux/slab.h>
19 #include <sound/core.h>
20 #include <sound/pcm.h>
21 #include <sound/pcm_params.h>
22 #include <sound/soc.h>
23 #include <sound/initval.h>
24 #include <sound/tlv.h>
25 #include <sound/wm8960.h>
26 
27 #include "wm8960.h"
28 
29 /* R25 - Power 1 */
30 #define WM8960_VMID_MASK 0x180
31 #define WM8960_VREF      0x40
32 
33 /* R26 - Power 2 */
34 #define WM8960_PWR2_LOUT1	0x40
35 #define WM8960_PWR2_ROUT1	0x20
36 #define WM8960_PWR2_OUT3	0x02
37 
38 /* R28 - Anti-pop 1 */
39 #define WM8960_POBCTRL   0x80
40 #define WM8960_BUFDCOPEN 0x10
41 #define WM8960_BUFIOEN   0x08
42 #define WM8960_SOFT_ST   0x04
43 #define WM8960_HPSTBY    0x01
44 
45 /* R29 - Anti-pop 2 */
46 #define WM8960_DISOP     0x40
47 #define WM8960_DRES_MASK 0x30
48 
49 #define WM8960_DSCH_TOUT	600 /* discharge timeout, ms */
50 
51 static bool is_pll_freq_available(unsigned int source, unsigned int target);
52 static int wm8960_set_pll(struct snd_soc_component *component,
53 		unsigned int freq_in, unsigned int freq_out);
54 /*
55  * wm8960 register cache
56  * We can't read the WM8960 register space when we are
57  * using 2 wire for device control, so we cache them instead.
58  */
59 static const struct reg_default wm8960_reg_defaults[] = {
60 	{  0x0, 0x00a7 },
61 	{  0x1, 0x00a7 },
62 	{  0x2, 0x0000 },
63 	{  0x3, 0x0000 },
64 	{  0x4, 0x0000 },
65 	{  0x5, 0x0008 },
66 	{  0x6, 0x0000 },
67 	{  0x7, 0x000a },
68 	{  0x8, 0x01c0 },
69 	{  0x9, 0x0000 },
70 	{  0xa, 0x00ff },
71 	{  0xb, 0x00ff },
72 
73 	{ 0x10, 0x0000 },
74 	{ 0x11, 0x007b },
75 	{ 0x12, 0x0100 },
76 	{ 0x13, 0x0032 },
77 	{ 0x14, 0x0000 },
78 	{ 0x15, 0x00c3 },
79 	{ 0x16, 0x00c3 },
80 	{ 0x17, 0x01c0 },
81 	{ 0x18, 0x0000 },
82 	{ 0x19, 0x0000 },
83 	{ 0x1a, 0x0000 },
84 	{ 0x1b, 0x0000 },
85 	{ 0x1c, 0x0000 },
86 	{ 0x1d, 0x0000 },
87 
88 	{ 0x20, 0x0100 },
89 	{ 0x21, 0x0100 },
90 	{ 0x22, 0x0050 },
91 
92 	{ 0x25, 0x0050 },
93 	{ 0x26, 0x0000 },
94 	{ 0x27, 0x0000 },
95 	{ 0x28, 0x0000 },
96 	{ 0x29, 0x0000 },
97 	{ 0x2a, 0x0040 },
98 	{ 0x2b, 0x0000 },
99 	{ 0x2c, 0x0000 },
100 	{ 0x2d, 0x0050 },
101 	{ 0x2e, 0x0050 },
102 	{ 0x2f, 0x0000 },
103 	{ 0x30, 0x0002 },
104 	{ 0x31, 0x0037 },
105 
106 	{ 0x33, 0x0080 },
107 	{ 0x34, 0x0008 },
108 	{ 0x35, 0x0031 },
109 	{ 0x36, 0x0026 },
110 	{ 0x37, 0x00e9 },
111 };
112 
113 static bool wm8960_volatile(struct device *dev, unsigned int reg)
114 {
115 	switch (reg) {
116 	case WM8960_RESET:
117 		return true;
118 	default:
119 		return false;
120 	}
121 }
122 
123 struct wm8960_priv {
124 	struct clk *mclk;
125 	struct regmap *regmap;
126 	int (*set_bias_level)(struct snd_soc_component *,
127 			      enum snd_soc_bias_level level);
128 	struct snd_soc_dapm_widget *lout1;
129 	struct snd_soc_dapm_widget *rout1;
130 	struct snd_soc_dapm_widget *out3;
131 	bool deemph;
132 	int lrclk;
133 	int bclk;
134 	int sysclk;
135 	int clk_id;
136 	int freq_in;
137 	bool is_stream_in_use[2];
138 	struct wm8960_data pdata;
139 	ktime_t dsch_start;
140 };
141 
142 #define wm8960_reset(c)	regmap_write(c, WM8960_RESET, 0)
143 
144 /* enumerated controls */
145 static const char *wm8960_polarity[] = {"No Inversion", "Left Inverted",
146 	"Right Inverted", "Stereo Inversion"};
147 static const char *wm8960_3d_upper_cutoff[] = {"High", "Low"};
148 static const char *wm8960_3d_lower_cutoff[] = {"Low", "High"};
149 static const char *wm8960_alcfunc[] = {"Off", "Right", "Left", "Stereo"};
150 static const char *wm8960_alcmode[] = {"ALC", "Limiter"};
151 static const char *wm8960_adc_data_output_sel[] = {
152 	"Left Data = Left ADC;  Right Data = Right ADC",
153 	"Left Data = Left ADC;  Right Data = Left ADC",
154 	"Left Data = Right ADC; Right Data = Right ADC",
155 	"Left Data = Right ADC; Right Data = Left ADC",
156 };
157 static const char *wm8960_dmonomix[] = {"Stereo", "Mono"};
158 static const char *wm8960_dacslope[] = {"Normal", "Sloping"};
159 
160 static const struct soc_enum wm8960_enum[] = {
161 	SOC_ENUM_SINGLE(WM8960_DACCTL1, 5, 4, wm8960_polarity),
162 	SOC_ENUM_SINGLE(WM8960_DACCTL2, 5, 4, wm8960_polarity),
163 	SOC_ENUM_SINGLE(WM8960_3D, 6, 2, wm8960_3d_upper_cutoff),
164 	SOC_ENUM_SINGLE(WM8960_3D, 5, 2, wm8960_3d_lower_cutoff),
165 	SOC_ENUM_SINGLE(WM8960_ALC1, 7, 4, wm8960_alcfunc),
166 	SOC_ENUM_SINGLE(WM8960_ALC3, 8, 2, wm8960_alcmode),
167 	SOC_ENUM_SINGLE(WM8960_ADDCTL1, 2, 4, wm8960_adc_data_output_sel),
168 	SOC_ENUM_SINGLE(WM8960_ADDCTL1, 4, 2, wm8960_dmonomix),
169 	SOC_ENUM_SINGLE(WM8960_DACCTL2, 1, 2, wm8960_dacslope),
170 };
171 
172 static const int deemph_settings[] = { 0, 32000, 44100, 48000 };
173 
174 static int wm8960_set_deemph(struct snd_soc_component *component)
175 {
176 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
177 	int val, i, best;
178 
179 	/* If we're using deemphasis select the nearest available sample
180 	 * rate.
181 	 */
182 	if (wm8960->deemph) {
183 		best = 1;
184 		for (i = 2; i < ARRAY_SIZE(deemph_settings); i++) {
185 			if (abs(deemph_settings[i] - wm8960->lrclk) <
186 			    abs(deemph_settings[best] - wm8960->lrclk))
187 				best = i;
188 		}
189 
190 		val = best << 1;
191 	} else {
192 		val = 0;
193 	}
194 
195 	dev_dbg(component->dev, "Set deemphasis %d\n", val);
196 
197 	return snd_soc_component_update_bits(component, WM8960_DACCTL1,
198 				   0x6, val);
199 }
200 
201 static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
202 			     struct snd_ctl_elem_value *ucontrol)
203 {
204 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
205 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
206 
207 	ucontrol->value.integer.value[0] = wm8960->deemph;
208 	return 0;
209 }
210 
211 static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
212 			     struct snd_ctl_elem_value *ucontrol)
213 {
214 	struct snd_soc_component *component = snd_soc_kcontrol_component(kcontrol);
215 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
216 	unsigned int deemph = ucontrol->value.integer.value[0];
217 
218 	if (deemph > 1)
219 		return -EINVAL;
220 
221 	wm8960->deemph = deemph;
222 
223 	return wm8960_set_deemph(component);
224 }
225 
226 static const DECLARE_TLV_DB_SCALE(adc_tlv, -9750, 50, 1);
227 static const DECLARE_TLV_DB_SCALE(inpga_tlv, -1725, 75, 0);
228 static const DECLARE_TLV_DB_SCALE(dac_tlv, -12750, 50, 1);
229 static const DECLARE_TLV_DB_SCALE(bypass_tlv, -2100, 300, 0);
230 static const DECLARE_TLV_DB_SCALE(out_tlv, -12100, 100, 1);
231 static const DECLARE_TLV_DB_SCALE(lineinboost_tlv, -1500, 300, 1);
232 static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(micboost_tlv,
233 	0, 1, TLV_DB_SCALE_ITEM(0, 1300, 0),
234 	2, 3, TLV_DB_SCALE_ITEM(2000, 900, 0),
235 );
236 
237 static const struct snd_kcontrol_new wm8960_snd_controls[] = {
238 SOC_DOUBLE_R_TLV("Capture Volume", WM8960_LINVOL, WM8960_RINVOL,
239 		 0, 63, 0, inpga_tlv),
240 SOC_DOUBLE_R("Capture Volume ZC Switch", WM8960_LINVOL, WM8960_RINVOL,
241 	6, 1, 0),
242 SOC_DOUBLE_R("Capture Switch", WM8960_LINVOL, WM8960_RINVOL,
243 	7, 1, 1),
244 
245 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT3 Volume",
246 	       WM8960_INBMIX1, 4, 7, 0, lineinboost_tlv),
247 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT2 Volume",
248 	       WM8960_INBMIX1, 1, 7, 0, lineinboost_tlv),
249 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT3 Volume",
250 	       WM8960_INBMIX2, 4, 7, 0, lineinboost_tlv),
251 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT2 Volume",
252 	       WM8960_INBMIX2, 1, 7, 0, lineinboost_tlv),
253 SOC_SINGLE_TLV("Right Input Boost Mixer RINPUT1 Volume",
254 		WM8960_RINPATH, 4, 3, 0, micboost_tlv),
255 SOC_SINGLE_TLV("Left Input Boost Mixer LINPUT1 Volume",
256 		WM8960_LINPATH, 4, 3, 0, micboost_tlv),
257 
258 SOC_DOUBLE_R_TLV("Playback Volume", WM8960_LDAC, WM8960_RDAC,
259 		 0, 255, 0, dac_tlv),
260 
261 SOC_DOUBLE_R_TLV("Headphone Playback Volume", WM8960_LOUT1, WM8960_ROUT1,
262 		 0, 127, 0, out_tlv),
263 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8960_LOUT1, WM8960_ROUT1,
264 	7, 1, 0),
265 
266 SOC_DOUBLE_R_TLV("Speaker Playback Volume", WM8960_LOUT2, WM8960_ROUT2,
267 		 0, 127, 0, out_tlv),
268 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8960_LOUT2, WM8960_ROUT2,
269 	7, 1, 0),
270 SOC_SINGLE("Speaker DC Volume", WM8960_CLASSD3, 3, 5, 0),
271 SOC_SINGLE("Speaker AC Volume", WM8960_CLASSD3, 0, 5, 0),
272 
273 SOC_SINGLE("PCM Playback -6dB Switch", WM8960_DACCTL1, 7, 1, 0),
274 SOC_ENUM("ADC Polarity", wm8960_enum[0]),
275 SOC_SINGLE("ADC High Pass Filter Switch", WM8960_DACCTL1, 0, 1, 0),
276 
277 SOC_ENUM("DAC Polarity", wm8960_enum[1]),
278 SOC_SINGLE_BOOL_EXT("DAC Deemphasis Switch", 0,
279 		    wm8960_get_deemph, wm8960_put_deemph),
280 
281 SOC_ENUM("3D Filter Upper Cut-Off", wm8960_enum[2]),
282 SOC_ENUM("3D Filter Lower Cut-Off", wm8960_enum[3]),
283 SOC_SINGLE("3D Volume", WM8960_3D, 1, 15, 0),
284 SOC_SINGLE("3D Switch", WM8960_3D, 0, 1, 0),
285 
286 SOC_ENUM("ALC Function", wm8960_enum[4]),
287 SOC_SINGLE("ALC Max Gain", WM8960_ALC1, 4, 7, 0),
288 SOC_SINGLE("ALC Target", WM8960_ALC1, 0, 15, 1),
289 SOC_SINGLE("ALC Min Gain", WM8960_ALC2, 4, 7, 0),
290 SOC_SINGLE("ALC Hold Time", WM8960_ALC2, 0, 15, 0),
291 SOC_ENUM("ALC Mode", wm8960_enum[5]),
292 SOC_SINGLE("ALC Decay", WM8960_ALC3, 4, 15, 0),
293 SOC_SINGLE("ALC Attack", WM8960_ALC3, 0, 15, 0),
294 
295 SOC_SINGLE("Noise Gate Threshold", WM8960_NOISEG, 3, 31, 0),
296 SOC_SINGLE("Noise Gate Switch", WM8960_NOISEG, 0, 1, 0),
297 
298 SOC_DOUBLE_R_TLV("ADC PCM Capture Volume", WM8960_LADC, WM8960_RADC,
299 	0, 255, 0, adc_tlv),
300 
301 SOC_SINGLE_TLV("Left Output Mixer Boost Bypass Volume",
302 	       WM8960_BYPASS1, 4, 7, 1, bypass_tlv),
303 SOC_SINGLE_TLV("Left Output Mixer LINPUT3 Volume",
304 	       WM8960_LOUTMIX, 4, 7, 1, bypass_tlv),
305 SOC_SINGLE_TLV("Right Output Mixer Boost Bypass Volume",
306 	       WM8960_BYPASS2, 4, 7, 1, bypass_tlv),
307 SOC_SINGLE_TLV("Right Output Mixer RINPUT3 Volume",
308 	       WM8960_ROUTMIX, 4, 7, 1, bypass_tlv),
309 
310 SOC_ENUM("ADC Data Output Select", wm8960_enum[6]),
311 SOC_ENUM("DAC Mono Mix", wm8960_enum[7]),
312 SOC_ENUM("DAC Filter Characteristics", wm8960_enum[8]),
313 };
314 
315 static const struct snd_kcontrol_new wm8960_lin_boost[] = {
316 SOC_DAPM_SINGLE("LINPUT2 Switch", WM8960_LINPATH, 6, 1, 0),
317 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LINPATH, 7, 1, 0),
318 SOC_DAPM_SINGLE("LINPUT1 Switch", WM8960_LINPATH, 8, 1, 0),
319 };
320 
321 static const struct snd_kcontrol_new wm8960_lin[] = {
322 SOC_DAPM_SINGLE("Boost Switch", WM8960_LINPATH, 3, 1, 0),
323 };
324 
325 static const struct snd_kcontrol_new wm8960_rin_boost[] = {
326 SOC_DAPM_SINGLE("RINPUT2 Switch", WM8960_RINPATH, 6, 1, 0),
327 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_RINPATH, 7, 1, 0),
328 SOC_DAPM_SINGLE("RINPUT1 Switch", WM8960_RINPATH, 8, 1, 0),
329 };
330 
331 static const struct snd_kcontrol_new wm8960_rin[] = {
332 SOC_DAPM_SINGLE("Boost Switch", WM8960_RINPATH, 3, 1, 0),
333 };
334 
335 static const struct snd_kcontrol_new wm8960_loutput_mixer[] = {
336 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_LOUTMIX, 8, 1, 0),
337 SOC_DAPM_SINGLE("LINPUT3 Switch", WM8960_LOUTMIX, 7, 1, 0),
338 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS1, 7, 1, 0),
339 };
340 
341 static const struct snd_kcontrol_new wm8960_routput_mixer[] = {
342 SOC_DAPM_SINGLE("PCM Playback Switch", WM8960_ROUTMIX, 8, 1, 0),
343 SOC_DAPM_SINGLE("RINPUT3 Switch", WM8960_ROUTMIX, 7, 1, 0),
344 SOC_DAPM_SINGLE("Boost Bypass Switch", WM8960_BYPASS2, 7, 1, 0),
345 };
346 
347 static const struct snd_kcontrol_new wm8960_mono_out[] = {
348 SOC_DAPM_SINGLE("Left Switch", WM8960_MONOMIX1, 7, 1, 0),
349 SOC_DAPM_SINGLE("Right Switch", WM8960_MONOMIX2, 7, 1, 0),
350 };
351 
352 static const struct snd_soc_dapm_widget wm8960_dapm_widgets[] = {
353 SND_SOC_DAPM_INPUT("LINPUT1"),
354 SND_SOC_DAPM_INPUT("RINPUT1"),
355 SND_SOC_DAPM_INPUT("LINPUT2"),
356 SND_SOC_DAPM_INPUT("RINPUT2"),
357 SND_SOC_DAPM_INPUT("LINPUT3"),
358 SND_SOC_DAPM_INPUT("RINPUT3"),
359 
360 SND_SOC_DAPM_SUPPLY("MICB", WM8960_POWER1, 1, 0, NULL, 0),
361 
362 SND_SOC_DAPM_MIXER("Left Boost Mixer", WM8960_POWER1, 5, 0,
363 		   wm8960_lin_boost, ARRAY_SIZE(wm8960_lin_boost)),
364 SND_SOC_DAPM_MIXER("Right Boost Mixer", WM8960_POWER1, 4, 0,
365 		   wm8960_rin_boost, ARRAY_SIZE(wm8960_rin_boost)),
366 
367 SND_SOC_DAPM_MIXER("Left Input Mixer", WM8960_POWER3, 5, 0,
368 		   wm8960_lin, ARRAY_SIZE(wm8960_lin)),
369 SND_SOC_DAPM_MIXER("Right Input Mixer", WM8960_POWER3, 4, 0,
370 		   wm8960_rin, ARRAY_SIZE(wm8960_rin)),
371 
372 SND_SOC_DAPM_ADC("Left ADC", "Capture", WM8960_POWER1, 3, 0),
373 SND_SOC_DAPM_ADC("Right ADC", "Capture", WM8960_POWER1, 2, 0),
374 
375 SND_SOC_DAPM_DAC("Left DAC", "Playback", WM8960_POWER2, 8, 0),
376 SND_SOC_DAPM_DAC("Right DAC", "Playback", WM8960_POWER2, 7, 0),
377 
378 SND_SOC_DAPM_MIXER("Left Output Mixer", WM8960_POWER3, 3, 0,
379 	&wm8960_loutput_mixer[0],
380 	ARRAY_SIZE(wm8960_loutput_mixer)),
381 SND_SOC_DAPM_MIXER("Right Output Mixer", WM8960_POWER3, 2, 0,
382 	&wm8960_routput_mixer[0],
383 	ARRAY_SIZE(wm8960_routput_mixer)),
384 
385 SND_SOC_DAPM_PGA("LOUT1 PGA", WM8960_POWER2, 6, 0, NULL, 0),
386 SND_SOC_DAPM_PGA("ROUT1 PGA", WM8960_POWER2, 5, 0, NULL, 0),
387 
388 SND_SOC_DAPM_PGA("Left Speaker PGA", WM8960_POWER2, 4, 0, NULL, 0),
389 SND_SOC_DAPM_PGA("Right Speaker PGA", WM8960_POWER2, 3, 0, NULL, 0),
390 
391 SND_SOC_DAPM_PGA("Right Speaker Output", WM8960_CLASSD1, 7, 0, NULL, 0),
392 SND_SOC_DAPM_PGA("Left Speaker Output", WM8960_CLASSD1, 6, 0, NULL, 0),
393 
394 SND_SOC_DAPM_OUTPUT("SPK_LP"),
395 SND_SOC_DAPM_OUTPUT("SPK_LN"),
396 SND_SOC_DAPM_OUTPUT("HP_L"),
397 SND_SOC_DAPM_OUTPUT("HP_R"),
398 SND_SOC_DAPM_OUTPUT("SPK_RP"),
399 SND_SOC_DAPM_OUTPUT("SPK_RN"),
400 SND_SOC_DAPM_OUTPUT("OUT3"),
401 };
402 
403 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_out3[] = {
404 SND_SOC_DAPM_MIXER("Mono Output Mixer", WM8960_POWER2, 1, 0,
405 	&wm8960_mono_out[0],
406 	ARRAY_SIZE(wm8960_mono_out)),
407 };
408 
409 /* Represent OUT3 as a PGA so that it gets turned on with LOUT1/ROUT1 */
410 static const struct snd_soc_dapm_widget wm8960_dapm_widgets_capless[] = {
411 SND_SOC_DAPM_PGA("OUT3 VMID", WM8960_POWER2, 1, 0, NULL, 0),
412 };
413 
414 static const struct snd_soc_dapm_route audio_paths[] = {
415 	{ "Left Boost Mixer", "LINPUT1 Switch", "LINPUT1" },
416 	{ "Left Boost Mixer", "LINPUT2 Switch", "LINPUT2" },
417 	{ "Left Boost Mixer", "LINPUT3 Switch", "LINPUT3" },
418 
419 	{ "Left Input Mixer", "Boost Switch", "Left Boost Mixer" },
420 	{ "Left Input Mixer", "Boost Switch", "LINPUT1" },  /* Really Boost Switch */
421 	{ "Left Input Mixer", NULL, "LINPUT2" },
422 	{ "Left Input Mixer", NULL, "LINPUT3" },
423 
424 	{ "Right Boost Mixer", "RINPUT1 Switch", "RINPUT1" },
425 	{ "Right Boost Mixer", "RINPUT2 Switch", "RINPUT2" },
426 	{ "Right Boost Mixer", "RINPUT3 Switch", "RINPUT3" },
427 
428 	{ "Right Input Mixer", "Boost Switch", "Right Boost Mixer" },
429 	{ "Right Input Mixer", "Boost Switch", "RINPUT1" },  /* Really Boost Switch */
430 	{ "Right Input Mixer", NULL, "RINPUT2" },
431 	{ "Right Input Mixer", NULL, "RINPUT3" },
432 
433 	{ "Left ADC", NULL, "Left Input Mixer" },
434 	{ "Right ADC", NULL, "Right Input Mixer" },
435 
436 	{ "Left Output Mixer", "LINPUT3 Switch", "LINPUT3" },
437 	{ "Left Output Mixer", "Boost Bypass Switch", "Left Boost Mixer" },
438 	{ "Left Output Mixer", "PCM Playback Switch", "Left DAC" },
439 
440 	{ "Right Output Mixer", "RINPUT3 Switch", "RINPUT3" },
441 	{ "Right Output Mixer", "Boost Bypass Switch", "Right Boost Mixer" },
442 	{ "Right Output Mixer", "PCM Playback Switch", "Right DAC" },
443 
444 	{ "LOUT1 PGA", NULL, "Left Output Mixer" },
445 	{ "ROUT1 PGA", NULL, "Right Output Mixer" },
446 
447 	{ "HP_L", NULL, "LOUT1 PGA" },
448 	{ "HP_R", NULL, "ROUT1 PGA" },
449 
450 	{ "Left Speaker PGA", NULL, "Left Output Mixer" },
451 	{ "Right Speaker PGA", NULL, "Right Output Mixer" },
452 
453 	{ "Left Speaker Output", NULL, "Left Speaker PGA" },
454 	{ "Right Speaker Output", NULL, "Right Speaker PGA" },
455 
456 	{ "SPK_LN", NULL, "Left Speaker Output" },
457 	{ "SPK_LP", NULL, "Left Speaker Output" },
458 	{ "SPK_RN", NULL, "Right Speaker Output" },
459 	{ "SPK_RP", NULL, "Right Speaker Output" },
460 };
461 
462 static const struct snd_soc_dapm_route audio_paths_out3[] = {
463 	{ "Mono Output Mixer", "Left Switch", "Left Output Mixer" },
464 	{ "Mono Output Mixer", "Right Switch", "Right Output Mixer" },
465 
466 	{ "OUT3", NULL, "Mono Output Mixer", }
467 };
468 
469 static const struct snd_soc_dapm_route audio_paths_capless[] = {
470 	{ "HP_L", NULL, "OUT3 VMID" },
471 	{ "HP_R", NULL, "OUT3 VMID" },
472 
473 	{ "OUT3 VMID", NULL, "Left Output Mixer" },
474 	{ "OUT3 VMID", NULL, "Right Output Mixer" },
475 };
476 
477 static int wm8960_add_widgets(struct snd_soc_component *component)
478 {
479 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
480 	struct wm8960_data *pdata = &wm8960->pdata;
481 	struct snd_soc_dapm_context *dapm = snd_soc_component_get_dapm(component);
482 	struct snd_soc_dapm_widget *w;
483 
484 	snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets,
485 				  ARRAY_SIZE(wm8960_dapm_widgets));
486 
487 	snd_soc_dapm_add_routes(dapm, audio_paths, ARRAY_SIZE(audio_paths));
488 
489 	/* In capless mode OUT3 is used to provide VMID for the
490 	 * headphone outputs, otherwise it is used as a mono mixer.
491 	 */
492 	if (pdata && pdata->capless) {
493 		snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_capless,
494 					  ARRAY_SIZE(wm8960_dapm_widgets_capless));
495 
496 		snd_soc_dapm_add_routes(dapm, audio_paths_capless,
497 					ARRAY_SIZE(audio_paths_capless));
498 	} else {
499 		snd_soc_dapm_new_controls(dapm, wm8960_dapm_widgets_out3,
500 					  ARRAY_SIZE(wm8960_dapm_widgets_out3));
501 
502 		snd_soc_dapm_add_routes(dapm, audio_paths_out3,
503 					ARRAY_SIZE(audio_paths_out3));
504 	}
505 
506 	/* We need to power up the headphone output stage out of
507 	 * sequence for capless mode.  To save scanning the widget
508 	 * list each time to find the desired power state do so now
509 	 * and save the result.
510 	 */
511 	list_for_each_entry(w, &component->card->widgets, list) {
512 		if (w->dapm != dapm)
513 			continue;
514 		if (strcmp(w->name, "LOUT1 PGA") == 0)
515 			wm8960->lout1 = w;
516 		if (strcmp(w->name, "ROUT1 PGA") == 0)
517 			wm8960->rout1 = w;
518 		if (strcmp(w->name, "OUT3 VMID") == 0)
519 			wm8960->out3 = w;
520 	}
521 
522 	return 0;
523 }
524 
525 static int wm8960_set_dai_fmt(struct snd_soc_dai *codec_dai,
526 		unsigned int fmt)
527 {
528 	struct snd_soc_component *component = codec_dai->component;
529 	u16 iface = 0;
530 
531 	/* set master/slave audio interface */
532 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
533 	case SND_SOC_DAIFMT_CBM_CFM:
534 		iface |= 0x0040;
535 		break;
536 	case SND_SOC_DAIFMT_CBS_CFS:
537 		break;
538 	default:
539 		return -EINVAL;
540 	}
541 
542 	/* interface format */
543 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
544 	case SND_SOC_DAIFMT_I2S:
545 		iface |= 0x0002;
546 		break;
547 	case SND_SOC_DAIFMT_RIGHT_J:
548 		break;
549 	case SND_SOC_DAIFMT_LEFT_J:
550 		iface |= 0x0001;
551 		break;
552 	case SND_SOC_DAIFMT_DSP_A:
553 		iface |= 0x0003;
554 		break;
555 	case SND_SOC_DAIFMT_DSP_B:
556 		iface |= 0x0013;
557 		break;
558 	default:
559 		return -EINVAL;
560 	}
561 
562 	/* clock inversion */
563 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
564 	case SND_SOC_DAIFMT_NB_NF:
565 		break;
566 	case SND_SOC_DAIFMT_IB_IF:
567 		iface |= 0x0090;
568 		break;
569 	case SND_SOC_DAIFMT_IB_NF:
570 		iface |= 0x0080;
571 		break;
572 	case SND_SOC_DAIFMT_NB_IF:
573 		iface |= 0x0010;
574 		break;
575 	default:
576 		return -EINVAL;
577 	}
578 
579 	/* set iface */
580 	snd_soc_component_write(component, WM8960_IFACE1, iface);
581 	return 0;
582 }
583 
584 static struct {
585 	int rate;
586 	unsigned int val;
587 } alc_rates[] = {
588 	{ 48000, 0 },
589 	{ 44100, 0 },
590 	{ 32000, 1 },
591 	{ 22050, 2 },
592 	{ 24000, 2 },
593 	{ 16000, 3 },
594 	{ 11025, 4 },
595 	{ 12000, 4 },
596 	{  8000, 5 },
597 };
598 
599 /* -1 for reserved value */
600 static const int sysclk_divs[] = { 1, -1, 2, -1 };
601 
602 /* Multiply 256 for internal 256 div */
603 static const int dac_divs[] = { 256, 384, 512, 768, 1024, 1408, 1536 };
604 
605 /* Multiply 10 to eliminate decimials */
606 static const int bclk_divs[] = {
607 	10, 15, 20, 30, 40, 55, 60, 80, 110,
608 	120, 160, 220, 240, 320, 320, 320
609 };
610 
611 /**
612  * wm8960_configure_sysclk - checks if there is a sysclk frequency available
613  *	The sysclk must be chosen such that:
614  *		- sysclk     = MCLK / sysclk_divs
615  *		- lrclk      = sysclk / dac_divs
616  *		- 10 * bclk  = sysclk / bclk_divs
617  *
618  * @wm8960: codec private data
619  * @mclk: MCLK used to derive sysclk
620  * @sysclk_idx: sysclk_divs index for found sysclk
621  * @dac_idx: dac_divs index for found lrclk
622  * @bclk_idx: bclk_divs index for found bclk
623  *
624  * Returns:
625  *  -1, in case no sysclk frequency available found
626  * >=0, in case we could derive bclk and lrclk from sysclk using
627  *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
628  */
629 static
630 int wm8960_configure_sysclk(struct wm8960_priv *wm8960, int mclk,
631 			    int *sysclk_idx, int *dac_idx, int *bclk_idx)
632 {
633 	int sysclk, bclk, lrclk;
634 	int i, j, k;
635 	int diff;
636 
637 	/* marker for no match */
638 	*bclk_idx = -1;
639 
640 	bclk = wm8960->bclk;
641 	lrclk = wm8960->lrclk;
642 
643 	/* check if the sysclk frequency is available. */
644 	for (i = 0; i < ARRAY_SIZE(sysclk_divs); ++i) {
645 		if (sysclk_divs[i] == -1)
646 			continue;
647 		sysclk = mclk / sysclk_divs[i];
648 		for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
649 			if (sysclk != dac_divs[j] * lrclk)
650 				continue;
651 			for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
652 				diff = sysclk - bclk * bclk_divs[k] / 10;
653 				if (diff == 0) {
654 					*sysclk_idx = i;
655 					*dac_idx = j;
656 					*bclk_idx = k;
657 					break;
658 				}
659 			}
660 			if (k != ARRAY_SIZE(bclk_divs))
661 				break;
662 		}
663 		if (j != ARRAY_SIZE(dac_divs))
664 			break;
665 	}
666 	return *bclk_idx;
667 }
668 
669 /**
670  * wm8960_configure_pll - checks if there is a PLL out frequency available
671  *	The PLL out frequency must be chosen such that:
672  *		- sysclk      = lrclk * dac_divs
673  *		- freq_out    = sysclk * sysclk_divs
674  *		- 10 * sysclk = bclk * bclk_divs
675  *
676  * 	If we cannot find an exact match for (sysclk, lrclk, bclk)
677  * 	triplet, we relax the bclk such that bclk is chosen as the
678  * 	closest available frequency greater than expected bclk.
679  *
680  * @component: component structure
681  * @freq_in: input frequency used to derive freq out via PLL
682  * @sysclk_idx: sysclk_divs index for found sysclk
683  * @dac_idx: dac_divs index for found lrclk
684  * @bclk_idx: bclk_divs index for found bclk
685  *
686  * Returns:
687  * < 0, in case no PLL frequency out available was found
688  * >=0, in case we could derive bclk, lrclk, sysclk from PLL out using
689  *      (@sysclk_idx, @dac_idx, @bclk_idx) dividers
690  */
691 static
692 int wm8960_configure_pll(struct snd_soc_component *component, int freq_in,
693 			 int *sysclk_idx, int *dac_idx, int *bclk_idx)
694 {
695 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
696 	int sysclk, bclk, lrclk, freq_out;
697 	int diff, closest, best_freq_out;
698 	int i, j, k;
699 
700 	bclk = wm8960->bclk;
701 	lrclk = wm8960->lrclk;
702 	closest = freq_in;
703 
704 	best_freq_out = -EINVAL;
705 	*sysclk_idx = *dac_idx = *bclk_idx = -1;
706 
707 	/*
708 	 * From Datasheet, the PLL performs best when f2 is between
709 	 * 90MHz and 100MHz, the desired sysclk output is 11.2896MHz
710 	 * or 12.288MHz, then sysclkdiv = 2 is the best choice.
711 	 * So search sysclk_divs from 2 to 1 other than from 1 to 2.
712 	 */
713 	for (i = ARRAY_SIZE(sysclk_divs) - 1; i >= 0; --i) {
714 		if (sysclk_divs[i] == -1)
715 			continue;
716 		for (j = 0; j < ARRAY_SIZE(dac_divs); ++j) {
717 			sysclk = lrclk * dac_divs[j];
718 			freq_out = sysclk * sysclk_divs[i];
719 
720 			for (k = 0; k < ARRAY_SIZE(bclk_divs); ++k) {
721 				if (!is_pll_freq_available(freq_in, freq_out))
722 					continue;
723 
724 				diff = sysclk - bclk * bclk_divs[k] / 10;
725 				if (diff == 0) {
726 					*sysclk_idx = i;
727 					*dac_idx = j;
728 					*bclk_idx = k;
729 					return freq_out;
730 				}
731 				if (diff > 0 && closest > diff) {
732 					*sysclk_idx = i;
733 					*dac_idx = j;
734 					*bclk_idx = k;
735 					closest = diff;
736 					best_freq_out = freq_out;
737 				}
738 			}
739 		}
740 	}
741 
742 	return best_freq_out;
743 }
744 static int wm8960_configure_clocking(struct snd_soc_component *component)
745 {
746 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
747 	int freq_out, freq_in;
748 	u16 iface1 = snd_soc_component_read(component, WM8960_IFACE1);
749 	int i, j, k;
750 	int ret;
751 
752 	/*
753 	 * For Slave mode clocking should still be configured,
754 	 * so this if statement should be removed, but some platform
755 	 * may not work if the sysclk is not configured, to avoid such
756 	 * compatible issue, just add '!wm8960->sysclk' condition in
757 	 * this if statement.
758 	 */
759 	if (!(iface1 & (1 << 6)) && !wm8960->sysclk) {
760 		dev_warn(component->dev,
761 			 "slave mode, but proceeding with no clock configuration\n");
762 		return 0;
763 	}
764 
765 	if (wm8960->clk_id != WM8960_SYSCLK_MCLK && !wm8960->freq_in) {
766 		dev_err(component->dev, "No MCLK configured\n");
767 		return -EINVAL;
768 	}
769 
770 	freq_in = wm8960->freq_in;
771 	/*
772 	 * If it's sysclk auto mode, check if the MCLK can provide sysclk or
773 	 * not. If MCLK can provide sysclk, using MCLK to provide sysclk
774 	 * directly. Otherwise, auto select a available pll out frequency
775 	 * and set PLL.
776 	 */
777 	if (wm8960->clk_id == WM8960_SYSCLK_AUTO) {
778 		/* disable the PLL and using MCLK to provide sysclk */
779 		wm8960_set_pll(component, 0, 0);
780 		freq_out = freq_in;
781 	} else if (wm8960->sysclk) {
782 		freq_out = wm8960->sysclk;
783 	} else {
784 		dev_err(component->dev, "No SYSCLK configured\n");
785 		return -EINVAL;
786 	}
787 
788 	if (wm8960->clk_id != WM8960_SYSCLK_PLL) {
789 		ret = wm8960_configure_sysclk(wm8960, freq_out, &i, &j, &k);
790 		if (ret >= 0) {
791 			goto configure_clock;
792 		} else if (wm8960->clk_id != WM8960_SYSCLK_AUTO) {
793 			dev_err(component->dev, "failed to configure clock\n");
794 			return -EINVAL;
795 		}
796 	}
797 
798 	freq_out = wm8960_configure_pll(component, freq_in, &i, &j, &k);
799 	if (freq_out < 0) {
800 		dev_err(component->dev, "failed to configure clock via PLL\n");
801 		return freq_out;
802 	}
803 	wm8960_set_pll(component, freq_in, freq_out);
804 
805 configure_clock:
806 	/* configure sysclk clock */
807 	snd_soc_component_update_bits(component, WM8960_CLOCK1, 3 << 1, i << 1);
808 
809 	/* configure frame clock */
810 	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 3, j << 3);
811 	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x7 << 6, j << 6);
812 
813 	/* configure bit clock */
814 	snd_soc_component_update_bits(component, WM8960_CLOCK2, 0xf, k);
815 
816 	return 0;
817 }
818 
819 static int wm8960_hw_params(struct snd_pcm_substream *substream,
820 			    struct snd_pcm_hw_params *params,
821 			    struct snd_soc_dai *dai)
822 {
823 	struct snd_soc_component *component = dai->component;
824 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
825 	u16 iface = snd_soc_component_read(component, WM8960_IFACE1) & 0xfff3;
826 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
827 	int i;
828 
829 	wm8960->bclk = snd_soc_params_to_bclk(params);
830 	if (params_channels(params) == 1)
831 		wm8960->bclk *= 2;
832 
833 	/* bit size */
834 	switch (params_width(params)) {
835 	case 16:
836 		break;
837 	case 20:
838 		iface |= 0x0004;
839 		break;
840 	case 24:
841 		iface |= 0x0008;
842 		break;
843 	case 32:
844 		/* right justify mode does not support 32 word length */
845 		if ((iface & 0x3) != 0) {
846 			iface |= 0x000c;
847 			break;
848 		}
849 		fallthrough;
850 	default:
851 		dev_err(component->dev, "unsupported width %d\n",
852 			params_width(params));
853 		return -EINVAL;
854 	}
855 
856 	wm8960->lrclk = params_rate(params);
857 	/* Update filters for the new rate */
858 	if (tx) {
859 		wm8960_set_deemph(component);
860 	} else {
861 		for (i = 0; i < ARRAY_SIZE(alc_rates); i++)
862 			if (alc_rates[i].rate == params_rate(params))
863 				snd_soc_component_update_bits(component,
864 						    WM8960_ADDCTL3, 0x7,
865 						    alc_rates[i].val);
866 	}
867 
868 	/* set iface */
869 	snd_soc_component_write(component, WM8960_IFACE1, iface);
870 
871 	wm8960->is_stream_in_use[tx] = true;
872 
873 	if (!wm8960->is_stream_in_use[!tx])
874 		return wm8960_configure_clocking(component);
875 
876 	return 0;
877 }
878 
879 static int wm8960_hw_free(struct snd_pcm_substream *substream,
880 		struct snd_soc_dai *dai)
881 {
882 	struct snd_soc_component *component = dai->component;
883 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
884 	bool tx = substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
885 
886 	wm8960->is_stream_in_use[tx] = false;
887 
888 	return 0;
889 }
890 
891 static int wm8960_mute(struct snd_soc_dai *dai, int mute, int direction)
892 {
893 	struct snd_soc_component *component = dai->component;
894 
895 	if (mute)
896 		snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0x8);
897 	else
898 		snd_soc_component_update_bits(component, WM8960_DACCTL1, 0x8, 0);
899 	return 0;
900 }
901 
902 static int wm8960_set_bias_level_out3(struct snd_soc_component *component,
903 				      enum snd_soc_bias_level level)
904 {
905 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
906 	u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
907 	int ret;
908 	ktime_t tout;
909 
910 	switch (level) {
911 	case SND_SOC_BIAS_ON:
912 		break;
913 
914 	case SND_SOC_BIAS_PREPARE:
915 		switch (snd_soc_component_get_bias_level(component)) {
916 		case SND_SOC_BIAS_STANDBY:
917 			if (!IS_ERR(wm8960->mclk)) {
918 				ret = clk_prepare_enable(wm8960->mclk);
919 				if (ret) {
920 					dev_err(component->dev,
921 						"Failed to enable MCLK: %d\n",
922 						ret);
923 					return ret;
924 				}
925 			}
926 
927 			ret = wm8960_configure_clocking(component);
928 			if (ret)
929 				return ret;
930 
931 			/* Set VMID to 2x50k */
932 			snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x80);
933 			break;
934 
935 		case SND_SOC_BIAS_ON:
936 			/*
937 			 * If it's sysclk auto mode, and the pll is enabled,
938 			 * disable the pll
939 			 */
940 			if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
941 				wm8960_set_pll(component, 0, 0);
942 
943 			if (!IS_ERR(wm8960->mclk))
944 				clk_disable_unprepare(wm8960->mclk);
945 			break;
946 
947 		default:
948 			break;
949 		}
950 
951 		break;
952 
953 	case SND_SOC_BIAS_STANDBY:
954 		if (snd_soc_component_get_bias_level(component) == SND_SOC_BIAS_OFF) {
955 			/* ensure discharge is complete */
956 			tout = WM8960_DSCH_TOUT - ktime_ms_delta(ktime_get(), wm8960->dsch_start);
957 			if (tout > 0)
958 				msleep(tout);
959 
960 			regcache_sync(wm8960->regmap);
961 
962 			/* Enable anti-pop features */
963 			snd_soc_component_write(component, WM8960_APOP1,
964 				      WM8960_POBCTRL | WM8960_SOFT_ST |
965 				      WM8960_BUFDCOPEN | WM8960_BUFIOEN);
966 
967 			/* Enable & ramp VMID at 2x50k */
968 			snd_soc_component_update_bits(component, WM8960_POWER1, 0x80, 0x80);
969 			msleep(100);
970 
971 			/* Enable VREF */
972 			snd_soc_component_update_bits(component, WM8960_POWER1, WM8960_VREF,
973 					    WM8960_VREF);
974 
975 			/* Disable anti-pop features */
976 			snd_soc_component_write(component, WM8960_APOP1, WM8960_BUFIOEN);
977 		}
978 
979 		/* Set VMID to 2x250k */
980 		snd_soc_component_update_bits(component, WM8960_POWER1, 0x180, 0x100);
981 		break;
982 
983 	case SND_SOC_BIAS_OFF:
984 		/* Enable anti-pop features */
985 		snd_soc_component_write(component, WM8960_APOP1,
986 			     WM8960_POBCTRL | WM8960_SOFT_ST |
987 			     WM8960_BUFDCOPEN | WM8960_BUFIOEN);
988 
989 		/* Disable VMID and VREF, mark discharge */
990 		snd_soc_component_write(component, WM8960_POWER1, 0);
991 		wm8960->dsch_start = ktime_get();
992 		break;
993 	}
994 
995 	return 0;
996 }
997 
998 static int wm8960_set_bias_level_capless(struct snd_soc_component *component,
999 					 enum snd_soc_bias_level level)
1000 {
1001 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1002 	u16 pm2 = snd_soc_component_read(component, WM8960_POWER2);
1003 	int reg, ret;
1004 
1005 	switch (level) {
1006 	case SND_SOC_BIAS_ON:
1007 		break;
1008 
1009 	case SND_SOC_BIAS_PREPARE:
1010 		switch (snd_soc_component_get_bias_level(component)) {
1011 		case SND_SOC_BIAS_STANDBY:
1012 			/* Enable anti pop mode */
1013 			snd_soc_component_update_bits(component, WM8960_APOP1,
1014 					    WM8960_POBCTRL | WM8960_SOFT_ST |
1015 					    WM8960_BUFDCOPEN,
1016 					    WM8960_POBCTRL | WM8960_SOFT_ST |
1017 					    WM8960_BUFDCOPEN);
1018 
1019 			/* Enable LOUT1, ROUT1 and OUT3 if they're enabled */
1020 			reg = 0;
1021 			if (wm8960->lout1 && wm8960->lout1->power)
1022 				reg |= WM8960_PWR2_LOUT1;
1023 			if (wm8960->rout1 && wm8960->rout1->power)
1024 				reg |= WM8960_PWR2_ROUT1;
1025 			if (wm8960->out3 && wm8960->out3->power)
1026 				reg |= WM8960_PWR2_OUT3;
1027 			snd_soc_component_update_bits(component, WM8960_POWER2,
1028 					    WM8960_PWR2_LOUT1 |
1029 					    WM8960_PWR2_ROUT1 |
1030 					    WM8960_PWR2_OUT3, reg);
1031 
1032 			/* Enable VMID at 2*50k */
1033 			snd_soc_component_update_bits(component, WM8960_POWER1,
1034 					    WM8960_VMID_MASK, 0x80);
1035 
1036 			/* Ramp */
1037 			msleep(100);
1038 
1039 			/* Enable VREF */
1040 			snd_soc_component_update_bits(component, WM8960_POWER1,
1041 					    WM8960_VREF, WM8960_VREF);
1042 
1043 			msleep(100);
1044 
1045 			if (!IS_ERR(wm8960->mclk)) {
1046 				ret = clk_prepare_enable(wm8960->mclk);
1047 				if (ret) {
1048 					dev_err(component->dev,
1049 						"Failed to enable MCLK: %d\n",
1050 						ret);
1051 					return ret;
1052 				}
1053 			}
1054 
1055 			ret = wm8960_configure_clocking(component);
1056 			if (ret)
1057 				return ret;
1058 
1059 			break;
1060 
1061 		case SND_SOC_BIAS_ON:
1062 			/*
1063 			 * If it's sysclk auto mode, and the pll is enabled,
1064 			 * disable the pll
1065 			 */
1066 			if (wm8960->clk_id == WM8960_SYSCLK_AUTO && (pm2 & 0x1))
1067 				wm8960_set_pll(component, 0, 0);
1068 
1069 			if (!IS_ERR(wm8960->mclk))
1070 				clk_disable_unprepare(wm8960->mclk);
1071 
1072 			/* Enable anti-pop mode */
1073 			snd_soc_component_update_bits(component, WM8960_APOP1,
1074 					    WM8960_POBCTRL | WM8960_SOFT_ST |
1075 					    WM8960_BUFDCOPEN,
1076 					    WM8960_POBCTRL | WM8960_SOFT_ST |
1077 					    WM8960_BUFDCOPEN);
1078 
1079 			/* Disable VMID and VREF */
1080 			snd_soc_component_update_bits(component, WM8960_POWER1,
1081 					    WM8960_VREF | WM8960_VMID_MASK, 0);
1082 			break;
1083 
1084 		case SND_SOC_BIAS_OFF:
1085 			regcache_sync(wm8960->regmap);
1086 			break;
1087 		default:
1088 			break;
1089 		}
1090 		break;
1091 
1092 	case SND_SOC_BIAS_STANDBY:
1093 		switch (snd_soc_component_get_bias_level(component)) {
1094 		case SND_SOC_BIAS_PREPARE:
1095 			/* Disable HP discharge */
1096 			snd_soc_component_update_bits(component, WM8960_APOP2,
1097 					    WM8960_DISOP | WM8960_DRES_MASK,
1098 					    0);
1099 
1100 			/* Disable anti-pop features */
1101 			snd_soc_component_update_bits(component, WM8960_APOP1,
1102 					    WM8960_POBCTRL | WM8960_SOFT_ST |
1103 					    WM8960_BUFDCOPEN,
1104 					    WM8960_POBCTRL | WM8960_SOFT_ST |
1105 					    WM8960_BUFDCOPEN);
1106 			break;
1107 
1108 		default:
1109 			break;
1110 		}
1111 		break;
1112 
1113 	case SND_SOC_BIAS_OFF:
1114 		break;
1115 	}
1116 
1117 	return 0;
1118 }
1119 
1120 /* PLL divisors */
1121 struct _pll_div {
1122 	u32 pre_div:1;
1123 	u32 n:4;
1124 	u32 k:24;
1125 };
1126 
1127 static bool is_pll_freq_available(unsigned int source, unsigned int target)
1128 {
1129 	unsigned int Ndiv;
1130 
1131 	if (source == 0 || target == 0)
1132 		return false;
1133 
1134 	/* Scale up target to PLL operating frequency */
1135 	target *= 4;
1136 	Ndiv = target / source;
1137 
1138 	if (Ndiv < 6) {
1139 		source >>= 1;
1140 		Ndiv = target / source;
1141 	}
1142 
1143 	if ((Ndiv < 6) || (Ndiv > 12))
1144 		return false;
1145 
1146 	return true;
1147 }
1148 
1149 /* The size in bits of the pll divide multiplied by 10
1150  * to allow rounding later */
1151 #define FIXED_PLL_SIZE ((1 << 24) * 10)
1152 
1153 static int pll_factors(unsigned int source, unsigned int target,
1154 		       struct _pll_div *pll_div)
1155 {
1156 	unsigned long long Kpart;
1157 	unsigned int K, Ndiv, Nmod;
1158 
1159 	pr_debug("WM8960 PLL: setting %dHz->%dHz\n", source, target);
1160 
1161 	/* Scale up target to PLL operating frequency */
1162 	target *= 4;
1163 
1164 	Ndiv = target / source;
1165 	if (Ndiv < 6) {
1166 		source >>= 1;
1167 		pll_div->pre_div = 1;
1168 		Ndiv = target / source;
1169 	} else
1170 		pll_div->pre_div = 0;
1171 
1172 	if ((Ndiv < 6) || (Ndiv > 12)) {
1173 		pr_err("WM8960 PLL: Unsupported N=%d\n", Ndiv);
1174 		return -EINVAL;
1175 	}
1176 
1177 	pll_div->n = Ndiv;
1178 	Nmod = target % source;
1179 	Kpart = FIXED_PLL_SIZE * (long long)Nmod;
1180 
1181 	do_div(Kpart, source);
1182 
1183 	K = Kpart & 0xFFFFFFFF;
1184 
1185 	/* Check if we need to round */
1186 	if ((K % 10) >= 5)
1187 		K += 5;
1188 
1189 	/* Move down to proper range now rounding is done */
1190 	K /= 10;
1191 
1192 	pll_div->k = K;
1193 
1194 	pr_debug("WM8960 PLL: N=%x K=%x pre_div=%d\n",
1195 		 pll_div->n, pll_div->k, pll_div->pre_div);
1196 
1197 	return 0;
1198 }
1199 
1200 static int wm8960_set_pll(struct snd_soc_component *component,
1201 		unsigned int freq_in, unsigned int freq_out)
1202 {
1203 	u16 reg;
1204 	static struct _pll_div pll_div;
1205 	int ret;
1206 
1207 	if (freq_in && freq_out) {
1208 		ret = pll_factors(freq_in, freq_out, &pll_div);
1209 		if (ret != 0)
1210 			return ret;
1211 	}
1212 
1213 	/* Disable the PLL: even if we are changing the frequency the
1214 	 * PLL needs to be disabled while we do so. */
1215 	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0);
1216 	snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0);
1217 
1218 	if (!freq_in || !freq_out)
1219 		return 0;
1220 
1221 	reg = snd_soc_component_read(component, WM8960_PLL1) & ~0x3f;
1222 	reg |= pll_div.pre_div << 4;
1223 	reg |= pll_div.n;
1224 
1225 	if (pll_div.k) {
1226 		reg |= 0x20;
1227 
1228 		snd_soc_component_write(component, WM8960_PLL2, (pll_div.k >> 16) & 0xff);
1229 		snd_soc_component_write(component, WM8960_PLL3, (pll_div.k >> 8) & 0xff);
1230 		snd_soc_component_write(component, WM8960_PLL4, pll_div.k & 0xff);
1231 	}
1232 	snd_soc_component_write(component, WM8960_PLL1, reg);
1233 
1234 	/* Turn it on */
1235 	snd_soc_component_update_bits(component, WM8960_POWER2, 0x1, 0x1);
1236 	msleep(250);
1237 	snd_soc_component_update_bits(component, WM8960_CLOCK1, 0x1, 0x1);
1238 
1239 	return 0;
1240 }
1241 
1242 static int wm8960_set_dai_pll(struct snd_soc_dai *codec_dai, int pll_id,
1243 		int source, unsigned int freq_in, unsigned int freq_out)
1244 {
1245 	struct snd_soc_component *component = codec_dai->component;
1246 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1247 
1248 	wm8960->freq_in = freq_in;
1249 
1250 	if (pll_id == WM8960_SYSCLK_AUTO)
1251 		return 0;
1252 
1253 	return wm8960_set_pll(component, freq_in, freq_out);
1254 }
1255 
1256 static int wm8960_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
1257 		int div_id, int div)
1258 {
1259 	struct snd_soc_component *component = codec_dai->component;
1260 	u16 reg;
1261 
1262 	switch (div_id) {
1263 	case WM8960_SYSCLKDIV:
1264 		reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1f9;
1265 		snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1266 		break;
1267 	case WM8960_DACDIV:
1268 		reg = snd_soc_component_read(component, WM8960_CLOCK1) & 0x1c7;
1269 		snd_soc_component_write(component, WM8960_CLOCK1, reg | div);
1270 		break;
1271 	case WM8960_OPCLKDIV:
1272 		reg = snd_soc_component_read(component, WM8960_PLL1) & 0x03f;
1273 		snd_soc_component_write(component, WM8960_PLL1, reg | div);
1274 		break;
1275 	case WM8960_DCLKDIV:
1276 		reg = snd_soc_component_read(component, WM8960_CLOCK2) & 0x03f;
1277 		snd_soc_component_write(component, WM8960_CLOCK2, reg | div);
1278 		break;
1279 	case WM8960_TOCLKSEL:
1280 		reg = snd_soc_component_read(component, WM8960_ADDCTL1) & 0x1fd;
1281 		snd_soc_component_write(component, WM8960_ADDCTL1, reg | div);
1282 		break;
1283 	default:
1284 		return -EINVAL;
1285 	}
1286 
1287 	return 0;
1288 }
1289 
1290 static int wm8960_set_bias_level(struct snd_soc_component *component,
1291 				 enum snd_soc_bias_level level)
1292 {
1293 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1294 
1295 	return wm8960->set_bias_level(component, level);
1296 }
1297 
1298 static int wm8960_set_dai_sysclk(struct snd_soc_dai *dai, int clk_id,
1299 					unsigned int freq, int dir)
1300 {
1301 	struct snd_soc_component *component = dai->component;
1302 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1303 
1304 	switch (clk_id) {
1305 	case WM8960_SYSCLK_MCLK:
1306 		snd_soc_component_update_bits(component, WM8960_CLOCK1,
1307 					0x1, WM8960_SYSCLK_MCLK);
1308 		break;
1309 	case WM8960_SYSCLK_PLL:
1310 		snd_soc_component_update_bits(component, WM8960_CLOCK1,
1311 					0x1, WM8960_SYSCLK_PLL);
1312 		break;
1313 	case WM8960_SYSCLK_AUTO:
1314 		break;
1315 	default:
1316 		return -EINVAL;
1317 	}
1318 
1319 	wm8960->sysclk = freq;
1320 	wm8960->clk_id = clk_id;
1321 
1322 	return 0;
1323 }
1324 
1325 #define WM8960_RATES SNDRV_PCM_RATE_8000_48000
1326 
1327 #define WM8960_FORMATS \
1328 	(SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1329 	SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
1330 
1331 static const struct snd_soc_dai_ops wm8960_dai_ops = {
1332 	.hw_params = wm8960_hw_params,
1333 	.hw_free = wm8960_hw_free,
1334 	.mute_stream = wm8960_mute,
1335 	.set_fmt = wm8960_set_dai_fmt,
1336 	.set_clkdiv = wm8960_set_dai_clkdiv,
1337 	.set_pll = wm8960_set_dai_pll,
1338 	.set_sysclk = wm8960_set_dai_sysclk,
1339 	.no_capture_mute = 1,
1340 };
1341 
1342 static struct snd_soc_dai_driver wm8960_dai = {
1343 	.name = "wm8960-hifi",
1344 	.playback = {
1345 		.stream_name = "Playback",
1346 		.channels_min = 1,
1347 		.channels_max = 2,
1348 		.rates = WM8960_RATES,
1349 		.formats = WM8960_FORMATS,},
1350 	.capture = {
1351 		.stream_name = "Capture",
1352 		.channels_min = 1,
1353 		.channels_max = 2,
1354 		.rates = WM8960_RATES,
1355 		.formats = WM8960_FORMATS,},
1356 	.ops = &wm8960_dai_ops,
1357 	.symmetric_rate = 1,
1358 };
1359 
1360 static int wm8960_probe(struct snd_soc_component *component)
1361 {
1362 	struct wm8960_priv *wm8960 = snd_soc_component_get_drvdata(component);
1363 	struct wm8960_data *pdata = &wm8960->pdata;
1364 
1365 	if (pdata->capless)
1366 		wm8960->set_bias_level = wm8960_set_bias_level_capless;
1367 	else
1368 		wm8960->set_bias_level = wm8960_set_bias_level_out3;
1369 
1370 	snd_soc_add_component_controls(component, wm8960_snd_controls,
1371 				     ARRAY_SIZE(wm8960_snd_controls));
1372 	wm8960_add_widgets(component);
1373 
1374 	return 0;
1375 }
1376 
1377 static const struct snd_soc_component_driver soc_component_dev_wm8960 = {
1378 	.probe			= wm8960_probe,
1379 	.set_bias_level		= wm8960_set_bias_level,
1380 	.suspend_bias_off	= 1,
1381 	.idle_bias_on		= 1,
1382 	.use_pmdown_time	= 1,
1383 	.endianness		= 1,
1384 };
1385 
1386 static const struct regmap_config wm8960_regmap = {
1387 	.reg_bits = 7,
1388 	.val_bits = 9,
1389 	.max_register = WM8960_PLL4,
1390 
1391 	.reg_defaults = wm8960_reg_defaults,
1392 	.num_reg_defaults = ARRAY_SIZE(wm8960_reg_defaults),
1393 	.cache_type = REGCACHE_MAPLE,
1394 
1395 	.volatile_reg = wm8960_volatile,
1396 };
1397 
1398 static void wm8960_set_pdata_from_of(struct i2c_client *i2c,
1399 				struct wm8960_data *pdata)
1400 {
1401 	const struct device_node *np = i2c->dev.of_node;
1402 
1403 	if (of_property_read_bool(np, "wlf,capless"))
1404 		pdata->capless = true;
1405 
1406 	if (of_property_read_bool(np, "wlf,shared-lrclk"))
1407 		pdata->shared_lrclk = true;
1408 
1409 	of_property_read_u32_array(np, "wlf,gpio-cfg", pdata->gpio_cfg,
1410 				   ARRAY_SIZE(pdata->gpio_cfg));
1411 
1412 	of_property_read_u32_array(np, "wlf,hp-cfg", pdata->hp_cfg,
1413 				   ARRAY_SIZE(pdata->hp_cfg));
1414 }
1415 
1416 static int wm8960_i2c_probe(struct i2c_client *i2c)
1417 {
1418 	struct wm8960_data *pdata = dev_get_platdata(&i2c->dev);
1419 	struct wm8960_priv *wm8960;
1420 	int ret;
1421 	u8 val;
1422 
1423 	wm8960 = devm_kzalloc(&i2c->dev, sizeof(struct wm8960_priv),
1424 			      GFP_KERNEL);
1425 	if (wm8960 == NULL)
1426 		return -ENOMEM;
1427 
1428 	wm8960->mclk = devm_clk_get(&i2c->dev, "mclk");
1429 	if (IS_ERR(wm8960->mclk)) {
1430 		if (PTR_ERR(wm8960->mclk) == -EPROBE_DEFER)
1431 			return -EPROBE_DEFER;
1432 	} else {
1433 		ret = clk_get_rate(wm8960->mclk);
1434 		if (ret >= 0) {
1435 			wm8960->freq_in = ret;
1436 		} else {
1437 			dev_err(&i2c->dev, "Failed to read MCLK rate: %d\n",
1438 				ret);
1439 		}
1440 	}
1441 
1442 	wm8960->regmap = devm_regmap_init_i2c(i2c, &wm8960_regmap);
1443 	if (IS_ERR(wm8960->regmap))
1444 		return PTR_ERR(wm8960->regmap);
1445 
1446 	if (pdata)
1447 		memcpy(&wm8960->pdata, pdata, sizeof(struct wm8960_data));
1448 	else if (i2c->dev.of_node)
1449 		wm8960_set_pdata_from_of(i2c, &wm8960->pdata);
1450 
1451 	ret = i2c_master_recv(i2c, &val, sizeof(val));
1452 	if (ret >= 0) {
1453 		dev_err(&i2c->dev, "Not wm8960, wm8960 reg can not read by i2c\n");
1454 		return -EINVAL;
1455 	}
1456 
1457 	ret = wm8960_reset(wm8960->regmap);
1458 	if (ret != 0) {
1459 		dev_err(&i2c->dev, "Failed to issue reset\n");
1460 		return ret;
1461 	}
1462 
1463 	if (wm8960->pdata.shared_lrclk) {
1464 		ret = regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2,
1465 					 0x4, 0x4);
1466 		if (ret != 0) {
1467 			dev_err(&i2c->dev, "Failed to enable LRCM: %d\n",
1468 				ret);
1469 			return ret;
1470 		}
1471 	}
1472 
1473 	/* Latch the update bits */
1474 	regmap_update_bits(wm8960->regmap, WM8960_LINVOL, 0x100, 0x100);
1475 	regmap_update_bits(wm8960->regmap, WM8960_RINVOL, 0x100, 0x100);
1476 	regmap_update_bits(wm8960->regmap, WM8960_LADC, 0x100, 0x100);
1477 	regmap_update_bits(wm8960->regmap, WM8960_RADC, 0x100, 0x100);
1478 	regmap_update_bits(wm8960->regmap, WM8960_LDAC, 0x100, 0x100);
1479 	regmap_update_bits(wm8960->regmap, WM8960_RDAC, 0x100, 0x100);
1480 	regmap_update_bits(wm8960->regmap, WM8960_LOUT1, 0x100, 0x100);
1481 	regmap_update_bits(wm8960->regmap, WM8960_ROUT1, 0x100, 0x100);
1482 	regmap_update_bits(wm8960->regmap, WM8960_LOUT2, 0x100, 0x100);
1483 	regmap_update_bits(wm8960->regmap, WM8960_ROUT2, 0x100, 0x100);
1484 
1485 	/* ADCLRC pin configured as GPIO. */
1486 	regmap_update_bits(wm8960->regmap, WM8960_IFACE2, 1 << 6,
1487 			   wm8960->pdata.gpio_cfg[0] << 6);
1488 	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 0xF << 4,
1489 			   wm8960->pdata.gpio_cfg[1] << 4);
1490 
1491 	/* Enable headphone jack detect */
1492 	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL4, 3 << 2,
1493 			   wm8960->pdata.hp_cfg[0] << 2);
1494 	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL2, 3 << 5,
1495 			   wm8960->pdata.hp_cfg[1] << 5);
1496 	regmap_update_bits(wm8960->regmap, WM8960_ADDCTL1, 3,
1497 			   wm8960->pdata.hp_cfg[2]);
1498 
1499 	i2c_set_clientdata(i2c, wm8960);
1500 
1501 	ret = devm_snd_soc_register_component(&i2c->dev,
1502 			&soc_component_dev_wm8960, &wm8960_dai, 1);
1503 
1504 	return ret;
1505 }
1506 
1507 static void wm8960_i2c_remove(struct i2c_client *client)
1508 {}
1509 
1510 static const struct i2c_device_id wm8960_i2c_id[] = {
1511 	{ "wm8960", 0 },
1512 	{ }
1513 };
1514 MODULE_DEVICE_TABLE(i2c, wm8960_i2c_id);
1515 
1516 #if defined(CONFIG_OF)
1517 static const struct of_device_id wm8960_of_match[] = {
1518        { .compatible = "wlf,wm8960", },
1519        { }
1520 };
1521 MODULE_DEVICE_TABLE(of, wm8960_of_match);
1522 #endif
1523 
1524 #if defined(CONFIG_ACPI)
1525 static const struct acpi_device_id wm8960_acpi_match[] = {
1526 	{ "1AEC8960", 0 }, /* Wolfson PCI ID + part ID */
1527 	{ "10138960", 0 }, /* Cirrus Logic PCI ID + part ID */
1528 	{ },
1529 };
1530 MODULE_DEVICE_TABLE(acpi, wm8960_acpi_match);
1531 #endif
1532 
1533 static struct i2c_driver wm8960_i2c_driver = {
1534 	.driver = {
1535 		.name = "wm8960",
1536 		.of_match_table = of_match_ptr(wm8960_of_match),
1537 		.acpi_match_table = ACPI_PTR(wm8960_acpi_match),
1538 	},
1539 	.probe =    wm8960_i2c_probe,
1540 	.remove =   wm8960_i2c_remove,
1541 	.id_table = wm8960_i2c_id,
1542 };
1543 
1544 module_i2c_driver(wm8960_i2c_driver);
1545 
1546 MODULE_DESCRIPTION("ASoC WM8960 driver");
1547 MODULE_AUTHOR("Liam Girdwood");
1548 MODULE_LICENSE("GPL");
1549