10b5e92c5SJonathan Cameron /* 20b5e92c5SJonathan Cameron * wm8940.h -- WM8940 Soc Audio driver 30b5e92c5SJonathan Cameron * 40b5e92c5SJonathan Cameron * This program is free software; you can redistribute it and/or modify 50b5e92c5SJonathan Cameron * it under the terms of the GNU General Public License version 2 as 60b5e92c5SJonathan Cameron * published by the Free Software Foundation. 70b5e92c5SJonathan Cameron */ 80b5e92c5SJonathan Cameron 90b5e92c5SJonathan Cameron #ifndef _WM8940_H 100b5e92c5SJonathan Cameron #define _WM8940_H 110b5e92c5SJonathan Cameron 120b5e92c5SJonathan Cameron struct wm8940_setup_data { 130b5e92c5SJonathan Cameron /* Vref to analogue output resistance */ 140b5e92c5SJonathan Cameron #define WM8940_VROI_1K 0 150b5e92c5SJonathan Cameron #define WM8940_VROI_30K 1 160b5e92c5SJonathan Cameron unsigned int vroi:1; 170b5e92c5SJonathan Cameron }; 180b5e92c5SJonathan Cameron extern struct snd_soc_dai wm8940_dai; 190b5e92c5SJonathan Cameron extern struct snd_soc_codec_device soc_codec_dev_wm8940; 200b5e92c5SJonathan Cameron 210b5e92c5SJonathan Cameron /* WM8940 register space */ 220b5e92c5SJonathan Cameron #define WM8940_SOFTRESET 0x00 230b5e92c5SJonathan Cameron #define WM8940_POWER1 0x01 240b5e92c5SJonathan Cameron #define WM8940_POWER2 0x02 250b5e92c5SJonathan Cameron #define WM8940_POWER3 0x03 260b5e92c5SJonathan Cameron #define WM8940_IFACE 0x04 270b5e92c5SJonathan Cameron #define WM8940_COMPANDINGCTL 0x05 280b5e92c5SJonathan Cameron #define WM8940_CLOCK 0x06 290b5e92c5SJonathan Cameron #define WM8940_ADDCNTRL 0x07 300b5e92c5SJonathan Cameron #define WM8940_GPIO 0x08 310b5e92c5SJonathan Cameron #define WM8940_CTLINT 0x09 320b5e92c5SJonathan Cameron #define WM8940_DAC 0x0A 330b5e92c5SJonathan Cameron #define WM8940_DACVOL 0x0B 340b5e92c5SJonathan Cameron 350b5e92c5SJonathan Cameron #define WM8940_ADC 0x0E 360b5e92c5SJonathan Cameron #define WM8940_ADCVOL 0x0F 370b5e92c5SJonathan Cameron #define WM8940_NOTCH1 0x10 380b5e92c5SJonathan Cameron #define WM8940_NOTCH2 0x11 390b5e92c5SJonathan Cameron #define WM8940_NOTCH3 0x12 400b5e92c5SJonathan Cameron #define WM8940_NOTCH4 0x13 410b5e92c5SJonathan Cameron #define WM8940_NOTCH5 0x14 420b5e92c5SJonathan Cameron #define WM8940_NOTCH6 0x15 430b5e92c5SJonathan Cameron #define WM8940_NOTCH7 0x16 440b5e92c5SJonathan Cameron #define WM8940_NOTCH8 0x17 450b5e92c5SJonathan Cameron #define WM8940_DACLIM1 0x18 460b5e92c5SJonathan Cameron #define WM8940_DACLIM2 0x19 470b5e92c5SJonathan Cameron 480b5e92c5SJonathan Cameron #define WM8940_ALC1 0x20 490b5e92c5SJonathan Cameron #define WM8940_ALC2 0x21 500b5e92c5SJonathan Cameron #define WM8940_ALC3 0x22 510b5e92c5SJonathan Cameron #define WM8940_NOISEGATE 0x23 520b5e92c5SJonathan Cameron #define WM8940_PLLN 0x24 530b5e92c5SJonathan Cameron #define WM8940_PLLK1 0x25 540b5e92c5SJonathan Cameron #define WM8940_PLLK2 0x26 550b5e92c5SJonathan Cameron #define WM8940_PLLK3 0x27 560b5e92c5SJonathan Cameron 570b5e92c5SJonathan Cameron #define WM8940_ALC4 0x2A 580b5e92c5SJonathan Cameron 590b5e92c5SJonathan Cameron #define WM8940_INPUTCTL 0x2C 600b5e92c5SJonathan Cameron #define WM8940_PGAGAIN 0x2D 610b5e92c5SJonathan Cameron 620b5e92c5SJonathan Cameron #define WM8940_ADCBOOST 0x2F 630b5e92c5SJonathan Cameron 640b5e92c5SJonathan Cameron #define WM8940_OUTPUTCTL 0x31 650b5e92c5SJonathan Cameron #define WM8940_SPKMIX 0x32 660b5e92c5SJonathan Cameron 670b5e92c5SJonathan Cameron #define WM8940_SPKVOL 0x36 680b5e92c5SJonathan Cameron 690b5e92c5SJonathan Cameron #define WM8940_MONOMIX 0x38 700b5e92c5SJonathan Cameron 710b5e92c5SJonathan Cameron #define WM8940_CACHEREGNUM 0x57 720b5e92c5SJonathan Cameron 730b5e92c5SJonathan Cameron 740b5e92c5SJonathan Cameron /* Clock divider Id's */ 750b5e92c5SJonathan Cameron #define WM8940_BCLKDIV 0 760b5e92c5SJonathan Cameron #define WM8940_MCLKDIV 1 770b5e92c5SJonathan Cameron #define WM8940_OPCLKDIV 2 780b5e92c5SJonathan Cameron 790b5e92c5SJonathan Cameron /* MCLK clock dividers */ 800b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_1 0 810b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_1_5 1 820b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_2 2 830b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_3 3 840b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_4 4 850b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_6 5 860b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_8 6 870b5e92c5SJonathan Cameron #define WM8940_MCLKDIV_12 7 880b5e92c5SJonathan Cameron 890b5e92c5SJonathan Cameron /* BCLK clock dividers */ 900b5e92c5SJonathan Cameron #define WM8940_BCLKDIV_1 0 910b5e92c5SJonathan Cameron #define WM8940_BCLKDIV_2 1 920b5e92c5SJonathan Cameron #define WM8940_BCLKDIV_4 2 930b5e92c5SJonathan Cameron #define WM8940_BCLKDIV_8 3 940b5e92c5SJonathan Cameron #define WM8940_BCLKDIV_16 4 950b5e92c5SJonathan Cameron #define WM8940_BCLKDIV_32 5 960b5e92c5SJonathan Cameron 970b5e92c5SJonathan Cameron /* PLL Out Dividers */ 980b5e92c5SJonathan Cameron #define WM8940_OPCLKDIV_1 0 990b5e92c5SJonathan Cameron #define WM8940_OPCLKDIV_2 1 1000b5e92c5SJonathan Cameron #define WM8940_OPCLKDIV_3 2 1010b5e92c5SJonathan Cameron #define WM8940_OPCLKDIV_4 3 1020b5e92c5SJonathan Cameron 1030b5e92c5SJonathan Cameron #endif /* _WM8940_H */ 1040b5e92c5SJonathan Cameron 105