1 /* 2 * wm8804.c -- WM8804 S/PDIF transceiver driver 3 * 4 * Copyright 2010-11 Wolfson Microelectronics plc 5 * 6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com> 7 * 8 * This program is free software; you can redistribute it and/or modify 9 * it under the terms of the GNU General Public License version 2 as 10 * published by the Free Software Foundation. 11 */ 12 13 #include <linux/module.h> 14 #include <linux/moduleparam.h> 15 #include <linux/init.h> 16 #include <linux/delay.h> 17 #include <linux/pm.h> 18 #include <linux/i2c.h> 19 #include <linux/of_device.h> 20 #include <linux/spi/spi.h> 21 #include <linux/regmap.h> 22 #include <linux/regulator/consumer.h> 23 #include <linux/slab.h> 24 #include <sound/core.h> 25 #include <sound/pcm.h> 26 #include <sound/pcm_params.h> 27 #include <sound/soc.h> 28 #include <sound/initval.h> 29 #include <sound/tlv.h> 30 31 #include "wm8804.h" 32 33 #define WM8804_NUM_SUPPLIES 2 34 static const char *wm8804_supply_names[WM8804_NUM_SUPPLIES] = { 35 "PVDD", 36 "DVDD" 37 }; 38 39 static const struct reg_default wm8804_reg_defaults[] = { 40 { 3, 0x21 }, /* R3 - PLL1 */ 41 { 4, 0xFD }, /* R4 - PLL2 */ 42 { 5, 0x36 }, /* R5 - PLL3 */ 43 { 6, 0x07 }, /* R6 - PLL4 */ 44 { 7, 0x16 }, /* R7 - PLL5 */ 45 { 8, 0x18 }, /* R8 - PLL6 */ 46 { 9, 0xFF }, /* R9 - SPDMODE */ 47 { 10, 0x00 }, /* R10 - INTMASK */ 48 { 18, 0x00 }, /* R18 - SPDTX1 */ 49 { 19, 0x00 }, /* R19 - SPDTX2 */ 50 { 20, 0x00 }, /* R20 - SPDTX3 */ 51 { 21, 0x71 }, /* R21 - SPDTX4 */ 52 { 22, 0x0B }, /* R22 - SPDTX5 */ 53 { 23, 0x70 }, /* R23 - GPO0 */ 54 { 24, 0x57 }, /* R24 - GPO1 */ 55 { 26, 0x42 }, /* R26 - GPO2 */ 56 { 27, 0x06 }, /* R27 - AIFTX */ 57 { 28, 0x06 }, /* R28 - AIFRX */ 58 { 29, 0x80 }, /* R29 - SPDRX1 */ 59 { 30, 0x07 }, /* R30 - PWRDN */ 60 }; 61 62 struct wm8804_priv { 63 struct regmap *regmap; 64 struct regulator_bulk_data supplies[WM8804_NUM_SUPPLIES]; 65 struct notifier_block disable_nb[WM8804_NUM_SUPPLIES]; 66 int mclk_div; 67 }; 68 69 static int txsrc_get(struct snd_kcontrol *kcontrol, 70 struct snd_ctl_elem_value *ucontrol); 71 72 static int txsrc_put(struct snd_kcontrol *kcontrol, 73 struct snd_ctl_elem_value *ucontrol); 74 75 /* 76 * We can't use the same notifier block for more than one supply and 77 * there's no way I can see to get from a callback to the caller 78 * except container_of(). 79 */ 80 #define WM8804_REGULATOR_EVENT(n) \ 81 static int wm8804_regulator_event_##n(struct notifier_block *nb, \ 82 unsigned long event, void *data) \ 83 { \ 84 struct wm8804_priv *wm8804 = container_of(nb, struct wm8804_priv, \ 85 disable_nb[n]); \ 86 if (event & REGULATOR_EVENT_DISABLE) { \ 87 regcache_mark_dirty(wm8804->regmap); \ 88 } \ 89 return 0; \ 90 } 91 92 WM8804_REGULATOR_EVENT(0) 93 WM8804_REGULATOR_EVENT(1) 94 95 static const char *txsrc_text[] = { "S/PDIF RX", "AIF" }; 96 static SOC_ENUM_SINGLE_EXT_DECL(txsrc, txsrc_text); 97 98 static const struct snd_kcontrol_new wm8804_snd_controls[] = { 99 SOC_ENUM_EXT("Input Source", txsrc, txsrc_get, txsrc_put), 100 SOC_SINGLE("TX Playback Switch", WM8804_PWRDN, 2, 1, 1), 101 SOC_SINGLE("AIF Playback Switch", WM8804_PWRDN, 4, 1, 1) 102 }; 103 104 static int txsrc_get(struct snd_kcontrol *kcontrol, 105 struct snd_ctl_elem_value *ucontrol) 106 { 107 struct snd_soc_codec *codec; 108 unsigned int src; 109 110 codec = snd_soc_kcontrol_codec(kcontrol); 111 src = snd_soc_read(codec, WM8804_SPDTX4); 112 if (src & 0x40) 113 ucontrol->value.integer.value[0] = 1; 114 else 115 ucontrol->value.integer.value[0] = 0; 116 117 return 0; 118 } 119 120 static int txsrc_put(struct snd_kcontrol *kcontrol, 121 struct snd_ctl_elem_value *ucontrol) 122 { 123 struct snd_soc_codec *codec; 124 unsigned int src, txpwr; 125 126 codec = snd_soc_kcontrol_codec(kcontrol); 127 128 if (ucontrol->value.integer.value[0] != 0 129 && ucontrol->value.integer.value[0] != 1) 130 return -EINVAL; 131 132 src = snd_soc_read(codec, WM8804_SPDTX4); 133 switch ((src & 0x40) >> 6) { 134 case 0: 135 if (!ucontrol->value.integer.value[0]) 136 return 0; 137 break; 138 case 1: 139 if (ucontrol->value.integer.value[1]) 140 return 0; 141 break; 142 } 143 144 /* save the current power state of the transmitter */ 145 txpwr = snd_soc_read(codec, WM8804_PWRDN) & 0x4; 146 /* power down the transmitter */ 147 snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, 0x4); 148 /* set the tx source */ 149 snd_soc_update_bits(codec, WM8804_SPDTX4, 0x40, 150 ucontrol->value.integer.value[0] << 6); 151 152 if (ucontrol->value.integer.value[0]) { 153 /* power down the receiver */ 154 snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0x2); 155 /* power up the AIF */ 156 snd_soc_update_bits(codec, WM8804_PWRDN, 0x10, 0); 157 } else { 158 /* don't power down the AIF -- may be used as an output */ 159 /* power up the receiver */ 160 snd_soc_update_bits(codec, WM8804_PWRDN, 0x2, 0); 161 } 162 163 /* restore the transmitter's configuration */ 164 snd_soc_update_bits(codec, WM8804_PWRDN, 0x4, txpwr); 165 166 return 0; 167 } 168 169 static bool wm8804_volatile(struct device *dev, unsigned int reg) 170 { 171 switch (reg) { 172 case WM8804_RST_DEVID1: 173 case WM8804_DEVID2: 174 case WM8804_DEVREV: 175 case WM8804_INTSTAT: 176 case WM8804_SPDSTAT: 177 case WM8804_RXCHAN1: 178 case WM8804_RXCHAN2: 179 case WM8804_RXCHAN3: 180 case WM8804_RXCHAN4: 181 case WM8804_RXCHAN5: 182 return true; 183 default: 184 return false; 185 } 186 } 187 188 static int wm8804_reset(struct snd_soc_codec *codec) 189 { 190 return snd_soc_write(codec, WM8804_RST_DEVID1, 0x0); 191 } 192 193 static int wm8804_set_fmt(struct snd_soc_dai *dai, unsigned int fmt) 194 { 195 struct snd_soc_codec *codec; 196 u16 format, master, bcp, lrp; 197 198 codec = dai->codec; 199 200 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 201 case SND_SOC_DAIFMT_I2S: 202 format = 0x2; 203 break; 204 case SND_SOC_DAIFMT_RIGHT_J: 205 format = 0x0; 206 break; 207 case SND_SOC_DAIFMT_LEFT_J: 208 format = 0x1; 209 break; 210 case SND_SOC_DAIFMT_DSP_A: 211 case SND_SOC_DAIFMT_DSP_B: 212 format = 0x3; 213 break; 214 default: 215 dev_err(dai->dev, "Unknown dai format\n"); 216 return -EINVAL; 217 } 218 219 /* set data format */ 220 snd_soc_update_bits(codec, WM8804_AIFTX, 0x3, format); 221 snd_soc_update_bits(codec, WM8804_AIFRX, 0x3, format); 222 223 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 224 case SND_SOC_DAIFMT_CBM_CFM: 225 master = 1; 226 break; 227 case SND_SOC_DAIFMT_CBS_CFS: 228 master = 0; 229 break; 230 default: 231 dev_err(dai->dev, "Unknown master/slave configuration\n"); 232 return -EINVAL; 233 } 234 235 /* set master/slave mode */ 236 snd_soc_update_bits(codec, WM8804_AIFRX, 0x40, master << 6); 237 238 bcp = lrp = 0; 239 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 240 case SND_SOC_DAIFMT_NB_NF: 241 break; 242 case SND_SOC_DAIFMT_IB_IF: 243 bcp = lrp = 1; 244 break; 245 case SND_SOC_DAIFMT_IB_NF: 246 bcp = 1; 247 break; 248 case SND_SOC_DAIFMT_NB_IF: 249 lrp = 1; 250 break; 251 default: 252 dev_err(dai->dev, "Unknown polarity configuration\n"); 253 return -EINVAL; 254 } 255 256 /* set frame inversion */ 257 snd_soc_update_bits(codec, WM8804_AIFTX, 0x10 | 0x20, 258 (bcp << 4) | (lrp << 5)); 259 snd_soc_update_bits(codec, WM8804_AIFRX, 0x10 | 0x20, 260 (bcp << 4) | (lrp << 5)); 261 return 0; 262 } 263 264 static int wm8804_hw_params(struct snd_pcm_substream *substream, 265 struct snd_pcm_hw_params *params, 266 struct snd_soc_dai *dai) 267 { 268 struct snd_soc_codec *codec; 269 u16 blen; 270 271 codec = dai->codec; 272 273 switch (params_width(params)) { 274 case 16: 275 blen = 0x0; 276 break; 277 case 20: 278 blen = 0x1; 279 break; 280 case 24: 281 blen = 0x2; 282 break; 283 default: 284 dev_err(dai->dev, "Unsupported word length: %u\n", 285 params_width(params)); 286 return -EINVAL; 287 } 288 289 /* set word length */ 290 snd_soc_update_bits(codec, WM8804_AIFTX, 0xc, blen << 2); 291 snd_soc_update_bits(codec, WM8804_AIFRX, 0xc, blen << 2); 292 293 return 0; 294 } 295 296 struct pll_div { 297 u32 prescale:1; 298 u32 mclkdiv:1; 299 u32 freqmode:2; 300 u32 n:4; 301 u32 k:22; 302 }; 303 304 /* PLL rate to output rate divisions */ 305 static struct { 306 unsigned int div; 307 unsigned int freqmode; 308 unsigned int mclkdiv; 309 } post_table[] = { 310 { 2, 0, 0 }, 311 { 4, 0, 1 }, 312 { 4, 1, 0 }, 313 { 8, 1, 1 }, 314 { 8, 2, 0 }, 315 { 16, 2, 1 }, 316 { 12, 3, 0 }, 317 { 24, 3, 1 } 318 }; 319 320 #define FIXED_PLL_SIZE ((1ULL << 22) * 10) 321 static int pll_factors(struct pll_div *pll_div, unsigned int target, 322 unsigned int source, unsigned int mclk_div) 323 { 324 u64 Kpart; 325 unsigned long int K, Ndiv, Nmod, tmp; 326 int i; 327 328 /* 329 * Scale the output frequency up; the PLL should run in the 330 * region of 90-100MHz. 331 */ 332 for (i = 0; i < ARRAY_SIZE(post_table); i++) { 333 tmp = target * post_table[i].div; 334 if ((tmp >= 90000000 && tmp <= 100000000) && 335 (mclk_div == post_table[i].mclkdiv)) { 336 pll_div->freqmode = post_table[i].freqmode; 337 pll_div->mclkdiv = post_table[i].mclkdiv; 338 target *= post_table[i].div; 339 break; 340 } 341 } 342 343 if (i == ARRAY_SIZE(post_table)) { 344 pr_err("%s: Unable to scale output frequency: %uHz\n", 345 __func__, target); 346 return -EINVAL; 347 } 348 349 pll_div->prescale = 0; 350 Ndiv = target / source; 351 if (Ndiv < 5) { 352 source >>= 1; 353 pll_div->prescale = 1; 354 Ndiv = target / source; 355 } 356 357 if (Ndiv < 5 || Ndiv > 13) { 358 pr_err("%s: WM8804 N value is not within the recommended range: %lu\n", 359 __func__, Ndiv); 360 return -EINVAL; 361 } 362 pll_div->n = Ndiv; 363 364 Nmod = target % source; 365 Kpart = FIXED_PLL_SIZE * (u64)Nmod; 366 367 do_div(Kpart, source); 368 369 K = Kpart & 0xffffffff; 370 if ((K % 10) >= 5) 371 K += 5; 372 K /= 10; 373 pll_div->k = K; 374 375 return 0; 376 } 377 378 static int wm8804_set_pll(struct snd_soc_dai *dai, int pll_id, 379 int source, unsigned int freq_in, 380 unsigned int freq_out) 381 { 382 struct snd_soc_codec *codec; 383 384 codec = dai->codec; 385 if (!freq_in || !freq_out) { 386 /* disable the PLL */ 387 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1); 388 return 0; 389 } else { 390 int ret; 391 struct pll_div pll_div; 392 struct wm8804_priv *wm8804; 393 394 wm8804 = snd_soc_codec_get_drvdata(codec); 395 396 ret = pll_factors(&pll_div, freq_out, freq_in, 397 wm8804->mclk_div); 398 if (ret) 399 return ret; 400 401 /* power down the PLL before reprogramming it */ 402 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0x1); 403 404 /* set PLLN and PRESCALE */ 405 snd_soc_update_bits(codec, WM8804_PLL4, 0xf | 0x10, 406 pll_div.n | (pll_div.prescale << 4)); 407 /* set mclkdiv and freqmode */ 408 snd_soc_update_bits(codec, WM8804_PLL5, 0x3 | 0x8, 409 pll_div.freqmode | (pll_div.mclkdiv << 3)); 410 /* set PLLK */ 411 snd_soc_write(codec, WM8804_PLL1, pll_div.k & 0xff); 412 snd_soc_write(codec, WM8804_PLL2, (pll_div.k >> 8) & 0xff); 413 snd_soc_write(codec, WM8804_PLL3, pll_div.k >> 16); 414 415 /* power up the PLL */ 416 snd_soc_update_bits(codec, WM8804_PWRDN, 0x1, 0); 417 } 418 419 return 0; 420 } 421 422 static int wm8804_set_sysclk(struct snd_soc_dai *dai, 423 int clk_id, unsigned int freq, int dir) 424 { 425 struct snd_soc_codec *codec; 426 427 codec = dai->codec; 428 429 switch (clk_id) { 430 case WM8804_TX_CLKSRC_MCLK: 431 if ((freq >= 10000000 && freq <= 14400000) 432 || (freq >= 16280000 && freq <= 27000000)) 433 snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0x80); 434 else { 435 dev_err(dai->dev, "OSCCLOCK is not within the " 436 "recommended range: %uHz\n", freq); 437 return -EINVAL; 438 } 439 break; 440 case WM8804_TX_CLKSRC_PLL: 441 snd_soc_update_bits(codec, WM8804_PLL6, 0x80, 0); 442 break; 443 case WM8804_CLKOUT_SRC_CLK1: 444 snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0); 445 break; 446 case WM8804_CLKOUT_SRC_OSCCLK: 447 snd_soc_update_bits(codec, WM8804_PLL6, 0x8, 0x8); 448 break; 449 default: 450 dev_err(dai->dev, "Unknown clock source: %d\n", clk_id); 451 return -EINVAL; 452 } 453 454 return 0; 455 } 456 457 static int wm8804_set_clkdiv(struct snd_soc_dai *dai, 458 int div_id, int div) 459 { 460 struct snd_soc_codec *codec; 461 struct wm8804_priv *wm8804; 462 463 codec = dai->codec; 464 switch (div_id) { 465 case WM8804_CLKOUT_DIV: 466 snd_soc_update_bits(codec, WM8804_PLL5, 0x30, 467 (div & 0x3) << 4); 468 break; 469 case WM8804_MCLK_DIV: 470 wm8804 = snd_soc_codec_get_drvdata(codec); 471 wm8804->mclk_div = div; 472 break; 473 default: 474 dev_err(dai->dev, "Unknown clock divider: %d\n", div_id); 475 return -EINVAL; 476 } 477 return 0; 478 } 479 480 static int wm8804_set_bias_level(struct snd_soc_codec *codec, 481 enum snd_soc_bias_level level) 482 { 483 int ret; 484 struct wm8804_priv *wm8804; 485 486 wm8804 = snd_soc_codec_get_drvdata(codec); 487 switch (level) { 488 case SND_SOC_BIAS_ON: 489 break; 490 case SND_SOC_BIAS_PREPARE: 491 /* power up the OSC and the PLL */ 492 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0); 493 break; 494 case SND_SOC_BIAS_STANDBY: 495 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 496 ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies), 497 wm8804->supplies); 498 if (ret) { 499 dev_err(codec->dev, 500 "Failed to enable supplies: %d\n", 501 ret); 502 return ret; 503 } 504 regcache_sync(wm8804->regmap); 505 } 506 /* power down the OSC and the PLL */ 507 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9); 508 break; 509 case SND_SOC_BIAS_OFF: 510 /* power down the OSC and the PLL */ 511 snd_soc_update_bits(codec, WM8804_PWRDN, 0x9, 0x9); 512 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), 513 wm8804->supplies); 514 break; 515 } 516 517 codec->dapm.bias_level = level; 518 return 0; 519 } 520 521 static int wm8804_remove(struct snd_soc_codec *codec) 522 { 523 struct wm8804_priv *wm8804; 524 int i; 525 526 wm8804 = snd_soc_codec_get_drvdata(codec); 527 wm8804_set_bias_level(codec, SND_SOC_BIAS_OFF); 528 529 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); ++i) 530 regulator_unregister_notifier(wm8804->supplies[i].consumer, 531 &wm8804->disable_nb[i]); 532 return 0; 533 } 534 535 static int wm8804_probe(struct snd_soc_codec *codec) 536 { 537 struct wm8804_priv *wm8804; 538 int i, id1, id2, ret; 539 540 wm8804 = snd_soc_codec_get_drvdata(codec); 541 542 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) 543 wm8804->supplies[i].supply = wm8804_supply_names[i]; 544 545 ret = devm_regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8804->supplies), 546 wm8804->supplies); 547 if (ret) { 548 dev_err(codec->dev, "Failed to request supplies: %d\n", ret); 549 return ret; 550 } 551 552 wm8804->disable_nb[0].notifier_call = wm8804_regulator_event_0; 553 wm8804->disable_nb[1].notifier_call = wm8804_regulator_event_1; 554 555 /* This should really be moved into the regulator core */ 556 for (i = 0; i < ARRAY_SIZE(wm8804->supplies); i++) { 557 ret = regulator_register_notifier(wm8804->supplies[i].consumer, 558 &wm8804->disable_nb[i]); 559 if (ret != 0) { 560 dev_err(codec->dev, 561 "Failed to register regulator notifier: %d\n", 562 ret); 563 } 564 } 565 566 ret = regulator_bulk_enable(ARRAY_SIZE(wm8804->supplies), 567 wm8804->supplies); 568 if (ret) { 569 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret); 570 return ret; 571 } 572 573 id1 = snd_soc_read(codec, WM8804_RST_DEVID1); 574 if (id1 < 0) { 575 dev_err(codec->dev, "Failed to read device ID: %d\n", id1); 576 ret = id1; 577 goto err_reg_enable; 578 } 579 580 id2 = snd_soc_read(codec, WM8804_DEVID2); 581 if (id2 < 0) { 582 dev_err(codec->dev, "Failed to read device ID: %d\n", id2); 583 ret = id2; 584 goto err_reg_enable; 585 } 586 587 id2 = (id2 << 8) | id1; 588 589 if (id2 != 0x8805) { 590 dev_err(codec->dev, "Invalid device ID: %#x\n", id2); 591 ret = -EINVAL; 592 goto err_reg_enable; 593 } 594 595 ret = snd_soc_read(codec, WM8804_DEVREV); 596 if (ret < 0) { 597 dev_err(codec->dev, "Failed to read device revision: %d\n", 598 ret); 599 goto err_reg_enable; 600 } 601 dev_info(codec->dev, "revision %c\n", ret + 'A'); 602 603 ret = wm8804_reset(codec); 604 if (ret < 0) { 605 dev_err(codec->dev, "Failed to issue reset: %d\n", ret); 606 goto err_reg_enable; 607 } 608 609 wm8804_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 610 611 return 0; 612 613 err_reg_enable: 614 regulator_bulk_disable(ARRAY_SIZE(wm8804->supplies), wm8804->supplies); 615 return ret; 616 } 617 618 static const struct snd_soc_dai_ops wm8804_dai_ops = { 619 .hw_params = wm8804_hw_params, 620 .set_fmt = wm8804_set_fmt, 621 .set_sysclk = wm8804_set_sysclk, 622 .set_clkdiv = wm8804_set_clkdiv, 623 .set_pll = wm8804_set_pll 624 }; 625 626 #define WM8804_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \ 627 SNDRV_PCM_FMTBIT_S24_LE) 628 629 #define WM8804_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \ 630 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_64000 | \ 631 SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | \ 632 SNDRV_PCM_RATE_176400 | SNDRV_PCM_RATE_192000) 633 634 static struct snd_soc_dai_driver wm8804_dai = { 635 .name = "wm8804-spdif", 636 .playback = { 637 .stream_name = "Playback", 638 .channels_min = 2, 639 .channels_max = 2, 640 .rates = WM8804_RATES, 641 .formats = WM8804_FORMATS, 642 }, 643 .capture = { 644 .stream_name = "Capture", 645 .channels_min = 2, 646 .channels_max = 2, 647 .rates = WM8804_RATES, 648 .formats = WM8804_FORMATS, 649 }, 650 .ops = &wm8804_dai_ops, 651 .symmetric_rates = 1 652 }; 653 654 static struct snd_soc_codec_driver soc_codec_dev_wm8804 = { 655 .probe = wm8804_probe, 656 .remove = wm8804_remove, 657 .set_bias_level = wm8804_set_bias_level, 658 .idle_bias_off = true, 659 660 .controls = wm8804_snd_controls, 661 .num_controls = ARRAY_SIZE(wm8804_snd_controls), 662 }; 663 664 static const struct of_device_id wm8804_of_match[] = { 665 { .compatible = "wlf,wm8804", }, 666 { } 667 }; 668 MODULE_DEVICE_TABLE(of, wm8804_of_match); 669 670 static struct regmap_config wm8804_regmap_config = { 671 .reg_bits = 8, 672 .val_bits = 8, 673 674 .max_register = WM8804_MAX_REGISTER, 675 .volatile_reg = wm8804_volatile, 676 677 .cache_type = REGCACHE_RBTREE, 678 .reg_defaults = wm8804_reg_defaults, 679 .num_reg_defaults = ARRAY_SIZE(wm8804_reg_defaults), 680 }; 681 682 #if defined(CONFIG_SPI_MASTER) 683 static int wm8804_spi_probe(struct spi_device *spi) 684 { 685 struct wm8804_priv *wm8804; 686 int ret; 687 688 wm8804 = devm_kzalloc(&spi->dev, sizeof *wm8804, GFP_KERNEL); 689 if (!wm8804) 690 return -ENOMEM; 691 692 wm8804->regmap = devm_regmap_init_spi(spi, &wm8804_regmap_config); 693 if (IS_ERR(wm8804->regmap)) { 694 ret = PTR_ERR(wm8804->regmap); 695 return ret; 696 } 697 698 spi_set_drvdata(spi, wm8804); 699 700 ret = snd_soc_register_codec(&spi->dev, 701 &soc_codec_dev_wm8804, &wm8804_dai, 1); 702 703 return ret; 704 } 705 706 static int wm8804_spi_remove(struct spi_device *spi) 707 { 708 snd_soc_unregister_codec(&spi->dev); 709 return 0; 710 } 711 712 static struct spi_driver wm8804_spi_driver = { 713 .driver = { 714 .name = "wm8804", 715 .owner = THIS_MODULE, 716 .of_match_table = wm8804_of_match, 717 }, 718 .probe = wm8804_spi_probe, 719 .remove = wm8804_spi_remove 720 }; 721 #endif 722 723 #if IS_ENABLED(CONFIG_I2C) 724 static int wm8804_i2c_probe(struct i2c_client *i2c, 725 const struct i2c_device_id *id) 726 { 727 struct wm8804_priv *wm8804; 728 int ret; 729 730 wm8804 = devm_kzalloc(&i2c->dev, sizeof *wm8804, GFP_KERNEL); 731 if (!wm8804) 732 return -ENOMEM; 733 734 wm8804->regmap = devm_regmap_init_i2c(i2c, &wm8804_regmap_config); 735 if (IS_ERR(wm8804->regmap)) { 736 ret = PTR_ERR(wm8804->regmap); 737 return ret; 738 } 739 740 i2c_set_clientdata(i2c, wm8804); 741 742 ret = snd_soc_register_codec(&i2c->dev, 743 &soc_codec_dev_wm8804, &wm8804_dai, 1); 744 return ret; 745 } 746 747 static int wm8804_i2c_remove(struct i2c_client *i2c) 748 { 749 snd_soc_unregister_codec(&i2c->dev); 750 return 0; 751 } 752 753 static const struct i2c_device_id wm8804_i2c_id[] = { 754 { "wm8804", 0 }, 755 { } 756 }; 757 MODULE_DEVICE_TABLE(i2c, wm8804_i2c_id); 758 759 static struct i2c_driver wm8804_i2c_driver = { 760 .driver = { 761 .name = "wm8804", 762 .owner = THIS_MODULE, 763 .of_match_table = wm8804_of_match, 764 }, 765 .probe = wm8804_i2c_probe, 766 .remove = wm8804_i2c_remove, 767 .id_table = wm8804_i2c_id 768 }; 769 #endif 770 771 static int __init wm8804_modinit(void) 772 { 773 int ret = 0; 774 775 #if IS_ENABLED(CONFIG_I2C) 776 ret = i2c_add_driver(&wm8804_i2c_driver); 777 if (ret) { 778 printk(KERN_ERR "Failed to register wm8804 I2C driver: %d\n", 779 ret); 780 } 781 #endif 782 #if defined(CONFIG_SPI_MASTER) 783 ret = spi_register_driver(&wm8804_spi_driver); 784 if (ret != 0) { 785 printk(KERN_ERR "Failed to register wm8804 SPI driver: %d\n", 786 ret); 787 } 788 #endif 789 return ret; 790 } 791 module_init(wm8804_modinit); 792 793 static void __exit wm8804_exit(void) 794 { 795 #if IS_ENABLED(CONFIG_I2C) 796 i2c_del_driver(&wm8804_i2c_driver); 797 #endif 798 #if defined(CONFIG_SPI_MASTER) 799 spi_unregister_driver(&wm8804_spi_driver); 800 #endif 801 } 802 module_exit(wm8804_exit); 803 804 MODULE_DESCRIPTION("ASoC WM8804 driver"); 805 MODULE_AUTHOR("Dimitris Papastamos <dp@opensource.wolfsonmicro.com>"); 806 MODULE_LICENSE("GPL"); 807