1 /* 2 * wm8750.c -- WM8750 ALSA SoC audio driver 3 * 4 * Copyright 2005 Openedhand Ltd. 5 * 6 * Author: Richard Purdie <richard@openedhand.com> 7 * 8 * Based on WM8753.c 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #include <linux/module.h> 16 #include <linux/moduleparam.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 #include <linux/pm.h> 20 #include <linux/i2c.h> 21 #include <linux/platform_device.h> 22 #include <linux/spi/spi.h> 23 #include <linux/slab.h> 24 #include <sound/core.h> 25 #include <sound/pcm.h> 26 #include <sound/pcm_params.h> 27 #include <sound/soc.h> 28 #include <sound/initval.h> 29 30 #include "wm8750.h" 31 32 /* 33 * wm8750 register cache 34 * We can't read the WM8750 register space when we 35 * are using 2 wire for device control, so we cache them instead. 36 */ 37 static const u16 wm8750_reg[] = { 38 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ 39 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ 40 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ 41 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ 42 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ 43 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ 44 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ 45 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ 46 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ 47 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ 48 0x0079, 0x0079, 0x0079, /* 40 */ 49 }; 50 51 /* codec private data */ 52 struct wm8750_priv { 53 unsigned int sysclk; 54 enum snd_soc_control_type control_type; 55 }; 56 57 #define wm8750_reset(c) snd_soc_write(c, WM8750_RESET, 0) 58 59 /* 60 * WM8750 Controls 61 */ 62 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"}; 63 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; 64 static const char *wm8750_treble[] = {"8kHz", "4kHz"}; 65 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"}; 66 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"}; 67 static const char *wm8750_3d_func[] = {"Capture", "Playback"}; 68 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"}; 69 static const char *wm8750_ng_type[] = {"Constant PGA Gain", 70 "Mute ADC Output"}; 71 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", 72 "Differential"}; 73 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3", 74 "Differential"}; 75 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", 76 "ROUT1"}; 77 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"}; 78 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert", 79 "L + R Invert"}; 80 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; 81 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)", 82 "Mono (Right)", "Digital Mono"}; 83 84 static const struct soc_enum wm8750_enum[] = { 85 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass), 86 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter), 87 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble), 88 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc), 89 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc), 90 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func), 91 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func), 92 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type), 93 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux), 94 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux), 95 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */ 96 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel), 97 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3), 98 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel), 99 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol), 100 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph), 101 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */ 102 103 }; 104 105 static const struct snd_kcontrol_new wm8750_snd_controls[] = { 106 107 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0), 108 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0), 109 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1), 110 111 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V, 112 WM8750_ROUT1V, 7, 1, 0), 113 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V, 114 WM8750_ROUT2V, 7, 1, 0), 115 116 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), 117 118 SOC_ENUM("Capture Polarity", wm8750_enum[14]), 119 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0), 120 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0), 121 122 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0), 123 124 SOC_ENUM("Bass Boost", wm8750_enum[0]), 125 SOC_ENUM("Bass Filter", wm8750_enum[1]), 126 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1), 127 128 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1), 129 SOC_ENUM("Treble Cut-off", wm8750_enum[2]), 130 131 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0), 132 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0), 133 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), 134 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), 135 SOC_ENUM("3D Mode", wm8750_enum[5]), 136 137 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0), 138 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0), 139 SOC_ENUM("ALC Capture Function", wm8750_enum[6]), 140 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0), 141 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0), 142 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0), 143 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0), 144 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0), 145 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]), 146 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0), 147 148 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0), 149 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0), 150 151 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0), 152 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0), 153 154 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0), 155 156 /* Unimplemented */ 157 /* ADCDAC Bit 0 - ADCHPD */ 158 /* ADCDAC Bit 4 - HPOR */ 159 /* ADCTL1 Bit 2,3 - DATSEL */ 160 /* ADCTL1 Bit 4,5 - DMONOMIX */ 161 /* ADCTL1 Bit 6,7 - VSEL */ 162 /* ADCTL2 Bit 2 - LRCM */ 163 /* ADCTL2 Bit 3 - TRI */ 164 /* ADCTL3 Bit 5 - HPFLREN */ 165 /* ADCTL3 Bit 6 - VROI */ 166 /* ADCTL3 Bit 7,8 - ADCLRM */ 167 /* ADCIN Bit 4 - LDCM */ 168 /* ADCIN Bit 5 - RDCM */ 169 170 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0), 171 172 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1, 173 WM8750_LOUTM2, 4, 7, 1), 174 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1, 175 WM8750_ROUTM2, 4, 7, 1), 176 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1, 177 WM8750_MOUTM2, 4, 7, 1), 178 179 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0), 180 181 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V, 182 0, 127, 0), 183 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V, 184 0, 127, 0), 185 186 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0), 187 188 }; 189 190 /* 191 * DAPM Controls 192 */ 193 194 /* Left Mixer */ 195 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = { 196 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0), 197 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0), 198 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0), 199 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0), 200 }; 201 202 /* Right Mixer */ 203 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = { 204 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0), 205 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0), 206 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0), 207 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0), 208 }; 209 210 /* Mono Mixer */ 211 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = { 212 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0), 213 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0), 214 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0), 215 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0), 216 }; 217 218 /* Left Line Mux */ 219 static const struct snd_kcontrol_new wm8750_left_line_controls = 220 SOC_DAPM_ENUM("Route", wm8750_enum[8]); 221 222 /* Right Line Mux */ 223 static const struct snd_kcontrol_new wm8750_right_line_controls = 224 SOC_DAPM_ENUM("Route", wm8750_enum[9]); 225 226 /* Left PGA Mux */ 227 static const struct snd_kcontrol_new wm8750_left_pga_controls = 228 SOC_DAPM_ENUM("Route", wm8750_enum[10]); 229 230 /* Right PGA Mux */ 231 static const struct snd_kcontrol_new wm8750_right_pga_controls = 232 SOC_DAPM_ENUM("Route", wm8750_enum[11]); 233 234 /* Out 3 Mux */ 235 static const struct snd_kcontrol_new wm8750_out3_controls = 236 SOC_DAPM_ENUM("Route", wm8750_enum[12]); 237 238 /* Differential Mux */ 239 static const struct snd_kcontrol_new wm8750_diffmux_controls = 240 SOC_DAPM_ENUM("Route", wm8750_enum[13]); 241 242 /* Mono ADC Mux */ 243 static const struct snd_kcontrol_new wm8750_monomux_controls = 244 SOC_DAPM_ENUM("Route", wm8750_enum[16]); 245 246 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = { 247 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, 248 &wm8750_left_mixer_controls[0], 249 ARRAY_SIZE(wm8750_left_mixer_controls)), 250 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, 251 &wm8750_right_mixer_controls[0], 252 ARRAY_SIZE(wm8750_right_mixer_controls)), 253 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0, 254 &wm8750_mono_mixer_controls[0], 255 ARRAY_SIZE(wm8750_mono_mixer_controls)), 256 257 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0), 258 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0), 259 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0), 260 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0), 261 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0), 262 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0), 263 264 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0), 265 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0), 266 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0), 267 268 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0, 269 &wm8750_left_pga_controls), 270 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0, 271 &wm8750_right_pga_controls), 272 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, 273 &wm8750_left_line_controls), 274 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, 275 &wm8750_right_line_controls), 276 277 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls), 278 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0), 279 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0), 280 281 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, 282 &wm8750_diffmux_controls), 283 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, 284 &wm8750_monomux_controls), 285 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, 286 &wm8750_monomux_controls), 287 288 SND_SOC_DAPM_OUTPUT("LOUT1"), 289 SND_SOC_DAPM_OUTPUT("ROUT1"), 290 SND_SOC_DAPM_OUTPUT("LOUT2"), 291 SND_SOC_DAPM_OUTPUT("ROUT2"), 292 SND_SOC_DAPM_OUTPUT("MONO1"), 293 SND_SOC_DAPM_OUTPUT("OUT3"), 294 SND_SOC_DAPM_OUTPUT("VREF"), 295 296 SND_SOC_DAPM_INPUT("LINPUT1"), 297 SND_SOC_DAPM_INPUT("LINPUT2"), 298 SND_SOC_DAPM_INPUT("LINPUT3"), 299 SND_SOC_DAPM_INPUT("RINPUT1"), 300 SND_SOC_DAPM_INPUT("RINPUT2"), 301 SND_SOC_DAPM_INPUT("RINPUT3"), 302 }; 303 304 static const struct snd_soc_dapm_route audio_map[] = { 305 /* left mixer */ 306 {"Left Mixer", "Playback Switch", "Left DAC"}, 307 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, 308 {"Left Mixer", "Right Playback Switch", "Right DAC"}, 309 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, 310 311 /* right mixer */ 312 {"Right Mixer", "Left Playback Switch", "Left DAC"}, 313 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, 314 {"Right Mixer", "Playback Switch", "Right DAC"}, 315 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, 316 317 /* left out 1 */ 318 {"Left Out 1", NULL, "Left Mixer"}, 319 {"LOUT1", NULL, "Left Out 1"}, 320 321 /* left out 2 */ 322 {"Left Out 2", NULL, "Left Mixer"}, 323 {"LOUT2", NULL, "Left Out 2"}, 324 325 /* right out 1 */ 326 {"Right Out 1", NULL, "Right Mixer"}, 327 {"ROUT1", NULL, "Right Out 1"}, 328 329 /* right out 2 */ 330 {"Right Out 2", NULL, "Right Mixer"}, 331 {"ROUT2", NULL, "Right Out 2"}, 332 333 /* mono mixer */ 334 {"Mono Mixer", "Left Playback Switch", "Left DAC"}, 335 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, 336 {"Mono Mixer", "Right Playback Switch", "Right DAC"}, 337 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, 338 339 /* mono out */ 340 {"Mono Out 1", NULL, "Mono Mixer"}, 341 {"MONO1", NULL, "Mono Out 1"}, 342 343 /* out 3 */ 344 {"Out3 Mux", "VREF", "VREF"}, 345 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, 346 {"Out3 Mux", "ROUT1", "Right Mixer"}, 347 {"Out3 Mux", "MonoOut", "MONO1"}, 348 {"Out 3", NULL, "Out3 Mux"}, 349 {"OUT3", NULL, "Out 3"}, 350 351 /* Left Line Mux */ 352 {"Left Line Mux", "Line 1", "LINPUT1"}, 353 {"Left Line Mux", "Line 2", "LINPUT2"}, 354 {"Left Line Mux", "Line 3", "LINPUT3"}, 355 {"Left Line Mux", "PGA", "Left PGA Mux"}, 356 {"Left Line Mux", "Differential", "Differential Mux"}, 357 358 /* Right Line Mux */ 359 {"Right Line Mux", "Line 1", "RINPUT1"}, 360 {"Right Line Mux", "Line 2", "RINPUT2"}, 361 {"Right Line Mux", "Line 3", "RINPUT3"}, 362 {"Right Line Mux", "PGA", "Right PGA Mux"}, 363 {"Right Line Mux", "Differential", "Differential Mux"}, 364 365 /* Left PGA Mux */ 366 {"Left PGA Mux", "Line 1", "LINPUT1"}, 367 {"Left PGA Mux", "Line 2", "LINPUT2"}, 368 {"Left PGA Mux", "Line 3", "LINPUT3"}, 369 {"Left PGA Mux", "Differential", "Differential Mux"}, 370 371 /* Right PGA Mux */ 372 {"Right PGA Mux", "Line 1", "RINPUT1"}, 373 {"Right PGA Mux", "Line 2", "RINPUT2"}, 374 {"Right PGA Mux", "Line 3", "RINPUT3"}, 375 {"Right PGA Mux", "Differential", "Differential Mux"}, 376 377 /* Differential Mux */ 378 {"Differential Mux", "Line 1", "LINPUT1"}, 379 {"Differential Mux", "Line 1", "RINPUT1"}, 380 {"Differential Mux", "Line 2", "LINPUT2"}, 381 {"Differential Mux", "Line 2", "RINPUT2"}, 382 383 /* Left ADC Mux */ 384 {"Left ADC Mux", "Stereo", "Left PGA Mux"}, 385 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, 386 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, 387 388 /* Right ADC Mux */ 389 {"Right ADC Mux", "Stereo", "Right PGA Mux"}, 390 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, 391 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, 392 393 /* ADC */ 394 {"Left ADC", NULL, "Left ADC Mux"}, 395 {"Right ADC", NULL, "Right ADC Mux"}, 396 }; 397 398 static int wm8750_add_widgets(struct snd_soc_codec *codec) 399 { 400 struct snd_soc_dapm_context *dapm = &codec->dapm; 401 402 snd_soc_dapm_new_controls(dapm, wm8750_dapm_widgets, 403 ARRAY_SIZE(wm8750_dapm_widgets)); 404 snd_soc_dapm_add_routes(dapm, audio_map, ARRAY_SIZE(audio_map)); 405 406 return 0; 407 } 408 409 struct _coeff_div { 410 u32 mclk; 411 u32 rate; 412 u16 fs; 413 u8 sr:5; 414 u8 usb:1; 415 }; 416 417 /* codec hifi mclk clock divider coefficients */ 418 static const struct _coeff_div coeff_div[] = { 419 /* 8k */ 420 {12288000, 8000, 1536, 0x6, 0x0}, 421 {11289600, 8000, 1408, 0x16, 0x0}, 422 {18432000, 8000, 2304, 0x7, 0x0}, 423 {16934400, 8000, 2112, 0x17, 0x0}, 424 {12000000, 8000, 1500, 0x6, 0x1}, 425 426 /* 11.025k */ 427 {11289600, 11025, 1024, 0x18, 0x0}, 428 {16934400, 11025, 1536, 0x19, 0x0}, 429 {12000000, 11025, 1088, 0x19, 0x1}, 430 431 /* 16k */ 432 {12288000, 16000, 768, 0xa, 0x0}, 433 {18432000, 16000, 1152, 0xb, 0x0}, 434 {12000000, 16000, 750, 0xa, 0x1}, 435 436 /* 22.05k */ 437 {11289600, 22050, 512, 0x1a, 0x0}, 438 {16934400, 22050, 768, 0x1b, 0x0}, 439 {12000000, 22050, 544, 0x1b, 0x1}, 440 441 /* 32k */ 442 {12288000, 32000, 384, 0xc, 0x0}, 443 {18432000, 32000, 576, 0xd, 0x0}, 444 {12000000, 32000, 375, 0xa, 0x1}, 445 446 /* 44.1k */ 447 {11289600, 44100, 256, 0x10, 0x0}, 448 {16934400, 44100, 384, 0x11, 0x0}, 449 {12000000, 44100, 272, 0x11, 0x1}, 450 451 /* 48k */ 452 {12288000, 48000, 256, 0x0, 0x0}, 453 {18432000, 48000, 384, 0x1, 0x0}, 454 {12000000, 48000, 250, 0x0, 0x1}, 455 456 /* 88.2k */ 457 {11289600, 88200, 128, 0x1e, 0x0}, 458 {16934400, 88200, 192, 0x1f, 0x0}, 459 {12000000, 88200, 136, 0x1f, 0x1}, 460 461 /* 96k */ 462 {12288000, 96000, 128, 0xe, 0x0}, 463 {18432000, 96000, 192, 0xf, 0x0}, 464 {12000000, 96000, 125, 0xe, 0x1}, 465 }; 466 467 static inline int get_coeff(int mclk, int rate) 468 { 469 int i; 470 471 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 472 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 473 return i; 474 } 475 476 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n", 477 mclk, rate); 478 return -EINVAL; 479 } 480 481 static int wm8750_set_dai_sysclk(struct snd_soc_dai *codec_dai, 482 int clk_id, unsigned int freq, int dir) 483 { 484 struct snd_soc_codec *codec = codec_dai->codec; 485 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec); 486 487 switch (freq) { 488 case 11289600: 489 case 12000000: 490 case 12288000: 491 case 16934400: 492 case 18432000: 493 wm8750->sysclk = freq; 494 return 0; 495 } 496 return -EINVAL; 497 } 498 499 static int wm8750_set_dai_fmt(struct snd_soc_dai *codec_dai, 500 unsigned int fmt) 501 { 502 struct snd_soc_codec *codec = codec_dai->codec; 503 u16 iface = 0; 504 505 /* set master/slave audio interface */ 506 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 507 case SND_SOC_DAIFMT_CBM_CFM: 508 iface = 0x0040; 509 break; 510 case SND_SOC_DAIFMT_CBS_CFS: 511 break; 512 default: 513 return -EINVAL; 514 } 515 516 /* interface format */ 517 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 518 case SND_SOC_DAIFMT_I2S: 519 iface |= 0x0002; 520 break; 521 case SND_SOC_DAIFMT_RIGHT_J: 522 break; 523 case SND_SOC_DAIFMT_LEFT_J: 524 iface |= 0x0001; 525 break; 526 case SND_SOC_DAIFMT_DSP_A: 527 iface |= 0x0003; 528 break; 529 case SND_SOC_DAIFMT_DSP_B: 530 iface |= 0x0013; 531 break; 532 default: 533 return -EINVAL; 534 } 535 536 /* clock inversion */ 537 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 538 case SND_SOC_DAIFMT_NB_NF: 539 break; 540 case SND_SOC_DAIFMT_IB_IF: 541 iface |= 0x0090; 542 break; 543 case SND_SOC_DAIFMT_IB_NF: 544 iface |= 0x0080; 545 break; 546 case SND_SOC_DAIFMT_NB_IF: 547 iface |= 0x0010; 548 break; 549 default: 550 return -EINVAL; 551 } 552 553 snd_soc_write(codec, WM8750_IFACE, iface); 554 return 0; 555 } 556 557 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, 558 struct snd_pcm_hw_params *params, 559 struct snd_soc_dai *dai) 560 { 561 struct snd_soc_pcm_runtime *rtd = substream->private_data; 562 struct snd_soc_codec *codec = rtd->codec; 563 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec); 564 u16 iface = snd_soc_read(codec, WM8750_IFACE) & 0x1f3; 565 u16 srate = snd_soc_read(codec, WM8750_SRATE) & 0x1c0; 566 int coeff = get_coeff(wm8750->sysclk, params_rate(params)); 567 568 /* bit size */ 569 switch (params_format(params)) { 570 case SNDRV_PCM_FORMAT_S16_LE: 571 break; 572 case SNDRV_PCM_FORMAT_S20_3LE: 573 iface |= 0x0004; 574 break; 575 case SNDRV_PCM_FORMAT_S24_LE: 576 iface |= 0x0008; 577 break; 578 case SNDRV_PCM_FORMAT_S32_LE: 579 iface |= 0x000c; 580 break; 581 } 582 583 /* set iface & srate */ 584 snd_soc_write(codec, WM8750_IFACE, iface); 585 if (coeff >= 0) 586 snd_soc_write(codec, WM8750_SRATE, srate | 587 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); 588 589 return 0; 590 } 591 592 static int wm8750_mute(struct snd_soc_dai *dai, int mute) 593 { 594 struct snd_soc_codec *codec = dai->codec; 595 u16 mute_reg = snd_soc_read(codec, WM8750_ADCDAC) & 0xfff7; 596 597 if (mute) 598 snd_soc_write(codec, WM8750_ADCDAC, mute_reg | 0x8); 599 else 600 snd_soc_write(codec, WM8750_ADCDAC, mute_reg); 601 return 0; 602 } 603 604 static int wm8750_set_bias_level(struct snd_soc_codec *codec, 605 enum snd_soc_bias_level level) 606 { 607 u16 pwr_reg = snd_soc_read(codec, WM8750_PWR1) & 0xfe3e; 608 609 switch (level) { 610 case SND_SOC_BIAS_ON: 611 /* set vmid to 50k and unmute dac */ 612 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); 613 break; 614 case SND_SOC_BIAS_PREPARE: 615 break; 616 case SND_SOC_BIAS_STANDBY: 617 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) { 618 /* Set VMID to 5k */ 619 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); 620 621 /* ...and ramp */ 622 msleep(1000); 623 } 624 625 /* mute dac and set vmid to 500k, enable VREF */ 626 snd_soc_write(codec, WM8750_PWR1, pwr_reg | 0x0141); 627 break; 628 case SND_SOC_BIAS_OFF: 629 snd_soc_write(codec, WM8750_PWR1, 0x0001); 630 break; 631 } 632 codec->dapm.bias_level = level; 633 return 0; 634 } 635 636 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 637 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 638 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) 639 640 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 641 SNDRV_PCM_FMTBIT_S24_LE) 642 643 static struct snd_soc_dai_ops wm8750_dai_ops = { 644 .hw_params = wm8750_pcm_hw_params, 645 .digital_mute = wm8750_mute, 646 .set_fmt = wm8750_set_dai_fmt, 647 .set_sysclk = wm8750_set_dai_sysclk, 648 }; 649 650 static struct snd_soc_dai_driver wm8750_dai = { 651 .name = "wm8750-hifi", 652 .playback = { 653 .stream_name = "Playback", 654 .channels_min = 1, 655 .channels_max = 2, 656 .rates = WM8750_RATES, 657 .formats = WM8750_FORMATS,}, 658 .capture = { 659 .stream_name = "Capture", 660 .channels_min = 1, 661 .channels_max = 2, 662 .rates = WM8750_RATES, 663 .formats = WM8750_FORMATS,}, 664 .ops = &wm8750_dai_ops, 665 }; 666 667 static int wm8750_suspend(struct snd_soc_codec *codec, pm_message_t state) 668 { 669 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); 670 return 0; 671 } 672 673 static int wm8750_resume(struct snd_soc_codec *codec) 674 { 675 int i; 676 u8 data[2]; 677 u16 *cache = codec->reg_cache; 678 679 /* Sync reg_cache with the hardware */ 680 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) { 681 if (i == WM8750_RESET) 682 continue; 683 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); 684 data[1] = cache[i] & 0x00ff; 685 codec->hw_write(codec->control_data, data, 2); 686 } 687 688 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 689 690 return 0; 691 } 692 693 static int wm8750_probe(struct snd_soc_codec *codec) 694 { 695 struct wm8750_priv *wm8750 = snd_soc_codec_get_drvdata(codec); 696 int reg, ret; 697 698 ret = snd_soc_codec_set_cache_io(codec, 7, 9, wm8750->control_type); 699 if (ret < 0) { 700 printk(KERN_ERR "wm8750: failed to set cache I/O: %d\n", ret); 701 return ret; 702 } 703 704 ret = wm8750_reset(codec); 705 if (ret < 0) { 706 printk(KERN_ERR "wm8750: failed to reset: %d\n", ret); 707 return ret; 708 } 709 710 /* charge output caps */ 711 wm8750_set_bias_level(codec, SND_SOC_BIAS_STANDBY); 712 713 /* set the update bits */ 714 reg = snd_soc_read(codec, WM8750_LDAC); 715 snd_soc_write(codec, WM8750_LDAC, reg | 0x0100); 716 reg = snd_soc_read(codec, WM8750_RDAC); 717 snd_soc_write(codec, WM8750_RDAC, reg | 0x0100); 718 reg = snd_soc_read(codec, WM8750_LOUT1V); 719 snd_soc_write(codec, WM8750_LOUT1V, reg | 0x0100); 720 reg = snd_soc_read(codec, WM8750_ROUT1V); 721 snd_soc_write(codec, WM8750_ROUT1V, reg | 0x0100); 722 reg = snd_soc_read(codec, WM8750_LOUT2V); 723 snd_soc_write(codec, WM8750_LOUT2V, reg | 0x0100); 724 reg = snd_soc_read(codec, WM8750_ROUT2V); 725 snd_soc_write(codec, WM8750_ROUT2V, reg | 0x0100); 726 reg = snd_soc_read(codec, WM8750_LINVOL); 727 snd_soc_write(codec, WM8750_LINVOL, reg | 0x0100); 728 reg = snd_soc_read(codec, WM8750_RINVOL); 729 snd_soc_write(codec, WM8750_RINVOL, reg | 0x0100); 730 731 snd_soc_add_controls(codec, wm8750_snd_controls, 732 ARRAY_SIZE(wm8750_snd_controls)); 733 wm8750_add_widgets(codec); 734 return ret; 735 } 736 737 static int wm8750_remove(struct snd_soc_codec *codec) 738 { 739 wm8750_set_bias_level(codec, SND_SOC_BIAS_OFF); 740 return 0; 741 } 742 743 static struct snd_soc_codec_driver soc_codec_dev_wm8750 = { 744 .probe = wm8750_probe, 745 .remove = wm8750_remove, 746 .suspend = wm8750_suspend, 747 .resume = wm8750_resume, 748 .set_bias_level = wm8750_set_bias_level, 749 .reg_cache_size = ARRAY_SIZE(wm8750_reg), 750 .reg_word_size = sizeof(u16), 751 .reg_cache_default = wm8750_reg, 752 }; 753 754 #if defined(CONFIG_SPI_MASTER) 755 static int __devinit wm8750_spi_probe(struct spi_device *spi) 756 { 757 struct wm8750_priv *wm8750; 758 int ret; 759 760 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); 761 if (wm8750 == NULL) 762 return -ENOMEM; 763 764 wm8750->control_type = SND_SOC_SPI; 765 spi_set_drvdata(spi, wm8750); 766 767 ret = snd_soc_register_codec(&spi->dev, 768 &soc_codec_dev_wm8750, &wm8750_dai, 1); 769 if (ret < 0) 770 kfree(wm8750); 771 return ret; 772 } 773 774 static int __devexit wm8750_spi_remove(struct spi_device *spi) 775 { 776 snd_soc_unregister_codec(&spi->dev); 777 kfree(spi_get_drvdata(spi)); 778 return 0; 779 } 780 781 static struct spi_driver wm8750_spi_driver = { 782 .driver = { 783 .name = "wm8750-codec", 784 .owner = THIS_MODULE, 785 }, 786 .probe = wm8750_spi_probe, 787 .remove = __devexit_p(wm8750_spi_remove), 788 }; 789 #endif /* CONFIG_SPI_MASTER */ 790 791 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 792 static __devinit int wm8750_i2c_probe(struct i2c_client *i2c, 793 const struct i2c_device_id *id) 794 { 795 struct wm8750_priv *wm8750; 796 int ret; 797 798 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); 799 if (wm8750 == NULL) 800 return -ENOMEM; 801 802 i2c_set_clientdata(i2c, wm8750); 803 wm8750->control_type = SND_SOC_I2C; 804 805 ret = snd_soc_register_codec(&i2c->dev, 806 &soc_codec_dev_wm8750, &wm8750_dai, 1); 807 if (ret < 0) 808 kfree(wm8750); 809 return ret; 810 } 811 812 static __devexit int wm8750_i2c_remove(struct i2c_client *client) 813 { 814 snd_soc_unregister_codec(&client->dev); 815 kfree(i2c_get_clientdata(client)); 816 return 0; 817 } 818 819 static const struct i2c_device_id wm8750_i2c_id[] = { 820 { "wm8750", 0 }, 821 { "wm8987", 0 }, 822 { } 823 }; 824 MODULE_DEVICE_TABLE(i2c, wm8750_i2c_id); 825 826 static struct i2c_driver wm8750_i2c_driver = { 827 .driver = { 828 .name = "wm8750-codec", 829 .owner = THIS_MODULE, 830 }, 831 .probe = wm8750_i2c_probe, 832 .remove = __devexit_p(wm8750_i2c_remove), 833 .id_table = wm8750_i2c_id, 834 }; 835 #endif 836 837 static int __init wm8750_modinit(void) 838 { 839 int ret = 0; 840 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 841 ret = i2c_add_driver(&wm8750_i2c_driver); 842 if (ret != 0) { 843 printk(KERN_ERR "Failed to register wm8750 I2C driver: %d\n", 844 ret); 845 } 846 #endif 847 #if defined(CONFIG_SPI_MASTER) 848 ret = spi_register_driver(&wm8750_spi_driver); 849 if (ret != 0) { 850 printk(KERN_ERR "Failed to register wm8750 SPI driver: %d\n", 851 ret); 852 } 853 #endif 854 return ret; 855 } 856 module_init(wm8750_modinit); 857 858 static void __exit wm8750_exit(void) 859 { 860 #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE) 861 i2c_del_driver(&wm8750_i2c_driver); 862 #endif 863 #if defined(CONFIG_SPI_MASTER) 864 spi_unregister_driver(&wm8750_spi_driver); 865 #endif 866 } 867 module_exit(wm8750_exit); 868 869 MODULE_DESCRIPTION("ASoC WM8750 driver"); 870 MODULE_AUTHOR("Liam Girdwood"); 871 MODULE_LICENSE("GPL"); 872