xref: /openbmc/linux/sound/soc/codecs/wm8750.c (revision a1e58bbd)
1 /*
2  * wm8750.c -- WM8750 ALSA SoC audio driver
3  *
4  * Copyright 2005 Openedhand Ltd.
5  *
6  * Author: Richard Purdie <richard@openedhand.com>
7  *
8  * Based on WM8753.c
9  *
10  * This program is free software; you can redistribute it and/or modify
11  * it under the terms of the GNU General Public License version 2 as
12  * published by the Free Software Foundation.
13  */
14 
15 #include <linux/module.h>
16 #include <linux/moduleparam.h>
17 #include <linux/init.h>
18 #include <linux/delay.h>
19 #include <linux/pm.h>
20 #include <linux/i2c.h>
21 #include <linux/platform_device.h>
22 #include <sound/core.h>
23 #include <sound/pcm.h>
24 #include <sound/pcm_params.h>
25 #include <sound/soc.h>
26 #include <sound/soc-dapm.h>
27 #include <sound/initval.h>
28 
29 #include "wm8750.h"
30 
31 #define AUDIO_NAME "WM8750"
32 #define WM8750_VERSION "0.12"
33 
34 /*
35  * Debug
36  */
37 
38 #define WM8750_DEBUG 0
39 
40 #ifdef WM8750_DEBUG
41 #define dbg(format, arg...) \
42 	printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg)
43 #else
44 #define dbg(format, arg...) do {} while (0)
45 #endif
46 #define err(format, arg...) \
47 	printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg)
48 #define info(format, arg...) \
49 	printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg)
50 #define warn(format, arg...) \
51 	printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg)
52 
53 /* codec private data */
54 struct wm8750_priv {
55 	unsigned int sysclk;
56 };
57 
58 /*
59  * wm8750 register cache
60  * We can't read the WM8750 register space when we
61  * are using 2 wire for device control, so we cache them instead.
62  */
63 static const u16 wm8750_reg[] = {
64 	0x0097, 0x0097, 0x0079, 0x0079,  /*  0 */
65 	0x0000, 0x0008, 0x0000, 0x000a,  /*  4 */
66 	0x0000, 0x0000, 0x00ff, 0x00ff,  /*  8 */
67 	0x000f, 0x000f, 0x0000, 0x0000,  /* 12 */
68 	0x0000, 0x007b, 0x0000, 0x0032,  /* 16 */
69 	0x0000, 0x00c3, 0x00c3, 0x00c0,  /* 20 */
70 	0x0000, 0x0000, 0x0000, 0x0000,  /* 24 */
71 	0x0000, 0x0000, 0x0000, 0x0000,  /* 28 */
72 	0x0000, 0x0000, 0x0050, 0x0050,  /* 32 */
73 	0x0050, 0x0050, 0x0050, 0x0050,  /* 36 */
74 	0x0079, 0x0079, 0x0079,          /* 40 */
75 };
76 
77 /*
78  * read wm8750 register cache
79  */
80 static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec,
81 	unsigned int reg)
82 {
83 	u16 *cache = codec->reg_cache;
84 	if (reg > WM8750_CACHE_REGNUM)
85 		return -1;
86 	return cache[reg];
87 }
88 
89 /*
90  * write wm8750 register cache
91  */
92 static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec,
93 	unsigned int reg, unsigned int value)
94 {
95 	u16 *cache = codec->reg_cache;
96 	if (reg > WM8750_CACHE_REGNUM)
97 		return;
98 	cache[reg] = value;
99 }
100 
101 static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg,
102 	unsigned int value)
103 {
104 	u8 data[2];
105 
106 	/* data is
107 	 *   D15..D9 WM8753 register offset
108 	 *   D8...D0 register data
109 	 */
110 	data[0] = (reg << 1) | ((value >> 8) & 0x0001);
111 	data[1] = value & 0x00ff;
112 
113 	wm8750_write_reg_cache (codec, reg, value);
114 	if (codec->hw_write(codec->control_data, data, 2) == 2)
115 		return 0;
116 	else
117 		return -EIO;
118 }
119 
120 #define wm8750_reset(c)	wm8750_write(c, WM8750_RESET, 0)
121 
122 /*
123  * WM8750 Controls
124  */
125 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"};
126 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" };
127 static const char *wm8750_treble[] = {"8kHz", "4kHz"};
128 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"};
129 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"};
130 static const char *wm8750_3d_func[] = {"Capture", "Playback"};
131 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"};
132 static const char *wm8750_ng_type[] = {"Constant PGA Gain",
133 	"Mute ADC Output"};
134 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA",
135 	"Differential"};
136 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3",
137 	"Differential"};
138 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut",
139 	"ROUT1"};
140 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"};
141 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert",
142 	"L + R Invert"};
143 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"};
144 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)",
145 	"Mono (Right)", "Digital Mono"};
146 
147 static const struct soc_enum wm8750_enum[] = {
148 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass),
149 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter),
150 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble),
151 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc),
152 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc),
153 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func),
154 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func),
155 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type),
156 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux),
157 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux),
158 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */
159 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel),
160 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3),
161 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel),
162 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol),
163 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph),
164 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */
165 
166 };
167 
168 static const struct snd_kcontrol_new wm8750_snd_controls[] = {
169 
170 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0),
171 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0),
172 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1),
173 
174 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V,
175 	WM8750_ROUT1V, 7, 1, 0),
176 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V,
177 	WM8750_ROUT2V, 7, 1, 0),
178 
179 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]),
180 
181 SOC_ENUM("Capture Polarity", wm8750_enum[14]),
182 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0),
183 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0),
184 
185 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0),
186 
187 SOC_ENUM("Bass Boost", wm8750_enum[0]),
188 SOC_ENUM("Bass Filter", wm8750_enum[1]),
189 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1),
190 
191 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 1),
192 SOC_ENUM("Treble Cut-off", wm8750_enum[2]),
193 
194 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0),
195 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0),
196 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]),
197 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]),
198 SOC_ENUM("3D Mode", wm8750_enum[5]),
199 
200 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0),
201 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0),
202 SOC_ENUM("ALC Capture Function", wm8750_enum[6]),
203 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0),
204 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0),
205 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0),
206 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0),
207 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0),
208 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]),
209 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0),
210 
211 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0),
212 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0),
213 
214 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0),
215 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0),
216 
217 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0),
218 
219 /* Unimplemented */
220 /* ADCDAC Bit 0 - ADCHPD */
221 /* ADCDAC Bit 4 - HPOR */
222 /* ADCTL1 Bit 2,3 - DATSEL */
223 /* ADCTL1 Bit 4,5 - DMONOMIX */
224 /* ADCTL1 Bit 6,7 - VSEL */
225 /* ADCTL2 Bit 2 - LRCM */
226 /* ADCTL2 Bit 3 - TRI */
227 /* ADCTL3 Bit 5 - HPFLREN */
228 /* ADCTL3 Bit 6 - VROI */
229 /* ADCTL3 Bit 7,8 - ADCLRM */
230 /* ADCIN Bit 4 - LDCM */
231 /* ADCIN Bit 5 - RDCM */
232 
233 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0),
234 
235 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1,
236 	WM8750_LOUTM2, 4, 7, 1),
237 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1,
238 	WM8750_ROUTM2, 4, 7, 1),
239 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1,
240 	WM8750_MOUTM2, 4, 7, 1),
241 
242 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0),
243 
244 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V,
245 	0, 127, 0),
246 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V,
247 	0, 127, 0),
248 
249 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0),
250 
251 };
252 
253 /* add non dapm controls */
254 static int wm8750_add_controls(struct snd_soc_codec *codec)
255 {
256 	int err, i;
257 
258 	for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) {
259 		err = snd_ctl_add(codec->card,
260 				snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL));
261 		if (err < 0)
262 			return err;
263 	}
264 	return 0;
265 }
266 
267 /*
268  * DAPM Controls
269  */
270 
271 /* Left Mixer */
272 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = {
273 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0),
274 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0),
275 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0),
276 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0),
277 };
278 
279 /* Right Mixer */
280 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = {
281 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0),
282 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0),
283 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0),
284 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0),
285 };
286 
287 /* Mono Mixer */
288 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = {
289 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0),
290 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0),
291 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0),
292 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0),
293 };
294 
295 /* Left Line Mux */
296 static const struct snd_kcontrol_new wm8750_left_line_controls =
297 SOC_DAPM_ENUM("Route", wm8750_enum[8]);
298 
299 /* Right Line Mux */
300 static const struct snd_kcontrol_new wm8750_right_line_controls =
301 SOC_DAPM_ENUM("Route", wm8750_enum[9]);
302 
303 /* Left PGA Mux */
304 static const struct snd_kcontrol_new wm8750_left_pga_controls =
305 SOC_DAPM_ENUM("Route", wm8750_enum[10]);
306 
307 /* Right PGA Mux */
308 static const struct snd_kcontrol_new wm8750_right_pga_controls =
309 SOC_DAPM_ENUM("Route", wm8750_enum[11]);
310 
311 /* Out 3 Mux */
312 static const struct snd_kcontrol_new wm8750_out3_controls =
313 SOC_DAPM_ENUM("Route", wm8750_enum[12]);
314 
315 /* Differential Mux */
316 static const struct snd_kcontrol_new wm8750_diffmux_controls =
317 SOC_DAPM_ENUM("Route", wm8750_enum[13]);
318 
319 /* Mono ADC Mux */
320 static const struct snd_kcontrol_new wm8750_monomux_controls =
321 SOC_DAPM_ENUM("Route", wm8750_enum[16]);
322 
323 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = {
324 	SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0,
325 		&wm8750_left_mixer_controls[0],
326 		ARRAY_SIZE(wm8750_left_mixer_controls)),
327 	SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0,
328 		&wm8750_right_mixer_controls[0],
329 		ARRAY_SIZE(wm8750_right_mixer_controls)),
330 	SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0,
331 		&wm8750_mono_mixer_controls[0],
332 		ARRAY_SIZE(wm8750_mono_mixer_controls)),
333 
334 	SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0),
335 	SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0),
336 	SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0),
337 	SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0),
338 	SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0),
339 	SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0),
340 
341 	SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0),
342 	SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0),
343 	SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0),
344 
345 	SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0,
346 		&wm8750_left_pga_controls),
347 	SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0,
348 		&wm8750_right_pga_controls),
349 	SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0,
350 		&wm8750_left_line_controls),
351 	SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0,
352 		&wm8750_right_line_controls),
353 
354 	SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls),
355 	SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0),
356 	SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0),
357 
358 	SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0,
359 		&wm8750_diffmux_controls),
360 	SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0,
361 		&wm8750_monomux_controls),
362 	SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0,
363 		&wm8750_monomux_controls),
364 
365 	SND_SOC_DAPM_OUTPUT("LOUT1"),
366 	SND_SOC_DAPM_OUTPUT("ROUT1"),
367 	SND_SOC_DAPM_OUTPUT("LOUT2"),
368 	SND_SOC_DAPM_OUTPUT("ROUT2"),
369 	SND_SOC_DAPM_OUTPUT("MONO"),
370 	SND_SOC_DAPM_OUTPUT("OUT3"),
371 
372 	SND_SOC_DAPM_INPUT("LINPUT1"),
373 	SND_SOC_DAPM_INPUT("LINPUT2"),
374 	SND_SOC_DAPM_INPUT("LINPUT3"),
375 	SND_SOC_DAPM_INPUT("RINPUT1"),
376 	SND_SOC_DAPM_INPUT("RINPUT2"),
377 	SND_SOC_DAPM_INPUT("RINPUT3"),
378 };
379 
380 static const char *audio_map[][3] = {
381 	/* left mixer */
382 	{"Left Mixer", "Playback Switch", "Left DAC"},
383 	{"Left Mixer", "Left Bypass Switch", "Left Line Mux"},
384 	{"Left Mixer", "Right Playback Switch", "Right DAC"},
385 	{"Left Mixer", "Right Bypass Switch", "Right Line Mux"},
386 
387 	/* right mixer */
388 	{"Right Mixer", "Left Playback Switch", "Left DAC"},
389 	{"Right Mixer", "Left Bypass Switch", "Left Line Mux"},
390 	{"Right Mixer", "Playback Switch", "Right DAC"},
391 	{"Right Mixer", "Right Bypass Switch", "Right Line Mux"},
392 
393 	/* left out 1 */
394 	{"Left Out 1", NULL, "Left Mixer"},
395 	{"LOUT1", NULL, "Left Out 1"},
396 
397 	/* left out 2 */
398 	{"Left Out 2", NULL, "Left Mixer"},
399 	{"LOUT2", NULL, "Left Out 2"},
400 
401 	/* right out 1 */
402 	{"Right Out 1", NULL, "Right Mixer"},
403 	{"ROUT1", NULL, "Right Out 1"},
404 
405 	/* right out 2 */
406 	{"Right Out 2", NULL, "Right Mixer"},
407 	{"ROUT2", NULL, "Right Out 2"},
408 
409 	/* mono mixer */
410 	{"Mono Mixer", "Left Playback Switch", "Left DAC"},
411 	{"Mono Mixer", "Left Bypass Switch", "Left Line Mux"},
412 	{"Mono Mixer", "Right Playback Switch", "Right DAC"},
413 	{"Mono Mixer", "Right Bypass Switch", "Right Line Mux"},
414 
415 	/* mono out */
416 	{"Mono Out 1", NULL, "Mono Mixer"},
417 	{"MONO1", NULL, "Mono Out 1"},
418 
419 	/* out 3 */
420 	{"Out3 Mux", "VREF", "VREF"},
421 	{"Out3 Mux", "ROUT1 + Vol", "ROUT1"},
422 	{"Out3 Mux", "ROUT1", "Right Mixer"},
423 	{"Out3 Mux", "MonoOut", "MONO1"},
424 	{"Out 3", NULL, "Out3 Mux"},
425 	{"OUT3", NULL, "Out 3"},
426 
427 	/* Left Line Mux */
428 	{"Left Line Mux", "Line 1", "LINPUT1"},
429 	{"Left Line Mux", "Line 2", "LINPUT2"},
430 	{"Left Line Mux", "Line 3", "LINPUT3"},
431 	{"Left Line Mux", "PGA", "Left PGA Mux"},
432 	{"Left Line Mux", "Differential", "Differential Mux"},
433 
434 	/* Right Line Mux */
435 	{"Right Line Mux", "Line 1", "RINPUT1"},
436 	{"Right Line Mux", "Line 2", "RINPUT2"},
437 	{"Right Line Mux", "Line 3", "RINPUT3"},
438 	{"Right Line Mux", "PGA", "Right PGA Mux"},
439 	{"Right Line Mux", "Differential", "Differential Mux"},
440 
441 	/* Left PGA Mux */
442 	{"Left PGA Mux", "Line 1", "LINPUT1"},
443 	{"Left PGA Mux", "Line 2", "LINPUT2"},
444 	{"Left PGA Mux", "Line 3", "LINPUT3"},
445 	{"Left PGA Mux", "Differential", "Differential Mux"},
446 
447 	/* Right PGA Mux */
448 	{"Right PGA Mux", "Line 1", "RINPUT1"},
449 	{"Right PGA Mux", "Line 2", "RINPUT2"},
450 	{"Right PGA Mux", "Line 3", "RINPUT3"},
451 	{"Right PGA Mux", "Differential", "Differential Mux"},
452 
453 	/* Differential Mux */
454 	{"Differential Mux", "Line 1", "LINPUT1"},
455 	{"Differential Mux", "Line 1", "RINPUT1"},
456 	{"Differential Mux", "Line 2", "LINPUT2"},
457 	{"Differential Mux", "Line 2", "RINPUT2"},
458 
459 	/* Left ADC Mux */
460 	{"Left ADC Mux", "Stereo", "Left PGA Mux"},
461 	{"Left ADC Mux", "Mono (Left)", "Left PGA Mux"},
462 	{"Left ADC Mux", "Digital Mono", "Left PGA Mux"},
463 
464 	/* Right ADC Mux */
465 	{"Right ADC Mux", "Stereo", "Right PGA Mux"},
466 	{"Right ADC Mux", "Mono (Right)", "Right PGA Mux"},
467 	{"Right ADC Mux", "Digital Mono", "Right PGA Mux"},
468 
469 	/* ADC */
470 	{"Left ADC", NULL, "Left ADC Mux"},
471 	{"Right ADC", NULL, "Right ADC Mux"},
472 
473 	/* terminator */
474 	{NULL, NULL, NULL},
475 };
476 
477 static int wm8750_add_widgets(struct snd_soc_codec *codec)
478 {
479 	int i;
480 
481 	for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) {
482 		snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]);
483 	}
484 
485 	/* set up audio path audio_mapnects */
486 	for(i = 0; audio_map[i][0] != NULL; i++) {
487 		snd_soc_dapm_connect_input(codec, audio_map[i][0],
488 			audio_map[i][1], audio_map[i][2]);
489 	}
490 
491 	snd_soc_dapm_new_widgets(codec);
492 	return 0;
493 }
494 
495 struct _coeff_div {
496 	u32 mclk;
497 	u32 rate;
498 	u16 fs;
499 	u8 sr:5;
500 	u8 usb:1;
501 };
502 
503 /* codec hifi mclk clock divider coefficients */
504 static const struct _coeff_div coeff_div[] = {
505 	/* 8k */
506 	{12288000, 8000, 1536, 0x6, 0x0},
507 	{11289600, 8000, 1408, 0x16, 0x0},
508 	{18432000, 8000, 2304, 0x7, 0x0},
509 	{16934400, 8000, 2112, 0x17, 0x0},
510 	{12000000, 8000, 1500, 0x6, 0x1},
511 
512 	/* 11.025k */
513 	{11289600, 11025, 1024, 0x18, 0x0},
514 	{16934400, 11025, 1536, 0x19, 0x0},
515 	{12000000, 11025, 1088, 0x19, 0x1},
516 
517 	/* 16k */
518 	{12288000, 16000, 768, 0xa, 0x0},
519 	{18432000, 16000, 1152, 0xb, 0x0},
520 	{12000000, 16000, 750, 0xa, 0x1},
521 
522 	/* 22.05k */
523 	{11289600, 22050, 512, 0x1a, 0x0},
524 	{16934400, 22050, 768, 0x1b, 0x0},
525 	{12000000, 22050, 544, 0x1b, 0x1},
526 
527 	/* 32k */
528 	{12288000, 32000, 384, 0xc, 0x0},
529 	{18432000, 32000, 576, 0xd, 0x0},
530 	{12000000, 32000, 375, 0xa, 0x1},
531 
532 	/* 44.1k */
533 	{11289600, 44100, 256, 0x10, 0x0},
534 	{16934400, 44100, 384, 0x11, 0x0},
535 	{12000000, 44100, 272, 0x11, 0x1},
536 
537 	/* 48k */
538 	{12288000, 48000, 256, 0x0, 0x0},
539 	{18432000, 48000, 384, 0x1, 0x0},
540 	{12000000, 48000, 250, 0x0, 0x1},
541 
542 	/* 88.2k */
543 	{11289600, 88200, 128, 0x1e, 0x0},
544 	{16934400, 88200, 192, 0x1f, 0x0},
545 	{12000000, 88200, 136, 0x1f, 0x1},
546 
547 	/* 96k */
548 	{12288000, 96000, 128, 0xe, 0x0},
549 	{18432000, 96000, 192, 0xf, 0x0},
550 	{12000000, 96000, 125, 0xe, 0x1},
551 };
552 
553 static inline int get_coeff(int mclk, int rate)
554 {
555 	int i;
556 
557 	for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
558 		if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk)
559 			return i;
560 	}
561 
562 	printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n",
563 		mclk, rate);
564 	return -EINVAL;
565 }
566 
567 static int wm8750_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai,
568 		int clk_id, unsigned int freq, int dir)
569 {
570 	struct snd_soc_codec *codec = codec_dai->codec;
571 	struct wm8750_priv *wm8750 = codec->private_data;
572 
573 	switch (freq) {
574 	case 11289600:
575 	case 12000000:
576 	case 12288000:
577 	case 16934400:
578 	case 18432000:
579 		wm8750->sysclk = freq;
580 		return 0;
581 	}
582 	return -EINVAL;
583 }
584 
585 static int wm8750_set_dai_fmt(struct snd_soc_codec_dai *codec_dai,
586 		unsigned int fmt)
587 {
588 	struct snd_soc_codec *codec = codec_dai->codec;
589 	u16 iface = 0;
590 
591 	/* set master/slave audio interface */
592 	switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
593 	case SND_SOC_DAIFMT_CBM_CFM:
594 		iface = 0x0040;
595 		break;
596 	case SND_SOC_DAIFMT_CBS_CFS:
597 		break;
598 	default:
599 		return -EINVAL;
600 	}
601 
602 	/* interface format */
603 	switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
604 	case SND_SOC_DAIFMT_I2S:
605 		iface |= 0x0002;
606 		break;
607 	case SND_SOC_DAIFMT_RIGHT_J:
608 		break;
609 	case SND_SOC_DAIFMT_LEFT_J:
610 		iface |= 0x0001;
611 		break;
612 	case SND_SOC_DAIFMT_DSP_A:
613 		iface |= 0x0003;
614 		break;
615 	case SND_SOC_DAIFMT_DSP_B:
616 		iface |= 0x0013;
617 		break;
618 	default:
619 		return -EINVAL;
620 	}
621 
622 	/* clock inversion */
623 	switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
624 	case SND_SOC_DAIFMT_NB_NF:
625 		break;
626 	case SND_SOC_DAIFMT_IB_IF:
627 		iface |= 0x0090;
628 		break;
629 	case SND_SOC_DAIFMT_IB_NF:
630 		iface |= 0x0080;
631 		break;
632 	case SND_SOC_DAIFMT_NB_IF:
633 		iface |= 0x0010;
634 		break;
635 	default:
636 		return -EINVAL;
637 	}
638 
639 	wm8750_write(codec, WM8750_IFACE, iface);
640 	return 0;
641 }
642 
643 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream,
644 	struct snd_pcm_hw_params *params)
645 {
646 	struct snd_soc_pcm_runtime *rtd = substream->private_data;
647 	struct snd_soc_device *socdev = rtd->socdev;
648 	struct snd_soc_codec *codec = socdev->codec;
649 	struct wm8750_priv *wm8750 = codec->private_data;
650 	u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3;
651 	u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0;
652 	int coeff = get_coeff(wm8750->sysclk, params_rate(params));
653 
654 	/* bit size */
655 	switch (params_format(params)) {
656 	case SNDRV_PCM_FORMAT_S16_LE:
657 		break;
658 	case SNDRV_PCM_FORMAT_S20_3LE:
659 		iface |= 0x0004;
660 		break;
661 	case SNDRV_PCM_FORMAT_S24_LE:
662 		iface |= 0x0008;
663 		break;
664 	case SNDRV_PCM_FORMAT_S32_LE:
665 		iface |= 0x000c;
666 		break;
667 	}
668 
669 	/* set iface & srate */
670 	wm8750_write(codec, WM8750_IFACE, iface);
671 	if (coeff >= 0)
672 		wm8750_write(codec, WM8750_SRATE, srate |
673 			(coeff_div[coeff].sr << 1) | coeff_div[coeff].usb);
674 
675 	return 0;
676 }
677 
678 static int wm8750_mute(struct snd_soc_codec_dai *dai, int mute)
679 {
680 	struct snd_soc_codec *codec = dai->codec;
681 	u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7;
682 
683 	if (mute)
684 		wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8);
685 	else
686 		wm8750_write(codec, WM8750_ADCDAC, mute_reg);
687 	return 0;
688 }
689 
690 static int wm8750_dapm_event(struct snd_soc_codec *codec, int event)
691 {
692 	u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e;
693 
694 	switch (event) {
695 	case SNDRV_CTL_POWER_D0: /* full On */
696 		/* set vmid to 50k and unmute dac */
697 		wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0);
698 		break;
699 	case SNDRV_CTL_POWER_D1: /* partial On */
700 	case SNDRV_CTL_POWER_D2: /* partial On */
701 		/* set vmid to 5k for quick power up */
702 		wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1);
703 		break;
704 	case SNDRV_CTL_POWER_D3hot: /* Off, with power */
705 		/* mute dac and set vmid to 500k, enable VREF */
706 		wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141);
707 		break;
708 	case SNDRV_CTL_POWER_D3cold: /* Off, without power */
709 		wm8750_write(codec, WM8750_PWR1, 0x0001);
710 		break;
711 	}
712 	codec->dapm_state = event;
713 	return 0;
714 }
715 
716 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
717 		SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \
718 		SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000)
719 
720 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
721 	SNDRV_PCM_FMTBIT_S24_LE)
722 
723 struct snd_soc_codec_dai wm8750_dai = {
724 	.name = "WM8750",
725 	.playback = {
726 		.stream_name = "Playback",
727 		.channels_min = 1,
728 		.channels_max = 2,
729 		.rates = WM8750_RATES,
730 		.formats = WM8750_FORMATS,},
731 	.capture = {
732 		.stream_name = "Capture",
733 		.channels_min = 1,
734 		.channels_max = 2,
735 		.rates = WM8750_RATES,
736 		.formats = WM8750_FORMATS,},
737 	.ops = {
738 		.hw_params = wm8750_pcm_hw_params,
739 	},
740 	.dai_ops = {
741 		.digital_mute = wm8750_mute,
742 		.set_fmt = wm8750_set_dai_fmt,
743 		.set_sysclk = wm8750_set_dai_sysclk,
744 	},
745 };
746 EXPORT_SYMBOL_GPL(wm8750_dai);
747 
748 static void wm8750_work(struct work_struct *work)
749 {
750 	struct snd_soc_codec *codec =
751 		container_of(work, struct snd_soc_codec, delayed_work.work);
752 	wm8750_dapm_event(codec, codec->dapm_state);
753 }
754 
755 static int wm8750_suspend(struct platform_device *pdev, pm_message_t state)
756 {
757 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
758 	struct snd_soc_codec *codec = socdev->codec;
759 
760 	wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
761 	return 0;
762 }
763 
764 static int wm8750_resume(struct platform_device *pdev)
765 {
766 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
767 	struct snd_soc_codec *codec = socdev->codec;
768 	int i;
769 	u8 data[2];
770 	u16 *cache = codec->reg_cache;
771 
772 	/* Sync reg_cache with the hardware */
773 	for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) {
774 		if (i == WM8750_RESET)
775 			continue;
776 		data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001);
777 		data[1] = cache[i] & 0x00ff;
778 		codec->hw_write(codec->control_data, data, 2);
779 	}
780 
781 	wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot);
782 
783 	/* charge wm8750 caps */
784 	if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) {
785 		wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
786 		codec->dapm_state = SNDRV_CTL_POWER_D0;
787 		schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
788 	}
789 
790 	return 0;
791 }
792 
793 /*
794  * initialise the WM8750 driver
795  * register the mixer and dsp interfaces with the kernel
796  */
797 static int wm8750_init(struct snd_soc_device *socdev)
798 {
799 	struct snd_soc_codec *codec = socdev->codec;
800 	int reg, ret = 0;
801 
802 	codec->name = "WM8750";
803 	codec->owner = THIS_MODULE;
804 	codec->read = wm8750_read_reg_cache;
805 	codec->write = wm8750_write;
806 	codec->dapm_event = wm8750_dapm_event;
807 	codec->dai = &wm8750_dai;
808 	codec->num_dai = 1;
809 	codec->reg_cache_size = sizeof(wm8750_reg);
810 	codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL);
811 	if (codec->reg_cache == NULL)
812 		return -ENOMEM;
813 
814 	wm8750_reset(codec);
815 
816 	/* register pcms */
817 	ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1);
818 	if (ret < 0) {
819 		printk(KERN_ERR "wm8750: failed to create pcms\n");
820 		goto pcm_err;
821 	}
822 
823 	/* charge output caps */
824 	wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2);
825 	codec->dapm_state = SNDRV_CTL_POWER_D3hot;
826 	schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000));
827 
828 	/* set the update bits */
829 	reg = wm8750_read_reg_cache(codec, WM8750_LDAC);
830 	wm8750_write(codec, WM8750_LDAC, reg | 0x0100);
831 	reg = wm8750_read_reg_cache(codec, WM8750_RDAC);
832 	wm8750_write(codec, WM8750_RDAC, reg | 0x0100);
833 	reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V);
834 	wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100);
835 	reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V);
836 	wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100);
837 	reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V);
838 	wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100);
839 	reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V);
840 	wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100);
841 	reg = wm8750_read_reg_cache(codec, WM8750_LINVOL);
842 	wm8750_write(codec, WM8750_LINVOL, reg | 0x0100);
843 	reg = wm8750_read_reg_cache(codec, WM8750_RINVOL);
844 	wm8750_write(codec, WM8750_RINVOL, reg | 0x0100);
845 
846 	wm8750_add_controls(codec);
847 	wm8750_add_widgets(codec);
848 	ret = snd_soc_register_card(socdev);
849 	if (ret < 0) {
850 		printk(KERN_ERR "wm8750: failed to register card\n");
851 		goto card_err;
852 	}
853 	return ret;
854 
855 card_err:
856 	snd_soc_free_pcms(socdev);
857 	snd_soc_dapm_free(socdev);
858 pcm_err:
859 	kfree(codec->reg_cache);
860 	return ret;
861 }
862 
863 /* If the i2c layer weren't so broken, we could pass this kind of data
864    around */
865 static struct snd_soc_device *wm8750_socdev;
866 
867 #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
868 
869 /*
870  * WM8731 2 wire address is determined by GPIO5
871  * state during powerup.
872  *    low  = 0x1a
873  *    high = 0x1b
874  */
875 static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END };
876 
877 /* Magic definition of all other variables and things */
878 I2C_CLIENT_INSMOD;
879 
880 static struct i2c_driver wm8750_i2c_driver;
881 static struct i2c_client client_template;
882 
883 static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind)
884 {
885 	struct snd_soc_device *socdev = wm8750_socdev;
886 	struct wm8750_setup_data *setup = socdev->codec_data;
887 	struct snd_soc_codec *codec = socdev->codec;
888 	struct i2c_client *i2c;
889 	int ret;
890 
891 	if (addr != setup->i2c_address)
892 		return -ENODEV;
893 
894 	client_template.adapter = adap;
895 	client_template.addr = addr;
896 
897 	i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL);
898 	if (i2c == NULL) {
899 		kfree(codec);
900 		return -ENOMEM;
901 	}
902 	i2c_set_clientdata(i2c, codec);
903 	codec->control_data = i2c;
904 
905 	ret = i2c_attach_client(i2c);
906 	if (ret < 0) {
907 		err("failed to attach codec at addr %x\n", addr);
908 		goto err;
909 	}
910 
911 	ret = wm8750_init(socdev);
912 	if (ret < 0) {
913 	err("failed to initialise WM8750\n");
914 		goto err;
915 	}
916 	return ret;
917 
918 err:
919 	kfree(codec);
920 	kfree(i2c);
921 	return ret;
922 }
923 
924 static int wm8750_i2c_detach(struct i2c_client *client)
925 {
926 	struct snd_soc_codec *codec = i2c_get_clientdata(client);
927 	i2c_detach_client(client);
928 	kfree(codec->reg_cache);
929 	kfree(client);
930 	return 0;
931 }
932 
933 static int wm8750_i2c_attach(struct i2c_adapter *adap)
934 {
935 	return i2c_probe(adap, &addr_data, wm8750_codec_probe);
936 }
937 
938 /* corgi i2c codec control layer */
939 static struct i2c_driver wm8750_i2c_driver = {
940 	.driver = {
941 		.name = "WM8750 I2C Codec",
942 		.owner = THIS_MODULE,
943 	},
944 	.id =             I2C_DRIVERID_WM8750,
945 	.attach_adapter = wm8750_i2c_attach,
946 	.detach_client =  wm8750_i2c_detach,
947 	.command =        NULL,
948 };
949 
950 static struct i2c_client client_template = {
951 	.name =   "WM8750",
952 	.driver = &wm8750_i2c_driver,
953 };
954 #endif
955 
956 static int wm8750_probe(struct platform_device *pdev)
957 {
958 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
959 	struct wm8750_setup_data *setup = socdev->codec_data;
960 	struct snd_soc_codec *codec;
961 	struct wm8750_priv *wm8750;
962 	int ret = 0;
963 
964 	info("WM8750 Audio Codec %s", WM8750_VERSION);
965 	codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL);
966 	if (codec == NULL)
967 		return -ENOMEM;
968 
969 	wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL);
970 	if (wm8750 == NULL) {
971 		kfree(codec);
972 		return -ENOMEM;
973 	}
974 
975 	codec->private_data = wm8750;
976 	socdev->codec = codec;
977 	mutex_init(&codec->mutex);
978 	INIT_LIST_HEAD(&codec->dapm_widgets);
979 	INIT_LIST_HEAD(&codec->dapm_paths);
980 	wm8750_socdev = socdev;
981 	INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work);
982 
983 #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
984 	if (setup->i2c_address) {
985 		normal_i2c[0] = setup->i2c_address;
986 		codec->hw_write = (hw_write_t)i2c_master_send;
987 		ret = i2c_add_driver(&wm8750_i2c_driver);
988 		if (ret != 0)
989 			printk(KERN_ERR "can't add i2c driver");
990 	}
991 #else
992 		/* Add other interfaces here */
993 #endif
994 
995 	return ret;
996 }
997 
998 /*
999  * This function forces any delayed work to be queued and run.
1000  */
1001 static int run_delayed_work(struct delayed_work *dwork)
1002 {
1003 	int ret;
1004 
1005 	/* cancel any work waiting to be queued. */
1006 	ret = cancel_delayed_work(dwork);
1007 
1008 	/* if there was any work waiting then we run it now and
1009 	 * wait for it's completion */
1010 	if (ret) {
1011 		schedule_delayed_work(dwork, 0);
1012 		flush_scheduled_work();
1013 	}
1014 	return ret;
1015 }
1016 
1017 /* power down chip */
1018 static int wm8750_remove(struct platform_device *pdev)
1019 {
1020 	struct snd_soc_device *socdev = platform_get_drvdata(pdev);
1021 	struct snd_soc_codec *codec = socdev->codec;
1022 
1023 	if (codec->control_data)
1024 		wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold);
1025 	run_delayed_work(&codec->delayed_work);
1026 	snd_soc_free_pcms(socdev);
1027 	snd_soc_dapm_free(socdev);
1028 #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE)
1029 	i2c_del_driver(&wm8750_i2c_driver);
1030 #endif
1031 	kfree(codec->private_data);
1032 	kfree(codec);
1033 
1034 	return 0;
1035 }
1036 
1037 struct snd_soc_codec_device soc_codec_dev_wm8750 = {
1038 	.probe = 	wm8750_probe,
1039 	.remove = 	wm8750_remove,
1040 	.suspend = 	wm8750_suspend,
1041 	.resume =	wm8750_resume,
1042 };
1043 
1044 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750);
1045 
1046 MODULE_DESCRIPTION("ASoC WM8750 driver");
1047 MODULE_AUTHOR("Liam Girdwood");
1048 MODULE_LICENSE("GPL");
1049