1 /* 2 * wm8750.c -- WM8750 ALSA SoC audio driver 3 * 4 * Copyright 2005 Openedhand Ltd. 5 * 6 * Author: Richard Purdie <richard@openedhand.com> 7 * 8 * Based on WM8753.c 9 * 10 * This program is free software; you can redistribute it and/or modify 11 * it under the terms of the GNU General Public License version 2 as 12 * published by the Free Software Foundation. 13 */ 14 15 #include <linux/module.h> 16 #include <linux/moduleparam.h> 17 #include <linux/init.h> 18 #include <linux/delay.h> 19 #include <linux/pm.h> 20 #include <linux/i2c.h> 21 #include <linux/platform_device.h> 22 #include <sound/driver.h> 23 #include <sound/core.h> 24 #include <sound/pcm.h> 25 #include <sound/pcm_params.h> 26 #include <sound/soc.h> 27 #include <sound/soc-dapm.h> 28 #include <sound/initval.h> 29 30 #include "wm8750.h" 31 32 #define AUDIO_NAME "WM8750" 33 #define WM8750_VERSION "0.12" 34 35 /* 36 * Debug 37 */ 38 39 #define WM8750_DEBUG 0 40 41 #ifdef WM8750_DEBUG 42 #define dbg(format, arg...) \ 43 printk(KERN_DEBUG AUDIO_NAME ": " format "\n" , ## arg) 44 #else 45 #define dbg(format, arg...) do {} while (0) 46 #endif 47 #define err(format, arg...) \ 48 printk(KERN_ERR AUDIO_NAME ": " format "\n" , ## arg) 49 #define info(format, arg...) \ 50 printk(KERN_INFO AUDIO_NAME ": " format "\n" , ## arg) 51 #define warn(format, arg...) \ 52 printk(KERN_WARNING AUDIO_NAME ": " format "\n" , ## arg) 53 54 /* codec private data */ 55 struct wm8750_priv { 56 unsigned int sysclk; 57 }; 58 59 /* 60 * wm8750 register cache 61 * We can't read the WM8750 register space when we 62 * are using 2 wire for device control, so we cache them instead. 63 */ 64 static const u16 wm8750_reg[] = { 65 0x0097, 0x0097, 0x0079, 0x0079, /* 0 */ 66 0x0000, 0x0008, 0x0000, 0x000a, /* 4 */ 67 0x0000, 0x0000, 0x00ff, 0x00ff, /* 8 */ 68 0x000f, 0x000f, 0x0000, 0x0000, /* 12 */ 69 0x0000, 0x007b, 0x0000, 0x0032, /* 16 */ 70 0x0000, 0x00c3, 0x00c3, 0x00c0, /* 20 */ 71 0x0000, 0x0000, 0x0000, 0x0000, /* 24 */ 72 0x0000, 0x0000, 0x0000, 0x0000, /* 28 */ 73 0x0000, 0x0000, 0x0050, 0x0050, /* 32 */ 74 0x0050, 0x0050, 0x0050, 0x0050, /* 36 */ 75 0x0079, 0x0079, 0x0079, /* 40 */ 76 }; 77 78 /* 79 * read wm8750 register cache 80 */ 81 static inline unsigned int wm8750_read_reg_cache(struct snd_soc_codec *codec, 82 unsigned int reg) 83 { 84 u16 *cache = codec->reg_cache; 85 if (reg > WM8750_CACHE_REGNUM) 86 return -1; 87 return cache[reg]; 88 } 89 90 /* 91 * write wm8750 register cache 92 */ 93 static inline void wm8750_write_reg_cache(struct snd_soc_codec *codec, 94 unsigned int reg, unsigned int value) 95 { 96 u16 *cache = codec->reg_cache; 97 if (reg > WM8750_CACHE_REGNUM) 98 return; 99 cache[reg] = value; 100 } 101 102 static int wm8750_write(struct snd_soc_codec *codec, unsigned int reg, 103 unsigned int value) 104 { 105 u8 data[2]; 106 107 /* data is 108 * D15..D9 WM8753 register offset 109 * D8...D0 register data 110 */ 111 data[0] = (reg << 1) | ((value >> 8) & 0x0001); 112 data[1] = value & 0x00ff; 113 114 wm8750_write_reg_cache (codec, reg, value); 115 if (codec->hw_write(codec->control_data, data, 2) == 2) 116 return 0; 117 else 118 return -EIO; 119 } 120 121 #define wm8750_reset(c) wm8750_write(c, WM8750_RESET, 0) 122 123 /* 124 * WM8750 Controls 125 */ 126 static const char *wm8750_bass[] = {"Linear Control", "Adaptive Boost"}; 127 static const char *wm8750_bass_filter[] = { "130Hz @ 48kHz", "200Hz @ 48kHz" }; 128 static const char *wm8750_treble[] = {"8kHz", "4kHz"}; 129 static const char *wm8750_3d_lc[] = {"200Hz", "500Hz"}; 130 static const char *wm8750_3d_uc[] = {"2.2kHz", "1.5kHz"}; 131 static const char *wm8750_3d_func[] = {"Capture", "Playback"}; 132 static const char *wm8750_alc_func[] = {"Off", "Right", "Left", "Stereo"}; 133 static const char *wm8750_ng_type[] = {"Constant PGA Gain", 134 "Mute ADC Output"}; 135 static const char *wm8750_line_mux[] = {"Line 1", "Line 2", "Line 3", "PGA", 136 "Differential"}; 137 static const char *wm8750_pga_sel[] = {"Line 1", "Line 2", "Line 3", 138 "Differential"}; 139 static const char *wm8750_out3[] = {"VREF", "ROUT1 + Vol", "MonoOut", 140 "ROUT1"}; 141 static const char *wm8750_diff_sel[] = {"Line 1", "Line 2"}; 142 static const char *wm8750_adcpol[] = {"Normal", "L Invert", "R Invert", 143 "L + R Invert"}; 144 static const char *wm8750_deemph[] = {"None", "32Khz", "44.1Khz", "48Khz"}; 145 static const char *wm8750_mono_mux[] = {"Stereo", "Mono (Left)", 146 "Mono (Right)", "Digital Mono"}; 147 148 static const struct soc_enum wm8750_enum[] = { 149 SOC_ENUM_SINGLE(WM8750_BASS, 7, 2, wm8750_bass), 150 SOC_ENUM_SINGLE(WM8750_BASS, 6, 2, wm8750_bass_filter), 151 SOC_ENUM_SINGLE(WM8750_TREBLE, 6, 2, wm8750_treble), 152 SOC_ENUM_SINGLE(WM8750_3D, 5, 2, wm8750_3d_lc), 153 SOC_ENUM_SINGLE(WM8750_3D, 6, 2, wm8750_3d_uc), 154 SOC_ENUM_SINGLE(WM8750_3D, 7, 2, wm8750_3d_func), 155 SOC_ENUM_SINGLE(WM8750_ALC1, 7, 4, wm8750_alc_func), 156 SOC_ENUM_SINGLE(WM8750_NGATE, 1, 2, wm8750_ng_type), 157 SOC_ENUM_SINGLE(WM8750_LOUTM1, 0, 5, wm8750_line_mux), 158 SOC_ENUM_SINGLE(WM8750_ROUTM1, 0, 5, wm8750_line_mux), 159 SOC_ENUM_SINGLE(WM8750_LADCIN, 6, 4, wm8750_pga_sel), /* 10 */ 160 SOC_ENUM_SINGLE(WM8750_RADCIN, 6, 4, wm8750_pga_sel), 161 SOC_ENUM_SINGLE(WM8750_ADCTL2, 7, 4, wm8750_out3), 162 SOC_ENUM_SINGLE(WM8750_ADCIN, 8, 2, wm8750_diff_sel), 163 SOC_ENUM_SINGLE(WM8750_ADCDAC, 5, 4, wm8750_adcpol), 164 SOC_ENUM_SINGLE(WM8750_ADCDAC, 1, 4, wm8750_deemph), 165 SOC_ENUM_SINGLE(WM8750_ADCIN, 6, 4, wm8750_mono_mux), /* 16 */ 166 167 }; 168 169 static const struct snd_kcontrol_new wm8750_snd_controls[] = { 170 171 SOC_DOUBLE_R("Capture Volume", WM8750_LINVOL, WM8750_RINVOL, 0, 63, 0), 172 SOC_DOUBLE_R("Capture ZC Switch", WM8750_LINVOL, WM8750_RINVOL, 6, 1, 0), 173 SOC_DOUBLE_R("Capture Switch", WM8750_LINVOL, WM8750_RINVOL, 7, 1, 1), 174 175 SOC_DOUBLE_R("Headphone Playback ZC Switch", WM8750_LOUT1V, 176 WM8750_ROUT1V, 7, 1, 0), 177 SOC_DOUBLE_R("Speaker Playback ZC Switch", WM8750_LOUT2V, 178 WM8750_ROUT2V, 7, 1, 0), 179 180 SOC_ENUM("Playback De-emphasis", wm8750_enum[15]), 181 182 SOC_ENUM("Capture Polarity", wm8750_enum[14]), 183 SOC_SINGLE("Playback 6dB Attenuate", WM8750_ADCDAC, 7, 1, 0), 184 SOC_SINGLE("Capture 6dB Attenuate", WM8750_ADCDAC, 8, 1, 0), 185 186 SOC_DOUBLE_R("PCM Volume", WM8750_LDAC, WM8750_RDAC, 0, 255, 0), 187 188 SOC_ENUM("Bass Boost", wm8750_enum[0]), 189 SOC_ENUM("Bass Filter", wm8750_enum[1]), 190 SOC_SINGLE("Bass Volume", WM8750_BASS, 0, 15, 1), 191 192 SOC_SINGLE("Treble Volume", WM8750_TREBLE, 0, 15, 0), 193 SOC_ENUM("Treble Cut-off", wm8750_enum[2]), 194 195 SOC_SINGLE("3D Switch", WM8750_3D, 0, 1, 0), 196 SOC_SINGLE("3D Volume", WM8750_3D, 1, 15, 0), 197 SOC_ENUM("3D Lower Cut-off", wm8750_enum[3]), 198 SOC_ENUM("3D Upper Cut-off", wm8750_enum[4]), 199 SOC_ENUM("3D Mode", wm8750_enum[5]), 200 201 SOC_SINGLE("ALC Capture Target Volume", WM8750_ALC1, 0, 7, 0), 202 SOC_SINGLE("ALC Capture Max Volume", WM8750_ALC1, 4, 7, 0), 203 SOC_ENUM("ALC Capture Function", wm8750_enum[6]), 204 SOC_SINGLE("ALC Capture ZC Switch", WM8750_ALC2, 7, 1, 0), 205 SOC_SINGLE("ALC Capture Hold Time", WM8750_ALC2, 0, 15, 0), 206 SOC_SINGLE("ALC Capture Decay Time", WM8750_ALC3, 4, 15, 0), 207 SOC_SINGLE("ALC Capture Attack Time", WM8750_ALC3, 0, 15, 0), 208 SOC_SINGLE("ALC Capture NG Threshold", WM8750_NGATE, 3, 31, 0), 209 SOC_ENUM("ALC Capture NG Type", wm8750_enum[4]), 210 SOC_SINGLE("ALC Capture NG Switch", WM8750_NGATE, 0, 1, 0), 211 212 SOC_SINGLE("Left ADC Capture Volume", WM8750_LADC, 0, 255, 0), 213 SOC_SINGLE("Right ADC Capture Volume", WM8750_RADC, 0, 255, 0), 214 215 SOC_SINGLE("ZC Timeout Switch", WM8750_ADCTL1, 0, 1, 0), 216 SOC_SINGLE("Playback Invert Switch", WM8750_ADCTL1, 1, 1, 0), 217 218 SOC_SINGLE("Right Speaker Playback Invert Switch", WM8750_ADCTL2, 4, 1, 0), 219 220 /* Unimplemented */ 221 /* ADCDAC Bit 0 - ADCHPD */ 222 /* ADCDAC Bit 4 - HPOR */ 223 /* ADCTL1 Bit 2,3 - DATSEL */ 224 /* ADCTL1 Bit 4,5 - DMONOMIX */ 225 /* ADCTL1 Bit 6,7 - VSEL */ 226 /* ADCTL2 Bit 2 - LRCM */ 227 /* ADCTL2 Bit 3 - TRI */ 228 /* ADCTL3 Bit 5 - HPFLREN */ 229 /* ADCTL3 Bit 6 - VROI */ 230 /* ADCTL3 Bit 7,8 - ADCLRM */ 231 /* ADCIN Bit 4 - LDCM */ 232 /* ADCIN Bit 5 - RDCM */ 233 234 SOC_DOUBLE_R("Mic Boost", WM8750_LADCIN, WM8750_RADCIN, 4, 3, 0), 235 236 SOC_DOUBLE_R("Bypass Left Playback Volume", WM8750_LOUTM1, 237 WM8750_LOUTM2, 4, 7, 1), 238 SOC_DOUBLE_R("Bypass Right Playback Volume", WM8750_ROUTM1, 239 WM8750_ROUTM2, 4, 7, 1), 240 SOC_DOUBLE_R("Bypass Mono Playback Volume", WM8750_MOUTM1, 241 WM8750_MOUTM2, 4, 7, 1), 242 243 SOC_SINGLE("Mono Playback ZC Switch", WM8750_MOUTV, 7, 1, 0), 244 245 SOC_DOUBLE_R("Headphone Playback Volume", WM8750_LOUT1V, WM8750_ROUT1V, 246 0, 127, 0), 247 SOC_DOUBLE_R("Speaker Playback Volume", WM8750_LOUT2V, WM8750_ROUT2V, 248 0, 127, 0), 249 250 SOC_SINGLE("Mono Playback Volume", WM8750_MOUTV, 0, 127, 0), 251 252 }; 253 254 /* add non dapm controls */ 255 static int wm8750_add_controls(struct snd_soc_codec *codec) 256 { 257 int err, i; 258 259 for (i = 0; i < ARRAY_SIZE(wm8750_snd_controls); i++) { 260 err = snd_ctl_add(codec->card, 261 snd_soc_cnew(&wm8750_snd_controls[i],codec, NULL)); 262 if (err < 0) 263 return err; 264 } 265 return 0; 266 } 267 268 /* 269 * DAPM Controls 270 */ 271 272 /* Left Mixer */ 273 static const struct snd_kcontrol_new wm8750_left_mixer_controls[] = { 274 SOC_DAPM_SINGLE("Playback Switch", WM8750_LOUTM1, 8, 1, 0), 275 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_LOUTM1, 7, 1, 0), 276 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_LOUTM2, 8, 1, 0), 277 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_LOUTM2, 7, 1, 0), 278 }; 279 280 /* Right Mixer */ 281 static const struct snd_kcontrol_new wm8750_right_mixer_controls[] = { 282 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_ROUTM1, 8, 1, 0), 283 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_ROUTM1, 7, 1, 0), 284 SOC_DAPM_SINGLE("Playback Switch", WM8750_ROUTM2, 8, 1, 0), 285 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_ROUTM2, 7, 1, 0), 286 }; 287 288 /* Mono Mixer */ 289 static const struct snd_kcontrol_new wm8750_mono_mixer_controls[] = { 290 SOC_DAPM_SINGLE("Left Playback Switch", WM8750_MOUTM1, 8, 1, 0), 291 SOC_DAPM_SINGLE("Left Bypass Switch", WM8750_MOUTM1, 7, 1, 0), 292 SOC_DAPM_SINGLE("Right Playback Switch", WM8750_MOUTM2, 8, 1, 0), 293 SOC_DAPM_SINGLE("Right Bypass Switch", WM8750_MOUTM2, 7, 1, 0), 294 }; 295 296 /* Left Line Mux */ 297 static const struct snd_kcontrol_new wm8750_left_line_controls = 298 SOC_DAPM_ENUM("Route", wm8750_enum[8]); 299 300 /* Right Line Mux */ 301 static const struct snd_kcontrol_new wm8750_right_line_controls = 302 SOC_DAPM_ENUM("Route", wm8750_enum[9]); 303 304 /* Left PGA Mux */ 305 static const struct snd_kcontrol_new wm8750_left_pga_controls = 306 SOC_DAPM_ENUM("Route", wm8750_enum[10]); 307 308 /* Right PGA Mux */ 309 static const struct snd_kcontrol_new wm8750_right_pga_controls = 310 SOC_DAPM_ENUM("Route", wm8750_enum[11]); 311 312 /* Out 3 Mux */ 313 static const struct snd_kcontrol_new wm8750_out3_controls = 314 SOC_DAPM_ENUM("Route", wm8750_enum[12]); 315 316 /* Differential Mux */ 317 static const struct snd_kcontrol_new wm8750_diffmux_controls = 318 SOC_DAPM_ENUM("Route", wm8750_enum[13]); 319 320 /* Mono ADC Mux */ 321 static const struct snd_kcontrol_new wm8750_monomux_controls = 322 SOC_DAPM_ENUM("Route", wm8750_enum[16]); 323 324 static const struct snd_soc_dapm_widget wm8750_dapm_widgets[] = { 325 SND_SOC_DAPM_MIXER("Left Mixer", SND_SOC_NOPM, 0, 0, 326 &wm8750_left_mixer_controls[0], 327 ARRAY_SIZE(wm8750_left_mixer_controls)), 328 SND_SOC_DAPM_MIXER("Right Mixer", SND_SOC_NOPM, 0, 0, 329 &wm8750_right_mixer_controls[0], 330 ARRAY_SIZE(wm8750_right_mixer_controls)), 331 SND_SOC_DAPM_MIXER("Mono Mixer", WM8750_PWR2, 2, 0, 332 &wm8750_mono_mixer_controls[0], 333 ARRAY_SIZE(wm8750_mono_mixer_controls)), 334 335 SND_SOC_DAPM_PGA("Right Out 2", WM8750_PWR2, 3, 0, NULL, 0), 336 SND_SOC_DAPM_PGA("Left Out 2", WM8750_PWR2, 4, 0, NULL, 0), 337 SND_SOC_DAPM_PGA("Right Out 1", WM8750_PWR2, 5, 0, NULL, 0), 338 SND_SOC_DAPM_PGA("Left Out 1", WM8750_PWR2, 6, 0, NULL, 0), 339 SND_SOC_DAPM_DAC("Right DAC", "Right Playback", WM8750_PWR2, 7, 0), 340 SND_SOC_DAPM_DAC("Left DAC", "Left Playback", WM8750_PWR2, 8, 0), 341 342 SND_SOC_DAPM_MICBIAS("Mic Bias", WM8750_PWR1, 1, 0), 343 SND_SOC_DAPM_ADC("Right ADC", "Right Capture", WM8750_PWR1, 2, 0), 344 SND_SOC_DAPM_ADC("Left ADC", "Left Capture", WM8750_PWR1, 3, 0), 345 346 SND_SOC_DAPM_MUX("Left PGA Mux", WM8750_PWR1, 5, 0, 347 &wm8750_left_pga_controls), 348 SND_SOC_DAPM_MUX("Right PGA Mux", WM8750_PWR1, 4, 0, 349 &wm8750_right_pga_controls), 350 SND_SOC_DAPM_MUX("Left Line Mux", SND_SOC_NOPM, 0, 0, 351 &wm8750_left_line_controls), 352 SND_SOC_DAPM_MUX("Right Line Mux", SND_SOC_NOPM, 0, 0, 353 &wm8750_right_line_controls), 354 355 SND_SOC_DAPM_MUX("Out3 Mux", SND_SOC_NOPM, 0, 0, &wm8750_out3_controls), 356 SND_SOC_DAPM_PGA("Out 3", WM8750_PWR2, 1, 0, NULL, 0), 357 SND_SOC_DAPM_PGA("Mono Out 1", WM8750_PWR2, 2, 0, NULL, 0), 358 359 SND_SOC_DAPM_MUX("Differential Mux", SND_SOC_NOPM, 0, 0, 360 &wm8750_diffmux_controls), 361 SND_SOC_DAPM_MUX("Left ADC Mux", SND_SOC_NOPM, 0, 0, 362 &wm8750_monomux_controls), 363 SND_SOC_DAPM_MUX("Right ADC Mux", SND_SOC_NOPM, 0, 0, 364 &wm8750_monomux_controls), 365 366 SND_SOC_DAPM_OUTPUT("LOUT1"), 367 SND_SOC_DAPM_OUTPUT("ROUT1"), 368 SND_SOC_DAPM_OUTPUT("LOUT2"), 369 SND_SOC_DAPM_OUTPUT("ROUT2"), 370 SND_SOC_DAPM_OUTPUT("MONO"), 371 SND_SOC_DAPM_OUTPUT("OUT3"), 372 373 SND_SOC_DAPM_INPUT("LINPUT1"), 374 SND_SOC_DAPM_INPUT("LINPUT2"), 375 SND_SOC_DAPM_INPUT("LINPUT3"), 376 SND_SOC_DAPM_INPUT("RINPUT1"), 377 SND_SOC_DAPM_INPUT("RINPUT2"), 378 SND_SOC_DAPM_INPUT("RINPUT3"), 379 }; 380 381 static const char *audio_map[][3] = { 382 /* left mixer */ 383 {"Left Mixer", "Playback Switch", "Left DAC"}, 384 {"Left Mixer", "Left Bypass Switch", "Left Line Mux"}, 385 {"Left Mixer", "Right Playback Switch", "Right DAC"}, 386 {"Left Mixer", "Right Bypass Switch", "Right Line Mux"}, 387 388 /* right mixer */ 389 {"Right Mixer", "Left Playback Switch", "Left DAC"}, 390 {"Right Mixer", "Left Bypass Switch", "Left Line Mux"}, 391 {"Right Mixer", "Playback Switch", "Right DAC"}, 392 {"Right Mixer", "Right Bypass Switch", "Right Line Mux"}, 393 394 /* left out 1 */ 395 {"Left Out 1", NULL, "Left Mixer"}, 396 {"LOUT1", NULL, "Left Out 1"}, 397 398 /* left out 2 */ 399 {"Left Out 2", NULL, "Left Mixer"}, 400 {"LOUT2", NULL, "Left Out 2"}, 401 402 /* right out 1 */ 403 {"Right Out 1", NULL, "Right Mixer"}, 404 {"ROUT1", NULL, "Right Out 1"}, 405 406 /* right out 2 */ 407 {"Right Out 2", NULL, "Right Mixer"}, 408 {"ROUT2", NULL, "Right Out 2"}, 409 410 /* mono mixer */ 411 {"Mono Mixer", "Left Playback Switch", "Left DAC"}, 412 {"Mono Mixer", "Left Bypass Switch", "Left Line Mux"}, 413 {"Mono Mixer", "Right Playback Switch", "Right DAC"}, 414 {"Mono Mixer", "Right Bypass Switch", "Right Line Mux"}, 415 416 /* mono out */ 417 {"Mono Out 1", NULL, "Mono Mixer"}, 418 {"MONO1", NULL, "Mono Out 1"}, 419 420 /* out 3 */ 421 {"Out3 Mux", "VREF", "VREF"}, 422 {"Out3 Mux", "ROUT1 + Vol", "ROUT1"}, 423 {"Out3 Mux", "ROUT1", "Right Mixer"}, 424 {"Out3 Mux", "MonoOut", "MONO1"}, 425 {"Out 3", NULL, "Out3 Mux"}, 426 {"OUT3", NULL, "Out 3"}, 427 428 /* Left Line Mux */ 429 {"Left Line Mux", "Line 1", "LINPUT1"}, 430 {"Left Line Mux", "Line 2", "LINPUT2"}, 431 {"Left Line Mux", "Line 3", "LINPUT3"}, 432 {"Left Line Mux", "PGA", "Left PGA Mux"}, 433 {"Left Line Mux", "Differential", "Differential Mux"}, 434 435 /* Right Line Mux */ 436 {"Right Line Mux", "Line 1", "RINPUT1"}, 437 {"Right Line Mux", "Line 2", "RINPUT2"}, 438 {"Right Line Mux", "Line 3", "RINPUT3"}, 439 {"Right Line Mux", "PGA", "Right PGA Mux"}, 440 {"Right Line Mux", "Differential", "Differential Mux"}, 441 442 /* Left PGA Mux */ 443 {"Left PGA Mux", "Line 1", "LINPUT1"}, 444 {"Left PGA Mux", "Line 2", "LINPUT2"}, 445 {"Left PGA Mux", "Line 3", "LINPUT3"}, 446 {"Left PGA Mux", "Differential", "Differential Mux"}, 447 448 /* Right PGA Mux */ 449 {"Right PGA Mux", "Line 1", "RINPUT1"}, 450 {"Right PGA Mux", "Line 2", "RINPUT2"}, 451 {"Right PGA Mux", "Line 3", "RINPUT3"}, 452 {"Right PGA Mux", "Differential", "Differential Mux"}, 453 454 /* Differential Mux */ 455 {"Differential Mux", "Line 1", "LINPUT1"}, 456 {"Differential Mux", "Line 1", "RINPUT1"}, 457 {"Differential Mux", "Line 2", "LINPUT2"}, 458 {"Differential Mux", "Line 2", "RINPUT2"}, 459 460 /* Left ADC Mux */ 461 {"Left ADC Mux", "Stereo", "Left PGA Mux"}, 462 {"Left ADC Mux", "Mono (Left)", "Left PGA Mux"}, 463 {"Left ADC Mux", "Digital Mono", "Left PGA Mux"}, 464 465 /* Right ADC Mux */ 466 {"Right ADC Mux", "Stereo", "Right PGA Mux"}, 467 {"Right ADC Mux", "Mono (Right)", "Right PGA Mux"}, 468 {"Right ADC Mux", "Digital Mono", "Right PGA Mux"}, 469 470 /* ADC */ 471 {"Left ADC", NULL, "Left ADC Mux"}, 472 {"Right ADC", NULL, "Right ADC Mux"}, 473 474 /* terminator */ 475 {NULL, NULL, NULL}, 476 }; 477 478 static int wm8750_add_widgets(struct snd_soc_codec *codec) 479 { 480 int i; 481 482 for(i = 0; i < ARRAY_SIZE(wm8750_dapm_widgets); i++) { 483 snd_soc_dapm_new_control(codec, &wm8750_dapm_widgets[i]); 484 } 485 486 /* set up audio path audio_mapnects */ 487 for(i = 0; audio_map[i][0] != NULL; i++) { 488 snd_soc_dapm_connect_input(codec, audio_map[i][0], 489 audio_map[i][1], audio_map[i][2]); 490 } 491 492 snd_soc_dapm_new_widgets(codec); 493 return 0; 494 } 495 496 struct _coeff_div { 497 u32 mclk; 498 u32 rate; 499 u16 fs; 500 u8 sr:5; 501 u8 usb:1; 502 }; 503 504 /* codec hifi mclk clock divider coefficients */ 505 static const struct _coeff_div coeff_div[] = { 506 /* 8k */ 507 {12288000, 8000, 1536, 0x6, 0x0}, 508 {11289600, 8000, 1408, 0x16, 0x0}, 509 {18432000, 8000, 2304, 0x7, 0x0}, 510 {16934400, 8000, 2112, 0x17, 0x0}, 511 {12000000, 8000, 1500, 0x6, 0x1}, 512 513 /* 11.025k */ 514 {11289600, 11025, 1024, 0x18, 0x0}, 515 {16934400, 11025, 1536, 0x19, 0x0}, 516 {12000000, 11025, 1088, 0x19, 0x1}, 517 518 /* 16k */ 519 {12288000, 16000, 768, 0xa, 0x0}, 520 {18432000, 16000, 1152, 0xb, 0x0}, 521 {12000000, 16000, 750, 0xa, 0x1}, 522 523 /* 22.05k */ 524 {11289600, 22050, 512, 0x1a, 0x0}, 525 {16934400, 22050, 768, 0x1b, 0x0}, 526 {12000000, 22050, 544, 0x1b, 0x1}, 527 528 /* 32k */ 529 {12288000, 32000, 384, 0xc, 0x0}, 530 {18432000, 32000, 576, 0xd, 0x0}, 531 {12000000, 32000, 375, 0xa, 0x1}, 532 533 /* 44.1k */ 534 {11289600, 44100, 256, 0x10, 0x0}, 535 {16934400, 44100, 384, 0x11, 0x0}, 536 {12000000, 44100, 272, 0x11, 0x1}, 537 538 /* 48k */ 539 {12288000, 48000, 256, 0x0, 0x0}, 540 {18432000, 48000, 384, 0x1, 0x0}, 541 {12000000, 48000, 250, 0x0, 0x1}, 542 543 /* 88.2k */ 544 {11289600, 88200, 128, 0x1e, 0x0}, 545 {16934400, 88200, 192, 0x1f, 0x0}, 546 {12000000, 88200, 136, 0x1f, 0x1}, 547 548 /* 96k */ 549 {12288000, 96000, 128, 0xe, 0x0}, 550 {18432000, 96000, 192, 0xf, 0x0}, 551 {12000000, 96000, 125, 0xe, 0x1}, 552 }; 553 554 static inline int get_coeff(int mclk, int rate) 555 { 556 int i; 557 558 for (i = 0; i < ARRAY_SIZE(coeff_div); i++) { 559 if (coeff_div[i].rate == rate && coeff_div[i].mclk == mclk) 560 return i; 561 } 562 563 printk(KERN_ERR "wm8750: could not get coeff for mclk %d @ rate %d\n", 564 mclk, rate); 565 return -EINVAL; 566 } 567 568 static int wm8750_set_dai_sysclk(struct snd_soc_codec_dai *codec_dai, 569 int clk_id, unsigned int freq, int dir) 570 { 571 struct snd_soc_codec *codec = codec_dai->codec; 572 struct wm8750_priv *wm8750 = codec->private_data; 573 574 switch (freq) { 575 case 11289600: 576 case 12000000: 577 case 12288000: 578 case 16934400: 579 case 18432000: 580 wm8750->sysclk = freq; 581 return 0; 582 } 583 return -EINVAL; 584 } 585 586 static int wm8750_set_dai_fmt(struct snd_soc_codec_dai *codec_dai, 587 unsigned int fmt) 588 { 589 struct snd_soc_codec *codec = codec_dai->codec; 590 u16 iface = 0; 591 592 /* set master/slave audio interface */ 593 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) { 594 case SND_SOC_DAIFMT_CBM_CFM: 595 iface = 0x0040; 596 break; 597 case SND_SOC_DAIFMT_CBS_CFS: 598 break; 599 default: 600 return -EINVAL; 601 } 602 603 /* interface format */ 604 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) { 605 case SND_SOC_DAIFMT_I2S: 606 iface |= 0x0002; 607 break; 608 case SND_SOC_DAIFMT_RIGHT_J: 609 break; 610 case SND_SOC_DAIFMT_LEFT_J: 611 iface |= 0x0001; 612 break; 613 case SND_SOC_DAIFMT_DSP_A: 614 iface |= 0x0003; 615 break; 616 case SND_SOC_DAIFMT_DSP_B: 617 iface |= 0x0013; 618 break; 619 default: 620 return -EINVAL; 621 } 622 623 /* clock inversion */ 624 switch (fmt & SND_SOC_DAIFMT_INV_MASK) { 625 case SND_SOC_DAIFMT_NB_NF: 626 break; 627 case SND_SOC_DAIFMT_IB_IF: 628 iface |= 0x0090; 629 break; 630 case SND_SOC_DAIFMT_IB_NF: 631 iface |= 0x0080; 632 break; 633 case SND_SOC_DAIFMT_NB_IF: 634 iface |= 0x0010; 635 break; 636 default: 637 return -EINVAL; 638 } 639 640 wm8750_write(codec, WM8750_IFACE, iface); 641 return 0; 642 } 643 644 static int wm8750_pcm_hw_params(struct snd_pcm_substream *substream, 645 struct snd_pcm_hw_params *params) 646 { 647 struct snd_soc_pcm_runtime *rtd = substream->private_data; 648 struct snd_soc_device *socdev = rtd->socdev; 649 struct snd_soc_codec *codec = socdev->codec; 650 struct wm8750_priv *wm8750 = codec->private_data; 651 u16 iface = wm8750_read_reg_cache(codec, WM8750_IFACE) & 0x1f3; 652 u16 srate = wm8750_read_reg_cache(codec, WM8750_SRATE) & 0x1c0; 653 int coeff = get_coeff(wm8750->sysclk, params_rate(params)); 654 655 /* bit size */ 656 switch (params_format(params)) { 657 case SNDRV_PCM_FORMAT_S16_LE: 658 break; 659 case SNDRV_PCM_FORMAT_S20_3LE: 660 iface |= 0x0004; 661 break; 662 case SNDRV_PCM_FORMAT_S24_LE: 663 iface |= 0x0008; 664 break; 665 case SNDRV_PCM_FORMAT_S32_LE: 666 iface |= 0x000c; 667 break; 668 } 669 670 /* set iface & srate */ 671 wm8750_write(codec, WM8750_IFACE, iface); 672 if (coeff >= 0) 673 wm8750_write(codec, WM8750_SRATE, srate | 674 (coeff_div[coeff].sr << 1) | coeff_div[coeff].usb); 675 676 return 0; 677 } 678 679 static int wm8750_mute(struct snd_soc_codec_dai *dai, int mute) 680 { 681 struct snd_soc_codec *codec = dai->codec; 682 u16 mute_reg = wm8750_read_reg_cache(codec, WM8750_ADCDAC) & 0xfff7; 683 684 if (mute) 685 wm8750_write(codec, WM8750_ADCDAC, mute_reg | 0x8); 686 else 687 wm8750_write(codec, WM8750_ADCDAC, mute_reg); 688 return 0; 689 } 690 691 static int wm8750_dapm_event(struct snd_soc_codec *codec, int event) 692 { 693 u16 pwr_reg = wm8750_read_reg_cache(codec, WM8750_PWR1) & 0xfe3e; 694 695 switch (event) { 696 case SNDRV_CTL_POWER_D0: /* full On */ 697 /* set vmid to 50k and unmute dac */ 698 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x00c0); 699 break; 700 case SNDRV_CTL_POWER_D1: /* partial On */ 701 case SNDRV_CTL_POWER_D2: /* partial On */ 702 /* set vmid to 5k for quick power up */ 703 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x01c1); 704 break; 705 case SNDRV_CTL_POWER_D3hot: /* Off, with power */ 706 /* mute dac and set vmid to 500k, enable VREF */ 707 wm8750_write(codec, WM8750_PWR1, pwr_reg | 0x0141); 708 break; 709 case SNDRV_CTL_POWER_D3cold: /* Off, without power */ 710 wm8750_write(codec, WM8750_PWR1, 0x0001); 711 break; 712 } 713 codec->dapm_state = event; 714 return 0; 715 } 716 717 #define WM8750_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\ 718 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 | SNDRV_PCM_RATE_44100 | \ 719 SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000) 720 721 #define WM8750_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\ 722 SNDRV_PCM_FMTBIT_S24_LE) 723 724 struct snd_soc_codec_dai wm8750_dai = { 725 .name = "WM8750", 726 .playback = { 727 .stream_name = "Playback", 728 .channels_min = 1, 729 .channels_max = 2, 730 .rates = WM8750_RATES, 731 .formats = WM8750_FORMATS,}, 732 .capture = { 733 .stream_name = "Capture", 734 .channels_min = 1, 735 .channels_max = 2, 736 .rates = WM8750_RATES, 737 .formats = WM8750_FORMATS,}, 738 .ops = { 739 .hw_params = wm8750_pcm_hw_params, 740 }, 741 .dai_ops = { 742 .digital_mute = wm8750_mute, 743 .set_fmt = wm8750_set_dai_fmt, 744 .set_sysclk = wm8750_set_dai_sysclk, 745 }, 746 }; 747 EXPORT_SYMBOL_GPL(wm8750_dai); 748 749 static void wm8750_work(struct work_struct *work) 750 { 751 struct snd_soc_codec *codec = 752 container_of(work, struct snd_soc_codec, delayed_work.work); 753 wm8750_dapm_event(codec, codec->dapm_state); 754 } 755 756 static int wm8750_suspend(struct platform_device *pdev, pm_message_t state) 757 { 758 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 759 struct snd_soc_codec *codec = socdev->codec; 760 761 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold); 762 return 0; 763 } 764 765 static int wm8750_resume(struct platform_device *pdev) 766 { 767 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 768 struct snd_soc_codec *codec = socdev->codec; 769 int i; 770 u8 data[2]; 771 u16 *cache = codec->reg_cache; 772 773 /* Sync reg_cache with the hardware */ 774 for (i = 0; i < ARRAY_SIZE(wm8750_reg); i++) { 775 if (i == WM8750_RESET) 776 continue; 777 data[0] = (i << 1) | ((cache[i] >> 8) & 0x0001); 778 data[1] = cache[i] & 0x00ff; 779 codec->hw_write(codec->control_data, data, 2); 780 } 781 782 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3hot); 783 784 /* charge wm8750 caps */ 785 if (codec->suspend_dapm_state == SNDRV_CTL_POWER_D0) { 786 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2); 787 codec->dapm_state = SNDRV_CTL_POWER_D0; 788 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000)); 789 } 790 791 return 0; 792 } 793 794 /* 795 * initialise the WM8750 driver 796 * register the mixer and dsp interfaces with the kernel 797 */ 798 static int wm8750_init(struct snd_soc_device *socdev) 799 { 800 struct snd_soc_codec *codec = socdev->codec; 801 int reg, ret = 0; 802 803 codec->name = "WM8750"; 804 codec->owner = THIS_MODULE; 805 codec->read = wm8750_read_reg_cache; 806 codec->write = wm8750_write; 807 codec->dapm_event = wm8750_dapm_event; 808 codec->dai = &wm8750_dai; 809 codec->num_dai = 1; 810 codec->reg_cache_size = sizeof(wm8750_reg); 811 codec->reg_cache = kmemdup(wm8750_reg, sizeof(wm8750_reg), GFP_KERNEL); 812 if (codec->reg_cache == NULL) 813 return -ENOMEM; 814 815 wm8750_reset(codec); 816 817 /* register pcms */ 818 ret = snd_soc_new_pcms(socdev, SNDRV_DEFAULT_IDX1, SNDRV_DEFAULT_STR1); 819 if (ret < 0) { 820 printk(KERN_ERR "wm8750: failed to create pcms\n"); 821 goto pcm_err; 822 } 823 824 /* charge output caps */ 825 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D2); 826 codec->dapm_state = SNDRV_CTL_POWER_D3hot; 827 schedule_delayed_work(&codec->delayed_work, msecs_to_jiffies(1000)); 828 829 /* set the update bits */ 830 reg = wm8750_read_reg_cache(codec, WM8750_LDAC); 831 wm8750_write(codec, WM8750_LDAC, reg | 0x0100); 832 reg = wm8750_read_reg_cache(codec, WM8750_RDAC); 833 wm8750_write(codec, WM8750_RDAC, reg | 0x0100); 834 reg = wm8750_read_reg_cache(codec, WM8750_LOUT1V); 835 wm8750_write(codec, WM8750_LOUT1V, reg | 0x0100); 836 reg = wm8750_read_reg_cache(codec, WM8750_ROUT1V); 837 wm8750_write(codec, WM8750_ROUT1V, reg | 0x0100); 838 reg = wm8750_read_reg_cache(codec, WM8750_LOUT2V); 839 wm8750_write(codec, WM8750_LOUT2V, reg | 0x0100); 840 reg = wm8750_read_reg_cache(codec, WM8750_ROUT2V); 841 wm8750_write(codec, WM8750_ROUT2V, reg | 0x0100); 842 reg = wm8750_read_reg_cache(codec, WM8750_LINVOL); 843 wm8750_write(codec, WM8750_LINVOL, reg | 0x0100); 844 reg = wm8750_read_reg_cache(codec, WM8750_RINVOL); 845 wm8750_write(codec, WM8750_RINVOL, reg | 0x0100); 846 847 wm8750_add_controls(codec); 848 wm8750_add_widgets(codec); 849 ret = snd_soc_register_card(socdev); 850 if (ret < 0) { 851 printk(KERN_ERR "wm8750: failed to register card\n"); 852 goto card_err; 853 } 854 return ret; 855 856 card_err: 857 snd_soc_free_pcms(socdev); 858 snd_soc_dapm_free(socdev); 859 pcm_err: 860 kfree(codec->reg_cache); 861 return ret; 862 } 863 864 /* If the i2c layer weren't so broken, we could pass this kind of data 865 around */ 866 static struct snd_soc_device *wm8750_socdev; 867 868 #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE) 869 870 /* 871 * WM8731 2 wire address is determined by GPIO5 872 * state during powerup. 873 * low = 0x1a 874 * high = 0x1b 875 */ 876 static unsigned short normal_i2c[] = { 0, I2C_CLIENT_END }; 877 878 /* Magic definition of all other variables and things */ 879 I2C_CLIENT_INSMOD; 880 881 static struct i2c_driver wm8750_i2c_driver; 882 static struct i2c_client client_template; 883 884 static int wm8750_codec_probe(struct i2c_adapter *adap, int addr, int kind) 885 { 886 struct snd_soc_device *socdev = wm8750_socdev; 887 struct wm8750_setup_data *setup = socdev->codec_data; 888 struct snd_soc_codec *codec = socdev->codec; 889 struct i2c_client *i2c; 890 int ret; 891 892 if (addr != setup->i2c_address) 893 return -ENODEV; 894 895 client_template.adapter = adap; 896 client_template.addr = addr; 897 898 i2c = kmemdup(&client_template, sizeof(client_template), GFP_KERNEL); 899 if (i2c == NULL) { 900 kfree(codec); 901 return -ENOMEM; 902 } 903 i2c_set_clientdata(i2c, codec); 904 codec->control_data = i2c; 905 906 ret = i2c_attach_client(i2c); 907 if (ret < 0) { 908 err("failed to attach codec at addr %x\n", addr); 909 goto err; 910 } 911 912 ret = wm8750_init(socdev); 913 if (ret < 0) { 914 err("failed to initialise WM8750\n"); 915 goto err; 916 } 917 return ret; 918 919 err: 920 kfree(codec); 921 kfree(i2c); 922 return ret; 923 } 924 925 static int wm8750_i2c_detach(struct i2c_client *client) 926 { 927 struct snd_soc_codec *codec = i2c_get_clientdata(client); 928 i2c_detach_client(client); 929 kfree(codec->reg_cache); 930 kfree(client); 931 return 0; 932 } 933 934 static int wm8750_i2c_attach(struct i2c_adapter *adap) 935 { 936 return i2c_probe(adap, &addr_data, wm8750_codec_probe); 937 } 938 939 /* corgi i2c codec control layer */ 940 static struct i2c_driver wm8750_i2c_driver = { 941 .driver = { 942 .name = "WM8750 I2C Codec", 943 .owner = THIS_MODULE, 944 }, 945 .id = I2C_DRIVERID_WM8750, 946 .attach_adapter = wm8750_i2c_attach, 947 .detach_client = wm8750_i2c_detach, 948 .command = NULL, 949 }; 950 951 static struct i2c_client client_template = { 952 .name = "WM8750", 953 .driver = &wm8750_i2c_driver, 954 }; 955 #endif 956 957 static int wm8750_probe(struct platform_device *pdev) 958 { 959 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 960 struct wm8750_setup_data *setup = socdev->codec_data; 961 struct snd_soc_codec *codec; 962 struct wm8750_priv *wm8750; 963 int ret = 0; 964 965 info("WM8750 Audio Codec %s", WM8750_VERSION); 966 codec = kzalloc(sizeof(struct snd_soc_codec), GFP_KERNEL); 967 if (codec == NULL) 968 return -ENOMEM; 969 970 wm8750 = kzalloc(sizeof(struct wm8750_priv), GFP_KERNEL); 971 if (wm8750 == NULL) { 972 kfree(codec); 973 return -ENOMEM; 974 } 975 976 codec->private_data = wm8750; 977 socdev->codec = codec; 978 mutex_init(&codec->mutex); 979 INIT_LIST_HEAD(&codec->dapm_widgets); 980 INIT_LIST_HEAD(&codec->dapm_paths); 981 wm8750_socdev = socdev; 982 INIT_DELAYED_WORK(&codec->delayed_work, wm8750_work); 983 984 #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE) 985 if (setup->i2c_address) { 986 normal_i2c[0] = setup->i2c_address; 987 codec->hw_write = (hw_write_t)i2c_master_send; 988 ret = i2c_add_driver(&wm8750_i2c_driver); 989 if (ret != 0) 990 printk(KERN_ERR "can't add i2c driver"); 991 } 992 #else 993 /* Add other interfaces here */ 994 #endif 995 996 return ret; 997 } 998 999 /* 1000 * This function forces any delayed work to be queued and run. 1001 */ 1002 static int run_delayed_work(struct delayed_work *dwork) 1003 { 1004 int ret; 1005 1006 /* cancel any work waiting to be queued. */ 1007 ret = cancel_delayed_work(dwork); 1008 1009 /* if there was any work waiting then we run it now and 1010 * wait for it's completion */ 1011 if (ret) { 1012 schedule_delayed_work(dwork, 0); 1013 flush_scheduled_work(); 1014 } 1015 return ret; 1016 } 1017 1018 /* power down chip */ 1019 static int wm8750_remove(struct platform_device *pdev) 1020 { 1021 struct snd_soc_device *socdev = platform_get_drvdata(pdev); 1022 struct snd_soc_codec *codec = socdev->codec; 1023 1024 if (codec->control_data) 1025 wm8750_dapm_event(codec, SNDRV_CTL_POWER_D3cold); 1026 run_delayed_work(&codec->delayed_work); 1027 snd_soc_free_pcms(socdev); 1028 snd_soc_dapm_free(socdev); 1029 #if defined (CONFIG_I2C) || defined (CONFIG_I2C_MODULE) 1030 i2c_del_driver(&wm8750_i2c_driver); 1031 #endif 1032 kfree(codec->private_data); 1033 kfree(codec); 1034 1035 return 0; 1036 } 1037 1038 struct snd_soc_codec_device soc_codec_dev_wm8750 = { 1039 .probe = wm8750_probe, 1040 .remove = wm8750_remove, 1041 .suspend = wm8750_suspend, 1042 .resume = wm8750_resume, 1043 }; 1044 1045 EXPORT_SYMBOL_GPL(soc_codec_dev_wm8750); 1046 1047 MODULE_DESCRIPTION("ASoC WM8750 driver"); 1048 MODULE_AUTHOR("Liam Girdwood"); 1049 MODULE_LICENSE("GPL"); 1050