1992bee40SIan Lartey /* 2992bee40SIan Lartey * wm8741.h -- WM8423 ASoC driver 3992bee40SIan Lartey * 4992bee40SIan Lartey * Copyright 2010 Wolfson Microelectronics, plc 5992bee40SIan Lartey * 6992bee40SIan Lartey * Author: Ian Lartey <ian@opensource.wolfsonmicro.com> 7992bee40SIan Lartey * 8992bee40SIan Lartey * Based on wm8753.h 9992bee40SIan Lartey * 10992bee40SIan Lartey * This program is free software; you can redistribute it and/or modify 11992bee40SIan Lartey * it under the terms of the GNU General Public License version 2 as 12992bee40SIan Lartey * published by the Free Software Foundation. 13992bee40SIan Lartey */ 14992bee40SIan Lartey 15992bee40SIan Lartey #ifndef _WM8741_H 16992bee40SIan Lartey #define _WM8741_H 17992bee40SIan Lartey 18992bee40SIan Lartey /* 19992bee40SIan Lartey * Register values. 20992bee40SIan Lartey */ 21992bee40SIan Lartey #define WM8741_DACLLSB_ATTENUATION 0x00 22992bee40SIan Lartey #define WM8741_DACLMSB_ATTENUATION 0x01 23992bee40SIan Lartey #define WM8741_DACRLSB_ATTENUATION 0x02 24992bee40SIan Lartey #define WM8741_DACRMSB_ATTENUATION 0x03 25992bee40SIan Lartey #define WM8741_VOLUME_CONTROL 0x04 26992bee40SIan Lartey #define WM8741_FORMAT_CONTROL 0x05 27992bee40SIan Lartey #define WM8741_FILTER_CONTROL 0x06 28992bee40SIan Lartey #define WM8741_MODE_CONTROL_1 0x07 29992bee40SIan Lartey #define WM8741_MODE_CONTROL_2 0x08 30992bee40SIan Lartey #define WM8741_RESET 0x09 31992bee40SIan Lartey #define WM8741_ADDITIONAL_CONTROL_1 0x20 32992bee40SIan Lartey 33992bee40SIan Lartey #define WM8741_REGISTER_COUNT 11 34992bee40SIan Lartey #define WM8741_MAX_REGISTER 0x20 35992bee40SIan Lartey 36992bee40SIan Lartey /* 37992bee40SIan Lartey * Field Definitions. 38992bee40SIan Lartey */ 39992bee40SIan Lartey 40992bee40SIan Lartey /* 41992bee40SIan Lartey * R0 (0x00) - DACLLSB_ATTENUATION 42992bee40SIan Lartey */ 43992bee40SIan Lartey #define WM8741_UPDATELL 0x0020 /* UPDATELL */ 44992bee40SIan Lartey #define WM8741_UPDATELL_MASK 0x0020 /* UPDATELL */ 45992bee40SIan Lartey #define WM8741_UPDATELL_SHIFT 5 /* UPDATELL */ 46992bee40SIan Lartey #define WM8741_UPDATELL_WIDTH 1 /* UPDATELL */ 47992bee40SIan Lartey #define WM8741_LAT_4_0_MASK 0x001F /* LAT[4:0] - [4:0] */ 48992bee40SIan Lartey #define WM8741_LAT_4_0_SHIFT 0 /* LAT[4:0] - [4:0] */ 49992bee40SIan Lartey #define WM8741_LAT_4_0_WIDTH 5 /* LAT[4:0] - [4:0] */ 50992bee40SIan Lartey 51992bee40SIan Lartey /* 52992bee40SIan Lartey * R1 (0x01) - DACLMSB_ATTENUATION 53992bee40SIan Lartey */ 54992bee40SIan Lartey #define WM8741_UPDATELM 0x0020 /* UPDATELM */ 55992bee40SIan Lartey #define WM8741_UPDATELM_MASK 0x0020 /* UPDATELM */ 56992bee40SIan Lartey #define WM8741_UPDATELM_SHIFT 5 /* UPDATELM */ 57992bee40SIan Lartey #define WM8741_UPDATELM_WIDTH 1 /* UPDATELM */ 58992bee40SIan Lartey #define WM8741_LAT_9_5_0_MASK 0x001F /* LAT[9:5] - [4:0] */ 59992bee40SIan Lartey #define WM8741_LAT_9_5_0_SHIFT 0 /* LAT[9:5] - [4:0] */ 60992bee40SIan Lartey #define WM8741_LAT_9_5_0_WIDTH 5 /* LAT[9:5] - [4:0] */ 61992bee40SIan Lartey 62992bee40SIan Lartey /* 63992bee40SIan Lartey * R2 (0x02) - DACRLSB_ATTENUATION 64992bee40SIan Lartey */ 65992bee40SIan Lartey #define WM8741_UPDATERL 0x0020 /* UPDATERL */ 66992bee40SIan Lartey #define WM8741_UPDATERL_MASK 0x0020 /* UPDATERL */ 67992bee40SIan Lartey #define WM8741_UPDATERL_SHIFT 5 /* UPDATERL */ 68992bee40SIan Lartey #define WM8741_UPDATERL_WIDTH 1 /* UPDATERL */ 69992bee40SIan Lartey #define WM8741_RAT_4_0_MASK 0x001F /* RAT[4:0] - [4:0] */ 70992bee40SIan Lartey #define WM8741_RAT_4_0_SHIFT 0 /* RAT[4:0] - [4:0] */ 71992bee40SIan Lartey #define WM8741_RAT_4_0_WIDTH 5 /* RAT[4:0] - [4:0] */ 72992bee40SIan Lartey 73992bee40SIan Lartey /* 74992bee40SIan Lartey * R3 (0x03) - DACRMSB_ATTENUATION 75992bee40SIan Lartey */ 76992bee40SIan Lartey #define WM8741_UPDATERM 0x0020 /* UPDATERM */ 77992bee40SIan Lartey #define WM8741_UPDATERM_MASK 0x0020 /* UPDATERM */ 78992bee40SIan Lartey #define WM8741_UPDATERM_SHIFT 5 /* UPDATERM */ 79992bee40SIan Lartey #define WM8741_UPDATERM_WIDTH 1 /* UPDATERM */ 80992bee40SIan Lartey #define WM8741_RAT_9_5_0_MASK 0x001F /* RAT[9:5] - [4:0] */ 81992bee40SIan Lartey #define WM8741_RAT_9_5_0_SHIFT 0 /* RAT[9:5] - [4:0] */ 82992bee40SIan Lartey #define WM8741_RAT_9_5_0_WIDTH 5 /* RAT[9:5] - [4:0] */ 83992bee40SIan Lartey 84992bee40SIan Lartey /* 85992bee40SIan Lartey * R4 (0x04) - VOLUME_CONTROL 86992bee40SIan Lartey */ 87992bee40SIan Lartey #define WM8741_AMUTE 0x0080 /* AMUTE */ 88992bee40SIan Lartey #define WM8741_AMUTE_MASK 0x0080 /* AMUTE */ 89992bee40SIan Lartey #define WM8741_AMUTE_SHIFT 7 /* AMUTE */ 90992bee40SIan Lartey #define WM8741_AMUTE_WIDTH 1 /* AMUTE */ 91992bee40SIan Lartey #define WM8741_ZFLAG_MASK 0x0060 /* ZFLAG - [6:5] */ 92992bee40SIan Lartey #define WM8741_ZFLAG_SHIFT 5 /* ZFLAG - [6:5] */ 93992bee40SIan Lartey #define WM8741_ZFLAG_WIDTH 2 /* ZFLAG - [6:5] */ 94992bee40SIan Lartey #define WM8741_IZD 0x0010 /* IZD */ 95992bee40SIan Lartey #define WM8741_IZD_MASK 0x0010 /* IZD */ 96992bee40SIan Lartey #define WM8741_IZD_SHIFT 4 /* IZD */ 97992bee40SIan Lartey #define WM8741_IZD_WIDTH 1 /* IZD */ 98992bee40SIan Lartey #define WM8741_SOFT 0x0008 /* SOFT MUTE */ 99992bee40SIan Lartey #define WM8741_SOFT_MASK 0x0008 /* SOFT MUTE */ 100992bee40SIan Lartey #define WM8741_SOFT_SHIFT 3 /* SOFT MUTE */ 101992bee40SIan Lartey #define WM8741_SOFT_WIDTH 1 /* SOFT MUTE */ 102992bee40SIan Lartey #define WM8741_ATC 0x0004 /* ATC */ 103992bee40SIan Lartey #define WM8741_ATC_MASK 0x0004 /* ATC */ 104992bee40SIan Lartey #define WM8741_ATC_SHIFT 2 /* ATC */ 105992bee40SIan Lartey #define WM8741_ATC_WIDTH 1 /* ATC */ 106992bee40SIan Lartey #define WM8741_ATT2DB 0x0002 /* ATT2DB */ 107992bee40SIan Lartey #define WM8741_ATT2DB_MASK 0x0002 /* ATT2DB */ 108992bee40SIan Lartey #define WM8741_ATT2DB_SHIFT 1 /* ATT2DB */ 109992bee40SIan Lartey #define WM8741_ATT2DB_WIDTH 1 /* ATT2DB */ 110992bee40SIan Lartey #define WM8741_VOL_RAMP 0x0001 /* VOL_RAMP */ 111992bee40SIan Lartey #define WM8741_VOL_RAMP_MASK 0x0001 /* VOL_RAMP */ 112992bee40SIan Lartey #define WM8741_VOL_RAMP_SHIFT 0 /* VOL_RAMP */ 113992bee40SIan Lartey #define WM8741_VOL_RAMP_WIDTH 1 /* VOL_RAMP */ 114992bee40SIan Lartey 115992bee40SIan Lartey /* 116992bee40SIan Lartey * R5 (0x05) - FORMAT_CONTROL 117992bee40SIan Lartey */ 118992bee40SIan Lartey #define WM8741_PWDN 0x0080 /* PWDN */ 119992bee40SIan Lartey #define WM8741_PWDN_MASK 0x0080 /* PWDN */ 120992bee40SIan Lartey #define WM8741_PWDN_SHIFT 7 /* PWDN */ 121992bee40SIan Lartey #define WM8741_PWDN_WIDTH 1 /* PWDN */ 122992bee40SIan Lartey #define WM8741_REV 0x0040 /* REV */ 123992bee40SIan Lartey #define WM8741_REV_MASK 0x0040 /* REV */ 124992bee40SIan Lartey #define WM8741_REV_SHIFT 6 /* REV */ 125992bee40SIan Lartey #define WM8741_REV_WIDTH 1 /* REV */ 126992bee40SIan Lartey #define WM8741_BCP 0x0020 /* BCP */ 127992bee40SIan Lartey #define WM8741_BCP_MASK 0x0020 /* BCP */ 128992bee40SIan Lartey #define WM8741_BCP_SHIFT 5 /* BCP */ 129992bee40SIan Lartey #define WM8741_BCP_WIDTH 1 /* BCP */ 130992bee40SIan Lartey #define WM8741_LRP 0x0010 /* LRP */ 131992bee40SIan Lartey #define WM8741_LRP_MASK 0x0010 /* LRP */ 132992bee40SIan Lartey #define WM8741_LRP_SHIFT 4 /* LRP */ 133992bee40SIan Lartey #define WM8741_LRP_WIDTH 1 /* LRP */ 134992bee40SIan Lartey #define WM8741_FMT_MASK 0x000C /* FMT - [3:2] */ 135992bee40SIan Lartey #define WM8741_FMT_SHIFT 2 /* FMT - [3:2] */ 136992bee40SIan Lartey #define WM8741_FMT_WIDTH 2 /* FMT - [3:2] */ 137992bee40SIan Lartey #define WM8741_IWL_MASK 0x0003 /* IWL - [1:0] */ 138992bee40SIan Lartey #define WM8741_IWL_SHIFT 0 /* IWL - [1:0] */ 139992bee40SIan Lartey #define WM8741_IWL_WIDTH 2 /* IWL - [1:0] */ 140992bee40SIan Lartey 141992bee40SIan Lartey /* 142992bee40SIan Lartey * R6 (0x06) - FILTER_CONTROL 143992bee40SIan Lartey */ 144992bee40SIan Lartey #define WM8741_ZFLAG_HI 0x0080 /* ZFLAG_HI */ 145992bee40SIan Lartey #define WM8741_ZFLAG_HI_MASK 0x0080 /* ZFLAG_HI */ 146992bee40SIan Lartey #define WM8741_ZFLAG_HI_SHIFT 7 /* ZFLAG_HI */ 147992bee40SIan Lartey #define WM8741_ZFLAG_HI_WIDTH 1 /* ZFLAG_HI */ 148992bee40SIan Lartey #define WM8741_DEEMPH_MASK 0x0060 /* DEEMPH - [6:5] */ 149992bee40SIan Lartey #define WM8741_DEEMPH_SHIFT 5 /* DEEMPH - [6:5] */ 150992bee40SIan Lartey #define WM8741_DEEMPH_WIDTH 2 /* DEEMPH - [6:5] */ 151992bee40SIan Lartey #define WM8741_DSDFILT_MASK 0x0018 /* DSDFILT - [4:3] */ 152992bee40SIan Lartey #define WM8741_DSDFILT_SHIFT 3 /* DSDFILT - [4:3] */ 153992bee40SIan Lartey #define WM8741_DSDFILT_WIDTH 2 /* DSDFILT - [4:3] */ 154992bee40SIan Lartey #define WM8741_FIRSEL_MASK 0x0007 /* FIRSEL - [2:0] */ 155992bee40SIan Lartey #define WM8741_FIRSEL_SHIFT 0 /* FIRSEL - [2:0] */ 156992bee40SIan Lartey #define WM8741_FIRSEL_WIDTH 3 /* FIRSEL - [2:0] */ 157992bee40SIan Lartey 158992bee40SIan Lartey /* 159992bee40SIan Lartey * R7 (0x07) - MODE_CONTROL_1 160992bee40SIan Lartey */ 161992bee40SIan Lartey #define WM8741_MODE8X 0x0080 /* MODE8X */ 162992bee40SIan Lartey #define WM8741_MODE8X_MASK 0x0080 /* MODE8X */ 163992bee40SIan Lartey #define WM8741_MODE8X_SHIFT 7 /* MODE8X */ 164992bee40SIan Lartey #define WM8741_MODE8X_WIDTH 1 /* MODE8X */ 165992bee40SIan Lartey #define WM8741_OSR_MASK 0x0060 /* OSR - [6:5] */ 166992bee40SIan Lartey #define WM8741_OSR_SHIFT 5 /* OSR - [6:5] */ 167992bee40SIan Lartey #define WM8741_OSR_WIDTH 2 /* OSR - [6:5] */ 168992bee40SIan Lartey #define WM8741_SR_MASK 0x001C /* SR - [4:2] */ 169992bee40SIan Lartey #define WM8741_SR_SHIFT 2 /* SR - [4:2] */ 170992bee40SIan Lartey #define WM8741_SR_WIDTH 3 /* SR - [4:2] */ 171992bee40SIan Lartey #define WM8741_MODESEL_MASK 0x0003 /* MODESEL - [1:0] */ 172992bee40SIan Lartey #define WM8741_MODESEL_SHIFT 0 /* MODESEL - [1:0] */ 173992bee40SIan Lartey #define WM8741_MODESEL_WIDTH 2 /* MODESEL - [1:0] */ 174992bee40SIan Lartey 175992bee40SIan Lartey /* 176992bee40SIan Lartey * R8 (0x08) - MODE_CONTROL_2 177992bee40SIan Lartey */ 178992bee40SIan Lartey #define WM8741_DSD_GAIN 0x0040 /* DSD_GAIN */ 179992bee40SIan Lartey #define WM8741_DSD_GAIN_MASK 0x0040 /* DSD_GAIN */ 180992bee40SIan Lartey #define WM8741_DSD_GAIN_SHIFT 6 /* DSD_GAIN */ 181992bee40SIan Lartey #define WM8741_DSD_GAIN_WIDTH 1 /* DSD_GAIN */ 182992bee40SIan Lartey #define WM8741_SDOUT 0x0020 /* SDOUT */ 183992bee40SIan Lartey #define WM8741_SDOUT_MASK 0x0020 /* SDOUT */ 184992bee40SIan Lartey #define WM8741_SDOUT_SHIFT 5 /* SDOUT */ 185992bee40SIan Lartey #define WM8741_SDOUT_WIDTH 1 /* SDOUT */ 186992bee40SIan Lartey #define WM8741_DOUT 0x0010 /* DOUT */ 187992bee40SIan Lartey #define WM8741_DOUT_MASK 0x0010 /* DOUT */ 188992bee40SIan Lartey #define WM8741_DOUT_SHIFT 4 /* DOUT */ 189992bee40SIan Lartey #define WM8741_DOUT_WIDTH 1 /* DOUT */ 190992bee40SIan Lartey #define WM8741_DIFF_MASK 0x000C /* DIFF - [3:2] */ 191992bee40SIan Lartey #define WM8741_DIFF_SHIFT 2 /* DIFF - [3:2] */ 192992bee40SIan Lartey #define WM8741_DIFF_WIDTH 2 /* DIFF - [3:2] */ 193992bee40SIan Lartey #define WM8741_DITHER_MASK 0x0003 /* DITHER - [1:0] */ 194992bee40SIan Lartey #define WM8741_DITHER_SHIFT 0 /* DITHER - [1:0] */ 195992bee40SIan Lartey #define WM8741_DITHER_WIDTH 2 /* DITHER - [1:0] */ 196992bee40SIan Lartey 197992bee40SIan Lartey /* 198992bee40SIan Lartey * R32 (0x20) - ADDITONAL_CONTROL_1 199992bee40SIan Lartey */ 200992bee40SIan Lartey #define WM8741_DSD_LEVEL 0x0002 /* DSD_LEVEL */ 201992bee40SIan Lartey #define WM8741_DSD_LEVEL_MASK 0x0002 /* DSD_LEVEL */ 202992bee40SIan Lartey #define WM8741_DSD_LEVEL_SHIFT 1 /* DSD_LEVEL */ 203992bee40SIan Lartey #define WM8741_DSD_LEVEL_WIDTH 1 /* DSD_LEVEL */ 204992bee40SIan Lartey #define WM8741_DSD_NO_NOTCH 0x0001 /* DSD_NO_NOTCH */ 205992bee40SIan Lartey #define WM8741_DSD_NO_NOTCH_MASK 0x0001 /* DSD_NO_NOTCH */ 206992bee40SIan Lartey #define WM8741_DSD_NO_NOTCH_SHIFT 0 /* DSD_NO_NOTCH */ 207992bee40SIan Lartey #define WM8741_DSD_NO_NOTCH_WIDTH 1 /* DSD_NO_NOTCH */ 208992bee40SIan Lartey 209992bee40SIan Lartey #define WM8741_SYSCLK 0 210992bee40SIan Lartey 211992bee40SIan Lartey extern struct snd_soc_dai wm8741_dai; 212992bee40SIan Lartey extern struct snd_soc_codec_device soc_codec_dev_wm8741; 213992bee40SIan Lartey 214992bee40SIan Lartey #endif 215