xref: /openbmc/linux/sound/soc/codecs/wm8400.h (revision d9fd5a71)
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * wm8400.h  --  audio driver for WM8400
4  *
5  * Copyright 2008 Wolfson Microelectronics PLC.
6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7  */
8 
9 #ifndef _WM8400_CODEC_H
10 #define _WM8400_CODEC_H
11 
12 #define WM8400_MCLK_DIV 0
13 #define WM8400_DACCLK_DIV 1
14 #define WM8400_ADCCLK_DIV 2
15 #define WM8400_BCLK_DIV 3
16 
17 #define WM8400_MCLK_DIV_1 0x400
18 #define WM8400_MCLK_DIV_2 0x800
19 
20 #define WM8400_DAC_CLKDIV_1    0x00
21 #define WM8400_DAC_CLKDIV_1_5  0x04
22 #define WM8400_DAC_CLKDIV_2    0x08
23 #define WM8400_DAC_CLKDIV_3    0x0c
24 #define WM8400_DAC_CLKDIV_4    0x10
25 #define WM8400_DAC_CLKDIV_5_5  0x14
26 #define WM8400_DAC_CLKDIV_6    0x18
27 
28 #define WM8400_ADC_CLKDIV_1    0x00
29 #define WM8400_ADC_CLKDIV_1_5  0x20
30 #define WM8400_ADC_CLKDIV_2    0x40
31 #define WM8400_ADC_CLKDIV_3    0x60
32 #define WM8400_ADC_CLKDIV_4    0x80
33 #define WM8400_ADC_CLKDIV_5_5  0xa0
34 #define WM8400_ADC_CLKDIV_6    0xc0
35 
36 
37 #define WM8400_BCLK_DIV_1                       (0x0 << 1)
38 #define WM8400_BCLK_DIV_1_5                     (0x1 << 1)
39 #define WM8400_BCLK_DIV_2                       (0x2 << 1)
40 #define WM8400_BCLK_DIV_3                       (0x3 << 1)
41 #define WM8400_BCLK_DIV_4                       (0x4 << 1)
42 #define WM8400_BCLK_DIV_5_5                     (0x5 << 1)
43 #define WM8400_BCLK_DIV_6                       (0x6 << 1)
44 #define WM8400_BCLK_DIV_8                       (0x7 << 1)
45 #define WM8400_BCLK_DIV_11                      (0x8 << 1)
46 #define WM8400_BCLK_DIV_12                      (0x9 << 1)
47 #define WM8400_BCLK_DIV_16                      (0xA << 1)
48 #define WM8400_BCLK_DIV_22                      (0xB << 1)
49 #define WM8400_BCLK_DIV_24                      (0xC << 1)
50 #define WM8400_BCLK_DIV_32                      (0xD << 1)
51 #define WM8400_BCLK_DIV_44                      (0xE << 1)
52 #define WM8400_BCLK_DIV_48                      (0xF << 1)
53 
54 #endif
55